drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <linux/numa.h>
  31 #include <scsi/fc/fc_fcoe.h>
  32 #include <net/udp_tunnel.h>
  33 #include <net/pkt_cls.h>
  34 #include <net/tc_act/tc_gact.h>
  35 #include <net/tc_act/tc_mirred.h>
  36 #include <net/vxlan.h>
  37 #include <net/mpls.h>
  38 #include <net/xdp_sock.h>
  39 #include <net/xfrm.h>
  40
  41 #include "ixgbe.h"
  42 #include "ixgbe_common.h"
  43 #include "ixgbe_dcb_82599.h"
  44 #include "ixgbe_phy.h"
  45 #include "ixgbe_sriov.h"
  46 #include "ixgbe_model.h"
  47 #include "ixgbe_txrx_common.h"
  48
  49 char ixgbe_driver_name[] = "ixgbe";
  50 static const char ixgbe_driver_string[] =
  51                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  52 #ifdef IXGBE_FCOE
  53 char ixgbe_default_device_descr[] =
  54                               "Intel(R) 10 Gigabit Network Connection";
  55 #else
  56 static char ixgbe_default_device_descr[] =
  57                               "Intel(R) 10 Gigabit Network Connection";
  58 #endif
  59 #define DRV_VERSION "5.1.0-k"
  60 const char ixgbe_driver_version[] = DRV_VERSION;
  61 static const char ixgbe_copyright[] =
  62                                 "Copyright (c) 1999-2016 Intel Corporation.";
  63
  64 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  65
  66 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  67         [board_82598]           = &ixgbe_82598_info,
  68         [board_82599]           = &ixgbe_82599_info,
  69         [board_X540]            = &ixgbe_X540_info,
  70         [board_X550]            = &ixgbe_X550_info,
  71         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  72         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  73         [board_x550em_a]        = &ixgbe_x550em_a_info,
  74         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  75 };
  76
  77 /* ixgbe_pci_tbl - PCI Device ID Table
  78  *
  79  * Wildcard entries (PCI_ANY_ID) should come last
  80  * Last entry must be all 0s
  81  *
  82  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  83  *   Class, Class Mask, private data (not used) }
  84  */
  85 static const struct pci_device_id ixgbe_pci_tbl[] = {
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 133         /* required last entry */
 134         {0, }
 135 };
 136 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 137
 138 #ifdef CONFIG_IXGBE_DCA
 139 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 140                             void *p);
 141 static struct notifier_block dca_notifier = {
 142         .notifier_call = ixgbe_notify_dca,
 143         .next          = NULL,
 144         .priority      = 0
 145 };
 146 #endif
 147
 148 #ifdef CONFIG_PCI_IOV
 149 static unsigned int max_vfs;
 150 module_param(max_vfs, uint, 0);
 151 MODULE_PARM_DESC(max_vfs,
 152                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 153 #endif /* CONFIG_PCI_IOV */
 154
 155 static unsigned int allow_unsupported_sfp;
 156 module_param(allow_unsupported_sfp, uint, 0);
 157 MODULE_PARM_DESC(allow_unsupported_sfp,
 158                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 159
 160 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 161 static int debug = -1;
 162 module_param(debug, int, 0);
 163 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 164
 165 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 166 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 167 MODULE_LICENSE("GPL v2");
 168 MODULE_VERSION(DRV_VERSION);
 169
 170 static struct workqueue_struct *ixgbe_wq;
 171
 172 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 173 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 174
 175 static const struct net_device_ops ixgbe_netdev_ops;
 176
 177 static bool netif_is_ixgbe(struct net_device *dev)
 178 {
 179         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 180 }
 181
 182 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 183                                           u32 reg, u16 *value)
 184 {
 185         struct pci_dev *parent_dev;
 186         struct pci_bus *parent_bus;
 187
 188         parent_bus = adapter->pdev->bus->parent;
 189         if (!parent_bus)
 190                 return -1;
 191
 192         parent_dev = parent_bus->self;
 193         if (!parent_dev)
 194                 return -1;
 195
 196         if (!pci_is_pcie(parent_dev))
 197                 return -1;
 198
 199         pcie_capability_read_word(parent_dev, reg, value);
 200         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 201             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 202                 return -1;
 203         return 0;
 204 }
 205
 206 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 207 {
 208         struct ixgbe_hw *hw = &adapter->hw;
 209         u16 link_status = 0;
 210         int err;
 211
 212         hw->bus.type = ixgbe_bus_type_pci_express;
 213
 214         /* Get the negotiated link width and speed from PCI config space of the
 215          * parent, as this device is behind a switch
 216          */
 217         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 218
 219         /* assume caller will handle error case */
 220         if (err)
 221                 return err;
 222
 223         hw->bus.width = ixgbe_convert_bus_width(link_status);
 224         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 225
 226         return 0;
 227 }
 228
 229 /**
 230  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 231  * @hw: hw specific details
 232  *
 233  * This function is used by probe to determine whether a device's PCI-Express
 234  * bandwidth details should be gathered from the parent bus instead of from the
 235  * device. Used to ensure that various locations all have the correct device ID
 236  * checks.
 237  */
 238 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 239 {
 240         switch (hw->device_id) {
 241         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 242         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 243                 return true;
 244         default:
 245                 return false;
 246         }
 247 }
 248
 249 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 250                                      int expected_gts)
 251 {
 252         struct ixgbe_hw *hw = &adapter->hw;
 253         struct pci_dev *pdev;
 254
 255         /* Some devices are not connected over PCIe and thus do not negotiate
 256          * speed. These devices do not have valid bus info, and thus any report
 257          * we generate may not be correct.
 258          */
 259         if (hw->bus.type == ixgbe_bus_type_internal)
 260                 return;
 261
 262         /* determine whether to use the parent device */
 263         if (ixgbe_pcie_from_parent(&adapter->hw))
 264                 pdev = adapter->pdev->bus->parent->self;
 265         else
 266                 pdev = adapter->pdev;
 267
 268         pcie_print_link_status(pdev);
 269 }
 270
 271 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 272 {
 273         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 274             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 275             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 276                 queue_work(ixgbe_wq, &adapter->service_task);
 277 }
 278
 279 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 280 {
 281         struct ixgbe_adapter *adapter = hw->back;
 282
 283         if (!hw->hw_addr)
 284                 return;
 285         hw->hw_addr = NULL;
 286         e_dev_err("Adapter removed\n");
 287         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 288                 ixgbe_service_event_schedule(adapter);
 289 }
 290
 291 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 292 {
 293         u8 __iomem *reg_addr;
 294         u32 value;
 295         int i;
 296
 297         reg_addr = READ_ONCE(hw->hw_addr);
 298         if (ixgbe_removed(reg_addr))
 299                 return IXGBE_FAILED_READ_REG;
 300
 301         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 302          * so perform several status register reads to determine if the adapter
 303          * has been removed.
 304          */
 305         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 306                 value = readl(reg_addr + IXGBE_STATUS);
 307                 if (value != IXGBE_FAILED_READ_REG)
 308                         break;
 309                 mdelay(3);
 310         }
 311
 312         if (value == IXGBE_FAILED_READ_REG)
 313                 ixgbe_remove_adapter(hw);
 314         else
 315                 value = readl(reg_addr + reg);
 316         return value;
 317 }
 318
 319 /**
 320  * ixgbe_read_reg - Read from device register
 321  * @hw: hw specific details
 322  * @reg: offset of register to read
 323  *
 324  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 325  *
 326  * This function is used to read device registers. It checks for device
 327  * removal by confirming any read that returns all ones by checking the
 328  * status register value for all ones. This function avoids reading from
 329  * the hardware if a removal was previously detected in which case it
 330  * returns IXGBE_FAILED_READ_REG (all ones).
 331  */
 332 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 333 {
 334         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 335         u32 value;
 336
 337         if (ixgbe_removed(reg_addr))
 338                 return IXGBE_FAILED_READ_REG;
 339         if (unlikely(hw->phy.nw_mng_if_sel &
 340                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 341                 struct ixgbe_adapter *adapter;
 342                 int i;
 343
 344                 for (i = 0; i < 200; ++i) {
 345                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 346                         if (likely(!value))
 347                                 goto writes_completed;
 348                         if (value == IXGBE_FAILED_READ_REG) {
 349                                 ixgbe_remove_adapter(hw);
 350                                 return IXGBE_FAILED_READ_REG;
 351                         }
 352                         udelay(5);
 353                 }
 354
 355                 adapter = hw->back;
 356                 e_warn(hw, "register writes incomplete %08x\n", value);
 357         }
 358
 359 writes_completed:
 360         value = readl(reg_addr + reg);
 361         if (unlikely(value == IXGBE_FAILED_READ_REG))
 362                 value = ixgbe_check_remove(hw, reg);
 363         return value;
 364 }
 365
 366 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 367 {
 368         u16 value;
 369
 370         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 371         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 372                 ixgbe_remove_adapter(hw);
 373                 return true;
 374         }
 375         return false;
 376 }
 377
 378 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 379 {
 380         struct ixgbe_adapter *adapter = hw->back;
 381         u16 value;
 382
 383         if (ixgbe_removed(hw->hw_addr))
 384                 return IXGBE_FAILED_READ_CFG_WORD;
 385         pci_read_config_word(adapter->pdev, reg, &value);
 386         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 387             ixgbe_check_cfg_remove(hw, adapter->pdev))
 388                 return IXGBE_FAILED_READ_CFG_WORD;
 389         return value;
 390 }
 391
 392 #ifdef CONFIG_PCI_IOV
 393 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 394 {
 395         struct ixgbe_adapter *adapter = hw->back;
 396         u32 value;
 397
 398         if (ixgbe_removed(hw->hw_addr))
 399                 return IXGBE_FAILED_READ_CFG_DWORD;
 400         pci_read_config_dword(adapter->pdev, reg, &value);
 401         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 402             ixgbe_check_cfg_remove(hw, adapter->pdev))
 403                 return IXGBE_FAILED_READ_CFG_DWORD;
 404         return value;
 405 }
 406 #endif /* CONFIG_PCI_IOV */
 407
 408 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 409 {
 410         struct ixgbe_adapter *adapter = hw->back;
 411
 412         if (ixgbe_removed(hw->hw_addr))
 413                 return;
 414         pci_write_config_word(adapter->pdev, reg, value);
 415 }
 416
 417 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 418 {
 419         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 420
 421         /* flush memory to make sure state is correct before next watchdog */
 422         smp_mb__before_atomic();
 423         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 424 }
 425
 426 struct ixgbe_reg_info {
 427         u32 ofs;
 428         char *name;
 429 };
 430
 431 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 432
 433         /* General Registers */
 434         {IXGBE_CTRL, "CTRL"},
 435         {IXGBE_STATUS, "STATUS"},
 436         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 437
 438         /* Interrupt Registers */
 439         {IXGBE_EICR, "EICR"},
 440
 441         /* RX Registers */
 442         {IXGBE_SRRCTL(0), "SRRCTL"},
 443         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 444         {IXGBE_RDLEN(0), "RDLEN"},
 445         {IXGBE_RDH(0), "RDH"},
 446         {IXGBE_RDT(0), "RDT"},
 447         {IXGBE_RXDCTL(0), "RXDCTL"},
 448         {IXGBE_RDBAL(0), "RDBAL"},
 449         {IXGBE_RDBAH(0), "RDBAH"},
 450
 451         /* TX Registers */
 452         {IXGBE_TDBAL(0), "TDBAL"},
 453         {IXGBE_TDBAH(0), "TDBAH"},
 454         {IXGBE_TDLEN(0), "TDLEN"},
 455         {IXGBE_TDH(0), "TDH"},
 456         {IXGBE_TDT(0), "TDT"},
 457         {IXGBE_TXDCTL(0), "TXDCTL"},
 458
 459         /* List Terminator */
 460         { .name = NULL }
 461 };
 462
 463
 464 /*
 465  * ixgbe_regdump - register printout routine
 466  */
 467 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 468 {
 469         int i;
 470         char rname[16];
 471         u32 regs[64];
 472
 473         switch (reginfo->ofs) {
 474         case IXGBE_SRRCTL(0):
 475                 for (i = 0; i < 64; i++)
 476                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 477                 break;
 478         case IXGBE_DCA_RXCTRL(0):
 479                 for (i = 0; i < 64; i++)
 480                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 481                 break;
 482         case IXGBE_RDLEN(0):
 483                 for (i = 0; i < 64; i++)
 484                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 485                 break;
 486         case IXGBE_RDH(0):
 487                 for (i = 0; i < 64; i++)
 488                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 489                 break;
 490         case IXGBE_RDT(0):
 491                 for (i = 0; i < 64; i++)
 492                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 493                 break;
 494         case IXGBE_RXDCTL(0):
 495                 for (i = 0; i < 64; i++)
 496                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 497                 break;
 498         case IXGBE_RDBAL(0):
 499                 for (i = 0; i < 64; i++)
 500                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 501                 break;
 502         case IXGBE_RDBAH(0):
 503                 for (i = 0; i < 64; i++)
 504                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 505                 break;
 506         case IXGBE_TDBAL(0):
 507                 for (i = 0; i < 64; i++)
 508                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 509                 break;
 510         case IXGBE_TDBAH(0):
 511                 for (i = 0; i < 64; i++)
 512                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 513                 break;
 514         case IXGBE_TDLEN(0):
 515                 for (i = 0; i < 64; i++)
 516                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 517                 break;
 518         case IXGBE_TDH(0):
 519                 for (i = 0; i < 64; i++)
 520                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 521                 break;
 522         case IXGBE_TDT(0):
 523                 for (i = 0; i < 64; i++)
 524                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 525                 break;
 526         case IXGBE_TXDCTL(0):
 527                 for (i = 0; i < 64; i++)
 528                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 529                 break;
 530         default:
 531                 pr_info("%-15s %08x\n",
 532                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 533                 return;
 534         }
 535
 536         i = 0;
 537         while (i < 64) {
 538                 int j;
 539                 char buf[9 * 8 + 1];
 540                 char *p = buf;
 541
 542                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 543                 for (j = 0; j < 8; j++)
 544                         p += sprintf(p, " %08x", regs[i++]);
 545                 pr_err("%-15s%s\n", rname, buf);
 546         }
 547
 548 }
 549
 550 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 551 {
 552         struct ixgbe_tx_buffer *tx_buffer;
 553
 554         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 555         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 556                 n, ring->next_to_use, ring->next_to_clean,
 557                 (u64)dma_unmap_addr(tx_buffer, dma),
 558                 dma_unmap_len(tx_buffer, len),
 559                 tx_buffer->next_to_watch,
 560                 (u64)tx_buffer->time_stamp);
 561 }
 562
 563 /*
 564  * ixgbe_dump - Print registers, tx-rings and rx-rings
 565  */
 566 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 567 {
 568         struct net_device *netdev = adapter->netdev;
 569         struct ixgbe_hw *hw = &adapter->hw;
 570         struct ixgbe_reg_info *reginfo;
 571         int n = 0;
 572         struct ixgbe_ring *ring;
 573         struct ixgbe_tx_buffer *tx_buffer;
 574         union ixgbe_adv_tx_desc *tx_desc;
 575         struct my_u0 { u64 a; u64 b; } *u0;
 576         struct ixgbe_ring *rx_ring;
 577         union ixgbe_adv_rx_desc *rx_desc;
 578         struct ixgbe_rx_buffer *rx_buffer_info;
 579         int i = 0;
 580
 581         if (!netif_msg_hw(adapter))
 582                 return;
 583
 584         /* Print netdevice Info */
 585         if (netdev) {
 586                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 587                 pr_info("Device Name     state            "
 588                         "trans_start\n");
 589                 pr_info("%-15s %016lX %016lX\n",
 590                         netdev->name,
 591                         netdev->state,
 592                         dev_trans_start(netdev));
 593         }
 594
 595         /* Print Registers */
 596         dev_info(&adapter->pdev->dev, "Register Dump\n");
 597         pr_info(" Register Name   Value\n");
 598         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 599              reginfo->name; reginfo++) {
 600                 ixgbe_regdump(hw, reginfo);
 601         }
 602
 603         /* Print TX Ring Summary */
 604         if (!netdev || !netif_running(netdev))
 605                 return;
 606
 607         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 608         pr_info(" %s     %s              %s        %s\n",
 609                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 610                 "leng", "ntw", "timestamp");
 611         for (n = 0; n < adapter->num_tx_queues; n++) {
 612                 ring = adapter->tx_ring[n];
 613                 ixgbe_print_buffer(ring, n);
 614         }
 615
 616         for (n = 0; n < adapter->num_xdp_queues; n++) {
 617                 ring = adapter->xdp_ring[n];
 618                 ixgbe_print_buffer(ring, n);
 619         }
 620
 621         /* Print TX Rings */
 622         if (!netif_msg_tx_done(adapter))
 623                 goto rx_ring_summary;
 624
 625         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 626
 627         /* Transmit Descriptor Formats
 628          *
 629          * 82598 Advanced Transmit Descriptor
 630          *   +--------------------------------------------------------------+
 631          * 0 |         Buffer Address [63:0]                                |
 632          *   +--------------------------------------------------------------+
 633          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 634          *   +--------------------------------------------------------------+
 635          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 636          *
 637          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 638          *   +--------------------------------------------------------------+
 639          * 0 |                          RSV [63:0]                          |
 640          *   +--------------------------------------------------------------+
 641          * 8 |            RSV           |  STA  |          NXTSEQ           |
 642          *   +--------------------------------------------------------------+
 643          *   63                       36 35   32 31                         0
 644          *
 645          * 82599+ Advanced Transmit Descriptor
 646          *   +--------------------------------------------------------------+
 647          * 0 |         Buffer Address [63:0]                                |
 648          *   +--------------------------------------------------------------+
 649          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 650          *   +--------------------------------------------------------------+
 651          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 652          *
 653          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 654          *   +--------------------------------------------------------------+
 655          * 0 |                          RSV [63:0]                          |
 656          *   +--------------------------------------------------------------+
 657          * 8 |            RSV           |  STA  |           RSV             |
 658          *   +--------------------------------------------------------------+
 659          *   63                       36 35   32 31                         0
 660          */
 661
 662         for (n = 0; n < adapter->num_tx_queues; n++) {
 663                 ring = adapter->tx_ring[n];
 664                 pr_info("------------------------------------\n");
 665                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 666                 pr_info("------------------------------------\n");
 667                 pr_info("%s%s    %s              %s        %s          %s\n",
 668                         "T [desc]     [address 63:0  ] ",
 669                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 670                         "leng", "ntw", "timestamp", "bi->skb");
 671
 672                 for (i = 0; ring->desc && (i < ring->count); i++) {
 673                         tx_desc = IXGBE_TX_DESC(ring, i);
 674                         tx_buffer = &ring->tx_buffer_info[i];
 675                         u0 = (struct my_u0 *)tx_desc;
 676                         if (dma_unmap_len(tx_buffer, len) > 0) {
 677                                 const char *ring_desc;
 678
 679                                 if (i == ring->next_to_use &&
 680                                     i == ring->next_to_clean)
 681                                         ring_desc = " NTC/U";
 682                                 else if (i == ring->next_to_use)
 683                                         ring_desc = " NTU";
 684                                 else if (i == ring->next_to_clean)
 685                                         ring_desc = " NTC";
 686                                 else
 687                                         ring_desc = "";
 688                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 689                                         i,
 690                                         le64_to_cpu((__force __le64)u0->a),
 691                                         le64_to_cpu((__force __le64)u0->b),
 692                                         (u64)dma_unmap_addr(tx_buffer, dma),
 693                                         dma_unmap_len(tx_buffer, len),
 694                                         tx_buffer->next_to_watch,
 695                                         (u64)tx_buffer->time_stamp,
 696                                         tx_buffer->skb,
 697                                         ring_desc);
 698
 699                                 if (netif_msg_pktdata(adapter) &&
 700                                     tx_buffer->skb)
 701                                         print_hex_dump(KERN_INFO, "",
 702                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 703                                                 tx_buffer->skb->data,
 704                                                 dma_unmap_len(tx_buffer, len),
 705                                                 true);
 706                         }
 707                 }
 708         }
 709
 710         /* Print RX Rings Summary */
 711 rx_ring_summary:
 712         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 713         pr_info("Queue [NTU] [NTC]\n");
 714         for (n = 0; n < adapter->num_rx_queues; n++) {
 715                 rx_ring = adapter->rx_ring[n];
 716                 pr_info("%5d %5X %5X\n",
 717                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 718         }
 719
 720         /* Print RX Rings */
 721         if (!netif_msg_rx_status(adapter))
 722                 return;
 723
 724         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 725
 726         /* Receive Descriptor Formats
 727          *
 728          * 82598 Advanced Receive Descriptor (Read) Format
 729          *    63                                           1        0
 730          *    +-----------------------------------------------------+
 731          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 732          *    +----------------------------------------------+------+
 733          *  8 |       Header Buffer Address [63:1]           |  DD  |
 734          *    +-----------------------------------------------------+
 735          *
 736          *
 737          * 82598 Advanced Receive Descriptor (Write-Back) Format
 738          *
 739          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 740          *   +------------------------------------------------------+
 741          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 742          *   | Packet   | IP     |   |          |     | Type | Type |
 743          *   | Checksum | Ident  |   |          |     |      |      |
 744          *   +------------------------------------------------------+
 745          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 746          *   +------------------------------------------------------+
 747          *   63       48 47    32 31            20 19               0
 748          *
 749          * 82599+ Advanced Receive Descriptor (Read) Format
 750          *    63                                           1        0
 751          *    +-----------------------------------------------------+
 752          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 753          *    +----------------------------------------------+------+
 754          *  8 |       Header Buffer Address [63:1]           |  DD  |
 755          *    +-----------------------------------------------------+
 756          *
 757          *
 758          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 759          *
 760          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 761          *   +------------------------------------------------------+
 762          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 763          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 764          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 765          *   +------------------------------------------------------+
 766          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 767          *   +------------------------------------------------------+
 768          *   63       48 47    32 31          20 19                 0
 769          */
 770
 771         for (n = 0; n < adapter->num_rx_queues; n++) {
 772                 rx_ring = adapter->rx_ring[n];
 773                 pr_info("------------------------------------\n");
 774                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 775                 pr_info("------------------------------------\n");
 776                 pr_info("%s%s%s\n",
 777                         "R  [desc]      [ PktBuf     A0] ",
 778                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 779                         "<-- Adv Rx Read format");
 780                 pr_info("%s%s%s\n",
 781                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 782                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 783                         "<-- Adv Rx Write-Back format");
 784
 785                 for (i = 0; i < rx_ring->count; i++) {
 786                         const char *ring_desc;
 787
 788                         if (i == rx_ring->next_to_use)
 789                                 ring_desc = " NTU";
 790                         else if (i == rx_ring->next_to_clean)
 791                                 ring_desc = " NTC";
 792                         else
 793                                 ring_desc = "";
 794
 795                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 796                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 797                         u0 = (struct my_u0 *)rx_desc;
 798                         if (rx_desc->wb.upper.length) {
 799                                 /* Descriptor Done */
 800                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 801                                         i,
 802                                         le64_to_cpu((__force __le64)u0->a),
 803                                         le64_to_cpu((__force __le64)u0->b),
 804                                         rx_buffer_info->skb,
 805                                         ring_desc);
 806                         } else {
 807                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 808                                         i,
 809                                         le64_to_cpu((__force __le64)u0->a),
 810                                         le64_to_cpu((__force __le64)u0->b),
 811                                         (u64)rx_buffer_info->dma,
 812                                         rx_buffer_info->skb,
 813                                         ring_desc);
 814
 815                                 if (netif_msg_pktdata(adapter) &&
 816                                     rx_buffer_info->dma) {
 817                                         print_hex_dump(KERN_INFO, "",
 818                                            DUMP_PREFIX_ADDRESS, 16, 1,
 819                                            page_address(rx_buffer_info->page) +
 820                                                     rx_buffer_info->page_offset,
 821                                            ixgbe_rx_bufsz(rx_ring), true);
 822                                 }
 823                         }
 824                 }
 825         }
 826 }
 827
 828 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 829 {
 830         u32 ctrl_ext;
 831
 832         /* Let firmware take over control of h/w */
 833         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 834         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 835                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 836 }
 837
 838 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 839 {
 840         u32 ctrl_ext;
 841
 842         /* Let firmware know the driver has taken over */
 843         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 844         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 845                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 846 }
 847
 848 /**
 849  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 850  * @adapter: pointer to adapter struct
 851  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 852  * @queue: queue to map the corresponding interrupt to
 853  * @msix_vector: the vector to map to the corresponding queue
 854  *
 855  */
 856 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 857                            u8 queue, u8 msix_vector)
 858 {
 859         u32 ivar, index;
 860         struct ixgbe_hw *hw = &adapter->hw;
 861         switch (hw->mac.type) {
 862         case ixgbe_mac_82598EB:
 863                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 864                 if (direction == -1)
 865                         direction = 0;
 866                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 867                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 868                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 869                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 870                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 871                 break;
 872         case ixgbe_mac_82599EB:
 873         case ixgbe_mac_X540:
 874         case ixgbe_mac_X550:
 875         case ixgbe_mac_X550EM_x:
 876         case ixgbe_mac_x550em_a:
 877                 if (direction == -1) {
 878                         /* other causes */
 879                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 880                         index = ((queue & 1) * 8);
 881                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 882                         ivar &= ~(0xFF << index);
 883                         ivar |= (msix_vector << index);
 884                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 885                         break;
 886                 } else {
 887                         /* tx or rx causes */
 888                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 889                         index = ((16 * (queue & 1)) + (8 * direction));
 890                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 891                         ivar &= ~(0xFF << index);
 892                         ivar |= (msix_vector << index);
 893                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 894                         break;
 895                 }
 896         default:
 897                 break;
 898         }
 899 }
 900
 901 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 902                             u64 qmask)
 903 {
 904         u32 mask;
 905
 906         switch (adapter->hw.mac.type) {
 907         case ixgbe_mac_82598EB:
 908                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 909                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 910                 break;
 911         case ixgbe_mac_82599EB:
 912         case ixgbe_mac_X540:
 913         case ixgbe_mac_X550:
 914         case ixgbe_mac_X550EM_x:
 915         case ixgbe_mac_x550em_a:
 916                 mask = (qmask & 0xFFFFFFFF);
 917                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 918                 mask = (qmask >> 32);
 919                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 920                 break;
 921         default:
 922                 break;
 923         }
 924 }
 925
 926 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 927 {
 928         struct ixgbe_hw *hw = &adapter->hw;
 929         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 930         int i;
 931         u32 data;
 932
 933         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 934             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 935                 return;
 936
 937         switch (hw->mac.type) {
 938         case ixgbe_mac_82598EB:
 939                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 940                 break;
 941         default:
 942                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 943         }
 944         hwstats->lxoffrxc += data;
 945
 946         /* refill credits (no tx hang) if we received xoff */
 947         if (!data)
 948                 return;
 949
 950         for (i = 0; i < adapter->num_tx_queues; i++)
 951                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 952                           &adapter->tx_ring[i]->state);
 953
 954         for (i = 0; i < adapter->num_xdp_queues; i++)
 955                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 956                           &adapter->xdp_ring[i]->state);
 957 }
 958
 959 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 960 {
 961         struct ixgbe_hw *hw = &adapter->hw;
 962         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 963         u32 xoff[8] = {0};
 964         u8 tc;
 965         int i;
 966         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 967
 968         if (adapter->ixgbe_ieee_pfc)
 969                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 970
 971         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 972                 ixgbe_update_xoff_rx_lfc(adapter);
 973                 return;
 974         }
 975
 976         /* update stats for each tc, only valid with PFC enabled */
 977         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 978                 u32 pxoffrxc;
 979
 980                 switch (hw->mac.type) {
 981                 case ixgbe_mac_82598EB:
 982                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 983                         break;
 984                 default:
 985                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 986                 }
 987                 hwstats->pxoffrxc[i] += pxoffrxc;
 988                 /* Get the TC for given UP */
 989                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 990                 xoff[tc] += pxoffrxc;
 991         }
 992
 993         /* disarm tx queues that have received xoff frames */
 994         for (i = 0; i < adapter->num_tx_queues; i++) {
 995                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 996
 997                 tc = tx_ring->dcb_tc;
 998                 if (xoff[tc])
 999                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1000         }
1001
1002         for (i = 0; i < adapter->num_xdp_queues; i++) {
1003                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1004
1005                 tc = xdp_ring->dcb_tc;
1006                 if (xoff[tc])
1007                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1008         }
1009 }
1010
1011 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1012 {
1013         return ring->stats.packets;
1014 }
1015
1016 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1017 {
1018         unsigned int head, tail;
1019
1020         head = ring->next_to_clean;
1021         tail = ring->next_to_use;
1022
1023         return ((head <= tail) ? tail : tail + ring->count) - head;
1024 }
1025
1026 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1027 {
1028         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1029         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1030         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1031
1032         clear_check_for_tx_hang(tx_ring);
1033
1034         /*
1035          * Check for a hung queue, but be thorough. This verifies
1036          * that a transmit has been completed since the previous
1037          * check AND there is at least one packet pending. The
1038          * ARMED bit is set to indicate a potential hang. The
1039          * bit is cleared if a pause frame is received to remove
1040          * false hang detection due to PFC or 802.3x frames. By
1041          * requiring this to fail twice we avoid races with
1042          * pfc clearing the ARMED bit and conditions where we
1043          * run the check_tx_hang logic with a transmit completion
1044          * pending but without time to complete it yet.
1045          */
1046         if (tx_done_old == tx_done && tx_pending)
1047                 /* make sure it is true for two checks in a row */
1048                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1049                                         &tx_ring->state);
1050         /* update completed stats and continue */
1051         tx_ring->tx_stats.tx_done_old = tx_done;
1052         /* reset the countdown */
1053         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1054
1055         return false;
1056 }
1057
1058 /**
1059  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1060  * @adapter: driver private struct
1061  **/
1062 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1063 {
1064
1065         /* Do the reset outside of interrupt context */
1066         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1067                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1068                 e_warn(drv, "initiating reset due to tx timeout\n");
1069                 ixgbe_service_event_schedule(adapter);
1070         }
1071 }
1072
1073 /**
1074  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1075  * @netdev: network interface device structure
1076  * @queue_index: Tx queue to set
1077  * @maxrate: desired maximum transmit bitrate
1078  **/
1079 static int ixgbe_tx_maxrate(struct net_device *netdev,
1080                             int queue_index, u32 maxrate)
1081 {
1082         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1083         struct ixgbe_hw *hw = &adapter->hw;
1084         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1085
1086         if (!maxrate)
1087                 return 0;
1088
1089         /* Calculate the rate factor values to set */
1090         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1091         bcnrc_val /= maxrate;
1092
1093         /* clear everything but the rate factor */
1094         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1095         IXGBE_RTTBCNRC_RF_DEC_MASK;
1096
1097         /* enable the rate scheduler */
1098         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1099
1100         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1101         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1102
1103         return 0;
1104 }
1105
1106 /**
1107  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1108  * @q_vector: structure containing interrupt and ring information
1109  * @tx_ring: tx ring to clean
1110  * @napi_budget: Used to determine if we are in netpoll
1111  **/
1112 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1113                                struct ixgbe_ring *tx_ring, int napi_budget)
1114 {
1115         struct ixgbe_adapter *adapter = q_vector->adapter;
1116         struct ixgbe_tx_buffer *tx_buffer;
1117         union ixgbe_adv_tx_desc *tx_desc;
1118         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1119         unsigned int budget = q_vector->tx.work_limit;
1120         unsigned int i = tx_ring->next_to_clean;
1121
1122         if (test_bit(__IXGBE_DOWN, &adapter->state))
1123                 return true;
1124
1125         tx_buffer = &tx_ring->tx_buffer_info[i];
1126         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1127         i -= tx_ring->count;
1128
1129         do {
1130                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1131
1132                 /* if next_to_watch is not set then there is no work pending */
1133                 if (!eop_desc)
1134                         break;
1135
1136                 /* prevent any other reads prior to eop_desc */
1137                 smp_rmb();
1138
1139                 /* if DD is not set pending work has not been completed */
1140                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1141                         break;
1142
1143                 /* clear next_to_watch to prevent false hangs */
1144                 tx_buffer->next_to_watch = NULL;
1145
1146                 /* update the statistics for this packet */
1147                 total_bytes += tx_buffer->bytecount;
1148                 total_packets += tx_buffer->gso_segs;
1149                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1150                         total_ipsec++;
1151
1152                 /* free the skb */
1153                 if (ring_is_xdp(tx_ring))
1154                         xdp_return_frame(tx_buffer->xdpf);
1155                 else
1156                         napi_consume_skb(tx_buffer->skb, napi_budget);
1157
1158                 /* unmap skb header data */
1159                 dma_unmap_single(tx_ring->dev,
1160                                  dma_unmap_addr(tx_buffer, dma),
1161                                  dma_unmap_len(tx_buffer, len),
1162                                  DMA_TO_DEVICE);
1163
1164                 /* clear tx_buffer data */
1165                 dma_unmap_len_set(tx_buffer, len, 0);
1166
1167                 /* unmap remaining buffers */
1168                 while (tx_desc != eop_desc) {
1169                         tx_buffer++;
1170                         tx_desc++;
1171                         i++;
1172                         if (unlikely(!i)) {
1173                                 i -= tx_ring->count;
1174                                 tx_buffer = tx_ring->tx_buffer_info;
1175                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1176                         }
1177
1178                         /* unmap any remaining paged data */
1179                         if (dma_unmap_len(tx_buffer, len)) {
1180                                 dma_unmap_page(tx_ring->dev,
1181                                                dma_unmap_addr(tx_buffer, dma),
1182                                                dma_unmap_len(tx_buffer, len),
1183                                                DMA_TO_DEVICE);
1184                                 dma_unmap_len_set(tx_buffer, len, 0);
1185                         }
1186                 }
1187
1188                 /* move us one more past the eop_desc for start of next pkt */
1189                 tx_buffer++;
1190                 tx_desc++;
1191                 i++;
1192                 if (unlikely(!i)) {
1193                         i -= tx_ring->count;
1194                         tx_buffer = tx_ring->tx_buffer_info;
1195                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1196                 }
1197
1198                 /* issue prefetch for next Tx descriptor */
1199                 prefetch(tx_desc);
1200
1201                 /* update budget accounting */
1202                 budget--;
1203         } while (likely(budget));
1204
1205         i += tx_ring->count;
1206         tx_ring->next_to_clean = i;
1207         u64_stats_update_begin(&tx_ring->syncp);
1208         tx_ring->stats.bytes += total_bytes;
1209         tx_ring->stats.packets += total_packets;
1210         u64_stats_update_end(&tx_ring->syncp);
1211         q_vector->tx.total_bytes += total_bytes;
1212         q_vector->tx.total_packets += total_packets;
1213         adapter->tx_ipsec += total_ipsec;
1214
1215         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1216                 /* schedule immediate reset if we believe we hung */
1217                 struct ixgbe_hw *hw = &adapter->hw;
1218                 e_err(drv, "Detected Tx Unit Hang %s\n"
1219                         "  Tx Queue             <%d>\n"
1220                         "  TDH, TDT             <%x>, <%x>\n"
1221                         "  next_to_use          <%x>\n"
1222                         "  next_to_clean        <%x>\n"
1223                         "tx_buffer_info[next_to_clean]\n"
1224                         "  time_stamp           <%lx>\n"
1225                         "  jiffies              <%lx>\n",
1226                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1227                         tx_ring->queue_index,
1228                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1229                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1230                         tx_ring->next_to_use, i,
1231                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1232
1233                 if (!ring_is_xdp(tx_ring))
1234                         netif_stop_subqueue(tx_ring->netdev,
1235                                             tx_ring->queue_index);
1236
1237                 e_info(probe,
1238                        "tx hang %d detected on queue %d, resetting adapter\n",
1239                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1240
1241                 /* schedule immediate reset if we believe we hung */
1242                 ixgbe_tx_timeout_reset(adapter);
1243
1244                 /* the adapter is about to reset, no point in enabling stuff */
1245                 return true;
1246         }
1247
1248         if (ring_is_xdp(tx_ring))
1249                 return !!budget;
1250
1251         netdev_tx_completed_queue(txring_txq(tx_ring),
1252                                   total_packets, total_bytes);
1253
1254 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1255         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1256                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1257                 /* Make sure that anybody stopping the queue after this
1258                  * sees the new next_to_clean.
1259                  */
1260                 smp_mb();
1261                 if (__netif_subqueue_stopped(tx_ring->netdev,
1262                                              tx_ring->queue_index)
1263                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1264                         netif_wake_subqueue(tx_ring->netdev,
1265                                             tx_ring->queue_index);
1266                         ++tx_ring->tx_stats.restart_queue;
1267                 }
1268         }
1269
1270         return !!budget;
1271 }
1272
1273 #ifdef CONFIG_IXGBE_DCA
1274 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1275                                 struct ixgbe_ring *tx_ring,
1276                                 int cpu)
1277 {
1278         struct ixgbe_hw *hw = &adapter->hw;
1279         u32 txctrl = 0;
1280         u16 reg_offset;
1281
1282         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1283                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1284
1285         switch (hw->mac.type) {
1286         case ixgbe_mac_82598EB:
1287                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1288                 break;
1289         case ixgbe_mac_82599EB:
1290         case ixgbe_mac_X540:
1291                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1292                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1293                 break;
1294         default:
1295                 /* for unknown hardware do not write register */
1296                 return;
1297         }
1298
1299         /*
1300          * We can enable relaxed ordering for reads, but not writes when
1301          * DCA is enabled.  This is due to a known issue in some chipsets
1302          * which will cause the DCA tag to be cleared.
1303          */
1304         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1305                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1306                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1307
1308         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1309 }
1310
1311 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1312                                 struct ixgbe_ring *rx_ring,
1313                                 int cpu)
1314 {
1315         struct ixgbe_hw *hw = &adapter->hw;
1316         u32 rxctrl = 0;
1317         u8 reg_idx = rx_ring->reg_idx;
1318
1319         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1320                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1321
1322         switch (hw->mac.type) {
1323         case ixgbe_mac_82599EB:
1324         case ixgbe_mac_X540:
1325                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1326                 break;
1327         default:
1328                 break;
1329         }
1330
1331         /*
1332          * We can enable relaxed ordering for reads, but not writes when
1333          * DCA is enabled.  This is due to a known issue in some chipsets
1334          * which will cause the DCA tag to be cleared.
1335          */
1336         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1337                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1338                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1339
1340         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1341 }
1342
1343 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1344 {
1345         struct ixgbe_adapter *adapter = q_vector->adapter;
1346         struct ixgbe_ring *ring;
1347         int cpu = get_cpu();
1348
1349         if (q_vector->cpu == cpu)
1350                 goto out_no_update;
1351
1352         ixgbe_for_each_ring(ring, q_vector->tx)
1353                 ixgbe_update_tx_dca(adapter, ring, cpu);
1354
1355         ixgbe_for_each_ring(ring, q_vector->rx)
1356                 ixgbe_update_rx_dca(adapter, ring, cpu);
1357
1358         q_vector->cpu = cpu;
1359 out_no_update:
1360         put_cpu();
1361 }
1362
1363 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1364 {
1365         int i;
1366
1367         /* always use CB2 mode, difference is masked in the CB driver */
1368         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1369                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1370                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1371         else
1372                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1373                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1374
1375         for (i = 0; i < adapter->num_q_vectors; i++) {
1376                 adapter->q_vector[i]->cpu = -1;
1377                 ixgbe_update_dca(adapter->q_vector[i]);
1378         }
1379 }
1380
1381 static int __ixgbe_notify_dca(struct device *dev, void *data)
1382 {
1383         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1384         unsigned long event = *(unsigned long *)data;
1385
1386         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1387                 return 0;
1388
1389         switch (event) {
1390         case DCA_PROVIDER_ADD:
1391                 /* if we're already enabled, don't do it again */
1392                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1393                         break;
1394                 if (dca_add_requester(dev) == 0) {
1395                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1396                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1397                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1398                         break;
1399                 }
1400                 /* fall through - DCA is disabled. */
1401         case DCA_PROVIDER_REMOVE:
1402                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1403                         dca_remove_requester(dev);
1404                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1405                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1406                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1407                 }
1408                 break;
1409         }
1410
1411         return 0;
1412 }
1413
1414 #endif /* CONFIG_IXGBE_DCA */
1415
1416 #define IXGBE_RSS_L4_TYPES_MASK \
1417         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1418          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1419          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1420          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1421
1422 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1423                                  union ixgbe_adv_rx_desc *rx_desc,
1424                                  struct sk_buff *skb)
1425 {
1426         u16 rss_type;
1427
1428         if (!(ring->netdev->features & NETIF_F_RXHASH))
1429                 return;
1430
1431         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1432                    IXGBE_RXDADV_RSSTYPE_MASK;
1433
1434         if (!rss_type)
1435                 return;
1436
1437         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1438                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1439                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1440 }
1441
1442 #ifdef IXGBE_FCOE
1443 /**
1444  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1445  * @ring: structure containing ring specific data
1446  * @rx_desc: advanced rx descriptor
1447  *
1448  * Returns : true if it is FCoE pkt
1449  */
1450 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1451                                     union ixgbe_adv_rx_desc *rx_desc)
1452 {
1453         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1454
1455         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1456                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1457                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1458                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1459 }
1460
1461 #endif /* IXGBE_FCOE */
1462 /**
1463  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1464  * @ring: structure containing ring specific data
1465  * @rx_desc: current Rx descriptor being processed
1466  * @skb: skb currently being received and modified
1467  **/
1468 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1469                                      union ixgbe_adv_rx_desc *rx_desc,
1470                                      struct sk_buff *skb)
1471 {
1472         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1473         bool encap_pkt = false;
1474
1475         skb_checksum_none_assert(skb);
1476
1477         /* Rx csum disabled */
1478         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1479                 return;
1480
1481         /* check for VXLAN and Geneve packets */
1482         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1483                 encap_pkt = true;
1484                 skb->encapsulation = 1;
1485         }
1486
1487         /* if IP and error */
1488         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1489             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1490                 ring->rx_stats.csum_err++;
1491                 return;
1492         }
1493
1494         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1495                 return;
1496
1497         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1498                 /*
1499                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1500                  * checksum errors.
1501                  */
1502                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1503                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1504                         return;
1505
1506                 ring->rx_stats.csum_err++;
1507                 return;
1508         }
1509
1510         /* It must be a TCP or UDP packet with a valid checksum */
1511         skb->ip_summed = CHECKSUM_UNNECESSARY;
1512         if (encap_pkt) {
1513                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1514                         return;
1515
1516                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1517                         skb->ip_summed = CHECKSUM_NONE;
1518                         return;
1519                 }
1520                 /* If we checked the outer header let the stack know */
1521                 skb->csum_level = 1;
1522         }
1523 }
1524
1525 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1526 {
1527         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1528 }
1529
1530 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1531                                     struct ixgbe_rx_buffer *bi)
1532 {
1533         struct page *page = bi->page;
1534         dma_addr_t dma;
1535
1536         /* since we are recycling buffers we should seldom need to alloc */
1537         if (likely(page))
1538                 return true;
1539
1540         /* alloc new page for storage */
1541         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1542         if (unlikely(!page)) {
1543                 rx_ring->rx_stats.alloc_rx_page_failed++;
1544                 return false;
1545         }
1546
1547         /* map page for use */
1548         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1549                                  ixgbe_rx_pg_size(rx_ring),
1550                                  DMA_FROM_DEVICE,
1551                                  IXGBE_RX_DMA_ATTR);
1552
1553         /*
1554          * if mapping failed free memory back to system since
1555          * there isn't much point in holding memory we can't use
1556          */
1557         if (dma_mapping_error(rx_ring->dev, dma)) {
1558                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1559
1560                 rx_ring->rx_stats.alloc_rx_page_failed++;
1561                 return false;
1562         }
1563
1564         bi->dma = dma;
1565         bi->page = page;
1566         bi->page_offset = ixgbe_rx_offset(rx_ring);
1567         page_ref_add(page, USHRT_MAX - 1);
1568         bi->pagecnt_bias = USHRT_MAX;
1569         rx_ring->rx_stats.alloc_rx_page++;
1570
1571         return true;
1572 }
1573
1574 /**
1575  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1576  * @rx_ring: ring to place buffers on
1577  * @cleaned_count: number of buffers to replace
1578  **/
1579 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1580 {
1581         union ixgbe_adv_rx_desc *rx_desc;
1582         struct ixgbe_rx_buffer *bi;
1583         u16 i = rx_ring->next_to_use;
1584         u16 bufsz;
1585
1586         /* nothing to do */
1587         if (!cleaned_count)
1588                 return;
1589
1590         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1591         bi = &rx_ring->rx_buffer_info[i];
1592         i -= rx_ring->count;
1593
1594         bufsz = ixgbe_rx_bufsz(rx_ring);
1595
1596         do {
1597                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1598                         break;
1599
1600                 /* sync the buffer for use by the device */
1601                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1602                                                  bi->page_offset, bufsz,
1603                                                  DMA_FROM_DEVICE);
1604
1605                 /*
1606                  * Refresh the desc even if buffer_addrs didn't change
1607                  * because each write-back erases this info.
1608                  */
1609                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1610
1611                 rx_desc++;
1612                 bi++;
1613                 i++;
1614                 if (unlikely(!i)) {
1615                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1616                         bi = rx_ring->rx_buffer_info;
1617                         i -= rx_ring->count;
1618                 }
1619
1620                 /* clear the length for the next_to_use descriptor */
1621                 rx_desc->wb.upper.length = 0;
1622
1623                 cleaned_count--;
1624         } while (cleaned_count);
1625
1626         i += rx_ring->count;
1627
1628         if (rx_ring->next_to_use != i) {
1629                 rx_ring->next_to_use = i;
1630
1631                 /* update next to alloc since we have filled the ring */
1632                 rx_ring->next_to_alloc = i;
1633
1634                 /* Force memory writes to complete before letting h/w
1635                  * know there are new descriptors to fetch.  (Only
1636                  * applicable for weak-ordered memory model archs,
1637                  * such as IA-64).
1638                  */
1639                 wmb();
1640                 writel(i, rx_ring->tail);
1641         }
1642 }
1643
1644 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1645                                    struct sk_buff *skb)
1646 {
1647         u16 hdr_len = skb_headlen(skb);
1648
1649         /* set gso_size to avoid messing up TCP MSS */
1650         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1651                                                  IXGBE_CB(skb)->append_cnt);
1652         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1653 }
1654
1655 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1656                                    struct sk_buff *skb)
1657 {
1658         /* if append_cnt is 0 then frame is not RSC */
1659         if (!IXGBE_CB(skb)->append_cnt)
1660                 return;
1661
1662         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1663         rx_ring->rx_stats.rsc_flush++;
1664
1665         ixgbe_set_rsc_gso_size(rx_ring, skb);
1666
1667         /* gso_size is computed using append_cnt so always clear it last */
1668         IXGBE_CB(skb)->append_cnt = 0;
1669 }
1670
1671 /**
1672  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1673  * @rx_ring: rx descriptor ring packet is being transacted on
1674  * @rx_desc: pointer to the EOP Rx descriptor
1675  * @skb: pointer to current skb being populated
1676  *
1677  * This function checks the ring, descriptor, and packet information in
1678  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1679  * other fields within the skb.
1680  **/
1681 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1682                               union ixgbe_adv_rx_desc *rx_desc,
1683                               struct sk_buff *skb)
1684 {
1685         struct net_device *dev = rx_ring->netdev;
1686         u32 flags = rx_ring->q_vector->adapter->flags;
1687
1688         ixgbe_update_rsc_stats(rx_ring, skb);
1689
1690         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1691
1692         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1693
1694         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1695                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1696
1697         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1698             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1699                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1700                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1701         }
1702
1703         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1704                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1705
1706         /* record Rx queue, or update MACVLAN statistics */
1707         if (netif_is_ixgbe(dev))
1708                 skb_record_rx_queue(skb, rx_ring->queue_index);
1709         else
1710                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1711                                  false);
1712
1713         skb->protocol = eth_type_trans(skb, dev);
1714 }
1715
1716 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1717                   struct sk_buff *skb)
1718 {
1719         napi_gro_receive(&q_vector->napi, skb);
1720 }
1721
1722 /**
1723  * ixgbe_is_non_eop - process handling of non-EOP buffers
1724  * @rx_ring: Rx ring being processed
1725  * @rx_desc: Rx descriptor for current buffer
1726  * @skb: Current socket buffer containing buffer in progress
1727  *
1728  * This function updates next to clean.  If the buffer is an EOP buffer
1729  * this function exits returning false, otherwise it will place the
1730  * sk_buff in the next buffer to be chained and return true indicating
1731  * that this is in fact a non-EOP buffer.
1732  **/
1733 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1734                              union ixgbe_adv_rx_desc *rx_desc,
1735                              struct sk_buff *skb)
1736 {
1737         u32 ntc = rx_ring->next_to_clean + 1;
1738
1739         /* fetch, update, and store next to clean */
1740         ntc = (ntc < rx_ring->count) ? ntc : 0;
1741         rx_ring->next_to_clean = ntc;
1742
1743         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1744
1745         /* update RSC append count if present */
1746         if (ring_is_rsc_enabled(rx_ring)) {
1747                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1748                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1749
1750                 if (unlikely(rsc_enabled)) {
1751                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1752
1753                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1754                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1755
1756                         /* update ntc based on RSC value */
1757                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1758                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1759                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1760                 }
1761         }
1762
1763         /* if we are the last buffer then there is nothing else to do */
1764         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1765                 return false;
1766
1767         /* place skb in next buffer to be received */
1768         rx_ring->rx_buffer_info[ntc].skb = skb;
1769         rx_ring->rx_stats.non_eop_descs++;
1770
1771         return true;
1772 }
1773
1774 /**
1775  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1776  * @rx_ring: rx descriptor ring packet is being transacted on
1777  * @skb: pointer to current skb being adjusted
1778  *
1779  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1780  * main difference between this version and the original function is that
1781  * this function can make several assumptions about the state of things
1782  * that allow for significant optimizations versus the standard function.
1783  * As a result we can do things like drop a frag and maintain an accurate
1784  * truesize for the skb.
1785  */
1786 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1787                             struct sk_buff *skb)
1788 {
1789         skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1790         unsigned char *va;
1791         unsigned int pull_len;
1792
1793         /*
1794          * it is valid to use page_address instead of kmap since we are
1795          * working with pages allocated out of the lomem pool per
1796          * alloc_page(GFP_ATOMIC)
1797          */
1798         va = skb_frag_address(frag);
1799
1800         /*
1801          * we need the header to contain the greater of either ETH_HLEN or
1802          * 60 bytes if the skb->len is less than 60 for skb_pad.
1803          */
1804         pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE);
1805
1806         /* align pull length to size of long to optimize memcpy performance */
1807         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1808
1809         /* update all of the pointers */
1810         skb_frag_size_sub(frag, pull_len);
1811         skb_frag_off_add(frag, pull_len);
1812         skb->data_len -= pull_len;
1813         skb->tail += pull_len;
1814 }
1815
1816 /**
1817  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1818  * @rx_ring: rx descriptor ring packet is being transacted on
1819  * @skb: pointer to current skb being updated
1820  *
1821  * This function provides a basic DMA sync up for the first fragment of an
1822  * skb.  The reason for doing this is that the first fragment cannot be
1823  * unmapped until we have reached the end of packet descriptor for a buffer
1824  * chain.
1825  */
1826 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1827                                 struct sk_buff *skb)
1828 {
1829         if (ring_uses_build_skb(rx_ring)) {
1830                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1831
1832                 dma_sync_single_range_for_cpu(rx_ring->dev,
1833                                               IXGBE_CB(skb)->dma,
1834                                               offset,
1835                                               skb_headlen(skb),
1836                                               DMA_FROM_DEVICE);
1837         } else {
1838                 skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1839
1840                 dma_sync_single_range_for_cpu(rx_ring->dev,
1841                                               IXGBE_CB(skb)->dma,
1842                                               skb_frag_off(frag),
1843                                               skb_frag_size(frag),
1844                                               DMA_FROM_DEVICE);
1845         }
1846
1847         /* If the page was released, just unmap it. */
1848         if (unlikely(IXGBE_CB(skb)->page_released)) {
1849                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1850                                      ixgbe_rx_pg_size(rx_ring),
1851                                      DMA_FROM_DEVICE,
1852                                      IXGBE_RX_DMA_ATTR);
1853         }
1854 }
1855
1856 /**
1857  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1858  * @rx_ring: rx descriptor ring packet is being transacted on
1859  * @rx_desc: pointer to the EOP Rx descriptor
1860  * @skb: pointer to current skb being fixed
1861  *
1862  * Check if the skb is valid in the XDP case it will be an error pointer.
1863  * Return true in this case to abort processing and advance to next
1864  * descriptor.
1865  *
1866  * Check for corrupted packet headers caused by senders on the local L2
1867  * embedded NIC switch not setting up their Tx Descriptors right.  These
1868  * should be very rare.
1869  *
1870  * Also address the case where we are pulling data in on pages only
1871  * and as such no data is present in the skb header.
1872  *
1873  * In addition if skb is not at least 60 bytes we need to pad it so that
1874  * it is large enough to qualify as a valid Ethernet frame.
1875  *
1876  * Returns true if an error was encountered and skb was freed.
1877  **/
1878 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1879                            union ixgbe_adv_rx_desc *rx_desc,
1880                            struct sk_buff *skb)
1881 {
1882         struct net_device *netdev = rx_ring->netdev;
1883
1884         /* XDP packets use error pointer so abort at this point */
1885         if (IS_ERR(skb))
1886                 return true;
1887
1888         /* Verify netdev is present, and that packet does not have any
1889          * errors that would be unacceptable to the netdev.
1890          */
1891         if (!netdev ||
1892             (unlikely(ixgbe_test_staterr(rx_desc,
1893                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1894              !(netdev->features & NETIF_F_RXALL)))) {
1895                 dev_kfree_skb_any(skb);
1896                 return true;
1897         }
1898
1899         /* place header in linear portion of buffer */
1900         if (!skb_headlen(skb))
1901                 ixgbe_pull_tail(rx_ring, skb);
1902
1903 #ifdef IXGBE_FCOE
1904         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1905         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1906                 return false;
1907
1908 #endif
1909         /* if eth_skb_pad returns an error the skb was freed */
1910         if (eth_skb_pad(skb))
1911                 return true;
1912
1913         return false;
1914 }
1915
1916 /**
1917  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1918  * @rx_ring: rx descriptor ring to store buffers on
1919  * @old_buff: donor buffer to have page reused
1920  *
1921  * Synchronizes page for reuse by the adapter
1922  **/
1923 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1924                                 struct ixgbe_rx_buffer *old_buff)
1925 {
1926         struct ixgbe_rx_buffer *new_buff;
1927         u16 nta = rx_ring->next_to_alloc;
1928
1929         new_buff = &rx_ring->rx_buffer_info[nta];
1930
1931         /* update, and store next to alloc */
1932         nta++;
1933         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1934
1935         /* Transfer page from old buffer to new buffer.
1936          * Move each member individually to avoid possible store
1937          * forwarding stalls and unnecessary copy of skb.
1938          */
1939         new_buff->dma           = old_buff->dma;
1940         new_buff->page          = old_buff->page;
1941         new_buff->page_offset   = old_buff->page_offset;
1942         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1943 }
1944
1945 static inline bool ixgbe_page_is_reserved(struct page *page)
1946 {
1947         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1948 }
1949
1950 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1951 {
1952         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1953         struct page *page = rx_buffer->page;
1954
1955         /* avoid re-using remote pages */
1956         if (unlikely(ixgbe_page_is_reserved(page)))
1957                 return false;
1958
1959 #if (PAGE_SIZE < 8192)
1960         /* if we are only owner of page we can reuse it */
1961         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1962                 return false;
1963 #else
1964         /* The last offset is a bit aggressive in that we assume the
1965          * worst case of FCoE being enabled and using a 3K buffer.
1966          * However this should have minimal impact as the 1K extra is
1967          * still less than one buffer in size.
1968          */
1969 #define IXGBE_LAST_OFFSET \
1970         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1971         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1972                 return false;
1973 #endif
1974
1975         /* If we have drained the page fragment pool we need to update
1976          * the pagecnt_bias and page count so that we fully restock the
1977          * number of references the driver holds.
1978          */
1979         if (unlikely(pagecnt_bias == 1)) {
1980                 page_ref_add(page, USHRT_MAX - 1);
1981                 rx_buffer->pagecnt_bias = USHRT_MAX;
1982         }
1983
1984         return true;
1985 }
1986
1987 /**
1988  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1989  * @rx_ring: rx descriptor ring to transact packets on
1990  * @rx_buffer: buffer containing page to add
1991  * @skb: sk_buff to place the data into
1992  * @size: size of data in rx_buffer
1993  *
1994  * This function will add the data contained in rx_buffer->page to the skb.
1995  * This is done either through a direct copy if the data in the buffer is
1996  * less than the skb header size, otherwise it will just attach the page as
1997  * a frag to the skb.
1998  *
1999  * The function will then update the page offset if necessary and return
2000  * true if the buffer can be reused by the adapter.
2001  **/
2002 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2003                               struct ixgbe_rx_buffer *rx_buffer,
2004                               struct sk_buff *skb,
2005                               unsigned int size)
2006 {
2007 #if (PAGE_SIZE < 8192)
2008         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2009 #else
2010         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2011                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2012                                 SKB_DATA_ALIGN(size);
2013 #endif
2014         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2015                         rx_buffer->page_offset, size, truesize);
2016 #if (PAGE_SIZE < 8192)
2017         rx_buffer->page_offset ^= truesize;
2018 #else
2019         rx_buffer->page_offset += truesize;
2020 #endif
2021 }
2022
2023 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2024                                                    union ixgbe_adv_rx_desc *rx_desc,
2025                                                    struct sk_buff **skb,
2026                                                    const unsigned int size)
2027 {
2028         struct ixgbe_rx_buffer *rx_buffer;
2029
2030         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2031         prefetchw(rx_buffer->page);
2032         *skb = rx_buffer->skb;
2033
2034         /* Delay unmapping of the first packet. It carries the header
2035          * information, HW may still access the header after the writeback.
2036          * Only unmap it when EOP is reached
2037          */
2038         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2039                 if (!*skb)
2040                         goto skip_sync;
2041         } else {
2042                 if (*skb)
2043                         ixgbe_dma_sync_frag(rx_ring, *skb);
2044         }
2045
2046         /* we are reusing so sync this buffer for CPU use */
2047         dma_sync_single_range_for_cpu(rx_ring->dev,
2048                                       rx_buffer->dma,
2049                                       rx_buffer->page_offset,
2050                                       size,
2051                                       DMA_FROM_DEVICE);
2052 skip_sync:
2053         rx_buffer->pagecnt_bias--;
2054
2055         return rx_buffer;
2056 }
2057
2058 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2059                                 struct ixgbe_rx_buffer *rx_buffer,
2060                                 struct sk_buff *skb)
2061 {
2062         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2063                 /* hand second half of page back to the ring */
2064                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2065         } else {
2066                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2067                         /* the page has been released from the ring */
2068                         IXGBE_CB(skb)->page_released = true;
2069                 } else {
2070                         /* we are not reusing the buffer so unmap it */
2071                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2072                                              ixgbe_rx_pg_size(rx_ring),
2073                                              DMA_FROM_DEVICE,
2074                                              IXGBE_RX_DMA_ATTR);
2075                 }
2076                 __page_frag_cache_drain(rx_buffer->page,
2077                                         rx_buffer->pagecnt_bias);
2078         }
2079
2080         /* clear contents of rx_buffer */
2081         rx_buffer->page = NULL;
2082         rx_buffer->skb = NULL;
2083 }
2084
2085 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2086                                            struct ixgbe_rx_buffer *rx_buffer,
2087                                            struct xdp_buff *xdp,
2088                                            union ixgbe_adv_rx_desc *rx_desc)
2089 {
2090         unsigned int size = xdp->data_end - xdp->data;
2091 #if (PAGE_SIZE < 8192)
2092         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2093 #else
2094         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2095                                                xdp->data_hard_start);
2096 #endif
2097         struct sk_buff *skb;
2098
2099         /* prefetch first cache line of first page */
2100         prefetch(xdp->data);
2101 #if L1_CACHE_BYTES < 128
2102         prefetch(xdp->data + L1_CACHE_BYTES);
2103 #endif
2104         /* Note, we get here by enabling legacy-rx via:
2105          *
2106          *    ethtool --set-priv-flags <dev> legacy-rx on
2107          *
2108          * In this mode, we currently get 0 extra XDP headroom as
2109          * opposed to having legacy-rx off, where we process XDP
2110          * packets going to stack via ixgbe_build_skb(). The latter
2111          * provides us currently with 192 bytes of headroom.
2112          *
2113          * For ixgbe_construct_skb() mode it means that the
2114          * xdp->data_meta will always point to xdp->data, since
2115          * the helper cannot expand the head. Should this ever
2116          * change in future for legacy-rx mode on, then lets also
2117          * add xdp->data_meta handling here.
2118          */
2119
2120         /* allocate a skb to store the frags */
2121         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2122         if (unlikely(!skb))
2123                 return NULL;
2124
2125         if (size > IXGBE_RX_HDR_SIZE) {
2126                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2127                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2128
2129                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2130                                 xdp->data - page_address(rx_buffer->page),
2131                                 size, truesize);
2132 #if (PAGE_SIZE < 8192)
2133                 rx_buffer->page_offset ^= truesize;
2134 #else
2135                 rx_buffer->page_offset += truesize;
2136 #endif
2137         } else {
2138                 memcpy(__skb_put(skb, size),
2139                        xdp->data, ALIGN(size, sizeof(long)));
2140                 rx_buffer->pagecnt_bias++;
2141         }
2142
2143         return skb;
2144 }
2145
2146 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2147                                        struct ixgbe_rx_buffer *rx_buffer,
2148                                        struct xdp_buff *xdp,
2149                                        union ixgbe_adv_rx_desc *rx_desc)
2150 {
2151         unsigned int metasize = xdp->data - xdp->data_meta;
2152 #if (PAGE_SIZE < 8192)
2153         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2154 #else
2155         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2156                                 SKB_DATA_ALIGN(xdp->data_end -
2157                                                xdp->data_hard_start);
2158 #endif
2159         struct sk_buff *skb;
2160
2161         /* Prefetch first cache line of first page. If xdp->data_meta
2162          * is unused, this points extactly as xdp->data, otherwise we
2163          * likely have a consumer accessing first few bytes of meta
2164          * data, and then actual data.
2165          */
2166         prefetch(xdp->data_meta);
2167 #if L1_CACHE_BYTES < 128
2168         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2169 #endif
2170
2171         /* build an skb to around the page buffer */
2172         skb = build_skb(xdp->data_hard_start, truesize);
2173         if (unlikely(!skb))
2174                 return NULL;
2175
2176         /* update pointers within the skb to store the data */
2177         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2178         __skb_put(skb, xdp->data_end - xdp->data);
2179         if (metasize)
2180                 skb_metadata_set(skb, metasize);
2181
2182         /* record DMA address if this is the start of a chain of buffers */
2183         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2184                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2185
2186         /* update buffer offset */
2187 #if (PAGE_SIZE < 8192)
2188         rx_buffer->page_offset ^= truesize;
2189 #else
2190         rx_buffer->page_offset += truesize;
2191 #endif
2192
2193         return skb;
2194 }
2195
2196 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2197                                      struct ixgbe_ring *rx_ring,
2198                                      struct xdp_buff *xdp)
2199 {
2200         int err, result = IXGBE_XDP_PASS;
2201         struct bpf_prog *xdp_prog;
2202         struct xdp_frame *xdpf;
2203         u32 act;
2204
2205         rcu_read_lock();
2206         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2207
2208         if (!xdp_prog)
2209                 goto xdp_out;
2210
2211         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2212
2213         act = bpf_prog_run_xdp(xdp_prog, xdp);
2214         switch (act) {
2215         case XDP_PASS:
2216                 break;
2217         case XDP_TX:
2218                 xdpf = convert_to_xdp_frame(xdp);
2219                 if (unlikely(!xdpf)) {
2220                         result = IXGBE_XDP_CONSUMED;
2221                         break;
2222                 }
2223                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2224                 break;
2225         case XDP_REDIRECT:
2226                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2227                 if (!err)
2228                         result = IXGBE_XDP_REDIR;
2229                 else
2230                         result = IXGBE_XDP_CONSUMED;
2231                 break;
2232         default:
2233                 bpf_warn_invalid_xdp_action(act);
2234                 /* fallthrough */
2235         case XDP_ABORTED:
2236                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2237                 /* fallthrough -- handle aborts by dropping packet */
2238         case XDP_DROP:
2239                 result = IXGBE_XDP_CONSUMED;
2240                 break;
2241         }
2242 xdp_out:
2243         rcu_read_unlock();
2244         return ERR_PTR(-result);
2245 }
2246
2247 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2248                                  struct ixgbe_rx_buffer *rx_buffer,
2249                                  unsigned int size)
2250 {
2251 #if (PAGE_SIZE < 8192)
2252         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2253
2254         rx_buffer->page_offset ^= truesize;
2255 #else
2256         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2257                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2258                                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2259                                 SKB_DATA_ALIGN(size);
2260
2261         rx_buffer->page_offset += truesize;
2262 #endif
2263 }
2264
2265 /**
2266  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2267  * @q_vector: structure containing interrupt and ring information
2268  * @rx_ring: rx descriptor ring to transact packets on
2269  * @budget: Total limit on number of packets to process
2270  *
2271  * This function provides a "bounce buffer" approach to Rx interrupt
2272  * processing.  The advantage to this is that on systems that have
2273  * expensive overhead for IOMMU access this provides a means of avoiding
2274  * it by maintaining the mapping of the page to the syste.
2275  *
2276  * Returns amount of work completed
2277  **/
2278 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2279                                struct ixgbe_ring *rx_ring,
2280                                const int budget)
2281 {
2282         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2283         struct ixgbe_adapter *adapter = q_vector->adapter;
2284 #ifdef IXGBE_FCOE
2285         int ddp_bytes;
2286         unsigned int mss = 0;
2287 #endif /* IXGBE_FCOE */
2288         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2289         unsigned int xdp_xmit = 0;
2290         struct xdp_buff xdp;
2291
2292         xdp.rxq = &rx_ring->xdp_rxq;
2293
2294         while (likely(total_rx_packets < budget)) {
2295                 union ixgbe_adv_rx_desc *rx_desc;
2296                 struct ixgbe_rx_buffer *rx_buffer;
2297                 struct sk_buff *skb;
2298                 unsigned int size;
2299
2300                 /* return some buffers to hardware, one at a time is too slow */
2301                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2302                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2303                         cleaned_count = 0;
2304                 }
2305
2306                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2307                 size = le16_to_cpu(rx_desc->wb.upper.length);
2308                 if (!size)
2309                         break;
2310
2311                 /* This memory barrier is needed to keep us from reading
2312                  * any other fields out of the rx_desc until we know the
2313                  * descriptor has been written back
2314                  */
2315                 dma_rmb();
2316
2317                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2318
2319                 /* retrieve a buffer from the ring */
2320                 if (!skb) {
2321                         xdp.data = page_address(rx_buffer->page) +
2322                                    rx_buffer->page_offset;
2323                         xdp.data_meta = xdp.data;
2324                         xdp.data_hard_start = xdp.data -
2325                                               ixgbe_rx_offset(rx_ring);
2326                         xdp.data_end = xdp.data + size;
2327
2328                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2329                 }
2330
2331                 if (IS_ERR(skb)) {
2332                         unsigned int xdp_res = -PTR_ERR(skb);
2333
2334                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2335                                 xdp_xmit |= xdp_res;
2336                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2337                         } else {
2338                                 rx_buffer->pagecnt_bias++;
2339                         }
2340                         total_rx_packets++;
2341                         total_rx_bytes += size;
2342                 } else if (skb) {
2343                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2344                 } else if (ring_uses_build_skb(rx_ring)) {
2345                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2346                                               &xdp, rx_desc);
2347                 } else {
2348                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2349                                                   &xdp, rx_desc);
2350                 }
2351
2352                 /* exit if we failed to retrieve a buffer */
2353                 if (!skb) {
2354                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2355                         rx_buffer->pagecnt_bias++;
2356                         break;
2357                 }
2358
2359                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2360                 cleaned_count++;
2361
2362                 /* place incomplete frames back on ring for completion */
2363                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2364                         continue;
2365
2366                 /* verify the packet layout is correct */
2367                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2368                         continue;
2369
2370                 /* probably a little skewed due to removing CRC */
2371                 total_rx_bytes += skb->len;
2372
2373                 /* populate checksum, timestamp, VLAN, and protocol */
2374                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2375
2376 #ifdef IXGBE_FCOE
2377                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2378                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2379                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2380                         /* include DDPed FCoE data */
2381                         if (ddp_bytes > 0) {
2382                                 if (!mss) {
2383                                         mss = rx_ring->netdev->mtu -
2384                                                 sizeof(struct fcoe_hdr) -
2385                                                 sizeof(struct fc_frame_header) -
2386                                                 sizeof(struct fcoe_crc_eof);
2387                                         if (mss > 512)
2388                                                 mss &= ~511;
2389                                 }
2390                                 total_rx_bytes += ddp_bytes;
2391                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2392                                                                  mss);
2393                         }
2394                         if (!ddp_bytes) {
2395                                 dev_kfree_skb_any(skb);
2396                                 continue;
2397                         }
2398                 }
2399
2400 #endif /* IXGBE_FCOE */
2401                 ixgbe_rx_skb(q_vector, skb);
2402
2403                 /* update budget accounting */
2404                 total_rx_packets++;
2405         }
2406
2407         if (xdp_xmit & IXGBE_XDP_REDIR)
2408                 xdp_do_flush_map();
2409
2410         if (xdp_xmit & IXGBE_XDP_TX) {
2411                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2412
2413                 /* Force memory writes to complete before letting h/w
2414                  * know there are new descriptors to fetch.
2415                  */
2416                 wmb();
2417                 writel(ring->next_to_use, ring->tail);
2418         }
2419
2420         u64_stats_update_begin(&rx_ring->syncp);
2421         rx_ring->stats.packets += total_rx_packets;
2422         rx_ring->stats.bytes += total_rx_bytes;
2423         u64_stats_update_end(&rx_ring->syncp);
2424         q_vector->rx.total_packets += total_rx_packets;
2425         q_vector->rx.total_bytes += total_rx_bytes;
2426
2427         return total_rx_packets;
2428 }
2429
2430 /**
2431  * ixgbe_configure_msix - Configure MSI-X hardware
2432  * @adapter: board private structure
2433  *
2434  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2435  * interrupts.
2436  **/
2437 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2438 {
2439         struct ixgbe_q_vector *q_vector;
2440         int v_idx;
2441         u32 mask;
2442
2443         /* Populate MSIX to EITR Select */
2444         if (adapter->num_vfs > 32) {
2445                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2446                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2447         }
2448
2449         /*
2450          * Populate the IVAR table and set the ITR values to the
2451          * corresponding register.
2452          */
2453         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2454                 struct ixgbe_ring *ring;
2455                 q_vector = adapter->q_vector[v_idx];
2456
2457                 ixgbe_for_each_ring(ring, q_vector->rx)
2458                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2459
2460                 ixgbe_for_each_ring(ring, q_vector->tx)
2461                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2462
2463                 ixgbe_write_eitr(q_vector);
2464         }
2465
2466         switch (adapter->hw.mac.type) {
2467         case ixgbe_mac_82598EB:
2468                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2469                                v_idx);
2470                 break;
2471         case ixgbe_mac_82599EB:
2472         case ixgbe_mac_X540:
2473         case ixgbe_mac_X550:
2474         case ixgbe_mac_X550EM_x:
2475         case ixgbe_mac_x550em_a:
2476                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2477                 break;
2478         default:
2479                 break;
2480         }
2481         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2482
2483         /* set up to autoclear timer, and the vectors */
2484         mask = IXGBE_EIMS_ENABLE_MASK;
2485         mask &= ~(IXGBE_EIMS_OTHER |
2486                   IXGBE_EIMS_MAILBOX |
2487                   IXGBE_EIMS_LSC);
2488
2489         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2490 }
2491
2492 /**
2493  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2494  * @q_vector: structure containing interrupt and ring information
2495  * @ring_container: structure containing ring performance data
2496  *
2497  *      Stores a new ITR value based on packets and byte
2498  *      counts during the last interrupt.  The advantage of per interrupt
2499  *      computation is faster updates and more accurate ITR for the current
2500  *      traffic pattern.  Constants in this function were computed
2501  *      based on theoretical maximum wire speed and thresholds were set based
2502  *      on testing data as well as attempting to minimize response time
2503  *      while increasing bulk throughput.
2504  **/
2505 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2506                              struct ixgbe_ring_container *ring_container)
2507 {
2508         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2509                            IXGBE_ITR_ADAPTIVE_LATENCY;
2510         unsigned int avg_wire_size, packets, bytes;
2511         unsigned long next_update = jiffies;
2512
2513         /* If we don't have any rings just leave ourselves set for maximum
2514          * possible latency so we take ourselves out of the equation.
2515          */
2516         if (!ring_container->ring)
2517                 return;
2518
2519         /* If we didn't update within up to 1 - 2 jiffies we can assume
2520          * that either packets are coming in so slow there hasn't been
2521          * any work, or that there is so much work that NAPI is dealing
2522          * with interrupt moderation and we don't need to do anything.
2523          */
2524         if (time_after(next_update, ring_container->next_update))
2525                 goto clear_counts;
2526
2527         packets = ring_container->total_packets;
2528
2529         /* We have no packets to actually measure against. This means
2530          * either one of the other queues on this vector is active or
2531          * we are a Tx queue doing TSO with too high of an interrupt rate.
2532          *
2533          * When this occurs just tick up our delay by the minimum value
2534          * and hope that this extra delay will prevent us from being called
2535          * without any work on our queue.
2536          */
2537         if (!packets) {
2538                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2539                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2540                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2541                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2542                 goto clear_counts;
2543         }
2544
2545         bytes = ring_container->total_bytes;
2546
2547         /* If packets are less than 4 or bytes are less than 9000 assume
2548          * insufficient data to use bulk rate limiting approach. We are
2549          * likely latency driven.
2550          */
2551         if (packets < 4 && bytes < 9000) {
2552                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2553                 goto adjust_by_size;
2554         }
2555
2556         /* Between 4 and 48 we can assume that our current interrupt delay
2557          * is only slightly too low. As such we should increase it by a small
2558          * fixed amount.
2559          */
2560         if (packets < 48) {
2561                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2562                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2563                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2564                 goto clear_counts;
2565         }
2566
2567         /* Between 48 and 96 is our "goldilocks" zone where we are working
2568          * out "just right". Just report that our current ITR is good for us.
2569          */
2570         if (packets < 96) {
2571                 itr = q_vector->itr >> 2;
2572                 goto clear_counts;
2573         }
2574
2575         /* If packet count is 96 or greater we are likely looking at a slight
2576          * overrun of the delay we want. Try halving our delay to see if that
2577          * will cut the number of packets in half per interrupt.
2578          */
2579         if (packets < 256) {
2580                 itr = q_vector->itr >> 3;
2581                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2582                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2583                 goto clear_counts;
2584         }
2585
2586         /* The paths below assume we are dealing with a bulk ITR since number
2587          * of packets is 256 or greater. We are just going to have to compute
2588          * a value and try to bring the count under control, though for smaller
2589          * packet sizes there isn't much we can do as NAPI polling will likely
2590          * be kicking in sooner rather than later.
2591          */
2592         itr = IXGBE_ITR_ADAPTIVE_BULK;
2593
2594 adjust_by_size:
2595         /* If packet counts are 256 or greater we can assume we have a gross
2596          * overestimation of what the rate should be. Instead of trying to fine
2597          * tune it just use the formula below to try and dial in an exact value
2598          * give the current packet size of the frame.
2599          */
2600         avg_wire_size = bytes / packets;
2601
2602         /* The following is a crude approximation of:
2603          *  wmem_default / (size + overhead) = desired_pkts_per_int
2604          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2605          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2606          *
2607          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2608          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2609          * formula down to
2610          *
2611          *  (170 * (size + 24)) / (size + 640) = ITR
2612          *
2613          * We first do some math on the packet size and then finally bitshift
2614          * by 8 after rounding up. We also have to account for PCIe link speed
2615          * difference as ITR scales based on this.
2616          */
2617         if (avg_wire_size <= 60) {
2618                 /* Start at 50k ints/sec */
2619                 avg_wire_size = 5120;
2620         } else if (avg_wire_size <= 316) {
2621                 /* 50K ints/sec to 16K ints/sec */
2622                 avg_wire_size *= 40;
2623                 avg_wire_size += 2720;
2624         } else if (avg_wire_size <= 1084) {
2625                 /* 16K ints/sec to 9.2K ints/sec */
2626                 avg_wire_size *= 15;
2627                 avg_wire_size += 11452;
2628         } else if (avg_wire_size < 1968) {
2629                 /* 9.2K ints/sec to 8K ints/sec */
2630                 avg_wire_size *= 5;
2631                 avg_wire_size += 22420;
2632         } else {
2633                 /* plateau at a limit of 8K ints/sec */
2634                 avg_wire_size = 32256;
2635         }
2636
2637         /* If we are in low latency mode half our delay which doubles the rate
2638          * to somewhere between 100K to 16K ints/sec
2639          */
2640         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2641                 avg_wire_size >>= 1;
2642
2643         /* Resultant value is 256 times larger than it needs to be. This
2644          * gives us room to adjust the value as needed to either increase
2645          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2646          *
2647          * Use addition as we have already recorded the new latency flag
2648          * for the ITR value.
2649          */
2650         switch (q_vector->adapter->link_speed) {
2651         case IXGBE_LINK_SPEED_10GB_FULL:
2652         case IXGBE_LINK_SPEED_100_FULL:
2653         default:
2654                 itr += DIV_ROUND_UP(avg_wire_size,
2655                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2656                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2657                 break;
2658         case IXGBE_LINK_SPEED_2_5GB_FULL:
2659         case IXGBE_LINK_SPEED_1GB_FULL:
2660         case IXGBE_LINK_SPEED_10_FULL:
2661                 if (avg_wire_size > 8064)
2662                         avg_wire_size = 8064;
2663                 itr += DIV_ROUND_UP(avg_wire_size,
2664                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2665                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2666                 break;
2667         }
2668
2669 clear_counts:
2670         /* write back value */
2671         ring_container->itr = itr;
2672
2673         /* next update should occur within next jiffy */
2674         ring_container->next_update = next_update + 1;
2675
2676         ring_container->total_bytes = 0;
2677         ring_container->total_packets = 0;
2678 }
2679
2680 /**
2681  * ixgbe_write_eitr - write EITR register in hardware specific way
2682  * @q_vector: structure containing interrupt and ring information
2683  *
2684  * This function is made to be called by ethtool and by the driver
2685  * when it needs to update EITR registers at runtime.  Hardware
2686  * specific quirks/differences are taken care of here.
2687  */
2688 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2689 {
2690         struct ixgbe_adapter *adapter = q_vector->adapter;
2691         struct ixgbe_hw *hw = &adapter->hw;
2692         int v_idx = q_vector->v_idx;
2693         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2694
2695         switch (adapter->hw.mac.type) {
2696         case ixgbe_mac_82598EB:
2697                 /* must write high and low 16 bits to reset counter */
2698                 itr_reg |= (itr_reg << 16);
2699                 break;
2700         case ixgbe_mac_82599EB:
2701         case ixgbe_mac_X540:
2702         case ixgbe_mac_X550:
2703         case ixgbe_mac_X550EM_x:
2704         case ixgbe_mac_x550em_a:
2705                 /*
2706                  * set the WDIS bit to not clear the timer bits and cause an
2707                  * immediate assertion of the interrupt
2708                  */
2709                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2710                 break;
2711         default:
2712                 break;
2713         }
2714         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2715 }
2716
2717 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2718 {
2719         u32 new_itr;
2720
2721         ixgbe_update_itr(q_vector, &q_vector->tx);
2722         ixgbe_update_itr(q_vector, &q_vector->rx);
2723
2724         /* use the smallest value of new ITR delay calculations */
2725         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2726
2727         /* Clear latency flag if set, shift into correct position */
2728         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2729         new_itr <<= 2;
2730
2731         if (new_itr != q_vector->itr) {
2732                 /* save the algorithm value here */
2733                 q_vector->itr = new_itr;
2734
2735                 ixgbe_write_eitr(q_vector);
2736         }
2737 }
2738
2739 /**
2740  * ixgbe_check_overtemp_subtask - check for over temperature
2741  * @adapter: pointer to adapter
2742  **/
2743 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2744 {
2745         struct ixgbe_hw *hw = &adapter->hw;
2746         u32 eicr = adapter->interrupt_event;
2747         s32 rc;
2748
2749         if (test_bit(__IXGBE_DOWN, &adapter->state))
2750                 return;
2751
2752         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2753                 return;
2754
2755         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2756
2757         switch (hw->device_id) {
2758         case IXGBE_DEV_ID_82599_T3_LOM:
2759                 /*
2760                  * Since the warning interrupt is for both ports
2761                  * we don't have to check if:
2762                  *  - This interrupt wasn't for our port.
2763                  *  - We may have missed the interrupt so always have to
2764                  *    check if we  got a LSC
2765                  */
2766                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2767                     !(eicr & IXGBE_EICR_LSC))
2768                         return;
2769
2770                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2771                         u32 speed;
2772                         bool link_up = false;
2773
2774                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2775
2776                         if (link_up)
2777                                 return;
2778                 }
2779
2780                 /* Check if this is not due to overtemp */
2781                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2782                         return;
2783
2784                 break;
2785         case IXGBE_DEV_ID_X550EM_A_1G_T:
2786         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2787                 rc = hw->phy.ops.check_overtemp(hw);
2788                 if (rc != IXGBE_ERR_OVERTEMP)
2789                         return;
2790                 break;
2791         default:
2792                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2793                         return;
2794                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2795                         return;
2796                 break;
2797         }
2798         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2799
2800         adapter->interrupt_event = 0;
2801 }
2802
2803 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2804 {
2805         struct ixgbe_hw *hw = &adapter->hw;
2806
2807         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2808             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2809                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2810                 /* write to clear the interrupt */
2811                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2812         }
2813 }
2814
2815 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2816 {
2817         struct ixgbe_hw *hw = &adapter->hw;
2818
2819         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2820                 return;
2821
2822         switch (adapter->hw.mac.type) {
2823         case ixgbe_mac_82599EB:
2824                 /*
2825                  * Need to check link state so complete overtemp check
2826                  * on service task
2827                  */
2828                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2829                      (eicr & IXGBE_EICR_LSC)) &&
2830                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2831                         adapter->interrupt_event = eicr;
2832                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2833                         ixgbe_service_event_schedule(adapter);
2834                         return;
2835                 }
2836                 return;
2837         case ixgbe_mac_x550em_a:
2838                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2839                         adapter->interrupt_event = eicr;
2840                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2841                         ixgbe_service_event_schedule(adapter);
2842                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2843                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2844                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2845                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2846                 }
2847                 return;
2848         case ixgbe_mac_X550:
2849         case ixgbe_mac_X540:
2850                 if (!(eicr & IXGBE_EICR_TS))
2851                         return;
2852                 break;
2853         default:
2854                 return;
2855         }
2856
2857         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2858 }
2859
2860 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2861 {
2862         switch (hw->mac.type) {
2863         case ixgbe_mac_82598EB:
2864                 if (hw->phy.type == ixgbe_phy_nl)
2865                         return true;
2866                 return false;
2867         case ixgbe_mac_82599EB:
2868         case ixgbe_mac_X550EM_x:
2869         case ixgbe_mac_x550em_a:
2870                 switch (hw->mac.ops.get_media_type(hw)) {
2871                 case ixgbe_media_type_fiber:
2872                 case ixgbe_media_type_fiber_qsfp:
2873                         return true;
2874                 default:
2875                         return false;
2876                 }
2877         default:
2878                 return false;
2879         }
2880 }
2881
2882 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2883 {
2884         struct ixgbe_hw *hw = &adapter->hw;
2885         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2886
2887         if (!ixgbe_is_sfp(hw))
2888                 return;
2889
2890         /* Later MAC's use different SDP */
2891         if (hw->mac.type >= ixgbe_mac_X540)
2892                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2893
2894         if (eicr & eicr_mask) {
2895                 /* Clear the interrupt */
2896                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2897                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2898                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2899                         adapter->sfp_poll_time = 0;
2900                         ixgbe_service_event_schedule(adapter);
2901                 }
2902         }
2903
2904         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2905             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2906                 /* Clear the interrupt */
2907                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2908                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2909                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2910                         ixgbe_service_event_schedule(adapter);
2911                 }
2912         }
2913 }
2914
2915 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2916 {
2917         struct ixgbe_hw *hw = &adapter->hw;
2918
2919         adapter->lsc_int++;
2920         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2921         adapter->link_check_timeout = jiffies;
2922         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2923                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2924                 IXGBE_WRITE_FLUSH(hw);
2925                 ixgbe_service_event_schedule(adapter);
2926         }
2927 }
2928
2929 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2930                                            u64 qmask)
2931 {
2932         u32 mask;
2933         struct ixgbe_hw *hw = &adapter->hw;
2934
2935         switch (hw->mac.type) {
2936         case ixgbe_mac_82598EB:
2937                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2938                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2939                 break;
2940         case ixgbe_mac_82599EB:
2941         case ixgbe_mac_X540:
2942         case ixgbe_mac_X550:
2943         case ixgbe_mac_X550EM_x:
2944         case ixgbe_mac_x550em_a:
2945                 mask = (qmask & 0xFFFFFFFF);
2946                 if (mask)
2947                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2948                 mask = (qmask >> 32);
2949                 if (mask)
2950                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2951                 break;
2952         default:
2953                 break;
2954         }
2955         /* skip the flush */
2956 }
2957
2958 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2959                                             u64 qmask)
2960 {
2961         u32 mask;
2962         struct ixgbe_hw *hw = &adapter->hw;
2963
2964         switch (hw->mac.type) {
2965         case ixgbe_mac_82598EB:
2966                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2967                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2968                 break;
2969         case ixgbe_mac_82599EB:
2970         case ixgbe_mac_X540:
2971         case ixgbe_mac_X550:
2972         case ixgbe_mac_X550EM_x:
2973         case ixgbe_mac_x550em_a:
2974                 mask = (qmask & 0xFFFFFFFF);
2975                 if (mask)
2976                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2977                 mask = (qmask >> 32);
2978                 if (mask)
2979                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2980                 break;
2981         default:
2982                 break;
2983         }
2984         /* skip the flush */
2985 }
2986
2987 /**
2988  * ixgbe_irq_enable - Enable default interrupt generation settings
2989  * @adapter: board private structure
2990  * @queues: enable irqs for queues
2991  * @flush: flush register write
2992  **/
2993 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2994                                     bool flush)
2995 {
2996         struct ixgbe_hw *hw = &adapter->hw;
2997         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2998
2999         /* don't reenable LSC while waiting for link */
3000         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3001                 mask &= ~IXGBE_EIMS_LSC;
3002
3003         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3004                 switch (adapter->hw.mac.type) {
3005                 case ixgbe_mac_82599EB:
3006                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3007                         break;
3008                 case ixgbe_mac_X540:
3009                 case ixgbe_mac_X550:
3010                 case ixgbe_mac_X550EM_x:
3011                 case ixgbe_mac_x550em_a:
3012                         mask |= IXGBE_EIMS_TS;
3013                         break;
3014                 default:
3015                         break;
3016                 }
3017         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3018                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3019         switch (adapter->hw.mac.type) {
3020         case ixgbe_mac_82599EB:
3021                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3022                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3023                 /* fall through */
3024         case ixgbe_mac_X540:
3025         case ixgbe_mac_X550:
3026         case ixgbe_mac_X550EM_x:
3027         case ixgbe_mac_x550em_a:
3028                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3029                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3030                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3031                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3032                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3033                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3034                 mask |= IXGBE_EIMS_ECC;
3035                 mask |= IXGBE_EIMS_MAILBOX;
3036                 break;
3037         default:
3038                 break;
3039         }
3040
3041         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3042             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3043                 mask |= IXGBE_EIMS_FLOW_DIR;
3044
3045         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3046         if (queues)
3047                 ixgbe_irq_enable_queues(adapter, ~0);
3048         if (flush)
3049                 IXGBE_WRITE_FLUSH(&adapter->hw);
3050 }
3051
3052 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3053 {
3054         struct ixgbe_adapter *adapter = data;
3055         struct ixgbe_hw *hw = &adapter->hw;
3056         u32 eicr;
3057
3058         /*
3059          * Workaround for Silicon errata.  Use clear-by-write instead
3060          * of clear-by-read.  Reading with EICS will return the
3061          * interrupt causes without clearing, which later be done
3062          * with the write to EICR.
3063          */
3064         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3065
3066         /* The lower 16bits of the EICR register are for the queue interrupts
3067          * which should be masked here in order to not accidentally clear them if
3068          * the bits are high when ixgbe_msix_other is called. There is a race
3069          * condition otherwise which results in possible performance loss
3070          * especially if the ixgbe_msix_other interrupt is triggering
3071          * consistently (as it would when PPS is turned on for the X540 device)
3072          */
3073         eicr &= 0xFFFF0000;
3074
3075         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3076
3077         if (eicr & IXGBE_EICR_LSC)
3078                 ixgbe_check_lsc(adapter);
3079
3080         if (eicr & IXGBE_EICR_MAILBOX)
3081                 ixgbe_msg_task(adapter);
3082
3083         switch (hw->mac.type) {
3084         case ixgbe_mac_82599EB:
3085         case ixgbe_mac_X540:
3086         case ixgbe_mac_X550:
3087         case ixgbe_mac_X550EM_x:
3088         case ixgbe_mac_x550em_a:
3089                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3090                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3091                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3092                         ixgbe_service_event_schedule(adapter);
3093                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3094                                         IXGBE_EICR_GPI_SDP0_X540);
3095                 }
3096                 if (eicr & IXGBE_EICR_ECC) {
3097                         e_info(link, "Received ECC Err, initiating reset\n");
3098                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3099                         ixgbe_service_event_schedule(adapter);
3100                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3101                 }
3102                 /* Handle Flow Director Full threshold interrupt */
3103                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3104                         int reinit_count = 0;
3105                         int i;
3106                         for (i = 0; i < adapter->num_tx_queues; i++) {
3107                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3108                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3109                                                        &ring->state))
3110                                         reinit_count++;
3111                         }
3112                         if (reinit_count) {
3113                                 /* no more flow director interrupts until after init */
3114                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3115                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3116                                 ixgbe_service_event_schedule(adapter);
3117                         }
3118                 }
3119                 ixgbe_check_sfp_event(adapter, eicr);
3120                 ixgbe_check_overtemp_event(adapter, eicr);
3121                 break;
3122         default:
3123                 break;
3124         }
3125
3126         ixgbe_check_fan_failure(adapter, eicr);
3127
3128         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3129                 ixgbe_ptp_check_pps_event(adapter);
3130
3131         /* re-enable the original interrupt state, no lsc, no queues */
3132         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3133                 ixgbe_irq_enable(adapter, false, false);
3134
3135         return IRQ_HANDLED;
3136 }
3137
3138 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3139 {
3140         struct ixgbe_q_vector *q_vector = data;
3141
3142         /* EIAM disabled interrupts (on this vector) for us */
3143
3144         if (q_vector->rx.ring || q_vector->tx.ring)
3145                 napi_schedule_irqoff(&q_vector->napi);
3146
3147         return IRQ_HANDLED;
3148 }
3149
3150 /**
3151  * ixgbe_poll - NAPI Rx polling callback
3152  * @napi: structure for representing this polling device
3153  * @budget: how many packets driver is allowed to clean
3154  *
3155  * This function is used for legacy and MSI, NAPI mode
3156  **/
3157 int ixgbe_poll(struct napi_struct *napi, int budget)
3158 {
3159         struct ixgbe_q_vector *q_vector =
3160                                 container_of(napi, struct ixgbe_q_vector, napi);
3161         struct ixgbe_adapter *adapter = q_vector->adapter;
3162         struct ixgbe_ring *ring;
3163         int per_ring_budget, work_done = 0;
3164         bool clean_complete = true;
3165
3166 #ifdef CONFIG_IXGBE_DCA
3167         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3168                 ixgbe_update_dca(q_vector);
3169 #endif
3170
3171         ixgbe_for_each_ring(ring, q_vector->tx) {
3172                 bool wd = ring->xsk_umem ?
3173                           ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3174                           ixgbe_clean_tx_irq(q_vector, ring, budget);
3175
3176                 if (!wd)
3177                         clean_complete = false;
3178         }
3179
3180         /* Exit if we are called by netpoll */
3181         if (budget <= 0)
3182                 return budget;
3183
3184         /* attempt to distribute budget to each queue fairly, but don't allow
3185          * the budget to go below 1 because we'll exit polling */
3186         if (q_vector->rx.count > 1)
3187                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3188         else
3189                 per_ring_budget = budget;
3190
3191         ixgbe_for_each_ring(ring, q_vector->rx) {
3192                 int cleaned = ring->xsk_umem ?
3193                               ixgbe_clean_rx_irq_zc(q_vector, ring,
3194                                                     per_ring_budget) :
3195                               ixgbe_clean_rx_irq(q_vector, ring,
3196                                                  per_ring_budget);
3197
3198                 work_done += cleaned;
3199                 if (cleaned >= per_ring_budget)
3200                         clean_complete = false;
3201         }
3202
3203         /* If all work not completed, return budget and keep polling */
3204         if (!clean_complete)
3205                 return budget;
3206
3207         /* all work done, exit the polling mode */
3208         if (likely(napi_complete_done(napi, work_done))) {
3209                 if (adapter->rx_itr_setting & 1)
3210                         ixgbe_set_itr(q_vector);
3211                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3212                         ixgbe_irq_enable_queues(adapter,
3213                                                 BIT_ULL(q_vector->v_idx));
3214         }
3215
3216         return min(work_done, budget - 1);
3217 }
3218
3219 /**
3220  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3221  * @adapter: board private structure
3222  *
3223  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3224  * interrupts from the kernel.
3225  **/
3226 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3227 {
3228         struct net_device *netdev = adapter->netdev;
3229         unsigned int ri = 0, ti = 0;
3230         int vector, err;
3231
3232         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3233                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3234                 struct msix_entry *entry = &adapter->msix_entries[vector];
3235
3236                 if (q_vector->tx.ring && q_vector->rx.ring) {
3237                         snprintf(q_vector->name, sizeof(q_vector->name),
3238                                  "%s-TxRx-%u", netdev->name, ri++);
3239                         ti++;
3240                 } else if (q_vector->rx.ring) {
3241                         snprintf(q_vector->name, sizeof(q_vector->name),
3242                                  "%s-rx-%u", netdev->name, ri++);
3243                 } else if (q_vector->tx.ring) {
3244                         snprintf(q_vector->name, sizeof(q_vector->name),
3245                                  "%s-tx-%u", netdev->name, ti++);
3246                 } else {
3247                         /* skip this unused q_vector */
3248                         continue;
3249                 }
3250                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3251                                   q_vector->name, q_vector);
3252                 if (err) {
3253                         e_err(probe, "request_irq failed for MSIX interrupt "
3254                               "Error: %d\n", err);
3255                         goto free_queue_irqs;
3256                 }
3257                 /* If Flow Director is enabled, set interrupt affinity */
3258                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3259                         /* assign the mask for this irq */
3260                         irq_set_affinity_hint(entry->vector,
3261                                               &q_vector->affinity_mask);
3262                 }
3263         }
3264
3265         err = request_irq(adapter->msix_entries[vector].vector,
3266                           ixgbe_msix_other, 0, netdev->name, adapter);
3267         if (err) {
3268                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3269                 goto free_queue_irqs;
3270         }
3271
3272         return 0;
3273
3274 free_queue_irqs:
3275         while (vector) {
3276                 vector--;
3277                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3278                                       NULL);
3279                 free_irq(adapter->msix_entries[vector].vector,
3280                          adapter->q_vector[vector]);
3281         }
3282         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3283         pci_disable_msix(adapter->pdev);
3284         kfree(adapter->msix_entries);
3285         adapter->msix_entries = NULL;
3286         return err;
3287 }
3288
3289 /**
3290  * ixgbe_intr - legacy mode Interrupt Handler
3291  * @irq: interrupt number
3292  * @data: pointer to a network interface device structure
3293  **/
3294 static irqreturn_t ixgbe_intr(int irq, void *data)
3295 {
3296         struct ixgbe_adapter *adapter = data;
3297         struct ixgbe_hw *hw = &adapter->hw;
3298         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3299         u32 eicr;
3300
3301         /*
3302          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3303          * before the read of EICR.
3304          */
3305         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3306
3307         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3308          * therefore no explicit interrupt disable is necessary */
3309         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3310         if (!eicr) {
3311                 /*
3312                  * shared interrupt alert!
3313                  * make sure interrupts are enabled because the read will
3314                  * have disabled interrupts due to EIAM
3315                  * finish the workaround of silicon errata on 82598.  Unmask
3316                  * the interrupt that we masked before the EICR read.
3317                  */
3318                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3319                         ixgbe_irq_enable(adapter, true, true);
3320                 return IRQ_NONE;        /* Not our interrupt */
3321         }
3322
3323         if (eicr & IXGBE_EICR_LSC)
3324                 ixgbe_check_lsc(adapter);
3325
3326         switch (hw->mac.type) {
3327         case ixgbe_mac_82599EB:
3328                 ixgbe_check_sfp_event(adapter, eicr);
3329                 /* Fall through */
3330         case ixgbe_mac_X540:
3331         case ixgbe_mac_X550:
3332         case ixgbe_mac_X550EM_x:
3333         case ixgbe_mac_x550em_a:
3334                 if (eicr & IXGBE_EICR_ECC) {
3335                         e_info(link, "Received ECC Err, initiating reset\n");
3336                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3337                         ixgbe_service_event_schedule(adapter);
3338                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3339                 }
3340                 ixgbe_check_overtemp_event(adapter, eicr);
3341                 break;
3342         default:
3343                 break;
3344         }
3345
3346         ixgbe_check_fan_failure(adapter, eicr);
3347         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3348                 ixgbe_ptp_check_pps_event(adapter);
3349
3350         /* would disable interrupts here but EIAM disabled it */
3351         napi_schedule_irqoff(&q_vector->napi);
3352
3353         /*
3354          * re-enable link(maybe) and non-queue interrupts, no flush.
3355          * ixgbe_poll will re-enable the queue interrupts
3356          */
3357         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3358                 ixgbe_irq_enable(adapter, false, false);
3359
3360         return IRQ_HANDLED;
3361 }
3362
3363 /**
3364  * ixgbe_request_irq - initialize interrupts
3365  * @adapter: board private structure
3366  *
3367  * Attempts to configure interrupts using the best available
3368  * capabilities of the hardware and kernel.
3369  **/
3370 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3371 {
3372         struct net_device *netdev = adapter->netdev;
3373         int err;
3374
3375         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3376                 err = ixgbe_request_msix_irqs(adapter);
3377         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3378                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3379                                   netdev->name, adapter);
3380         else
3381                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3382                                   netdev->name, adapter);
3383
3384         if (err)
3385                 e_err(probe, "request_irq failed, Error %d\n", err);
3386
3387         return err;
3388 }
3389
3390 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3391 {
3392         int vector;
3393
3394         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3395                 free_irq(adapter->pdev->irq, adapter);
3396                 return;
3397         }
3398
3399         if (!adapter->msix_entries)
3400                 return;
3401
3402         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3403                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3404                 struct msix_entry *entry = &adapter->msix_entries[vector];
3405
3406                 /* free only the irqs that were actually requested */
3407                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3408                         continue;
3409
3410                 /* clear the affinity_mask in the IRQ descriptor */
3411                 irq_set_affinity_hint(entry->vector, NULL);
3412
3413                 free_irq(entry->vector, q_vector);
3414         }
3415
3416         free_irq(adapter->msix_entries[vector].vector, adapter);
3417 }
3418
3419 /**
3420  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3421  * @adapter: board private structure
3422  **/
3423 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3424 {
3425         switch (adapter->hw.mac.type) {
3426         case ixgbe_mac_82598EB:
3427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3428                 break;
3429         case ixgbe_mac_82599EB:
3430         case ixgbe_mac_X540:
3431         case ixgbe_mac_X550:
3432         case ixgbe_mac_X550EM_x:
3433         case ixgbe_mac_x550em_a:
3434                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3435                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3436                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3437                 break;
3438         default:
3439                 break;
3440         }
3441         IXGBE_WRITE_FLUSH(&adapter->hw);
3442         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3443                 int vector;
3444
3445                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3446                         synchronize_irq(adapter->msix_entries[vector].vector);
3447
3448                 synchronize_irq(adapter->msix_entries[vector++].vector);
3449         } else {
3450                 synchronize_irq(adapter->pdev->irq);
3451         }
3452 }
3453
3454 /**
3455  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3456  * @adapter: board private structure
3457  *
3458  **/
3459 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3460 {
3461         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3462
3463         ixgbe_write_eitr(q_vector);
3464
3465         ixgbe_set_ivar(adapter, 0, 0, 0);
3466         ixgbe_set_ivar(adapter, 1, 0, 0);
3467
3468         e_info(hw, "Legacy interrupt IVAR setup done\n");
3469 }
3470
3471 /**
3472  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3473  * @adapter: board private structure
3474  * @ring: structure containing ring specific data
3475  *
3476  * Configure the Tx descriptor ring after a reset.
3477  **/
3478 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3479                              struct ixgbe_ring *ring)
3480 {
3481         struct ixgbe_hw *hw = &adapter->hw;
3482         u64 tdba = ring->dma;
3483         int wait_loop = 10;
3484         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3485         u8 reg_idx = ring->reg_idx;
3486
3487         ring->xsk_umem = NULL;
3488         if (ring_is_xdp(ring))
3489                 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
3490
3491         /* disable queue to avoid issues while updating state */
3492         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3493         IXGBE_WRITE_FLUSH(hw);
3494
3495         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3496                         (tdba & DMA_BIT_MASK(32)));
3497         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3498         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3499                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3500         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3501         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3502         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3503
3504         /*
3505          * set WTHRESH to encourage burst writeback, it should not be set
3506          * higher than 1 when:
3507          * - ITR is 0 as it could cause false TX hangs
3508          * - ITR is set to > 100k int/sec and BQL is enabled
3509          *
3510          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3511          * to or less than the number of on chip descriptors, which is
3512          * currently 40.
3513          */
3514         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3515                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3516         else
3517                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3518
3519         /*
3520          * Setting PTHRESH to 32 both improves performance
3521          * and avoids a TX hang with DFP enabled
3522          */
3523         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3524                    32;          /* PTHRESH = 32 */
3525
3526         /* reinitialize flowdirector state */
3527         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3528                 ring->atr_sample_rate = adapter->atr_sample_rate;
3529                 ring->atr_count = 0;
3530                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3531         } else {
3532                 ring->atr_sample_rate = 0;
3533         }
3534
3535         /* initialize XPS */
3536         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3537                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3538
3539                 if (q_vector)
3540                         netif_set_xps_queue(ring->netdev,
3541                                             &q_vector->affinity_mask,
3542                                             ring->queue_index);
3543         }
3544
3545         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3546
3547         /* reinitialize tx_buffer_info */
3548         memset(ring->tx_buffer_info, 0,
3549                sizeof(struct ixgbe_tx_buffer) * ring->count);
3550
3551         /* enable queue */
3552         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3553
3554         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3555         if (hw->mac.type == ixgbe_mac_82598EB &&
3556             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3557                 return;
3558
3559         /* poll to verify queue is enabled */
3560         do {
3561                 usleep_range(1000, 2000);
3562                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3563         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3564         if (!wait_loop)
3565                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3566 }
3567
3568 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3569 {
3570         struct ixgbe_hw *hw = &adapter->hw;
3571         u32 rttdcs, mtqc;
3572         u8 tcs = adapter->hw_tcs;
3573
3574         if (hw->mac.type == ixgbe_mac_82598EB)
3575                 return;
3576
3577         /* disable the arbiter while setting MTQC */
3578         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3579         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3580         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3581
3582         /* set transmit pool layout */
3583         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3584                 mtqc = IXGBE_MTQC_VT_ENA;
3585                 if (tcs > 4)
3586                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3587                 else if (tcs > 1)
3588                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3589                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3590                          IXGBE_82599_VMDQ_4Q_MASK)
3591                         mtqc |= IXGBE_MTQC_32VF;
3592                 else
3593                         mtqc |= IXGBE_MTQC_64VF;
3594         } else {
3595                 if (tcs > 4) {
3596                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3597                 } else if (tcs > 1) {
3598                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3599                 } else {
3600                         u8 max_txq = adapter->num_tx_queues +
3601                                 adapter->num_xdp_queues;
3602                         if (max_txq > 63)
3603                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3604                         else
3605                                 mtqc = IXGBE_MTQC_64Q_1PB;
3606                 }
3607         }
3608
3609         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3610
3611         /* Enable Security TX Buffer IFG for multiple pb */
3612         if (tcs) {
3613                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3614                 sectx |= IXGBE_SECTX_DCB;
3615                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3616         }
3617
3618         /* re-enable the arbiter */
3619         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3620         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3621 }
3622
3623 /**
3624  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3625  * @adapter: board private structure
3626  *
3627  * Configure the Tx unit of the MAC after a reset.
3628  **/
3629 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3630 {
3631         struct ixgbe_hw *hw = &adapter->hw;
3632         u32 dmatxctl;
3633         u32 i;
3634
3635         ixgbe_setup_mtqc(adapter);
3636
3637         if (hw->mac.type != ixgbe_mac_82598EB) {
3638                 /* DMATXCTL.EN must be before Tx queues are enabled */
3639                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3640                 dmatxctl |= IXGBE_DMATXCTL_TE;
3641                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3642         }
3643
3644         /* Setup the HW Tx Head and Tail descriptor pointers */
3645         for (i = 0; i < adapter->num_tx_queues; i++)
3646                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3647         for (i = 0; i < adapter->num_xdp_queues; i++)
3648                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3649 }
3650
3651 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3652                                  struct ixgbe_ring *ring)
3653 {
3654         struct ixgbe_hw *hw = &adapter->hw;
3655         u8 reg_idx = ring->reg_idx;
3656         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3657
3658         srrctl |= IXGBE_SRRCTL_DROP_EN;
3659
3660         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3661 }
3662
3663 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3664                                   struct ixgbe_ring *ring)
3665 {
3666         struct ixgbe_hw *hw = &adapter->hw;
3667         u8 reg_idx = ring->reg_idx;
3668         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3669
3670         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3671
3672         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3673 }
3674
3675 #ifdef CONFIG_IXGBE_DCB
3676 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3677 #else
3678 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3679 #endif
3680 {
3681         int i;
3682         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3683
3684         if (adapter->ixgbe_ieee_pfc)
3685                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3686
3687         /*
3688          * We should set the drop enable bit if:
3689          *  SR-IOV is enabled
3690          *   or
3691          *  Number of Rx queues > 1 and flow control is disabled
3692          *
3693          *  This allows us to avoid head of line blocking for security
3694          *  and performance reasons.
3695          */
3696         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3697             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3698                 for (i = 0; i < adapter->num_rx_queues; i++)
3699                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3700         } else {
3701                 for (i = 0; i < adapter->num_rx_queues; i++)
3702                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3703         }
3704 }
3705
3706 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3707
3708 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3709                                    struct ixgbe_ring *rx_ring)
3710 {
3711         struct ixgbe_hw *hw = &adapter->hw;
3712         u32 srrctl;
3713         u8 reg_idx = rx_ring->reg_idx;
3714
3715         if (hw->mac.type == ixgbe_mac_82598EB) {
3716                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3717
3718                 /*
3719                  * if VMDq is not active we must program one srrctl register
3720                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3721                  */
3722                 reg_idx &= mask;
3723         }
3724
3725         /* configure header buffer length, needed for RSC */
3726         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3727
3728         /* configure the packet buffer length */
3729         if (rx_ring->xsk_umem) {
3730                 u32 xsk_buf_len = rx_ring->xsk_umem->chunk_size_nohr -
3731                                   XDP_PACKET_HEADROOM;
3732
3733                 /* If the MAC support setting RXDCTL.RLPML, the
3734                  * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3735                  * RXDCTL.RLPML is set to the actual UMEM buffer
3736                  * size. If not, then we are stuck with a 1k buffer
3737                  * size resolution. In this case frames larger than
3738                  * the UMEM buffer size viewed in a 1k resolution will
3739                  * be dropped.
3740                  */
3741                 if (hw->mac.type != ixgbe_mac_82599EB)
3742                         srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3743                 else
3744                         srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3745         } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3746                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3747         } else {
3748                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3749         }
3750
3751         /* configure descriptor type */
3752         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3753
3754         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3755 }
3756
3757 /**
3758  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3759  * @adapter: device handle
3760  *
3761  *  - 82598/82599/X540:     128
3762  *  - X550(non-SRIOV mode): 512
3763  *  - X550(SRIOV mode):     64
3764  */
3765 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3766 {
3767         if (adapter->hw.mac.type < ixgbe_mac_X550)
3768                 return 128;
3769         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3770                 return 64;
3771         else
3772                 return 512;
3773 }
3774
3775 /**
3776  * ixgbe_store_key - Write the RSS key to HW
3777  * @adapter: device handle
3778  *
3779  * Write the RSS key stored in adapter.rss_key to HW.
3780  */
3781 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3782 {
3783         struct ixgbe_hw *hw = &adapter->hw;
3784         int i;
3785
3786         for (i = 0; i < 10; i++)
3787                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3788 }
3789
3790 /**
3791  * ixgbe_init_rss_key - Initialize adapter RSS key
3792  * @adapter: device handle
3793  *
3794  * Allocates and initializes the RSS key if it is not allocated.
3795  **/
3796 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3797 {
3798         u32 *rss_key;
3799
3800         if (!adapter->rss_key) {
3801                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3802                 if (unlikely(!rss_key))
3803                         return -ENOMEM;
3804
3805                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3806                 adapter->rss_key = rss_key;
3807         }
3808
3809         return 0;
3810 }
3811
3812 /**
3813  * ixgbe_store_reta - Write the RETA table to HW
3814  * @adapter: device handle
3815  *
3816  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3817  */
3818 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3819 {
3820         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3821         struct ixgbe_hw *hw = &adapter->hw;
3822         u32 reta = 0;
3823         u32 indices_multi;
3824         u8 *indir_tbl = adapter->rss_indir_tbl;
3825
3826         /* Fill out the redirection table as follows:
3827          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3828          *    indices.
3829          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3830          *  - X550:       8 bit wide entries containing 6 bit RSS index
3831          */
3832         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3833                 indices_multi = 0x11;
3834         else
3835                 indices_multi = 0x1;
3836
3837         /* Write redirection table to HW */
3838         for (i = 0; i < reta_entries; i++) {
3839                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3840                 if ((i & 3) == 3) {
3841                         if (i < 128)
3842                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3843                         else
3844                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3845                                                 reta);
3846                         reta = 0;
3847                 }
3848         }
3849 }
3850
3851 /**
3852  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3853  * @adapter: device handle
3854  *
3855  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3856  */
3857 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3858 {
3859         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3860         struct ixgbe_hw *hw = &adapter->hw;
3861         u32 vfreta = 0;
3862
3863         /* Write redirection table to HW */
3864         for (i = 0; i < reta_entries; i++) {
3865                 u16 pool = adapter->num_rx_pools;
3866
3867                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3868                 if ((i & 3) != 3)
3869                         continue;
3870
3871                 while (pool--)
3872                         IXGBE_WRITE_REG(hw,
3873                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3874                                         vfreta);
3875                 vfreta = 0;
3876         }
3877 }
3878
3879 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3880 {
3881         u32 i, j;
3882         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3883         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3884
3885         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3886          * make full use of any rings they may have.  We will use the
3887          * PSRTYPE register to control how many rings we use within the PF.
3888          */
3889         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3890                 rss_i = 4;
3891
3892         /* Fill out hash function seeds */
3893         ixgbe_store_key(adapter);
3894
3895         /* Fill out redirection table */
3896         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3897
3898         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3899                 if (j == rss_i)
3900                         j = 0;
3901
3902                 adapter->rss_indir_tbl[i] = j;
3903         }
3904
3905         ixgbe_store_reta(adapter);
3906 }
3907
3908 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3909 {
3910         struct ixgbe_hw *hw = &adapter->hw;
3911         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3912         int i, j;
3913
3914         /* Fill out hash function seeds */
3915         for (i = 0; i < 10; i++) {
3916                 u16 pool = adapter->num_rx_pools;
3917
3918                 while (pool--)
3919                         IXGBE_WRITE_REG(hw,
3920                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3921                                         *(adapter->rss_key + i));
3922         }
3923
3924         /* Fill out the redirection table */
3925         for (i = 0, j = 0; i < 64; i++, j++) {
3926                 if (j == rss_i)
3927                         j = 0;
3928
3929                 adapter->rss_indir_tbl[i] = j;
3930         }
3931
3932         ixgbe_store_vfreta(adapter);
3933 }
3934
3935 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3936 {
3937         struct ixgbe_hw *hw = &adapter->hw;
3938         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3939         u32 rxcsum;
3940
3941         /* Disable indicating checksum in descriptor, enables RSS hash */
3942         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3943         rxcsum |= IXGBE_RXCSUM_PCSD;
3944         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3945
3946         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3947                 if (adapter->ring_feature[RING_F_RSS].mask)
3948                         mrqc = IXGBE_MRQC_RSSEN;
3949         } else {
3950                 u8 tcs = adapter->hw_tcs;
3951
3952                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3953                         if (tcs > 4)
3954                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3955                         else if (tcs > 1)
3956                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3957                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3958                                  IXGBE_82599_VMDQ_4Q_MASK)
3959                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3960                         else
3961                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3962
3963                         /* Enable L3/L4 for Tx Switched packets only for X550,
3964                          * older devices do not support this feature
3965                          */
3966                         if (hw->mac.type >= ixgbe_mac_X550)
3967                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3968                 } else {
3969                         if (tcs > 4)
3970                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3971                         else if (tcs > 1)
3972                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3973                         else
3974                                 mrqc = IXGBE_MRQC_RSSEN;
3975                 }
3976         }
3977
3978         /* Perform hash on these packet types */
3979         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3980                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3981                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3982                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3983
3984         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3985                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3986         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3987                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3988
3989         if ((hw->mac.type >= ixgbe_mac_X550) &&
3990             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3991                 u16 pool = adapter->num_rx_pools;
3992
3993                 /* Enable VF RSS mode */
3994                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3995                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3996
3997                 /* Setup RSS through the VF registers */
3998                 ixgbe_setup_vfreta(adapter);
3999                 vfmrqc = IXGBE_MRQC_RSSEN;
4000                 vfmrqc |= rss_field;
4001
4002                 while (pool--)
4003                         IXGBE_WRITE_REG(hw,
4004                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
4005                                         vfmrqc);
4006         } else {
4007                 ixgbe_setup_reta(adapter);
4008                 mrqc |= rss_field;
4009                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4010         }
4011 }
4012
4013 /**
4014  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4015  * @adapter: address of board private structure
4016  * @ring: structure containing ring specific data
4017  **/
4018 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4019                                    struct ixgbe_ring *ring)
4020 {
4021         struct ixgbe_hw *hw = &adapter->hw;
4022         u32 rscctrl;
4023         u8 reg_idx = ring->reg_idx;
4024
4025         if (!ring_is_rsc_enabled(ring))
4026                 return;
4027
4028         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4029         rscctrl |= IXGBE_RSCCTL_RSCEN;
4030         /*
4031          * we must limit the number of descriptors so that the
4032          * total size of max desc * buf_len is not greater
4033          * than 65536
4034          */
4035         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4036         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4037 }
4038
4039 #define IXGBE_MAX_RX_DESC_POLL 10
4040 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4041                                        struct ixgbe_ring *ring)
4042 {
4043         struct ixgbe_hw *hw = &adapter->hw;
4044         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4045         u32 rxdctl;
4046         u8 reg_idx = ring->reg_idx;
4047
4048         if (ixgbe_removed(hw->hw_addr))
4049                 return;
4050         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4051         if (hw->mac.type == ixgbe_mac_82598EB &&
4052             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4053                 return;
4054
4055         do {
4056                 usleep_range(1000, 2000);
4057                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4058         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4059
4060         if (!wait_loop) {
4061                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4062                       "the polling period\n", reg_idx);
4063         }
4064 }
4065
4066 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4067                              struct ixgbe_ring *ring)
4068 {
4069         struct ixgbe_hw *hw = &adapter->hw;
4070         union ixgbe_adv_rx_desc *rx_desc;
4071         u64 rdba = ring->dma;
4072         u32 rxdctl;
4073         u8 reg_idx = ring->reg_idx;
4074
4075         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4076         ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
4077         if (ring->xsk_umem) {
4078                 ring->zca.free = ixgbe_zca_free;
4079                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4080                                                    MEM_TYPE_ZERO_COPY,
4081                                                    &ring->zca));
4082
4083         } else {
4084                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4085                                                    MEM_TYPE_PAGE_SHARED, NULL));
4086         }
4087
4088         /* disable queue to avoid use of these values while updating state */
4089         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4090         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4091
4092         /* write value back with RXDCTL.ENABLE bit cleared */
4093         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4094         IXGBE_WRITE_FLUSH(hw);
4095
4096         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4097         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4098         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4099                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4100         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4101         IXGBE_WRITE_FLUSH(hw);
4102
4103         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4104         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4105         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4106
4107         ixgbe_configure_srrctl(adapter, ring);
4108         ixgbe_configure_rscctl(adapter, ring);
4109
4110         if (hw->mac.type == ixgbe_mac_82598EB) {
4111                 /*
4112                  * enable cache line friendly hardware writes:
4113                  * PTHRESH=32 descriptors (half the internal cache),
4114                  * this also removes ugly rx_no_buffer_count increment
4115                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4116                  * WTHRESH=8 burst writeback up to two cache lines
4117                  */
4118                 rxdctl &= ~0x3FFFFF;
4119                 rxdctl |=  0x080420;
4120 #if (PAGE_SIZE < 8192)
4121         /* RXDCTL.RLPML does not work on 82599 */
4122         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4123                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4124                             IXGBE_RXDCTL_RLPML_EN);
4125
4126                 /* Limit the maximum frame size so we don't overrun the skb.
4127                  * This can happen in SRIOV mode when the MTU of the VF is
4128                  * higher than the MTU of the PF.
4129                  */
4130                 if (ring_uses_build_skb(ring) &&
4131                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4132                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4133                                   IXGBE_RXDCTL_RLPML_EN;
4134 #endif
4135         }
4136
4137         if (ring->xsk_umem && hw->mac.type != ixgbe_mac_82599EB) {
4138                 u32 xsk_buf_len = ring->xsk_umem->chunk_size_nohr -
4139                                   XDP_PACKET_HEADROOM;
4140
4141                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4142                             IXGBE_RXDCTL_RLPML_EN);
4143                 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4144
4145                 ring->rx_buf_len = xsk_buf_len;
4146         }
4147
4148         /* initialize rx_buffer_info */
4149         memset(ring->rx_buffer_info, 0,
4150                sizeof(struct ixgbe_rx_buffer) * ring->count);
4151
4152         /* initialize Rx descriptor 0 */
4153         rx_desc = IXGBE_RX_DESC(ring, 0);
4154         rx_desc->wb.upper.length = 0;
4155
4156         /* enable receive descriptor ring */
4157         rxdctl |= IXGBE_RXDCTL_ENABLE;
4158         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4159
4160         ixgbe_rx_desc_queue_enable(adapter, ring);
4161         if (ring->xsk_umem)
4162                 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4163         else
4164                 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4165 }
4166
4167 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4168 {
4169         struct ixgbe_hw *hw = &adapter->hw;
4170         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4171         u16 pool = adapter->num_rx_pools;
4172
4173         /* PSRTYPE must be initialized in non 82598 adapters */
4174         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4175                       IXGBE_PSRTYPE_UDPHDR |
4176                       IXGBE_PSRTYPE_IPV4HDR |
4177                       IXGBE_PSRTYPE_L2HDR |
4178                       IXGBE_PSRTYPE_IPV6HDR;
4179
4180         if (hw->mac.type == ixgbe_mac_82598EB)
4181                 return;
4182
4183         if (rss_i > 3)
4184                 psrtype |= 2u << 29;
4185         else if (rss_i > 1)
4186                 psrtype |= 1u << 29;
4187
4188         while (pool--)
4189                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4190 }
4191
4192 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4193 {
4194         struct ixgbe_hw *hw = &adapter->hw;
4195         u16 pool = adapter->num_rx_pools;
4196         u32 reg_offset, vf_shift, vmolr;
4197         u32 gcr_ext, vmdctl;
4198         int i;
4199
4200         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4201                 return;
4202
4203         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4204         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4205         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4206         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4207         vmdctl |= IXGBE_VT_CTL_REPLEN;
4208         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4209
4210         /* accept untagged packets until a vlan tag is
4211          * specifically set for the VMDQ queue/pool
4212          */
4213         vmolr = IXGBE_VMOLR_AUPE;
4214         while (pool--)
4215                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4216
4217         vf_shift = VMDQ_P(0) % 32;
4218         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4219
4220         /* Enable only the PF's pool for Tx/Rx */
4221         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4222         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4223         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4224         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4225         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4226                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4227
4228         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4229         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4230
4231         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4232         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4233
4234         /*
4235          * Set up VF register offsets for selected VT Mode,
4236          * i.e. 32 or 64 VFs for SR-IOV
4237          */
4238         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4239         case IXGBE_82599_VMDQ_8Q_MASK:
4240                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4241                 break;
4242         case IXGBE_82599_VMDQ_4Q_MASK:
4243                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4244                 break;
4245         default:
4246                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4247                 break;
4248         }
4249
4250         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4251
4252         for (i = 0; i < adapter->num_vfs; i++) {
4253                 /* configure spoof checking */
4254                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4255                                           adapter->vfinfo[i].spoofchk_enabled);
4256
4257                 /* Enable/Disable RSS query feature  */
4258                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4259                                           adapter->vfinfo[i].rss_query_enabled);
4260         }
4261 }
4262
4263 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4264 {
4265         struct ixgbe_hw *hw = &adapter->hw;
4266         struct net_device *netdev = adapter->netdev;
4267         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4268         struct ixgbe_ring *rx_ring;
4269         int i;
4270         u32 mhadd, hlreg0;
4271
4272 #ifdef IXGBE_FCOE
4273         /* adjust max frame to be able to do baby jumbo for FCoE */
4274         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4275             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4276                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4277
4278 #endif /* IXGBE_FCOE */
4279
4280         /* adjust max frame to be at least the size of a standard frame */
4281         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4282                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4283
4284         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4285         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4286                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4287                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4288
4289                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4290         }
4291
4292         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4293         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4294         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4295         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4296
4297         /*
4298          * Setup the HW Rx Head and Tail Descriptor Pointers and
4299          * the Base and Length of the Rx Descriptor Ring
4300          */
4301         for (i = 0; i < adapter->num_rx_queues; i++) {
4302                 rx_ring = adapter->rx_ring[i];
4303
4304                 clear_ring_rsc_enabled(rx_ring);
4305                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4306                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4307
4308                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4309                         set_ring_rsc_enabled(rx_ring);
4310
4311                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4312                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4313
4314                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4315                         continue;
4316
4317                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4318
4319 #if (PAGE_SIZE < 8192)
4320                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4321                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4322
4323                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4324                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4325                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4326 #endif
4327         }
4328 }
4329
4330 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4331 {
4332         struct ixgbe_hw *hw = &adapter->hw;
4333         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4334
4335         switch (hw->mac.type) {
4336         case ixgbe_mac_82598EB:
4337                 /*
4338                  * For VMDq support of different descriptor types or
4339                  * buffer sizes through the use of multiple SRRCTL
4340                  * registers, RDRXCTL.MVMEN must be set to 1
4341                  *
4342                  * also, the manual doesn't mention it clearly but DCA hints
4343                  * will only use queue 0's tags unless this bit is set.  Side
4344                  * effects of setting this bit are only that SRRCTL must be
4345                  * fully programmed [0..15]
4346                  */
4347                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4348                 break;
4349         case ixgbe_mac_X550:
4350         case ixgbe_mac_X550EM_x:
4351         case ixgbe_mac_x550em_a:
4352                 if (adapter->num_vfs)
4353                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4354                 /* fall through */
4355         case ixgbe_mac_82599EB:
4356         case ixgbe_mac_X540:
4357                 /* Disable RSC for ACK packets */
4358                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4359                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4360                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4361                 /* hardware requires some bits to be set by default */
4362                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4363                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4364                 break;
4365         default:
4366                 /* We should do nothing since we don't know this hardware */
4367                 return;
4368         }
4369
4370         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4371 }
4372
4373 /**
4374  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4375  * @adapter: board private structure
4376  *
4377  * Configure the Rx unit of the MAC after a reset.
4378  **/
4379 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4380 {
4381         struct ixgbe_hw *hw = &adapter->hw;
4382         int i;
4383         u32 rxctrl, rfctl;
4384
4385         /* disable receives while setting up the descriptors */
4386         hw->mac.ops.disable_rx(hw);
4387
4388         ixgbe_setup_psrtype(adapter);
4389         ixgbe_setup_rdrxctl(adapter);
4390
4391         /* RSC Setup */
4392         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4393         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4394         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4395                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4396
4397         /* disable NFS filtering */
4398         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4399         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4400
4401         /* Program registers for the distribution of queues */
4402         ixgbe_setup_mrqc(adapter);
4403
4404         /* set_rx_buffer_len must be called before ring initialization */
4405         ixgbe_set_rx_buffer_len(adapter);
4406
4407         /*
4408          * Setup the HW Rx Head and Tail Descriptor Pointers and
4409          * the Base and Length of the Rx Descriptor Ring
4410          */
4411         for (i = 0; i < adapter->num_rx_queues; i++)
4412                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4413
4414         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4415         /* disable drop enable for 82598 parts */
4416         if (hw->mac.type == ixgbe_mac_82598EB)
4417                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4418
4419         /* enable all receives */
4420         rxctrl |= IXGBE_RXCTRL_RXEN;
4421         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4422 }
4423
4424 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4425                                  __be16 proto, u16 vid)
4426 {
4427         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4428         struct ixgbe_hw *hw = &adapter->hw;
4429
4430         /* add VID to filter table */
4431         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4432                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4433
4434         set_bit(vid, adapter->active_vlans);
4435
4436         return 0;
4437 }
4438
4439 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4440 {
4441         u32 vlvf;
4442         int idx;
4443
4444         /* short cut the special case */
4445         if (vlan == 0)
4446                 return 0;
4447
4448         /* Search for the vlan id in the VLVF entries */
4449         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4450                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4451                 if ((vlvf & VLAN_VID_MASK) == vlan)
4452                         break;
4453         }
4454
4455         return idx;
4456 }
4457
4458 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4459 {
4460         struct ixgbe_hw *hw = &adapter->hw;
4461         u32 bits, word;
4462         int idx;
4463
4464         idx = ixgbe_find_vlvf_entry(hw, vid);
4465         if (!idx)
4466                 return;
4467
4468         /* See if any other pools are set for this VLAN filter
4469          * entry other than the PF.
4470          */
4471         word = idx * 2 + (VMDQ_P(0) / 32);
4472         bits = ~BIT(VMDQ_P(0) % 32);
4473         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4474
4475         /* Disable the filter so this falls into the default pool. */
4476         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4477                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4478                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4479                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4480         }
4481 }
4482
4483 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4484                                   __be16 proto, u16 vid)
4485 {
4486         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4487         struct ixgbe_hw *hw = &adapter->hw;
4488
4489         /* remove VID from filter table */
4490         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4491                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4492
4493         clear_bit(vid, adapter->active_vlans);
4494
4495         return 0;
4496 }
4497
4498 /**
4499  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4500  * @adapter: driver data
4501  */
4502 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4503 {
4504         struct ixgbe_hw *hw = &adapter->hw;
4505         u32 vlnctrl;
4506         int i, j;
4507
4508         switch (hw->mac.type) {
4509         case ixgbe_mac_82598EB:
4510                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4511                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4512                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4513                 break;
4514         case ixgbe_mac_82599EB:
4515         case ixgbe_mac_X540:
4516         case ixgbe_mac_X550:
4517         case ixgbe_mac_X550EM_x:
4518         case ixgbe_mac_x550em_a:
4519                 for (i = 0; i < adapter->num_rx_queues; i++) {
4520                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4521
4522                         if (!netif_is_ixgbe(ring->netdev))
4523                                 continue;
4524
4525                         j = ring->reg_idx;
4526                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4527                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4528                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4529                 }
4530                 break;
4531         default:
4532                 break;
4533         }
4534 }
4535
4536 /**
4537  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4538  * @adapter: driver data
4539  */
4540 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4541 {
4542         struct ixgbe_hw *hw = &adapter->hw;
4543         u32 vlnctrl;
4544         int i, j;
4545
4546         switch (hw->mac.type) {
4547         case ixgbe_mac_82598EB:
4548                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4549                 vlnctrl |= IXGBE_VLNCTRL_VME;
4550                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4551                 break;
4552         case ixgbe_mac_82599EB:
4553         case ixgbe_mac_X540:
4554         case ixgbe_mac_X550:
4555         case ixgbe_mac_X550EM_x:
4556         case ixgbe_mac_x550em_a:
4557                 for (i = 0; i < adapter->num_rx_queues; i++) {
4558                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4559
4560                         if (!netif_is_ixgbe(ring->netdev))
4561                                 continue;
4562
4563                         j = ring->reg_idx;
4564                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4565                         vlnctrl |= IXGBE_RXDCTL_VME;
4566                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4567                 }
4568                 break;
4569         default:
4570                 break;
4571         }
4572 }
4573
4574 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4575 {
4576         struct ixgbe_hw *hw = &adapter->hw;
4577         u32 vlnctrl, i;
4578
4579         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4580
4581         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4582         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4583                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4584                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4585         } else {
4586                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4587                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4588                 return;
4589         }
4590
4591         /* Nothing to do for 82598 */
4592         if (hw->mac.type == ixgbe_mac_82598EB)
4593                 return;
4594
4595         /* We are already in VLAN promisc, nothing to do */
4596         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4597                 return;
4598
4599         /* Set flag so we don't redo unnecessary work */
4600         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4601
4602         /* Add PF to all active pools */
4603         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4604                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4605                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4606
4607                 vlvfb |= BIT(VMDQ_P(0) % 32);
4608                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4609         }
4610
4611         /* Set all bits in the VLAN filter table array */
4612         for (i = hw->mac.vft_size; i--;)
4613                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4614 }
4615
4616 #define VFTA_BLOCK_SIZE 8
4617 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4618 {
4619         struct ixgbe_hw *hw = &adapter->hw;
4620         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4621         u32 vid_start = vfta_offset * 32;
4622         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4623         u32 i, vid, word, bits;
4624
4625         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4626                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4627
4628                 /* pull VLAN ID from VLVF */
4629                 vid = vlvf & VLAN_VID_MASK;
4630
4631                 /* only concern outselves with a certain range */
4632                 if (vid < vid_start || vid >= vid_end)
4633                         continue;
4634
4635                 if (vlvf) {
4636                         /* record VLAN ID in VFTA */
4637                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4638
4639                         /* if PF is part of this then continue */
4640                         if (test_bit(vid, adapter->active_vlans))
4641                                 continue;
4642                 }
4643
4644                 /* remove PF from the pool */
4645                 word = i * 2 + VMDQ_P(0) / 32;
4646                 bits = ~BIT(VMDQ_P(0) % 32);
4647                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4648                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4649         }
4650
4651         /* extract values from active_vlans and write back to VFTA */
4652         for (i = VFTA_BLOCK_SIZE; i--;) {
4653                 vid = (vfta_offset + i) * 32;
4654                 word = vid / BITS_PER_LONG;
4655                 bits = vid % BITS_PER_LONG;
4656
4657                 vfta[i] |= adapter->active_vlans[word] >> bits;
4658
4659                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4660         }
4661 }
4662
4663 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4664 {
4665         struct ixgbe_hw *hw = &adapter->hw;
4666         u32 vlnctrl, i;
4667
4668         /* Set VLAN filtering to enabled */
4669         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4670         vlnctrl |= IXGBE_VLNCTRL_VFE;
4671         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4672
4673         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4674             hw->mac.type == ixgbe_mac_82598EB)
4675                 return;
4676
4677         /* We are not in VLAN promisc, nothing to do */
4678         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4679                 return;
4680
4681         /* Set flag so we don't redo unnecessary work */
4682         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4683
4684         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4685                 ixgbe_scrub_vfta(adapter, i);
4686 }
4687
4688 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4689 {
4690         u16 vid = 1;
4691
4692         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4693
4694         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4695                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4696 }
4697
4698 /**
4699  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4700  * @netdev: network interface device structure
4701  *
4702  * Writes multicast address list to the MTA hash table.
4703  * Returns: -ENOMEM on failure
4704  *                0 on no addresses written
4705  *                X on writing X addresses to MTA
4706  **/
4707 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4708 {
4709         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4710         struct ixgbe_hw *hw = &adapter->hw;
4711
4712         if (!netif_running(netdev))
4713                 return 0;
4714
4715         if (hw->mac.ops.update_mc_addr_list)
4716                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4717         else
4718                 return -ENOMEM;
4719
4720 #ifdef CONFIG_PCI_IOV
4721         ixgbe_restore_vf_multicasts(adapter);
4722 #endif
4723
4724         return netdev_mc_count(netdev);
4725 }
4726
4727 #ifdef CONFIG_PCI_IOV
4728 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4729 {
4730         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4731         struct ixgbe_hw *hw = &adapter->hw;
4732         int i;
4733
4734         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4735                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4736
4737                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4738                         hw->mac.ops.set_rar(hw, i,
4739                                             mac_table->addr,
4740                                             mac_table->pool,
4741                                             IXGBE_RAH_AV);
4742                 else
4743                         hw->mac.ops.clear_rar(hw, i);
4744         }
4745 }
4746
4747 #endif
4748 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4749 {
4750         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4751         struct ixgbe_hw *hw = &adapter->hw;
4752         int i;
4753
4754         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4755                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4756                         continue;
4757
4758                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4759
4760                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4761                         hw->mac.ops.set_rar(hw, i,
4762                                             mac_table->addr,
4763                                             mac_table->pool,
4764                                             IXGBE_RAH_AV);
4765                 else
4766                         hw->mac.ops.clear_rar(hw, i);
4767         }
4768 }
4769
4770 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4771 {
4772         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4773         struct ixgbe_hw *hw = &adapter->hw;
4774         int i;
4775
4776         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4777                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4778                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4779         }
4780
4781         ixgbe_sync_mac_table(adapter);
4782 }
4783
4784 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4785 {
4786         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4787         struct ixgbe_hw *hw = &adapter->hw;
4788         int i, count = 0;
4789
4790         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4791                 /* do not count default RAR as available */
4792                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4793                         continue;
4794
4795                 /* only count unused and addresses that belong to us */
4796                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4797                         if (mac_table->pool != pool)
4798                                 continue;
4799                 }
4800
4801                 count++;
4802         }
4803
4804         return count;
4805 }
4806
4807 /* this function destroys the first RAR entry */
4808 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4809 {
4810         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4811         struct ixgbe_hw *hw = &adapter->hw;
4812
4813         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4814         mac_table->pool = VMDQ_P(0);
4815
4816         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4817
4818         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4819                             IXGBE_RAH_AV);
4820 }
4821
4822 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4823                          const u8 *addr, u16 pool)
4824 {
4825         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4826         struct ixgbe_hw *hw = &adapter->hw;
4827         int i;
4828
4829         if (is_zero_ether_addr(addr))
4830                 return -EINVAL;
4831
4832         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4833                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4834                         continue;
4835
4836                 ether_addr_copy(mac_table->addr, addr);
4837                 mac_table->pool = pool;
4838
4839                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4840                                     IXGBE_MAC_STATE_IN_USE;
4841
4842                 ixgbe_sync_mac_table(adapter);
4843
4844                 return i;
4845         }
4846
4847         return -ENOMEM;
4848 }
4849
4850 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4851                          const u8 *addr, u16 pool)
4852 {
4853         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4854         struct ixgbe_hw *hw = &adapter->hw;
4855         int i;
4856
4857         if (is_zero_ether_addr(addr))
4858                 return -EINVAL;
4859
4860         /* search table for addr, if found clear IN_USE flag and sync */
4861         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4862                 /* we can only delete an entry if it is in use */
4863                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4864                         continue;
4865                 /* we only care about entries that belong to the given pool */
4866                 if (mac_table->pool != pool)
4867                         continue;
4868                 /* we only care about a specific MAC address */
4869                 if (!ether_addr_equal(addr, mac_table->addr))
4870                         continue;
4871
4872                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4873                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4874
4875                 ixgbe_sync_mac_table(adapter);
4876
4877                 return 0;
4878         }
4879
4880         return -ENOMEM;
4881 }
4882
4883 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4884 {
4885         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4886         int ret;
4887
4888         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4889
4890         return min_t(int, ret, 0);
4891 }
4892
4893 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4894 {
4895         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4896
4897         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4898
4899         return 0;
4900 }
4901
4902 /**
4903  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4904  * @netdev: network interface device structure
4905  *
4906  * The set_rx_method entry point is called whenever the unicast/multicast
4907  * address list or the network interface flags are updated.  This routine is
4908  * responsible for configuring the hardware for proper unicast, multicast and
4909  * promiscuous mode.
4910  **/
4911 void ixgbe_set_rx_mode(struct net_device *netdev)
4912 {
4913         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4914         struct ixgbe_hw *hw = &adapter->hw;
4915         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4916         netdev_features_t features = netdev->features;
4917         int count;
4918
4919         /* Check for Promiscuous and All Multicast modes */
4920         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4921
4922         /* set all bits that we expect to always be set */
4923         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4924         fctrl |= IXGBE_FCTRL_BAM;
4925         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4926         fctrl |= IXGBE_FCTRL_PMCF;
4927
4928         /* clear the bits we are changing the status of */
4929         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4930         if (netdev->flags & IFF_PROMISC) {
4931                 hw->addr_ctrl.user_set_promisc = true;
4932                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4933                 vmolr |= IXGBE_VMOLR_MPE;
4934                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4935         } else {
4936                 if (netdev->flags & IFF_ALLMULTI) {
4937                         fctrl |= IXGBE_FCTRL_MPE;
4938                         vmolr |= IXGBE_VMOLR_MPE;
4939                 }
4940                 hw->addr_ctrl.user_set_promisc = false;
4941         }
4942
4943         /*
4944          * Write addresses to available RAR registers, if there is not
4945          * sufficient space to store all the addresses then enable
4946          * unicast promiscuous mode
4947          */
4948         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4949                 fctrl |= IXGBE_FCTRL_UPE;
4950                 vmolr |= IXGBE_VMOLR_ROPE;
4951         }
4952
4953         /* Write addresses to the MTA, if the attempt fails
4954          * then we should just turn on promiscuous mode so
4955          * that we can at least receive multicast traffic
4956          */
4957         count = ixgbe_write_mc_addr_list(netdev);
4958         if (count < 0) {
4959                 fctrl |= IXGBE_FCTRL_MPE;
4960                 vmolr |= IXGBE_VMOLR_MPE;
4961         } else if (count) {
4962                 vmolr |= IXGBE_VMOLR_ROMPE;
4963         }
4964
4965         if (hw->mac.type != ixgbe_mac_82598EB) {
4966                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4967                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4968                            IXGBE_VMOLR_ROPE);
4969                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4970         }
4971
4972         /* This is useful for sniffing bad packets. */
4973         if (features & NETIF_F_RXALL) {
4974                 /* UPE and MPE will be handled by normal PROMISC logic
4975                  * in e1000e_set_rx_mode */
4976                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4977                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4978                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4979
4980                 fctrl &= ~(IXGBE_FCTRL_DPF);
4981                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4982         }
4983
4984         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4985
4986         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4987                 ixgbe_vlan_strip_enable(adapter);
4988         else
4989                 ixgbe_vlan_strip_disable(adapter);
4990
4991         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4992                 ixgbe_vlan_promisc_disable(adapter);
4993         else
4994                 ixgbe_vlan_promisc_enable(adapter);
4995 }
4996
4997 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4998 {
4999         int q_idx;
5000
5001         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5002                 napi_enable(&adapter->q_vector[q_idx]->napi);
5003 }
5004
5005 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5006 {
5007         int q_idx;
5008
5009         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5010                 napi_disable(&adapter->q_vector[q_idx]->napi);
5011 }
5012
5013 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5014 {
5015         struct ixgbe_hw *hw = &adapter->hw;
5016         u32 vxlanctrl;
5017
5018         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5019                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5020                 return;
5021
5022         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5023         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5024
5025         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5026                 adapter->vxlan_port = 0;
5027
5028         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5029                 adapter->geneve_port = 0;
5030 }
5031
5032 #ifdef CONFIG_IXGBE_DCB
5033 /**
5034  * ixgbe_configure_dcb - Configure DCB hardware
5035  * @adapter: ixgbe adapter struct
5036  *
5037  * This is called by the driver on open to configure the DCB hardware.
5038  * This is also called by the gennetlink interface when reconfiguring
5039  * the DCB state.
5040  */
5041 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5042 {
5043         struct ixgbe_hw *hw = &adapter->hw;
5044         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5045
5046         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5047                 if (hw->mac.type == ixgbe_mac_82598EB)
5048                         netif_set_gso_max_size(adapter->netdev, 65536);
5049                 return;
5050         }
5051
5052         if (hw->mac.type == ixgbe_mac_82598EB)
5053                 netif_set_gso_max_size(adapter->netdev, 32768);
5054
5055 #ifdef IXGBE_FCOE
5056         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5057                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5058 #endif
5059
5060         /* reconfigure the hardware */
5061         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5062                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5063                                                 DCB_TX_CONFIG);
5064                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5065                                                 DCB_RX_CONFIG);
5066                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5067         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5068                 ixgbe_dcb_hw_ets(&adapter->hw,
5069                                  adapter->ixgbe_ieee_ets,
5070                                  max_frame);
5071                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5072                                         adapter->ixgbe_ieee_pfc->pfc_en,
5073                                         adapter->ixgbe_ieee_ets->prio_tc);
5074         }
5075
5076         /* Enable RSS Hash per TC */
5077         if (hw->mac.type != ixgbe_mac_82598EB) {
5078                 u32 msb = 0;
5079                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5080
5081                 while (rss_i) {
5082                         msb++;
5083                         rss_i >>= 1;
5084                 }
5085
5086                 /* write msb to all 8 TCs in one write */
5087                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5088         }
5089 }
5090 #endif
5091
5092 /* Additional bittime to account for IXGBE framing */
5093 #define IXGBE_ETH_FRAMING 20
5094
5095 /**
5096  * ixgbe_hpbthresh - calculate high water mark for flow control
5097  *
5098  * @adapter: board private structure to calculate for
5099  * @pb: packet buffer to calculate
5100  */
5101 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5102 {
5103         struct ixgbe_hw *hw = &adapter->hw;
5104         struct net_device *dev = adapter->netdev;
5105         int link, tc, kb, marker;
5106         u32 dv_id, rx_pba;
5107
5108         /* Calculate max LAN frame size */
5109         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5110
5111 #ifdef IXGBE_FCOE
5112         /* FCoE traffic class uses FCOE jumbo frames */
5113         if ((dev->features & NETIF_F_FCOE_MTU) &&
5114             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5115             (pb == ixgbe_fcoe_get_tc(adapter)))
5116                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5117 #endif
5118
5119         /* Calculate delay value for device */
5120         switch (hw->mac.type) {
5121         case ixgbe_mac_X540:
5122         case ixgbe_mac_X550:
5123         case ixgbe_mac_X550EM_x:
5124         case ixgbe_mac_x550em_a:
5125                 dv_id = IXGBE_DV_X540(link, tc);
5126                 break;
5127         default:
5128                 dv_id = IXGBE_DV(link, tc);
5129                 break;
5130         }
5131
5132         /* Loopback switch introduces additional latency */
5133         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5134                 dv_id += IXGBE_B2BT(tc);
5135
5136         /* Delay value is calculated in bit times convert to KB */
5137         kb = IXGBE_BT2KB(dv_id);
5138         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5139
5140         marker = rx_pba - kb;
5141
5142         /* It is possible that the packet buffer is not large enough
5143          * to provide required headroom. In this case throw an error
5144          * to user and a do the best we can.
5145          */
5146         if (marker < 0) {
5147                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5148                             "headroom to support flow control."
5149                             "Decrease MTU or number of traffic classes\n", pb);
5150                 marker = tc + 1;
5151         }
5152
5153         return marker;
5154 }
5155
5156 /**
5157  * ixgbe_lpbthresh - calculate low water mark for for flow control
5158  *
5159  * @adapter: board private structure to calculate for
5160  * @pb: packet buffer to calculate
5161  */
5162 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5163 {
5164         struct ixgbe_hw *hw = &adapter->hw;
5165         struct net_device *dev = adapter->netdev;
5166         int tc;
5167         u32 dv_id;
5168
5169         /* Calculate max LAN frame size */
5170         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5171
5172 #ifdef IXGBE_FCOE
5173         /* FCoE traffic class uses FCOE jumbo frames */
5174         if ((dev->features & NETIF_F_FCOE_MTU) &&
5175             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5176             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5177                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5178 #endif
5179
5180         /* Calculate delay value for device */
5181         switch (hw->mac.type) {
5182         case ixgbe_mac_X540:
5183         case ixgbe_mac_X550:
5184         case ixgbe_mac_X550EM_x:
5185         case ixgbe_mac_x550em_a:
5186                 dv_id = IXGBE_LOW_DV_X540(tc);
5187                 break;
5188         default:
5189                 dv_id = IXGBE_LOW_DV(tc);
5190                 break;
5191         }
5192
5193         /* Delay value is calculated in bit times convert to KB */
5194         return IXGBE_BT2KB(dv_id);
5195 }
5196
5197 /*
5198  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5199  */
5200 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5201 {
5202         struct ixgbe_hw *hw = &adapter->hw;
5203         int num_tc = adapter->hw_tcs;
5204         int i;
5205
5206         if (!num_tc)
5207                 num_tc = 1;
5208
5209         for (i = 0; i < num_tc; i++) {
5210                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5211                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5212
5213                 /* Low water marks must not be larger than high water marks */
5214                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5215                         hw->fc.low_water[i] = 0;
5216         }
5217
5218         for (; i < MAX_TRAFFIC_CLASS; i++)
5219                 hw->fc.high_water[i] = 0;
5220 }
5221
5222 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5223 {
5224         struct ixgbe_hw *hw = &adapter->hw;
5225         int hdrm;
5226         u8 tc = adapter->hw_tcs;
5227
5228         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5229             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5230                 hdrm = 32 << adapter->fdir_pballoc;
5231         else
5232                 hdrm = 0;
5233
5234         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5235         ixgbe_pbthresh_setup(adapter);
5236 }
5237
5238 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5239 {
5240         struct ixgbe_hw *hw = &adapter->hw;
5241         struct hlist_node *node2;
5242         struct ixgbe_fdir_filter *filter;
5243         u8 queue;
5244
5245         spin_lock(&adapter->fdir_perfect_lock);
5246
5247         if (!hlist_empty(&adapter->fdir_filter_list))
5248                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5249
5250         hlist_for_each_entry_safe(filter, node2,
5251                                   &adapter->fdir_filter_list, fdir_node) {
5252                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5253                         queue = IXGBE_FDIR_DROP_QUEUE;
5254                 } else {
5255                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5256                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5257
5258                         if (!vf && (ring >= adapter->num_rx_queues)) {
5259                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5260                                       ring);
5261                                 continue;
5262                         } else if (vf &&
5263                                    ((vf > adapter->num_vfs) ||
5264                                      ring >= adapter->num_rx_queues_per_pool)) {
5265                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5266                                       vf, ring);
5267                                 continue;
5268                         }
5269
5270                         /* Map the ring onto the absolute queue index */
5271                         if (!vf)
5272                                 queue = adapter->rx_ring[ring]->reg_idx;
5273                         else
5274                                 queue = ((vf - 1) *
5275                                         adapter->num_rx_queues_per_pool) + ring;
5276                 }
5277
5278                 ixgbe_fdir_write_perfect_filter_82599(hw,
5279                                 &filter->filter, filter->sw_idx, queue);
5280         }
5281
5282         spin_unlock(&adapter->fdir_perfect_lock);
5283 }
5284
5285 /**
5286  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5287  * @rx_ring: ring to free buffers from
5288  **/
5289 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5290 {
5291         u16 i = rx_ring->next_to_clean;
5292         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5293
5294         if (rx_ring->xsk_umem) {
5295                 ixgbe_xsk_clean_rx_ring(rx_ring);
5296                 goto skip_free;
5297         }
5298
5299         /* Free all the Rx ring sk_buffs */
5300         while (i != rx_ring->next_to_alloc) {
5301                 if (rx_buffer->skb) {
5302                         struct sk_buff *skb = rx_buffer->skb;
5303                         if (IXGBE_CB(skb)->page_released)
5304                                 dma_unmap_page_attrs(rx_ring->dev,
5305                                                      IXGBE_CB(skb)->dma,
5306                                                      ixgbe_rx_pg_size(rx_ring),
5307                                                      DMA_FROM_DEVICE,
5308                                                      IXGBE_RX_DMA_ATTR);
5309                         dev_kfree_skb(skb);
5310                 }
5311
5312                 /* Invalidate cache lines that may have been written to by
5313                  * device so that we avoid corrupting memory.
5314                  */
5315                 dma_sync_single_range_for_cpu(rx_ring->dev,
5316                                               rx_buffer->dma,
5317                                               rx_buffer->page_offset,
5318                                               ixgbe_rx_bufsz(rx_ring),
5319                                               DMA_FROM_DEVICE);
5320
5321                 /* free resources associated with mapping */
5322                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5323                                      ixgbe_rx_pg_size(rx_ring),
5324                                      DMA_FROM_DEVICE,
5325                                      IXGBE_RX_DMA_ATTR);
5326                 __page_frag_cache_drain(rx_buffer->page,
5327                                         rx_buffer->pagecnt_bias);
5328
5329                 i++;
5330                 rx_buffer++;
5331                 if (i == rx_ring->count) {
5332                         i = 0;
5333                         rx_buffer = rx_ring->rx_buffer_info;
5334                 }
5335         }
5336
5337 skip_free:
5338         rx_ring->next_to_alloc = 0;
5339         rx_ring->next_to_clean = 0;
5340         rx_ring->next_to_use = 0;
5341 }
5342
5343 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5344                              struct ixgbe_fwd_adapter *accel)
5345 {
5346         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5347         int num_tc = netdev_get_num_tc(adapter->netdev);
5348         struct net_device *vdev = accel->netdev;
5349         int i, baseq, err;
5350
5351         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5352         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5353                    accel->pool, adapter->num_rx_pools,
5354                    baseq, baseq + adapter->num_rx_queues_per_pool);
5355
5356         accel->rx_base_queue = baseq;
5357         accel->tx_base_queue = baseq;
5358
5359         /* record configuration for macvlan interface in vdev */
5360         for (i = 0; i < num_tc; i++)
5361                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5362                                              i, rss_i, baseq + (rss_i * i));
5363
5364         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5365                 adapter->rx_ring[baseq + i]->netdev = vdev;
5366
5367         /* Guarantee all rings are updated before we update the
5368          * MAC address filter.
5369          */
5370         wmb();
5371
5372         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5373          * need to only treat it as an error value if it is negative.
5374          */
5375         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5376                                    VMDQ_P(accel->pool));
5377         if (err >= 0)
5378                 return 0;
5379
5380         /* if we cannot add the MAC rule then disable the offload */
5381         macvlan_release_l2fw_offload(vdev);
5382
5383         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5384                 adapter->rx_ring[baseq + i]->netdev = NULL;
5385
5386         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5387
5388         /* unbind the queues and drop the subordinate channel config */
5389         netdev_unbind_sb_channel(adapter->netdev, vdev);
5390         netdev_set_sb_channel(vdev, 0);
5391
5392         clear_bit(accel->pool, adapter->fwd_bitmask);
5393         kfree(accel);
5394
5395         return err;
5396 }
5397
5398 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5399 {
5400         struct ixgbe_adapter *adapter = data;
5401         struct ixgbe_fwd_adapter *accel;
5402
5403         if (!netif_is_macvlan(vdev))
5404                 return 0;
5405
5406         accel = macvlan_accel_priv(vdev);
5407         if (!accel)
5408                 return 0;
5409
5410         ixgbe_fwd_ring_up(adapter, accel);
5411
5412         return 0;
5413 }
5414
5415 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5416 {
5417         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5418                                       ixgbe_macvlan_up, adapter);
5419 }
5420
5421 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5422 {
5423         struct ixgbe_hw *hw = &adapter->hw;
5424
5425         ixgbe_configure_pb(adapter);
5426 #ifdef CONFIG_IXGBE_DCB
5427         ixgbe_configure_dcb(adapter);
5428 #endif
5429         /*
5430          * We must restore virtualization before VLANs or else
5431          * the VLVF registers will not be populated
5432          */
5433         ixgbe_configure_virtualization(adapter);
5434
5435         ixgbe_set_rx_mode(adapter->netdev);
5436         ixgbe_restore_vlan(adapter);
5437         ixgbe_ipsec_restore(adapter);
5438
5439         switch (hw->mac.type) {
5440         case ixgbe_mac_82599EB:
5441         case ixgbe_mac_X540:
5442                 hw->mac.ops.disable_rx_buff(hw);
5443                 break;
5444         default:
5445                 break;
5446         }
5447
5448         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5449                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5450                                                 adapter->fdir_pballoc);
5451         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5452                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5453                                               adapter->fdir_pballoc);
5454                 ixgbe_fdir_filter_restore(adapter);
5455         }
5456
5457         switch (hw->mac.type) {
5458         case ixgbe_mac_82599EB:
5459         case ixgbe_mac_X540:
5460                 hw->mac.ops.enable_rx_buff(hw);
5461                 break;
5462         default:
5463                 break;
5464         }
5465
5466 #ifdef CONFIG_IXGBE_DCA
5467         /* configure DCA */
5468         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5469                 ixgbe_setup_dca(adapter);
5470 #endif /* CONFIG_IXGBE_DCA */
5471
5472 #ifdef IXGBE_FCOE
5473         /* configure FCoE L2 filters, redirection table, and Rx control */
5474         ixgbe_configure_fcoe(adapter);
5475
5476 #endif /* IXGBE_FCOE */
5477         ixgbe_configure_tx(adapter);
5478         ixgbe_configure_rx(adapter);
5479         ixgbe_configure_dfwd(adapter);
5480 }
5481
5482 /**
5483  * ixgbe_sfp_link_config - set up SFP+ link
5484  * @adapter: pointer to private adapter struct
5485  **/
5486 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5487 {
5488         /*
5489          * We are assuming the worst case scenario here, and that
5490          * is that an SFP was inserted/removed after the reset
5491          * but before SFP detection was enabled.  As such the best
5492          * solution is to just start searching as soon as we start
5493          */
5494         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5495                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5496
5497         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5498         adapter->sfp_poll_time = 0;
5499 }
5500
5501 /**
5502  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5503  * @hw: pointer to private hardware struct
5504  *
5505  * Returns 0 on success, negative on failure
5506  **/
5507 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5508 {
5509         u32 speed;
5510         bool autoneg, link_up = false;
5511         int ret = IXGBE_ERR_LINK_SETUP;
5512
5513         if (hw->mac.ops.check_link)
5514                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5515
5516         if (ret)
5517                 return ret;
5518
5519         speed = hw->phy.autoneg_advertised;
5520         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5521                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5522                                                         &autoneg);
5523         if (ret)
5524                 return ret;
5525
5526         if (hw->mac.ops.setup_link)
5527                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5528
5529         return ret;
5530 }
5531
5532 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5533 {
5534         struct ixgbe_hw *hw = &adapter->hw;
5535         u32 gpie = 0;
5536
5537         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5538                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5539                        IXGBE_GPIE_OCD;
5540                 gpie |= IXGBE_GPIE_EIAME;
5541                 /*
5542                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5543                  * this saves a register write for every interrupt
5544                  */
5545                 switch (hw->mac.type) {
5546                 case ixgbe_mac_82598EB:
5547                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5548                         break;
5549                 case ixgbe_mac_82599EB:
5550                 case ixgbe_mac_X540:
5551                 case ixgbe_mac_X550:
5552                 case ixgbe_mac_X550EM_x:
5553                 case ixgbe_mac_x550em_a:
5554                 default:
5555                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5556                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5557                         break;
5558                 }
5559         } else {
5560                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5561                  * specifically only auto mask tx and rx interrupts */
5562                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5563         }
5564
5565         /* XXX: to interrupt immediately for EICS writes, enable this */
5566         /* gpie |= IXGBE_GPIE_EIMEN; */
5567
5568         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5569                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5570
5571                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5572                 case IXGBE_82599_VMDQ_8Q_MASK:
5573                         gpie |= IXGBE_GPIE_VTMODE_16;
5574                         break;
5575                 case IXGBE_82599_VMDQ_4Q_MASK:
5576                         gpie |= IXGBE_GPIE_VTMODE_32;
5577                         break;
5578                 default:
5579                         gpie |= IXGBE_GPIE_VTMODE_64;
5580                         break;
5581                 }
5582         }
5583
5584         /* Enable Thermal over heat sensor interrupt */
5585         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5586                 switch (adapter->hw.mac.type) {
5587                 case ixgbe_mac_82599EB:
5588                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5589                         break;
5590                 default:
5591                         break;
5592                 }
5593         }
5594
5595         /* Enable fan failure interrupt */
5596         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5597                 gpie |= IXGBE_SDP1_GPIEN(hw);
5598
5599         switch (hw->mac.type) {
5600         case ixgbe_mac_82599EB:
5601                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5602                 break;
5603         case ixgbe_mac_X550EM_x:
5604         case ixgbe_mac_x550em_a:
5605                 gpie |= IXGBE_SDP0_GPIEN_X540;
5606                 break;
5607         default:
5608                 break;
5609         }
5610
5611         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5612 }
5613
5614 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5615 {
5616         struct ixgbe_hw *hw = &adapter->hw;
5617         int err;
5618         u32 ctrl_ext;
5619
5620         ixgbe_get_hw_control(adapter);
5621         ixgbe_setup_gpie(adapter);
5622
5623         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5624                 ixgbe_configure_msix(adapter);
5625         else
5626                 ixgbe_configure_msi_and_legacy(adapter);
5627
5628         /* enable the optics for 82599 SFP+ fiber */
5629         if (hw->mac.ops.enable_tx_laser)
5630                 hw->mac.ops.enable_tx_laser(hw);
5631
5632         if (hw->phy.ops.set_phy_power)
5633                 hw->phy.ops.set_phy_power(hw, true);
5634
5635         smp_mb__before_atomic();
5636         clear_bit(__IXGBE_DOWN, &adapter->state);
5637         ixgbe_napi_enable_all(adapter);
5638
5639         if (ixgbe_is_sfp(hw)) {
5640                 ixgbe_sfp_link_config(adapter);
5641         } else {
5642                 err = ixgbe_non_sfp_link_config(hw);
5643                 if (err)
5644                         e_err(probe, "link_config FAILED %d\n", err);
5645         }
5646
5647         /* clear any pending interrupts, may auto mask */
5648         IXGBE_READ_REG(hw, IXGBE_EICR);
5649         ixgbe_irq_enable(adapter, true, true);
5650
5651         /*
5652          * If this adapter has a fan, check to see if we had a failure
5653          * before we enabled the interrupt.
5654          */
5655         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5656                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5657                 if (esdp & IXGBE_ESDP_SDP1)
5658                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5659         }
5660
5661         /* bring the link up in the watchdog, this could race with our first
5662          * link up interrupt but shouldn't be a problem */
5663         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5664         adapter->link_check_timeout = jiffies;
5665         mod_timer(&adapter->service_timer, jiffies);
5666
5667         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5668         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5669         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5670         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5671 }
5672
5673 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5674 {
5675         WARN_ON(in_interrupt());
5676         /* put off any impending NetWatchDogTimeout */
5677         netif_trans_update(adapter->netdev);
5678
5679         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5680                 usleep_range(1000, 2000);
5681         if (adapter->hw.phy.type == ixgbe_phy_fw)
5682                 ixgbe_watchdog_link_is_down(adapter);
5683         ixgbe_down(adapter);
5684         /*
5685          * If SR-IOV enabled then wait a bit before bringing the adapter
5686          * back up to give the VFs time to respond to the reset.  The
5687          * two second wait is based upon the watchdog timer cycle in
5688          * the VF driver.
5689          */
5690         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5691                 msleep(2000);
5692         ixgbe_up(adapter);
5693         clear_bit(__IXGBE_RESETTING, &adapter->state);
5694 }
5695
5696 void ixgbe_up(struct ixgbe_adapter *adapter)
5697 {
5698         /* hardware has been reset, we need to reload some things */
5699         ixgbe_configure(adapter);
5700
5701         ixgbe_up_complete(adapter);
5702 }
5703
5704 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5705 {
5706         u16 devctl2;
5707
5708         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5709
5710         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5711         case IXGBE_PCIDEVCTRL2_17_34s:
5712         case IXGBE_PCIDEVCTRL2_4_8s:
5713                 /* For now we cap the upper limit on delay to 2 seconds
5714                  * as we end up going up to 34 seconds of delay in worst
5715                  * case timeout value.
5716                  */
5717         case IXGBE_PCIDEVCTRL2_1_2s:
5718                 return 2000000ul;       /* 2.0 s */
5719         case IXGBE_PCIDEVCTRL2_260_520ms:
5720                 return 520000ul;        /* 520 ms */
5721         case IXGBE_PCIDEVCTRL2_65_130ms:
5722                 return 130000ul;        /* 130 ms */
5723         case IXGBE_PCIDEVCTRL2_16_32ms:
5724                 return 32000ul;         /* 32 ms */
5725         case IXGBE_PCIDEVCTRL2_1_2ms:
5726                 return 2000ul;          /* 2 ms */
5727         case IXGBE_PCIDEVCTRL2_50_100us:
5728                 return 100ul;           /* 100 us */
5729         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5730                 return 32000ul;         /* 32 ms */
5731         default:
5732                 break;
5733         }
5734
5735         /* We shouldn't need to hit this path, but just in case default as
5736          * though completion timeout is not supported and support 32ms.
5737          */
5738         return 32000ul;
5739 }
5740
5741 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5742 {
5743         unsigned long wait_delay, delay_interval;
5744         struct ixgbe_hw *hw = &adapter->hw;
5745         int i, wait_loop;
5746         u32 rxdctl;
5747
5748         /* disable receives */
5749         hw->mac.ops.disable_rx(hw);
5750
5751         if (ixgbe_removed(hw->hw_addr))
5752                 return;
5753
5754         /* disable all enabled Rx queues */
5755         for (i = 0; i < adapter->num_rx_queues; i++) {
5756                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5757                 u8 reg_idx = ring->reg_idx;
5758
5759                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5760                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5761                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5762
5763                 /* write value back with RXDCTL.ENABLE bit cleared */
5764                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5765         }
5766
5767         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5768         if (hw->mac.type == ixgbe_mac_82598EB &&
5769             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5770                 return;
5771
5772         /* Determine our minimum delay interval. We will increase this value
5773          * with each subsequent test. This way if the device returns quickly
5774          * we should spend as little time as possible waiting, however as
5775          * the time increases we will wait for larger periods of time.
5776          *
5777          * The trick here is that we increase the interval using the
5778          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5779          * of that wait is that it totals up to 100x whatever interval we
5780          * choose. Since our minimum wait is 100us we can just divide the
5781          * total timeout by 100 to get our minimum delay interval.
5782          */
5783         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5784
5785         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5786         wait_delay = delay_interval;
5787
5788         while (wait_loop--) {
5789                 usleep_range(wait_delay, wait_delay + 10);
5790                 wait_delay += delay_interval * 2;
5791                 rxdctl = 0;
5792
5793                 /* OR together the reading of all the active RXDCTL registers,
5794                  * and then test the result. We need the disable to complete
5795                  * before we start freeing the memory and invalidating the
5796                  * DMA mappings.
5797                  */
5798                 for (i = 0; i < adapter->num_rx_queues; i++) {
5799                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5800                         u8 reg_idx = ring->reg_idx;
5801
5802                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5803                 }
5804
5805                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5806                         return;
5807         }
5808
5809         e_err(drv,
5810               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5811 }
5812
5813 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5814 {
5815         unsigned long wait_delay, delay_interval;
5816         struct ixgbe_hw *hw = &adapter->hw;
5817         int i, wait_loop;
5818         u32 txdctl;
5819
5820         if (ixgbe_removed(hw->hw_addr))
5821                 return;
5822
5823         /* disable all enabled Tx queues */
5824         for (i = 0; i < adapter->num_tx_queues; i++) {
5825                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5826                 u8 reg_idx = ring->reg_idx;
5827
5828                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5829         }
5830
5831         /* disable all enabled XDP Tx queues */
5832         for (i = 0; i < adapter->num_xdp_queues; i++) {
5833                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5834                 u8 reg_idx = ring->reg_idx;
5835
5836                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5837         }
5838
5839         /* If the link is not up there shouldn't be much in the way of
5840          * pending transactions. Those that are left will be flushed out
5841          * when the reset logic goes through the flush sequence to clean out
5842          * the pending Tx transactions.
5843          */
5844         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5845                 goto dma_engine_disable;
5846
5847         /* Determine our minimum delay interval. We will increase this value
5848          * with each subsequent test. This way if the device returns quickly
5849          * we should spend as little time as possible waiting, however as
5850          * the time increases we will wait for larger periods of time.
5851          *
5852          * The trick here is that we increase the interval using the
5853          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5854          * of that wait is that it totals up to 100x whatever interval we
5855          * choose. Since our minimum wait is 100us we can just divide the
5856          * total timeout by 100 to get our minimum delay interval.
5857          */
5858         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5859
5860         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5861         wait_delay = delay_interval;
5862
5863         while (wait_loop--) {
5864                 usleep_range(wait_delay, wait_delay + 10);
5865                 wait_delay += delay_interval * 2;
5866                 txdctl = 0;
5867
5868                 /* OR together the reading of all the active TXDCTL registers,
5869                  * and then test the result. We need the disable to complete
5870                  * before we start freeing the memory and invalidating the
5871                  * DMA mappings.
5872                  */
5873                 for (i = 0; i < adapter->num_tx_queues; i++) {
5874                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5875                         u8 reg_idx = ring->reg_idx;
5876
5877                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5878                 }
5879                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5880                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5881                         u8 reg_idx = ring->reg_idx;
5882
5883                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5884                 }
5885
5886                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5887                         goto dma_engine_disable;
5888         }
5889
5890         e_err(drv,
5891               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5892
5893 dma_engine_disable:
5894         /* Disable the Tx DMA engine on 82599 and later MAC */
5895         switch (hw->mac.type) {
5896         case ixgbe_mac_82599EB:
5897         case ixgbe_mac_X540:
5898         case ixgbe_mac_X550:
5899         case ixgbe_mac_X550EM_x:
5900         case ixgbe_mac_x550em_a:
5901                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5902                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5903                                  ~IXGBE_DMATXCTL_TE));
5904                 /* fall through */
5905         default:
5906                 break;
5907         }
5908 }
5909
5910 void ixgbe_reset(struct ixgbe_adapter *adapter)
5911 {
5912         struct ixgbe_hw *hw = &adapter->hw;
5913         struct net_device *netdev = adapter->netdev;
5914         int err;
5915
5916         if (ixgbe_removed(hw->hw_addr))
5917                 return;
5918         /* lock SFP init bit to prevent race conditions with the watchdog */
5919         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5920                 usleep_range(1000, 2000);
5921
5922         /* clear all SFP and link config related flags while holding SFP_INIT */
5923         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5924                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5925         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5926
5927         err = hw->mac.ops.init_hw(hw);
5928         switch (err) {
5929         case 0:
5930         case IXGBE_ERR_SFP_NOT_PRESENT:
5931         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5932                 break;
5933         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5934                 e_dev_err("master disable timed out\n");
5935                 break;
5936         case IXGBE_ERR_EEPROM_VERSION:
5937                 /* We are running on a pre-production device, log a warning */
5938                 e_dev_warn("This device is a pre-production adapter/LOM. "
5939                            "Please be aware there may be issues associated with "
5940                            "your hardware.  If you are experiencing problems "
5941                            "please contact your Intel or hardware "
5942                            "representative who provided you with this "
5943                            "hardware.\n");
5944                 break;
5945         default:
5946                 e_dev_err("Hardware Error: %d\n", err);
5947         }
5948
5949         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5950
5951         /* flush entries out of MAC table */
5952         ixgbe_flush_sw_mac_table(adapter);
5953         __dev_uc_unsync(netdev, NULL);
5954
5955         /* do not flush user set addresses */
5956         ixgbe_mac_set_default_filter(adapter);
5957
5958         /* update SAN MAC vmdq pool selection */
5959         if (hw->mac.san_mac_rar_index)
5960                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5961
5962         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5963                 ixgbe_ptp_reset(adapter);
5964
5965         if (hw->phy.ops.set_phy_power) {
5966                 if (!netif_running(adapter->netdev) && !adapter->wol)
5967                         hw->phy.ops.set_phy_power(hw, false);
5968                 else
5969                         hw->phy.ops.set_phy_power(hw, true);
5970         }
5971 }
5972
5973 /**
5974  * ixgbe_clean_tx_ring - Free Tx Buffers
5975  * @tx_ring: ring to be cleaned
5976  **/
5977 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5978 {
5979         u16 i = tx_ring->next_to_clean;
5980         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5981
5982         if (tx_ring->xsk_umem) {
5983                 ixgbe_xsk_clean_tx_ring(tx_ring);
5984                 goto out;
5985         }
5986
5987         while (i != tx_ring->next_to_use) {
5988                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5989
5990                 /* Free all the Tx ring sk_buffs */
5991                 if (ring_is_xdp(tx_ring))
5992                         xdp_return_frame(tx_buffer->xdpf);
5993                 else
5994                         dev_kfree_skb_any(tx_buffer->skb);
5995
5996                 /* unmap skb header data */
5997                 dma_unmap_single(tx_ring->dev,
5998                                  dma_unmap_addr(tx_buffer, dma),
5999                                  dma_unmap_len(tx_buffer, len),
6000                                  DMA_TO_DEVICE);
6001
6002                 /* check for eop_desc to determine the end of the packet */
6003                 eop_desc = tx_buffer->next_to_watch;
6004                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6005
6006                 /* unmap remaining buffers */
6007                 while (tx_desc != eop_desc) {
6008                         tx_buffer++;
6009                         tx_desc++;
6010                         i++;
6011                         if (unlikely(i == tx_ring->count)) {
6012                                 i = 0;
6013                                 tx_buffer = tx_ring->tx_buffer_info;
6014                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6015                         }
6016
6017                         /* unmap any remaining paged data */
6018                         if (dma_unmap_len(tx_buffer, len))
6019                                 dma_unmap_page(tx_ring->dev,
6020                                                dma_unmap_addr(tx_buffer, dma),
6021                                                dma_unmap_len(tx_buffer, len),
6022                                                DMA_TO_DEVICE);
6023                 }
6024
6025                 /* move us one more past the eop_desc for start of next pkt */
6026                 tx_buffer++;
6027                 i++;
6028                 if (unlikely(i == tx_ring->count)) {
6029                         i = 0;
6030                         tx_buffer = tx_ring->tx_buffer_info;
6031                 }
6032         }
6033
6034         /* reset BQL for queue */
6035         if (!ring_is_xdp(tx_ring))
6036                 netdev_tx_reset_queue(txring_txq(tx_ring));
6037
6038 out:
6039         /* reset next_to_use and next_to_clean */
6040         tx_ring->next_to_use = 0;
6041         tx_ring->next_to_clean = 0;
6042 }
6043
6044 /**
6045  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6046  * @adapter: board private structure
6047  **/
6048 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6049 {
6050         int i;
6051
6052         for (i = 0; i < adapter->num_rx_queues; i++)
6053                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6054 }
6055
6056 /**
6057  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6058  * @adapter: board private structure
6059  **/
6060 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6061 {
6062         int i;
6063
6064         for (i = 0; i < adapter->num_tx_queues; i++)
6065                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6066         for (i = 0; i < adapter->num_xdp_queues; i++)
6067                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6068 }
6069
6070 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6071 {
6072         struct hlist_node *node2;
6073         struct ixgbe_fdir_filter *filter;
6074
6075         spin_lock(&adapter->fdir_perfect_lock);
6076
6077         hlist_for_each_entry_safe(filter, node2,
6078                                   &adapter->fdir_filter_list, fdir_node) {
6079                 hlist_del(&filter->fdir_node);
6080                 kfree(filter);
6081         }
6082         adapter->fdir_filter_count = 0;
6083
6084         spin_unlock(&adapter->fdir_perfect_lock);
6085 }
6086
6087 void ixgbe_down(struct ixgbe_adapter *adapter)
6088 {
6089         struct net_device *netdev = adapter->netdev;
6090         struct ixgbe_hw *hw = &adapter->hw;
6091         int i;
6092
6093         /* signal that we are down to the interrupt handler */
6094         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6095                 return; /* do nothing if already down */
6096
6097         /* Shut off incoming Tx traffic */
6098         netif_tx_stop_all_queues(netdev);
6099
6100         /* call carrier off first to avoid false dev_watchdog timeouts */
6101         netif_carrier_off(netdev);
6102         netif_tx_disable(netdev);
6103
6104         /* Disable Rx */
6105         ixgbe_disable_rx(adapter);
6106
6107         /* synchronize_rcu() needed for pending XDP buffers to drain */
6108         if (adapter->xdp_ring[0])
6109                 synchronize_rcu();
6110
6111         ixgbe_irq_disable(adapter);
6112
6113         ixgbe_napi_disable_all(adapter);
6114
6115         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6116         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6117         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6118
6119         del_timer_sync(&adapter->service_timer);
6120
6121         if (adapter->num_vfs) {
6122                 /* Clear EITR Select mapping */
6123                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6124
6125                 /* Mark all the VFs as inactive */
6126                 for (i = 0 ; i < adapter->num_vfs; i++)
6127                         adapter->vfinfo[i].clear_to_send = false;
6128
6129                 /* ping all the active vfs to let them know we are going down */
6130                 ixgbe_ping_all_vfs(adapter);
6131
6132                 /* Disable all VFTE/VFRE TX/RX */
6133                 ixgbe_disable_tx_rx(adapter);
6134         }
6135
6136         /* disable transmits in the hardware now that interrupts are off */
6137         ixgbe_disable_tx(adapter);
6138
6139         if (!pci_channel_offline(adapter->pdev))
6140                 ixgbe_reset(adapter);
6141
6142         /* power down the optics for 82599 SFP+ fiber */
6143         if (hw->mac.ops.disable_tx_laser)
6144                 hw->mac.ops.disable_tx_laser(hw);
6145
6146         ixgbe_clean_all_tx_rings(adapter);
6147         ixgbe_clean_all_rx_rings(adapter);
6148 }
6149
6150 /**
6151  * ixgbe_eee_capable - helper function to determine EEE support on X550
6152  * @adapter: board private structure
6153  */
6154 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6155 {
6156         struct ixgbe_hw *hw = &adapter->hw;
6157
6158         switch (hw->device_id) {
6159         case IXGBE_DEV_ID_X550EM_A_1G_T:
6160         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6161                 if (!hw->phy.eee_speeds_supported)
6162                         break;
6163                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6164                 if (!hw->phy.eee_speeds_advertised)
6165                         break;
6166                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6167                 break;
6168         default:
6169                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6170                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6171                 break;
6172         }
6173 }
6174
6175 /**
6176  * ixgbe_tx_timeout - Respond to a Tx Hang
6177  * @netdev: network interface device structure
6178  **/
6179 static void ixgbe_tx_timeout(struct net_device *netdev)
6180 {
6181         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6182
6183         /* Do the reset outside of interrupt context */
6184         ixgbe_tx_timeout_reset(adapter);
6185 }
6186
6187 #ifdef CONFIG_IXGBE_DCB
6188 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6189 {
6190         struct ixgbe_hw *hw = &adapter->hw;
6191         struct tc_configuration *tc;
6192         int j;
6193
6194         switch (hw->mac.type) {
6195         case ixgbe_mac_82598EB:
6196         case ixgbe_mac_82599EB:
6197                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6198                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6199                 break;
6200         case ixgbe_mac_X540:
6201         case ixgbe_mac_X550:
6202                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6203                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6204                 break;
6205         case ixgbe_mac_X550EM_x:
6206         case ixgbe_mac_x550em_a:
6207         default:
6208                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6209                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6210                 break;
6211         }
6212
6213         /* Configure DCB traffic classes */
6214         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6215                 tc = &adapter->dcb_cfg.tc_config[j];
6216                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6217                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6218                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6219                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6220                 tc->dcb_pfc = pfc_disabled;
6221         }
6222
6223         /* Initialize default user to priority mapping, UPx->TC0 */
6224         tc = &adapter->dcb_cfg.tc_config[0];
6225         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6226         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6227
6228         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6229         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6230         adapter->dcb_cfg.pfc_mode_enable = false;
6231         adapter->dcb_set_bitmap = 0x00;
6232         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6233                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6234         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6235                sizeof(adapter->temp_dcb_cfg));
6236 }
6237 #endif
6238
6239 /**
6240  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6241  * @adapter: board private structure to initialize
6242  * @ii: pointer to ixgbe_info for device
6243  *
6244  * ixgbe_sw_init initializes the Adapter private data structure.
6245  * Fields are initialized based on PCI device information and
6246  * OS network device settings (MTU size).
6247  **/
6248 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6249                          const struct ixgbe_info *ii)
6250 {
6251         struct ixgbe_hw *hw = &adapter->hw;
6252         struct pci_dev *pdev = adapter->pdev;
6253         unsigned int rss, fdir;
6254         u32 fwsm;
6255         int i;
6256
6257         /* PCI config space info */
6258
6259         hw->vendor_id = pdev->vendor;
6260         hw->device_id = pdev->device;
6261         hw->revision_id = pdev->revision;
6262         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6263         hw->subsystem_device_id = pdev->subsystem_device;
6264
6265         /* get_invariants needs the device IDs */
6266         ii->get_invariants(hw);
6267
6268         /* Set common capability flags and settings */
6269         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6270         adapter->ring_feature[RING_F_RSS].limit = rss;
6271         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6272         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6273         adapter->atr_sample_rate = 20;
6274         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6275         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6276         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6277         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6278 #ifdef CONFIG_IXGBE_DCA
6279         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6280 #endif
6281 #ifdef CONFIG_IXGBE_DCB
6282         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6283         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6284 #endif
6285 #ifdef IXGBE_FCOE
6286         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6287         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6288 #ifdef CONFIG_IXGBE_DCB
6289         /* Default traffic class to use for FCoE */
6290         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6291 #endif /* CONFIG_IXGBE_DCB */
6292 #endif /* IXGBE_FCOE */
6293
6294         /* initialize static ixgbe jump table entries */
6295         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6296                                           GFP_KERNEL);
6297         if (!adapter->jump_tables[0])
6298                 return -ENOMEM;
6299         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6300
6301         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6302                 adapter->jump_tables[i] = NULL;
6303
6304         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6305                                      sizeof(struct ixgbe_mac_addr),
6306                                      GFP_KERNEL);
6307         if (!adapter->mac_table)
6308                 return -ENOMEM;
6309
6310         if (ixgbe_init_rss_key(adapter))
6311                 return -ENOMEM;
6312
6313         adapter->af_xdp_zc_qps = bitmap_zalloc(MAX_XDP_QUEUES, GFP_KERNEL);
6314         if (!adapter->af_xdp_zc_qps)
6315                 return -ENOMEM;
6316
6317         /* Set MAC specific capability flags and exceptions */
6318         switch (hw->mac.type) {
6319         case ixgbe_mac_82598EB:
6320                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6321
6322                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6323                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6324
6325                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6326                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6327                 adapter->atr_sample_rate = 0;
6328                 adapter->fdir_pballoc = 0;
6329 #ifdef IXGBE_FCOE
6330                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6331                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6332 #ifdef CONFIG_IXGBE_DCB
6333                 adapter->fcoe.up = 0;
6334 #endif /* IXGBE_DCB */
6335 #endif /* IXGBE_FCOE */
6336                 break;
6337         case ixgbe_mac_82599EB:
6338                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6339                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6340                 break;
6341         case ixgbe_mac_X540:
6342                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6343                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6344                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6345                 break;
6346         case ixgbe_mac_x550em_a:
6347                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6348                 switch (hw->device_id) {
6349                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6350                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6351                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6352                         break;
6353                 default:
6354                         break;
6355                 }
6356         /* fall through */
6357         case ixgbe_mac_X550EM_x:
6358 #ifdef CONFIG_IXGBE_DCB
6359                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6360 #endif
6361 #ifdef IXGBE_FCOE
6362                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6363 #ifdef CONFIG_IXGBE_DCB
6364                 adapter->fcoe.up = 0;
6365 #endif /* IXGBE_DCB */
6366 #endif /* IXGBE_FCOE */
6367         /* Fall Through */
6368         case ixgbe_mac_X550:
6369                 if (hw->mac.type == ixgbe_mac_X550)
6370                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6371 #ifdef CONFIG_IXGBE_DCA
6372                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6373 #endif
6374                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6375                 break;
6376         default:
6377                 break;
6378         }
6379
6380 #ifdef IXGBE_FCOE
6381         /* FCoE support exists, always init the FCoE lock */
6382         spin_lock_init(&adapter->fcoe.lock);
6383
6384 #endif
6385         /* n-tuple support exists, always init our spinlock */
6386         spin_lock_init(&adapter->fdir_perfect_lock);
6387
6388 #ifdef CONFIG_IXGBE_DCB
6389         ixgbe_init_dcb(adapter);
6390 #endif
6391         ixgbe_init_ipsec_offload(adapter);
6392
6393         /* default flow control settings */
6394         hw->fc.requested_mode = ixgbe_fc_full;
6395         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6396         ixgbe_pbthresh_setup(adapter);
6397         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6398         hw->fc.send_xon = true;
6399         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6400
6401 #ifdef CONFIG_PCI_IOV
6402         if (max_vfs > 0)
6403                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6404
6405         /* assign number of SR-IOV VFs */
6406         if (hw->mac.type != ixgbe_mac_82598EB) {
6407                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6408                         max_vfs = 0;
6409                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6410                 }
6411         }
6412 #endif /* CONFIG_PCI_IOV */
6413
6414         /* enable itr by default in dynamic mode */
6415         adapter->rx_itr_setting = 1;
6416         adapter->tx_itr_setting = 1;
6417
6418         /* set default ring sizes */
6419         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6420         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6421
6422         /* set default work limits */
6423         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6424
6425         /* initialize eeprom parameters */
6426         if (ixgbe_init_eeprom_params_generic(hw)) {
6427                 e_dev_err("EEPROM initialization failed\n");
6428                 return -EIO;
6429         }
6430
6431         /* PF holds first pool slot */
6432         set_bit(0, adapter->fwd_bitmask);
6433         set_bit(__IXGBE_DOWN, &adapter->state);
6434
6435         return 0;
6436 }
6437
6438 /**
6439  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6440  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6441  *
6442  * Return 0 on success, negative on failure
6443  **/
6444 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6445 {
6446         struct device *dev = tx_ring->dev;
6447         int orig_node = dev_to_node(dev);
6448         int ring_node = NUMA_NO_NODE;
6449         int size;
6450
6451         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6452
6453         if (tx_ring->q_vector)
6454                 ring_node = tx_ring->q_vector->numa_node;
6455
6456         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6457         if (!tx_ring->tx_buffer_info)
6458                 tx_ring->tx_buffer_info = vmalloc(size);
6459         if (!tx_ring->tx_buffer_info)
6460                 goto err;
6461
6462         /* round up to nearest 4K */
6463         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6464         tx_ring->size = ALIGN(tx_ring->size, 4096);
6465
6466         set_dev_node(dev, ring_node);
6467         tx_ring->desc = dma_alloc_coherent(dev,
6468                                            tx_ring->size,
6469                                            &tx_ring->dma,
6470                                            GFP_KERNEL);
6471         set_dev_node(dev, orig_node);
6472         if (!tx_ring->desc)
6473                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6474                                                    &tx_ring->dma, GFP_KERNEL);
6475         if (!tx_ring->desc)
6476                 goto err;
6477
6478         tx_ring->next_to_use = 0;
6479         tx_ring->next_to_clean = 0;
6480         return 0;
6481
6482 err:
6483         vfree(tx_ring->tx_buffer_info);
6484         tx_ring->tx_buffer_info = NULL;
6485         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6486         return -ENOMEM;
6487 }
6488
6489 /**
6490  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6491  * @adapter: board private structure
6492  *
6493  * If this function returns with an error, then it's possible one or
6494  * more of the rings is populated (while the rest are not).  It is the
6495  * callers duty to clean those orphaned rings.
6496  *
6497  * Return 0 on success, negative on failure
6498  **/
6499 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6500 {
6501         int i, j = 0, err = 0;
6502
6503         for (i = 0; i < adapter->num_tx_queues; i++) {
6504                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6505                 if (!err)
6506                         continue;
6507
6508                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6509                 goto err_setup_tx;
6510         }
6511         for (j = 0; j < adapter->num_xdp_queues; j++) {
6512                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6513                 if (!err)
6514                         continue;
6515
6516                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6517                 goto err_setup_tx;
6518         }
6519
6520         return 0;
6521 err_setup_tx:
6522         /* rewind the index freeing the rings as we go */
6523         while (j--)
6524                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6525         while (i--)
6526                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6527         return err;
6528 }
6529
6530 /**
6531  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6532  * @adapter: pointer to ixgbe_adapter
6533  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6534  *
6535  * Returns 0 on success, negative on failure
6536  **/
6537 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6538                              struct ixgbe_ring *rx_ring)
6539 {
6540         struct device *dev = rx_ring->dev;
6541         int orig_node = dev_to_node(dev);
6542         int ring_node = NUMA_NO_NODE;
6543         int size;
6544
6545         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6546
6547         if (rx_ring->q_vector)
6548                 ring_node = rx_ring->q_vector->numa_node;
6549
6550         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6551         if (!rx_ring->rx_buffer_info)
6552                 rx_ring->rx_buffer_info = vmalloc(size);
6553         if (!rx_ring->rx_buffer_info)
6554                 goto err;
6555
6556         /* Round up to nearest 4K */
6557         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6558         rx_ring->size = ALIGN(rx_ring->size, 4096);
6559
6560         set_dev_node(dev, ring_node);
6561         rx_ring->desc = dma_alloc_coherent(dev,
6562                                            rx_ring->size,
6563                                            &rx_ring->dma,
6564                                            GFP_KERNEL);
6565         set_dev_node(dev, orig_node);
6566         if (!rx_ring->desc)
6567                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6568                                                    &rx_ring->dma, GFP_KERNEL);
6569         if (!rx_ring->desc)
6570                 goto err;
6571
6572         rx_ring->next_to_clean = 0;
6573         rx_ring->next_to_use = 0;
6574
6575         /* XDP RX-queue info */
6576         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6577                              rx_ring->queue_index) < 0)
6578                 goto err;
6579
6580         rx_ring->xdp_prog = adapter->xdp_prog;
6581
6582         return 0;
6583 err:
6584         vfree(rx_ring->rx_buffer_info);
6585         rx_ring->rx_buffer_info = NULL;
6586         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6587         return -ENOMEM;
6588 }
6589
6590 /**
6591  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6592  * @adapter: board private structure
6593  *
6594  * If this function returns with an error, then it's possible one or
6595  * more of the rings is populated (while the rest are not).  It is the
6596  * callers duty to clean those orphaned rings.
6597  *
6598  * Return 0 on success, negative on failure
6599  **/
6600 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6601 {
6602         int i, err = 0;
6603
6604         for (i = 0; i < adapter->num_rx_queues; i++) {
6605                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6606                 if (!err)
6607                         continue;
6608
6609                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6610                 goto err_setup_rx;
6611         }
6612
6613 #ifdef IXGBE_FCOE
6614         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6615         if (!err)
6616 #endif
6617                 return 0;
6618 err_setup_rx:
6619         /* rewind the index freeing the rings as we go */
6620         while (i--)
6621                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6622         return err;
6623 }
6624
6625 /**
6626  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6627  * @tx_ring: Tx descriptor ring for a specific queue
6628  *
6629  * Free all transmit software resources
6630  **/
6631 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6632 {
6633         ixgbe_clean_tx_ring(tx_ring);
6634
6635         vfree(tx_ring->tx_buffer_info);
6636         tx_ring->tx_buffer_info = NULL;
6637
6638         /* if not set, then don't free */
6639         if (!tx_ring->desc)
6640                 return;
6641
6642         dma_free_coherent(tx_ring->dev, tx_ring->size,
6643                           tx_ring->desc, tx_ring->dma);
6644
6645         tx_ring->desc = NULL;
6646 }
6647
6648 /**
6649  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6650  * @adapter: board private structure
6651  *
6652  * Free all transmit software resources
6653  **/
6654 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6655 {
6656         int i;
6657
6658         for (i = 0; i < adapter->num_tx_queues; i++)
6659                 if (adapter->tx_ring[i]->desc)
6660                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6661         for (i = 0; i < adapter->num_xdp_queues; i++)
6662                 if (adapter->xdp_ring[i]->desc)
6663                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6664 }
6665
6666 /**
6667  * ixgbe_free_rx_resources - Free Rx Resources
6668  * @rx_ring: ring to clean the resources from
6669  *
6670  * Free all receive software resources
6671  **/
6672 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6673 {
6674         ixgbe_clean_rx_ring(rx_ring);
6675
6676         rx_ring->xdp_prog = NULL;
6677         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6678         vfree(rx_ring->rx_buffer_info);
6679         rx_ring->rx_buffer_info = NULL;
6680
6681         /* if not set, then don't free */
6682         if (!rx_ring->desc)
6683                 return;
6684
6685         dma_free_coherent(rx_ring->dev, rx_ring->size,
6686                           rx_ring->desc, rx_ring->dma);
6687
6688         rx_ring->desc = NULL;
6689 }
6690
6691 /**
6692  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6693  * @adapter: board private structure
6694  *
6695  * Free all receive software resources
6696  **/
6697 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6698 {
6699         int i;
6700
6701 #ifdef IXGBE_FCOE
6702         ixgbe_free_fcoe_ddp_resources(adapter);
6703
6704 #endif
6705         for (i = 0; i < adapter->num_rx_queues; i++)
6706                 if (adapter->rx_ring[i]->desc)
6707                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6708 }
6709
6710 /**
6711  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6712  * @netdev: network interface device structure
6713  * @new_mtu: new value for maximum frame size
6714  *
6715  * Returns 0 on success, negative on failure
6716  **/
6717 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6718 {
6719         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6720
6721         if (adapter->xdp_prog) {
6722                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6723                                      VLAN_HLEN;
6724                 int i;
6725
6726                 for (i = 0; i < adapter->num_rx_queues; i++) {
6727                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6728
6729                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6730                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6731                                 return -EINVAL;
6732                         }
6733                 }
6734         }
6735
6736         /*
6737          * For 82599EB we cannot allow legacy VFs to enable their receive
6738          * paths when MTU greater than 1500 is configured.  So display a
6739          * warning that legacy VFs will be disabled.
6740          */
6741         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6742             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6743             (new_mtu > ETH_DATA_LEN))
6744                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6745
6746         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6747
6748         /* must set new MTU before calling down or up */
6749         netdev->mtu = new_mtu;
6750
6751         if (netif_running(netdev))
6752                 ixgbe_reinit_locked(adapter);
6753
6754         return 0;
6755 }
6756
6757 /**
6758  * ixgbe_open - Called when a network interface is made active
6759  * @netdev: network interface device structure
6760  *
6761  * Returns 0 on success, negative value on failure
6762  *
6763  * The open entry point is called when a network interface is made
6764  * active by the system (IFF_UP).  At this point all resources needed
6765  * for transmit and receive operations are allocated, the interrupt
6766  * handler is registered with the OS, the watchdog timer is started,
6767  * and the stack is notified that the interface is ready.
6768  **/
6769 int ixgbe_open(struct net_device *netdev)
6770 {
6771         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6772         struct ixgbe_hw *hw = &adapter->hw;
6773         int err, queues;
6774
6775         /* disallow open during test */
6776         if (test_bit(__IXGBE_TESTING, &adapter->state))
6777                 return -EBUSY;
6778
6779         netif_carrier_off(netdev);
6780
6781         /* allocate transmit descriptors */
6782         err = ixgbe_setup_all_tx_resources(adapter);
6783         if (err)
6784                 goto err_setup_tx;
6785
6786         /* allocate receive descriptors */
6787         err = ixgbe_setup_all_rx_resources(adapter);
6788         if (err)
6789                 goto err_setup_rx;
6790
6791         ixgbe_configure(adapter);
6792
6793         err = ixgbe_request_irq(adapter);
6794         if (err)
6795                 goto err_req_irq;
6796
6797         /* Notify the stack of the actual queue counts. */
6798         queues = adapter->num_tx_queues;
6799         err = netif_set_real_num_tx_queues(netdev, queues);
6800         if (err)
6801                 goto err_set_queues;
6802
6803         queues = adapter->num_rx_queues;
6804         err = netif_set_real_num_rx_queues(netdev, queues);
6805         if (err)
6806                 goto err_set_queues;
6807
6808         ixgbe_ptp_init(adapter);
6809
6810         ixgbe_up_complete(adapter);
6811
6812         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6813         udp_tunnel_get_rx_info(netdev);
6814
6815         return 0;
6816
6817 err_set_queues:
6818         ixgbe_free_irq(adapter);
6819 err_req_irq:
6820         ixgbe_free_all_rx_resources(adapter);
6821         if (hw->phy.ops.set_phy_power && !adapter->wol)
6822                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6823 err_setup_rx:
6824         ixgbe_free_all_tx_resources(adapter);
6825 err_setup_tx:
6826         ixgbe_reset(adapter);
6827
6828         return err;
6829 }
6830
6831 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6832 {
6833         ixgbe_ptp_suspend(adapter);
6834
6835         if (adapter->hw.phy.ops.enter_lplu) {
6836                 adapter->hw.phy.reset_disable = true;
6837                 ixgbe_down(adapter);
6838                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6839                 adapter->hw.phy.reset_disable = false;
6840         } else {
6841                 ixgbe_down(adapter);
6842         }
6843
6844         ixgbe_free_irq(adapter);
6845
6846         ixgbe_free_all_tx_resources(adapter);
6847         ixgbe_free_all_rx_resources(adapter);
6848 }
6849
6850 /**
6851  * ixgbe_close - Disables a network interface
6852  * @netdev: network interface device structure
6853  *
6854  * Returns 0, this is not allowed to fail
6855  *
6856  * The close entry point is called when an interface is de-activated
6857  * by the OS.  The hardware is still under the drivers control, but
6858  * needs to be disabled.  A global MAC reset is issued to stop the
6859  * hardware, and all transmit and receive resources are freed.
6860  **/
6861 int ixgbe_close(struct net_device *netdev)
6862 {
6863         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6864
6865         ixgbe_ptp_stop(adapter);
6866
6867         if (netif_device_present(netdev))
6868                 ixgbe_close_suspend(adapter);
6869
6870         ixgbe_fdir_filter_exit(adapter);
6871
6872         ixgbe_release_hw_control(adapter);
6873
6874         return 0;
6875 }
6876
6877 #ifdef CONFIG_PM
6878 static int ixgbe_resume(struct pci_dev *pdev)
6879 {
6880         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6881         struct net_device *netdev = adapter->netdev;
6882         u32 err;
6883
6884         adapter->hw.hw_addr = adapter->io_addr;
6885         pci_set_power_state(pdev, PCI_D0);
6886         pci_restore_state(pdev);
6887         /*
6888          * pci_restore_state clears dev->state_saved so call
6889          * pci_save_state to restore it.
6890          */
6891         pci_save_state(pdev);
6892
6893         err = pci_enable_device_mem(pdev);
6894         if (err) {
6895                 e_dev_err("Cannot enable PCI device from suspend\n");
6896                 return err;
6897         }
6898         smp_mb__before_atomic();
6899         clear_bit(__IXGBE_DISABLED, &adapter->state);
6900         pci_set_master(pdev);
6901
6902         pci_wake_from_d3(pdev, false);
6903
6904         ixgbe_reset(adapter);
6905
6906         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6907
6908         rtnl_lock();
6909         err = ixgbe_init_interrupt_scheme(adapter);
6910         if (!err && netif_running(netdev))
6911                 err = ixgbe_open(netdev);
6912
6913
6914         if (!err)
6915                 netif_device_attach(netdev);
6916         rtnl_unlock();
6917
6918         return err;
6919 }
6920 #endif /* CONFIG_PM */
6921
6922 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6923 {
6924         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6925         struct net_device *netdev = adapter->netdev;
6926         struct ixgbe_hw *hw = &adapter->hw;
6927         u32 ctrl;
6928         u32 wufc = adapter->wol;
6929 #ifdef CONFIG_PM
6930         int retval = 0;
6931 #endif
6932
6933         rtnl_lock();
6934         netif_device_detach(netdev);
6935
6936         if (netif_running(netdev))
6937                 ixgbe_close_suspend(adapter);
6938
6939         ixgbe_clear_interrupt_scheme(adapter);
6940         rtnl_unlock();
6941
6942 #ifdef CONFIG_PM
6943         retval = pci_save_state(pdev);
6944         if (retval)
6945                 return retval;
6946
6947 #endif
6948         if (hw->mac.ops.stop_link_on_d3)
6949                 hw->mac.ops.stop_link_on_d3(hw);
6950
6951         if (wufc) {
6952                 u32 fctrl;
6953
6954                 ixgbe_set_rx_mode(netdev);
6955
6956                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6957                 if (hw->mac.ops.enable_tx_laser)
6958                         hw->mac.ops.enable_tx_laser(hw);
6959
6960                 /* enable the reception of multicast packets */
6961                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6962                 fctrl |= IXGBE_FCTRL_MPE;
6963                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6964
6965                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6966                 ctrl |= IXGBE_CTRL_GIO_DIS;
6967                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6968
6969                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6970         } else {
6971                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6972                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6973         }
6974
6975         switch (hw->mac.type) {
6976         case ixgbe_mac_82598EB:
6977                 pci_wake_from_d3(pdev, false);
6978                 break;
6979         case ixgbe_mac_82599EB:
6980         case ixgbe_mac_X540:
6981         case ixgbe_mac_X550:
6982         case ixgbe_mac_X550EM_x:
6983         case ixgbe_mac_x550em_a:
6984                 pci_wake_from_d3(pdev, !!wufc);
6985                 break;
6986         default:
6987                 break;
6988         }
6989
6990         *enable_wake = !!wufc;
6991         if (hw->phy.ops.set_phy_power && !*enable_wake)
6992                 hw->phy.ops.set_phy_power(hw, false);
6993
6994         ixgbe_release_hw_control(adapter);
6995
6996         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6997                 pci_disable_device(pdev);
6998
6999         return 0;
7000 }
7001
7002 #ifdef CONFIG_PM
7003 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
7004 {
7005         int retval;
7006         bool wake;
7007
7008         retval = __ixgbe_shutdown(pdev, &wake);
7009         if (retval)
7010                 return retval;
7011
7012         if (wake) {
7013                 pci_prepare_to_sleep(pdev);
7014         } else {
7015                 pci_wake_from_d3(pdev, false);
7016                 pci_set_power_state(pdev, PCI_D3hot);
7017         }
7018
7019         return 0;
7020 }
7021 #endif /* CONFIG_PM */
7022
7023 static void ixgbe_shutdown(struct pci_dev *pdev)
7024 {
7025         bool wake;
7026
7027         __ixgbe_shutdown(pdev, &wake);
7028
7029         if (system_state == SYSTEM_POWER_OFF) {
7030                 pci_wake_from_d3(pdev, wake);
7031                 pci_set_power_state(pdev, PCI_D3hot);
7032         }
7033 }
7034
7035 /**
7036  * ixgbe_update_stats - Update the board statistics counters.
7037  * @adapter: board private structure
7038  **/
7039 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7040 {
7041         struct net_device *netdev = adapter->netdev;
7042         struct ixgbe_hw *hw = &adapter->hw;
7043         struct ixgbe_hw_stats *hwstats = &adapter->stats;
7044         u64 total_mpc = 0;
7045         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7046         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7047         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7048         u64 alloc_rx_page = 0;
7049         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7050
7051         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7052             test_bit(__IXGBE_RESETTING, &adapter->state))
7053                 return;
7054
7055         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7056                 u64 rsc_count = 0;
7057                 u64 rsc_flush = 0;
7058                 for (i = 0; i < adapter->num_rx_queues; i++) {
7059                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7060                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7061                 }
7062                 adapter->rsc_total_count = rsc_count;
7063                 adapter->rsc_total_flush = rsc_flush;
7064         }
7065
7066         for (i = 0; i < adapter->num_rx_queues; i++) {
7067                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
7068                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7069                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7070                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7071                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7072                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7073                 bytes += rx_ring->stats.bytes;
7074                 packets += rx_ring->stats.packets;
7075         }
7076         adapter->non_eop_descs = non_eop_descs;
7077         adapter->alloc_rx_page = alloc_rx_page;
7078         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7079         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7080         adapter->hw_csum_rx_error = hw_csum_rx_error;
7081         netdev->stats.rx_bytes = bytes;
7082         netdev->stats.rx_packets = packets;
7083
7084         bytes = 0;
7085         packets = 0;
7086         /* gather some stats to the adapter struct that are per queue */
7087         for (i = 0; i < adapter->num_tx_queues; i++) {
7088                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7089                 restart_queue += tx_ring->tx_stats.restart_queue;
7090                 tx_busy += tx_ring->tx_stats.tx_busy;
7091                 bytes += tx_ring->stats.bytes;
7092                 packets += tx_ring->stats.packets;
7093         }
7094         for (i = 0; i < adapter->num_xdp_queues; i++) {
7095                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
7096
7097                 restart_queue += xdp_ring->tx_stats.restart_queue;
7098                 tx_busy += xdp_ring->tx_stats.tx_busy;
7099                 bytes += xdp_ring->stats.bytes;
7100                 packets += xdp_ring->stats.packets;
7101         }
7102         adapter->restart_queue = restart_queue;
7103         adapter->tx_busy = tx_busy;
7104         netdev->stats.tx_bytes = bytes;
7105         netdev->stats.tx_packets = packets;
7106
7107         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7108
7109         /* 8 register reads */
7110         for (i = 0; i < 8; i++) {
7111                 /* for packet buffers not used, the register should read 0 */
7112                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7113                 missed_rx += mpc;
7114                 hwstats->mpc[i] += mpc;
7115                 total_mpc += hwstats->mpc[i];
7116                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7117                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7118                 switch (hw->mac.type) {
7119                 case ixgbe_mac_82598EB:
7120                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7121                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7122                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7123                         hwstats->pxonrxc[i] +=
7124                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7125                         break;
7126                 case ixgbe_mac_82599EB:
7127                 case ixgbe_mac_X540:
7128                 case ixgbe_mac_X550:
7129                 case ixgbe_mac_X550EM_x:
7130                 case ixgbe_mac_x550em_a:
7131                         hwstats->pxonrxc[i] +=
7132                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7133                         break;
7134                 default:
7135                         break;
7136                 }
7137         }
7138
7139         /*16 register reads */
7140         for (i = 0; i < 16; i++) {
7141                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7142                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7143                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7144                     (hw->mac.type == ixgbe_mac_X540) ||
7145                     (hw->mac.type == ixgbe_mac_X550) ||
7146                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7147                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7148                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7149                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7150                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7151                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7152                 }
7153         }
7154
7155         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7156         /* work around hardware counting issue */
7157         hwstats->gprc -= missed_rx;
7158
7159         ixgbe_update_xoff_received(adapter);
7160
7161         /* 82598 hardware only has a 32 bit counter in the high register */
7162         switch (hw->mac.type) {
7163         case ixgbe_mac_82598EB:
7164                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7165                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7166                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7167                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7168                 break;
7169         case ixgbe_mac_X540:
7170         case ixgbe_mac_X550:
7171         case ixgbe_mac_X550EM_x:
7172         case ixgbe_mac_x550em_a:
7173                 /* OS2BMC stats are X540 and later */
7174                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7175                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7176                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7177                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7178                 /* fall through */
7179         case ixgbe_mac_82599EB:
7180                 for (i = 0; i < 16; i++)
7181                         adapter->hw_rx_no_dma_resources +=
7182                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7183                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7184                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7185                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7186                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7187                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7188                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7189                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7190                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7191                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7192 #ifdef IXGBE_FCOE
7193                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7194                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7195                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7196                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7197                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7198                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7199                 /* Add up per cpu counters for total ddp aloc fail */
7200                 if (adapter->fcoe.ddp_pool) {
7201                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7202                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7203                         unsigned int cpu;
7204                         u64 noddp = 0, noddp_ext_buff = 0;
7205                         for_each_possible_cpu(cpu) {
7206                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7207                                 noddp += ddp_pool->noddp;
7208                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7209                         }
7210                         hwstats->fcoe_noddp = noddp;
7211                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7212                 }
7213 #endif /* IXGBE_FCOE */
7214                 break;
7215         default:
7216                 break;
7217         }
7218         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7219         hwstats->bprc += bprc;
7220         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7221         if (hw->mac.type == ixgbe_mac_82598EB)
7222                 hwstats->mprc -= bprc;
7223         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7224         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7225         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7226         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7227         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7228         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7229         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7230         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7231         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7232         hwstats->lxontxc += lxon;
7233         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7234         hwstats->lxofftxc += lxoff;
7235         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7236         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7237         /*
7238          * 82598 errata - tx of flow control packets is included in tx counters
7239          */
7240         xon_off_tot = lxon + lxoff;
7241         hwstats->gptc -= xon_off_tot;
7242         hwstats->mptc -= xon_off_tot;
7243         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7244         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7245         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7246         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7247         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7248         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7249         hwstats->ptc64 -= xon_off_tot;
7250         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7251         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7252         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7253         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7254         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7255         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7256
7257         /* Fill out the OS statistics structure */
7258         netdev->stats.multicast = hwstats->mprc;
7259
7260         /* Rx Errors */
7261         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7262         netdev->stats.rx_dropped = 0;
7263         netdev->stats.rx_length_errors = hwstats->rlec;
7264         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7265         netdev->stats.rx_missed_errors = total_mpc;
7266 }
7267
7268 /**
7269  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7270  * @adapter: pointer to the device adapter structure
7271  **/
7272 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7273 {
7274         struct ixgbe_hw *hw = &adapter->hw;
7275         int i;
7276
7277         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7278                 return;
7279
7280         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7281
7282         /* if interface is down do nothing */
7283         if (test_bit(__IXGBE_DOWN, &adapter->state))
7284                 return;
7285
7286         /* do nothing if we are not using signature filters */
7287         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7288                 return;
7289
7290         adapter->fdir_overflow++;
7291
7292         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7293                 for (i = 0; i < adapter->num_tx_queues; i++)
7294                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7295                                 &(adapter->tx_ring[i]->state));
7296                 for (i = 0; i < adapter->num_xdp_queues; i++)
7297                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7298                                 &adapter->xdp_ring[i]->state);
7299                 /* re-enable flow director interrupts */
7300                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7301         } else {
7302                 e_err(probe, "failed to finish FDIR re-initialization, "
7303                       "ignored adding FDIR ATR filters\n");
7304         }
7305 }
7306
7307 /**
7308  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7309  * @adapter: pointer to the device adapter structure
7310  *
7311  * This function serves two purposes.  First it strobes the interrupt lines
7312  * in order to make certain interrupts are occurring.  Secondly it sets the
7313  * bits needed to check for TX hangs.  As a result we should immediately
7314  * determine if a hang has occurred.
7315  */
7316 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7317 {
7318         struct ixgbe_hw *hw = &adapter->hw;
7319         u64 eics = 0;
7320         int i;
7321
7322         /* If we're down, removing or resetting, just bail */
7323         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7324             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7325             test_bit(__IXGBE_RESETTING, &adapter->state))
7326                 return;
7327
7328         /* Force detection of hung controller */
7329         if (netif_carrier_ok(adapter->netdev)) {
7330                 for (i = 0; i < adapter->num_tx_queues; i++)
7331                         set_check_for_tx_hang(adapter->tx_ring[i]);
7332                 for (i = 0; i < adapter->num_xdp_queues; i++)
7333                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7334         }
7335
7336         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7337                 /*
7338                  * for legacy and MSI interrupts don't set any bits
7339                  * that are enabled for EIAM, because this operation
7340                  * would set *both* EIMS and EICS for any bit in EIAM
7341                  */
7342                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7343                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7344         } else {
7345                 /* get one bit for every active tx/rx interrupt vector */
7346                 for (i = 0; i < adapter->num_q_vectors; i++) {
7347                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7348                         if (qv->rx.ring || qv->tx.ring)
7349                                 eics |= BIT_ULL(i);
7350                 }
7351         }
7352
7353         /* Cause software interrupt to ensure rings are cleaned */
7354         ixgbe_irq_rearm_queues(adapter, eics);
7355 }
7356
7357 /**
7358  * ixgbe_watchdog_update_link - update the link status
7359  * @adapter: pointer to the device adapter structure
7360  **/
7361 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7362 {
7363         struct ixgbe_hw *hw = &adapter->hw;
7364         u32 link_speed = adapter->link_speed;
7365         bool link_up = adapter->link_up;
7366         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7367
7368         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7369                 return;
7370
7371         if (hw->mac.ops.check_link) {
7372                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7373         } else {
7374                 /* always assume link is up, if no check link function */
7375                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7376                 link_up = true;
7377         }
7378
7379         if (adapter->ixgbe_ieee_pfc)
7380                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7381
7382         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7383                 hw->mac.ops.fc_enable(hw);
7384                 ixgbe_set_rx_drop_en(adapter);
7385         }
7386
7387         if (link_up ||
7388             time_after(jiffies, (adapter->link_check_timeout +
7389                                  IXGBE_TRY_LINK_TIMEOUT))) {
7390                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7391                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7392                 IXGBE_WRITE_FLUSH(hw);
7393         }
7394
7395         adapter->link_up = link_up;
7396         adapter->link_speed = link_speed;
7397 }
7398
7399 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7400 {
7401 #ifdef CONFIG_IXGBE_DCB
7402         struct net_device *netdev = adapter->netdev;
7403         struct dcb_app app = {
7404                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7405                               .protocol = 0,
7406                              };
7407         u8 up = 0;
7408
7409         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7410                 up = dcb_ieee_getapp_mask(netdev, &app);
7411
7412         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7413 #endif
7414 }
7415
7416 /**
7417  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7418  *                             print link up message
7419  * @adapter: pointer to the device adapter structure
7420  **/
7421 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7422 {
7423         struct net_device *netdev = adapter->netdev;
7424         struct ixgbe_hw *hw = &adapter->hw;
7425         u32 link_speed = adapter->link_speed;
7426         const char *speed_str;
7427         bool flow_rx, flow_tx;
7428
7429         /* only continue if link was previously down */
7430         if (netif_carrier_ok(netdev))
7431                 return;
7432
7433         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7434
7435         switch (hw->mac.type) {
7436         case ixgbe_mac_82598EB: {
7437                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7438                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7439                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7440                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7441         }
7442                 break;
7443         case ixgbe_mac_X540:
7444         case ixgbe_mac_X550:
7445         case ixgbe_mac_X550EM_x:
7446         case ixgbe_mac_x550em_a:
7447         case ixgbe_mac_82599EB: {
7448                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7449                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7450                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7451                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7452         }
7453                 break;
7454         default:
7455                 flow_tx = false;
7456                 flow_rx = false;
7457                 break;
7458         }
7459
7460         adapter->last_rx_ptp_check = jiffies;
7461
7462         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7463                 ixgbe_ptp_start_cyclecounter(adapter);
7464
7465         switch (link_speed) {
7466         case IXGBE_LINK_SPEED_10GB_FULL:
7467                 speed_str = "10 Gbps";
7468                 break;
7469         case IXGBE_LINK_SPEED_5GB_FULL:
7470                 speed_str = "5 Gbps";
7471                 break;
7472         case IXGBE_LINK_SPEED_2_5GB_FULL:
7473                 speed_str = "2.5 Gbps";
7474                 break;
7475         case IXGBE_LINK_SPEED_1GB_FULL:
7476                 speed_str = "1 Gbps";
7477                 break;
7478         case IXGBE_LINK_SPEED_100_FULL:
7479                 speed_str = "100 Mbps";
7480                 break;
7481         case IXGBE_LINK_SPEED_10_FULL:
7482                 speed_str = "10 Mbps";
7483                 break;
7484         default:
7485                 speed_str = "unknown speed";
7486                 break;
7487         }
7488         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7489                ((flow_rx && flow_tx) ? "RX/TX" :
7490                (flow_rx ? "RX" :
7491                (flow_tx ? "TX" : "None"))));
7492
7493         netif_carrier_on(netdev);
7494         ixgbe_check_vf_rate_limit(adapter);
7495
7496         /* enable transmits */
7497         netif_tx_wake_all_queues(adapter->netdev);
7498
7499         /* update the default user priority for VFs */
7500         ixgbe_update_default_up(adapter);
7501
7502         /* ping all the active vfs to let them know link has changed */
7503         ixgbe_ping_all_vfs(adapter);
7504 }
7505
7506 /**
7507  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7508  *                               print link down message
7509  * @adapter: pointer to the adapter structure
7510  **/
7511 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7512 {
7513         struct net_device *netdev = adapter->netdev;
7514         struct ixgbe_hw *hw = &adapter->hw;
7515
7516         adapter->link_up = false;
7517         adapter->link_speed = 0;
7518
7519         /* only continue if link was up previously */
7520         if (!netif_carrier_ok(netdev))
7521                 return;
7522
7523         /* poll for SFP+ cable when link is down */
7524         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7525                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7526
7527         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7528                 ixgbe_ptp_start_cyclecounter(adapter);
7529
7530         e_info(drv, "NIC Link is Down\n");
7531         netif_carrier_off(netdev);
7532
7533         /* ping all the active vfs to let them know link has changed */
7534         ixgbe_ping_all_vfs(adapter);
7535 }
7536
7537 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7538 {
7539         int i;
7540
7541         for (i = 0; i < adapter->num_tx_queues; i++) {
7542                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7543
7544                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7545                         return true;
7546         }
7547
7548         for (i = 0; i < adapter->num_xdp_queues; i++) {
7549                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7550
7551                 if (ring->next_to_use != ring->next_to_clean)
7552                         return true;
7553         }
7554
7555         return false;
7556 }
7557
7558 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7559 {
7560         struct ixgbe_hw *hw = &adapter->hw;
7561         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7562         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7563
7564         int i, j;
7565
7566         if (!adapter->num_vfs)
7567                 return false;
7568
7569         /* resetting the PF is only needed for MAC before X550 */
7570         if (hw->mac.type >= ixgbe_mac_X550)
7571                 return false;
7572
7573         for (i = 0; i < adapter->num_vfs; i++) {
7574                 for (j = 0; j < q_per_pool; j++) {
7575                         u32 h, t;
7576
7577                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7578                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7579
7580                         if (h != t)
7581                                 return true;
7582                 }
7583         }
7584
7585         return false;
7586 }
7587
7588 /**
7589  * ixgbe_watchdog_flush_tx - flush queues on link down
7590  * @adapter: pointer to the device adapter structure
7591  **/
7592 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7593 {
7594         if (!netif_carrier_ok(adapter->netdev)) {
7595                 if (ixgbe_ring_tx_pending(adapter) ||
7596                     ixgbe_vf_tx_pending(adapter)) {
7597                         /* We've lost link, so the controller stops DMA,
7598                          * but we've got queued Tx work that's never going
7599                          * to get done, so reset controller to flush Tx.
7600                          * (Do the reset outside of interrupt context).
7601                          */
7602                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7603                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7604                 }
7605         }
7606 }
7607
7608 #ifdef CONFIG_PCI_IOV
7609 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7610 {
7611         struct ixgbe_hw *hw = &adapter->hw;
7612         struct pci_dev *pdev = adapter->pdev;
7613         unsigned int vf;
7614         u32 gpc;
7615
7616         if (!(netif_carrier_ok(adapter->netdev)))
7617                 return;
7618
7619         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7620         if (gpc) /* If incrementing then no need for the check below */
7621                 return;
7622         /* Check to see if a bad DMA write target from an errant or
7623          * malicious VF has caused a PCIe error.  If so then we can
7624          * issue a VFLR to the offending VF(s) and then resume without
7625          * requesting a full slot reset.
7626          */
7627
7628         if (!pdev)
7629                 return;
7630
7631         /* check status reg for all VFs owned by this PF */
7632         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7633                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7634                 u16 status_reg;
7635
7636                 if (!vfdev)
7637                         continue;
7638                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7639                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7640                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7641                         pcie_flr(vfdev);
7642         }
7643 }
7644
7645 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7646 {
7647         u32 ssvpc;
7648
7649         /* Do not perform spoof check for 82598 or if not in IOV mode */
7650         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7651             adapter->num_vfs == 0)
7652                 return;
7653
7654         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7655
7656         /*
7657          * ssvpc register is cleared on read, if zero then no
7658          * spoofed packets in the last interval.
7659          */
7660         if (!ssvpc)
7661                 return;
7662
7663         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7664 }
7665 #else
7666 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7667 {
7668 }
7669
7670 static void
7671 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7672 {
7673 }
7674 #endif /* CONFIG_PCI_IOV */
7675
7676
7677 /**
7678  * ixgbe_watchdog_subtask - check and bring link up
7679  * @adapter: pointer to the device adapter structure
7680  **/
7681 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7682 {
7683         /* if interface is down, removing or resetting, do nothing */
7684         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7685             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7686             test_bit(__IXGBE_RESETTING, &adapter->state))
7687                 return;
7688
7689         ixgbe_watchdog_update_link(adapter);
7690
7691         if (adapter->link_up)
7692                 ixgbe_watchdog_link_is_up(adapter);
7693         else
7694                 ixgbe_watchdog_link_is_down(adapter);
7695
7696         ixgbe_check_for_bad_vf(adapter);
7697         ixgbe_spoof_check(adapter);
7698         ixgbe_update_stats(adapter);
7699
7700         ixgbe_watchdog_flush_tx(adapter);
7701 }
7702
7703 /**
7704  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7705  * @adapter: the ixgbe adapter structure
7706  **/
7707 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7708 {
7709         struct ixgbe_hw *hw = &adapter->hw;
7710         s32 err;
7711
7712         /* not searching for SFP so there is nothing to do here */
7713         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7714             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7715                 return;
7716
7717         if (adapter->sfp_poll_time &&
7718             time_after(adapter->sfp_poll_time, jiffies))
7719                 return; /* If not yet time to poll for SFP */
7720
7721         /* someone else is in init, wait until next service event */
7722         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7723                 return;
7724
7725         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7726
7727         err = hw->phy.ops.identify_sfp(hw);
7728         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7729                 goto sfp_out;
7730
7731         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7732                 /* If no cable is present, then we need to reset
7733                  * the next time we find a good cable. */
7734                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7735         }
7736
7737         /* exit on error */
7738         if (err)
7739                 goto sfp_out;
7740
7741         /* exit if reset not needed */
7742         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7743                 goto sfp_out;
7744
7745         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7746
7747         /*
7748          * A module may be identified correctly, but the EEPROM may not have
7749          * support for that module.  setup_sfp() will fail in that case, so
7750          * we should not allow that module to load.
7751          */
7752         if (hw->mac.type == ixgbe_mac_82598EB)
7753                 err = hw->phy.ops.reset(hw);
7754         else
7755                 err = hw->mac.ops.setup_sfp(hw);
7756
7757         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7758                 goto sfp_out;
7759
7760         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7761         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7762
7763 sfp_out:
7764         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7765
7766         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7767             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7768                 e_dev_err("failed to initialize because an unsupported "
7769                           "SFP+ module type was detected.\n");
7770                 e_dev_err("Reload the driver after installing a "
7771                           "supported module.\n");
7772                 unregister_netdev(adapter->netdev);
7773         }
7774 }
7775
7776 /**
7777  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7778  * @adapter: the ixgbe adapter structure
7779  **/
7780 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7781 {
7782         struct ixgbe_hw *hw = &adapter->hw;
7783         u32 cap_speed;
7784         u32 speed;
7785         bool autoneg = false;
7786
7787         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7788                 return;
7789
7790         /* someone else is in init, wait until next service event */
7791         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7792                 return;
7793
7794         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7795
7796         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7797
7798         /* advertise highest capable link speed */
7799         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7800                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7801         else
7802                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7803                                      IXGBE_LINK_SPEED_1GB_FULL);
7804
7805         if (hw->mac.ops.setup_link)
7806                 hw->mac.ops.setup_link(hw, speed, true);
7807
7808         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7809         adapter->link_check_timeout = jiffies;
7810         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7811 }
7812
7813 /**
7814  * ixgbe_service_timer - Timer Call-back
7815  * @t: pointer to timer_list structure
7816  **/
7817 static void ixgbe_service_timer(struct timer_list *t)
7818 {
7819         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7820         unsigned long next_event_offset;
7821
7822         /* poll faster when waiting for link */
7823         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7824                 next_event_offset = HZ / 10;
7825         else
7826                 next_event_offset = HZ * 2;
7827
7828         /* Reset the timer */
7829         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7830
7831         ixgbe_service_event_schedule(adapter);
7832 }
7833
7834 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7835 {
7836         struct ixgbe_hw *hw = &adapter->hw;
7837         u32 status;
7838
7839         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7840                 return;
7841
7842         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7843
7844         if (!hw->phy.ops.handle_lasi)
7845                 return;
7846
7847         status = hw->phy.ops.handle_lasi(&adapter->hw);
7848         if (status != IXGBE_ERR_OVERTEMP)
7849                 return;
7850
7851         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7852 }
7853
7854 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7855 {
7856         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7857                 return;
7858
7859         rtnl_lock();
7860         /* If we're already down, removing or resetting, just bail */
7861         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7862             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7863             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7864                 rtnl_unlock();
7865                 return;
7866         }
7867
7868         ixgbe_dump(adapter);
7869         netdev_err(adapter->netdev, "Reset adapter\n");
7870         adapter->tx_timeout_count++;
7871
7872         ixgbe_reinit_locked(adapter);
7873         rtnl_unlock();
7874 }
7875
7876 /**
7877  * ixgbe_check_fw_error - Check firmware for errors
7878  * @adapter: the adapter private structure
7879  *
7880  * Check firmware errors in register FWSM
7881  */
7882 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7883 {
7884         struct ixgbe_hw *hw = &adapter->hw;
7885         u32 fwsm;
7886
7887         /* read fwsm.ext_err_ind register and log errors */
7888         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7889
7890         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7891             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7892                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7893                            fwsm);
7894
7895         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7896                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7897                 return true;
7898         }
7899
7900         return false;
7901 }
7902
7903 /**
7904  * ixgbe_service_task - manages and runs subtasks
7905  * @work: pointer to work_struct containing our data
7906  **/
7907 static void ixgbe_service_task(struct work_struct *work)
7908 {
7909         struct ixgbe_adapter *adapter = container_of(work,
7910                                                      struct ixgbe_adapter,
7911                                                      service_task);
7912         if (ixgbe_removed(adapter->hw.hw_addr)) {
7913                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7914                         rtnl_lock();
7915                         ixgbe_down(adapter);
7916                         rtnl_unlock();
7917                 }
7918                 ixgbe_service_event_complete(adapter);
7919                 return;
7920         }
7921         if (ixgbe_check_fw_error(adapter)) {
7922                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
7923                         unregister_netdev(adapter->netdev);
7924                 ixgbe_service_event_complete(adapter);
7925                 return;
7926         }
7927         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7928                 rtnl_lock();
7929                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7930                 udp_tunnel_get_rx_info(adapter->netdev);
7931                 rtnl_unlock();
7932         }
7933         ixgbe_reset_subtask(adapter);
7934         ixgbe_phy_interrupt_subtask(adapter);
7935         ixgbe_sfp_detection_subtask(adapter);
7936         ixgbe_sfp_link_config_subtask(adapter);
7937         ixgbe_check_overtemp_subtask(adapter);
7938         ixgbe_watchdog_subtask(adapter);
7939         ixgbe_fdir_reinit_subtask(adapter);
7940         ixgbe_check_hang_subtask(adapter);
7941
7942         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7943                 ixgbe_ptp_overflow_check(adapter);
7944                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7945                         ixgbe_ptp_rx_hang(adapter);
7946                 ixgbe_ptp_tx_hang(adapter);
7947         }
7948
7949         ixgbe_service_event_complete(adapter);
7950 }
7951
7952 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7953                      struct ixgbe_tx_buffer *first,
7954                      u8 *hdr_len,
7955                      struct ixgbe_ipsec_tx_data *itd)
7956 {
7957         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7958         struct sk_buff *skb = first->skb;
7959         union {
7960                 struct iphdr *v4;
7961                 struct ipv6hdr *v6;
7962                 unsigned char *hdr;
7963         } ip;
7964         union {
7965                 struct tcphdr *tcp;
7966                 unsigned char *hdr;
7967         } l4;
7968         u32 paylen, l4_offset;
7969         u32 fceof_saidx = 0;
7970         int err;
7971
7972         if (skb->ip_summed != CHECKSUM_PARTIAL)
7973                 return 0;
7974
7975         if (!skb_is_gso(skb))
7976                 return 0;
7977
7978         err = skb_cow_head(skb, 0);
7979         if (err < 0)
7980                 return err;
7981
7982         if (eth_p_mpls(first->protocol))
7983                 ip.hdr = skb_inner_network_header(skb);
7984         else
7985                 ip.hdr = skb_network_header(skb);
7986         l4.hdr = skb_checksum_start(skb);
7987
7988         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7989         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7990
7991         /* initialize outer IP header fields */
7992         if (ip.v4->version == 4) {
7993                 unsigned char *csum_start = skb_checksum_start(skb);
7994                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7995                 int len = csum_start - trans_start;
7996
7997                 /* IP header will have to cancel out any data that
7998                  * is not a part of the outer IP header, so set to
7999                  * a reverse csum if needed, else init check to 0.
8000                  */
8001                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
8002                                            csum_fold(csum_partial(trans_start,
8003                                                                   len, 0)) : 0;
8004                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
8005
8006                 ip.v4->tot_len = 0;
8007                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8008                                    IXGBE_TX_FLAGS_CSUM |
8009                                    IXGBE_TX_FLAGS_IPV4;
8010         } else {
8011                 ip.v6->payload_len = 0;
8012                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8013                                    IXGBE_TX_FLAGS_CSUM;
8014         }
8015
8016         /* determine offset of inner transport header */
8017         l4_offset = l4.hdr - skb->data;
8018
8019         /* compute length of segmentation header */
8020         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
8021
8022         /* remove payload length from inner checksum */
8023         paylen = skb->len - l4_offset;
8024         csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
8025
8026         /* update gso size and bytecount with header size */
8027         first->gso_segs = skb_shinfo(skb)->gso_segs;
8028         first->bytecount += (first->gso_segs - 1) * *hdr_len;
8029
8030         /* mss_l4len_id: use 0 as index for TSO */
8031         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8032         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8033
8034         fceof_saidx |= itd->sa_idx;
8035         type_tucmd |= itd->flags | itd->trailer_len;
8036
8037         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8038         vlan_macip_lens = l4.hdr - ip.hdr;
8039         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8040         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8041
8042         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8043                           mss_l4len_idx);
8044
8045         return 1;
8046 }
8047
8048 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8049 {
8050         unsigned int offset = 0;
8051
8052         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8053
8054         return offset == skb_checksum_start_offset(skb);
8055 }
8056
8057 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8058                           struct ixgbe_tx_buffer *first,
8059                           struct ixgbe_ipsec_tx_data *itd)
8060 {
8061         struct sk_buff *skb = first->skb;
8062         u32 vlan_macip_lens = 0;
8063         u32 fceof_saidx = 0;
8064         u32 type_tucmd = 0;
8065
8066         if (skb->ip_summed != CHECKSUM_PARTIAL) {
8067 csum_failed:
8068                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8069                                          IXGBE_TX_FLAGS_CC)))
8070                         return;
8071                 goto no_csum;
8072         }
8073
8074         switch (skb->csum_offset) {
8075         case offsetof(struct tcphdr, check):
8076                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8077                 /* fall through */
8078         case offsetof(struct udphdr, check):
8079                 break;
8080         case offsetof(struct sctphdr, checksum):
8081                 /* validate that this is actually an SCTP request */
8082                 if (((first->protocol == htons(ETH_P_IP)) &&
8083                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8084                     ((first->protocol == htons(ETH_P_IPV6)) &&
8085                      ixgbe_ipv6_csum_is_sctp(skb))) {
8086                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8087                         break;
8088                 }
8089                 /* fall through */
8090         default:
8091                 skb_checksum_help(skb);
8092                 goto csum_failed;
8093         }
8094
8095         /* update TX checksum flag */
8096         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8097         vlan_macip_lens = skb_checksum_start_offset(skb) -
8098                           skb_network_offset(skb);
8099 no_csum:
8100         /* vlan_macip_lens: MACLEN, VLAN tag */
8101         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8102         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8103
8104         fceof_saidx |= itd->sa_idx;
8105         type_tucmd |= itd->flags | itd->trailer_len;
8106
8107         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8108 }
8109
8110 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8111         ((_flag <= _result) ? \
8112          ((u32)(_input & _flag) * (_result / _flag)) : \
8113          ((u32)(_input & _flag) / (_flag / _result)))
8114
8115 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8116 {
8117         /* set type for advanced descriptor with frame checksum insertion */
8118         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8119                        IXGBE_ADVTXD_DCMD_DEXT |
8120                        IXGBE_ADVTXD_DCMD_IFCS;
8121
8122         /* set HW vlan bit if vlan is present */
8123         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8124                                    IXGBE_ADVTXD_DCMD_VLE);
8125
8126         /* set segmentation enable bits for TSO/FSO */
8127         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8128                                    IXGBE_ADVTXD_DCMD_TSE);
8129
8130         /* set timestamp bit if present */
8131         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8132                                    IXGBE_ADVTXD_MAC_TSTAMP);
8133
8134         /* insert frame checksum */
8135         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8136
8137         return cmd_type;
8138 }
8139
8140 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8141                                    u32 tx_flags, unsigned int paylen)
8142 {
8143         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8144
8145         /* enable L4 checksum for TSO and TX checksum offload */
8146         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8147                                         IXGBE_TX_FLAGS_CSUM,
8148                                         IXGBE_ADVTXD_POPTS_TXSM);
8149
8150         /* enable IPv4 checksum for TSO */
8151         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8152                                         IXGBE_TX_FLAGS_IPV4,
8153                                         IXGBE_ADVTXD_POPTS_IXSM);
8154
8155         /* enable IPsec */
8156         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8157                                         IXGBE_TX_FLAGS_IPSEC,
8158                                         IXGBE_ADVTXD_POPTS_IPSEC);
8159
8160         /*
8161          * Check Context must be set if Tx switch is enabled, which it
8162          * always is for case where virtual functions are running
8163          */
8164         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8165                                         IXGBE_TX_FLAGS_CC,
8166                                         IXGBE_ADVTXD_CC);
8167
8168         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8169 }
8170
8171 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8172 {
8173         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8174
8175         /* Herbert's original patch had:
8176          *  smp_mb__after_netif_stop_queue();
8177          * but since that doesn't exist yet, just open code it.
8178          */
8179         smp_mb();
8180
8181         /* We need to check again in a case another CPU has just
8182          * made room available.
8183          */
8184         if (likely(ixgbe_desc_unused(tx_ring) < size))
8185                 return -EBUSY;
8186
8187         /* A reprieve! - use start_queue because it doesn't call schedule */
8188         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8189         ++tx_ring->tx_stats.restart_queue;
8190         return 0;
8191 }
8192
8193 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8194 {
8195         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8196                 return 0;
8197
8198         return __ixgbe_maybe_stop_tx(tx_ring, size);
8199 }
8200
8201 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8202                         struct ixgbe_tx_buffer *first,
8203                         const u8 hdr_len)
8204 {
8205         struct sk_buff *skb = first->skb;
8206         struct ixgbe_tx_buffer *tx_buffer;
8207         union ixgbe_adv_tx_desc *tx_desc;
8208         skb_frag_t *frag;
8209         dma_addr_t dma;
8210         unsigned int data_len, size;
8211         u32 tx_flags = first->tx_flags;
8212         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8213         u16 i = tx_ring->next_to_use;
8214
8215         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8216
8217         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8218
8219         size = skb_headlen(skb);
8220         data_len = skb->data_len;
8221
8222 #ifdef IXGBE_FCOE
8223         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8224                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8225                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8226                         data_len = 0;
8227                 } else {
8228                         data_len -= sizeof(struct fcoe_crc_eof);
8229                 }
8230         }
8231
8232 #endif
8233         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8234
8235         tx_buffer = first;
8236
8237         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8238                 if (dma_mapping_error(tx_ring->dev, dma))
8239                         goto dma_error;
8240
8241                 /* record length, and DMA address */
8242                 dma_unmap_len_set(tx_buffer, len, size);
8243                 dma_unmap_addr_set(tx_buffer, dma, dma);
8244
8245                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8246
8247                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8248                         tx_desc->read.cmd_type_len =
8249                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8250
8251                         i++;
8252                         tx_desc++;
8253                         if (i == tx_ring->count) {
8254                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8255                                 i = 0;
8256                         }
8257                         tx_desc->read.olinfo_status = 0;
8258
8259                         dma += IXGBE_MAX_DATA_PER_TXD;
8260                         size -= IXGBE_MAX_DATA_PER_TXD;
8261
8262                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8263                 }
8264
8265                 if (likely(!data_len))
8266                         break;
8267
8268                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8269
8270                 i++;
8271                 tx_desc++;
8272                 if (i == tx_ring->count) {
8273                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8274                         i = 0;
8275                 }
8276                 tx_desc->read.olinfo_status = 0;
8277
8278 #ifdef IXGBE_FCOE
8279                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8280 #else
8281                 size = skb_frag_size(frag);
8282 #endif
8283                 data_len -= size;
8284
8285                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8286                                        DMA_TO_DEVICE);
8287
8288                 tx_buffer = &tx_ring->tx_buffer_info[i];
8289         }
8290
8291         /* write last descriptor with RS and EOP bits */
8292         cmd_type |= size | IXGBE_TXD_CMD;
8293         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8294
8295         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8296
8297         /* set the timestamp */
8298         first->time_stamp = jiffies;
8299
8300         skb_tx_timestamp(skb);
8301
8302         /*
8303          * Force memory writes to complete before letting h/w know there
8304          * are new descriptors to fetch.  (Only applicable for weak-ordered
8305          * memory model archs, such as IA-64).
8306          *
8307          * We also need this memory barrier to make certain all of the
8308          * status bits have been updated before next_to_watch is written.
8309          */
8310         wmb();
8311
8312         /* set next_to_watch value indicating a packet is present */
8313         first->next_to_watch = tx_desc;
8314
8315         i++;
8316         if (i == tx_ring->count)
8317                 i = 0;
8318
8319         tx_ring->next_to_use = i;
8320
8321         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8322
8323         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
8324                 writel(i, tx_ring->tail);
8325         }
8326
8327         return 0;
8328 dma_error:
8329         dev_err(tx_ring->dev, "TX DMA map failed\n");
8330
8331         /* clear dma mappings for failed tx_buffer_info map */
8332         for (;;) {
8333                 tx_buffer = &tx_ring->tx_buffer_info[i];
8334                 if (dma_unmap_len(tx_buffer, len))
8335                         dma_unmap_page(tx_ring->dev,
8336                                        dma_unmap_addr(tx_buffer, dma),
8337                                        dma_unmap_len(tx_buffer, len),
8338                                        DMA_TO_DEVICE);
8339                 dma_unmap_len_set(tx_buffer, len, 0);
8340                 if (tx_buffer == first)
8341                         break;
8342                 if (i == 0)
8343                         i += tx_ring->count;
8344                 i--;
8345         }
8346
8347         dev_kfree_skb_any(first->skb);
8348         first->skb = NULL;
8349
8350         tx_ring->next_to_use = i;
8351
8352         return -1;
8353 }
8354
8355 static void ixgbe_atr(struct ixgbe_ring *ring,
8356                       struct ixgbe_tx_buffer *first)
8357 {
8358         struct ixgbe_q_vector *q_vector = ring->q_vector;
8359         union ixgbe_atr_hash_dword input = { .dword = 0 };
8360         union ixgbe_atr_hash_dword common = { .dword = 0 };
8361         union {
8362                 unsigned char *network;
8363                 struct iphdr *ipv4;
8364                 struct ipv6hdr *ipv6;
8365         } hdr;
8366         struct tcphdr *th;
8367         unsigned int hlen;
8368         struct sk_buff *skb;
8369         __be16 vlan_id;
8370         int l4_proto;
8371
8372         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8373         if (!q_vector)
8374                 return;
8375
8376         /* do nothing if sampling is disabled */
8377         if (!ring->atr_sample_rate)
8378                 return;
8379
8380         ring->atr_count++;
8381
8382         /* currently only IPv4/IPv6 with TCP is supported */
8383         if ((first->protocol != htons(ETH_P_IP)) &&
8384             (first->protocol != htons(ETH_P_IPV6)))
8385                 return;
8386
8387         /* snag network header to get L4 type and address */
8388         skb = first->skb;
8389         hdr.network = skb_network_header(skb);
8390         if (unlikely(hdr.network <= skb->data))
8391                 return;
8392         if (skb->encapsulation &&
8393             first->protocol == htons(ETH_P_IP) &&
8394             hdr.ipv4->protocol == IPPROTO_UDP) {
8395                 struct ixgbe_adapter *adapter = q_vector->adapter;
8396
8397                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8398                              VXLAN_HEADROOM))
8399                         return;
8400
8401                 /* verify the port is recognized as VXLAN */
8402                 if (adapter->vxlan_port &&
8403                     udp_hdr(skb)->dest == adapter->vxlan_port)
8404                         hdr.network = skb_inner_network_header(skb);
8405
8406                 if (adapter->geneve_port &&
8407                     udp_hdr(skb)->dest == adapter->geneve_port)
8408                         hdr.network = skb_inner_network_header(skb);
8409         }
8410
8411         /* Make sure we have at least [minimum IPv4 header + TCP]
8412          * or [IPv6 header] bytes
8413          */
8414         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8415                 return;
8416
8417         /* Currently only IPv4/IPv6 with TCP is supported */
8418         switch (hdr.ipv4->version) {
8419         case IPVERSION:
8420                 /* access ihl as u8 to avoid unaligned access on ia64 */
8421                 hlen = (hdr.network[0] & 0x0F) << 2;
8422                 l4_proto = hdr.ipv4->protocol;
8423                 break;
8424         case 6:
8425                 hlen = hdr.network - skb->data;
8426                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8427                 hlen -= hdr.network - skb->data;
8428                 break;
8429         default:
8430                 return;
8431         }
8432
8433         if (l4_proto != IPPROTO_TCP)
8434                 return;
8435
8436         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8437                      hlen + sizeof(struct tcphdr)))
8438                 return;
8439
8440         th = (struct tcphdr *)(hdr.network + hlen);
8441
8442         /* skip this packet since the socket is closing */
8443         if (th->fin)
8444                 return;
8445
8446         /* sample on all syn packets or once every atr sample count */
8447         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8448                 return;
8449
8450         /* reset sample count */
8451         ring->atr_count = 0;
8452
8453         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8454
8455         /*
8456          * src and dst are inverted, think how the receiver sees them
8457          *
8458          * The input is broken into two sections, a non-compressed section
8459          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8460          * is XORed together and stored in the compressed dword.
8461          */
8462         input.formatted.vlan_id = vlan_id;
8463
8464         /*
8465          * since src port and flex bytes occupy the same word XOR them together
8466          * and write the value to source port portion of compressed dword
8467          */
8468         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8469                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8470         else
8471                 common.port.src ^= th->dest ^ first->protocol;
8472         common.port.dst ^= th->source;
8473
8474         switch (hdr.ipv4->version) {
8475         case IPVERSION:
8476                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8477                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8478                 break;
8479         case 6:
8480                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8481                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8482                              hdr.ipv6->saddr.s6_addr32[1] ^
8483                              hdr.ipv6->saddr.s6_addr32[2] ^
8484                              hdr.ipv6->saddr.s6_addr32[3] ^
8485                              hdr.ipv6->daddr.s6_addr32[0] ^
8486                              hdr.ipv6->daddr.s6_addr32[1] ^
8487                              hdr.ipv6->daddr.s6_addr32[2] ^
8488                              hdr.ipv6->daddr.s6_addr32[3];
8489                 break;
8490         default:
8491                 break;
8492         }
8493
8494         if (hdr.network != skb_network_header(skb))
8495                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8496
8497         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8498         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8499                                               input, common, ring->queue_index);
8500 }
8501
8502 #ifdef IXGBE_FCOE
8503 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8504                               struct net_device *sb_dev)
8505 {
8506         struct ixgbe_adapter *adapter;
8507         struct ixgbe_ring_feature *f;
8508         int txq;
8509
8510         if (sb_dev) {
8511                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8512                 struct net_device *vdev = sb_dev;
8513
8514                 txq = vdev->tc_to_txq[tc].offset;
8515                 txq += reciprocal_scale(skb_get_hash(skb),
8516                                         vdev->tc_to_txq[tc].count);
8517
8518                 return txq;
8519         }
8520
8521         /*
8522          * only execute the code below if protocol is FCoE
8523          * or FIP and we have FCoE enabled on the adapter
8524          */
8525         switch (vlan_get_protocol(skb)) {
8526         case htons(ETH_P_FCOE):
8527         case htons(ETH_P_FIP):
8528                 adapter = netdev_priv(dev);
8529
8530                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8531                         break;
8532                 /* fall through */
8533         default:
8534                 return netdev_pick_tx(dev, skb, sb_dev);
8535         }
8536
8537         f = &adapter->ring_feature[RING_F_FCOE];
8538
8539         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8540                                            smp_processor_id();
8541
8542         while (txq >= f->indices)
8543                 txq -= f->indices;
8544
8545         return txq + f->offset;
8546 }
8547
8548 #endif
8549 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8550                         struct xdp_frame *xdpf)
8551 {
8552         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8553         struct ixgbe_tx_buffer *tx_buffer;
8554         union ixgbe_adv_tx_desc *tx_desc;
8555         u32 len, cmd_type;
8556         dma_addr_t dma;
8557         u16 i;
8558
8559         len = xdpf->len;
8560
8561         if (unlikely(!ixgbe_desc_unused(ring)))
8562                 return IXGBE_XDP_CONSUMED;
8563
8564         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8565         if (dma_mapping_error(ring->dev, dma))
8566                 return IXGBE_XDP_CONSUMED;
8567
8568         /* record the location of the first descriptor for this packet */
8569         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8570         tx_buffer->bytecount = len;
8571         tx_buffer->gso_segs = 1;
8572         tx_buffer->protocol = 0;
8573
8574         i = ring->next_to_use;
8575         tx_desc = IXGBE_TX_DESC(ring, i);
8576
8577         dma_unmap_len_set(tx_buffer, len, len);
8578         dma_unmap_addr_set(tx_buffer, dma, dma);
8579         tx_buffer->xdpf = xdpf;
8580
8581         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8582
8583         /* put descriptor type bits */
8584         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8585                    IXGBE_ADVTXD_DCMD_DEXT |
8586                    IXGBE_ADVTXD_DCMD_IFCS;
8587         cmd_type |= len | IXGBE_TXD_CMD;
8588         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8589         tx_desc->read.olinfo_status =
8590                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8591
8592         /* Avoid any potential race with xdp_xmit and cleanup */
8593         smp_wmb();
8594
8595         /* set next_to_watch value indicating a packet is present */
8596         i++;
8597         if (i == ring->count)
8598                 i = 0;
8599
8600         tx_buffer->next_to_watch = tx_desc;
8601         ring->next_to_use = i;
8602
8603         return IXGBE_XDP_TX;
8604 }
8605
8606 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8607                           struct ixgbe_adapter *adapter,
8608                           struct ixgbe_ring *tx_ring)
8609 {
8610         struct ixgbe_tx_buffer *first;
8611         int tso;
8612         u32 tx_flags = 0;
8613         unsigned short f;
8614         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8615         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8616         __be16 protocol = skb->protocol;
8617         u8 hdr_len = 0;
8618
8619         /*
8620          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8621          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8622          *       + 2 desc gap to keep tail from touching head,
8623          *       + 1 desc for context descriptor,
8624          * otherwise try next time
8625          */
8626         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8627                 count += TXD_USE_COUNT(skb_frag_size(
8628                                                 &skb_shinfo(skb)->frags[f]));
8629
8630         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8631                 tx_ring->tx_stats.tx_busy++;
8632                 return NETDEV_TX_BUSY;
8633         }
8634
8635         /* record the location of the first descriptor for this packet */
8636         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8637         first->skb = skb;
8638         first->bytecount = skb->len;
8639         first->gso_segs = 1;
8640
8641         /* if we have a HW VLAN tag being added default to the HW one */
8642         if (skb_vlan_tag_present(skb)) {
8643                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8644                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8645         /* else if it is a SW VLAN check the next protocol and store the tag */
8646         } else if (protocol == htons(ETH_P_8021Q)) {
8647                 struct vlan_hdr *vhdr, _vhdr;
8648                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8649                 if (!vhdr)
8650                         goto out_drop;
8651
8652                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8653                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8654                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8655         }
8656         protocol = vlan_get_protocol(skb);
8657
8658         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8659             adapter->ptp_clock) {
8660                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8661                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8662                                            &adapter->state)) {
8663                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8664                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8665
8666                         /* schedule check for Tx timestamp */
8667                         adapter->ptp_tx_skb = skb_get(skb);
8668                         adapter->ptp_tx_start = jiffies;
8669                         schedule_work(&adapter->ptp_tx_work);
8670                 } else {
8671                         adapter->tx_hwtstamp_skipped++;
8672                 }
8673         }
8674
8675 #ifdef CONFIG_PCI_IOV
8676         /*
8677          * Use the l2switch_enable flag - would be false if the DMA
8678          * Tx switch had been disabled.
8679          */
8680         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8681                 tx_flags |= IXGBE_TX_FLAGS_CC;
8682
8683 #endif
8684         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8685         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8686             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8687              (skb->priority != TC_PRIO_CONTROL))) {
8688                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8689                 tx_flags |= (skb->priority & 0x7) <<
8690                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8691                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8692                         struct vlan_ethhdr *vhdr;
8693
8694                         if (skb_cow_head(skb, 0))
8695                                 goto out_drop;
8696                         vhdr = (struct vlan_ethhdr *)skb->data;
8697                         vhdr->h_vlan_TCI = htons(tx_flags >>
8698                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8699                 } else {
8700                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8701                 }
8702         }
8703
8704         /* record initial flags and protocol */
8705         first->tx_flags = tx_flags;
8706         first->protocol = protocol;
8707
8708 #ifdef IXGBE_FCOE
8709         /* setup tx offload for FCoE */
8710         if ((protocol == htons(ETH_P_FCOE)) &&
8711             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8712                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8713                 if (tso < 0)
8714                         goto out_drop;
8715
8716                 goto xmit_fcoe;
8717         }
8718
8719 #endif /* IXGBE_FCOE */
8720
8721 #ifdef CONFIG_IXGBE_IPSEC
8722         if (xfrm_offload(skb) &&
8723             !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8724                 goto out_drop;
8725 #endif
8726         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8727         if (tso < 0)
8728                 goto out_drop;
8729         else if (!tso)
8730                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8731
8732         /* add the ATR filter if ATR is on */
8733         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8734                 ixgbe_atr(tx_ring, first);
8735
8736 #ifdef IXGBE_FCOE
8737 xmit_fcoe:
8738 #endif /* IXGBE_FCOE */
8739         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8740                 goto cleanup_tx_timestamp;
8741
8742         return NETDEV_TX_OK;
8743
8744 out_drop:
8745         dev_kfree_skb_any(first->skb);
8746         first->skb = NULL;
8747 cleanup_tx_timestamp:
8748         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8749                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8750                 adapter->ptp_tx_skb = NULL;
8751                 cancel_work_sync(&adapter->ptp_tx_work);
8752                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8753         }
8754
8755         return NETDEV_TX_OK;
8756 }
8757
8758 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8759                                       struct net_device *netdev,
8760                                       struct ixgbe_ring *ring)
8761 {
8762         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8763         struct ixgbe_ring *tx_ring;
8764
8765         /*
8766          * The minimum packet size for olinfo paylen is 17 so pad the skb
8767          * in order to meet this minimum size requirement.
8768          */
8769         if (skb_put_padto(skb, 17))
8770                 return NETDEV_TX_OK;
8771
8772         tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)];
8773         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8774                 return NETDEV_TX_BUSY;
8775
8776         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8777 }
8778
8779 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8780                                     struct net_device *netdev)
8781 {
8782         return __ixgbe_xmit_frame(skb, netdev, NULL);
8783 }
8784
8785 /**
8786  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8787  * @netdev: network interface device structure
8788  * @p: pointer to an address structure
8789  *
8790  * Returns 0 on success, negative on failure
8791  **/
8792 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8793 {
8794         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8795         struct ixgbe_hw *hw = &adapter->hw;
8796         struct sockaddr *addr = p;
8797
8798         if (!is_valid_ether_addr(addr->sa_data))
8799                 return -EADDRNOTAVAIL;
8800
8801         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8802         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8803
8804         ixgbe_mac_set_default_filter(adapter);
8805
8806         return 0;
8807 }
8808
8809 static int
8810 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8811 {
8812         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8813         struct ixgbe_hw *hw = &adapter->hw;
8814         u16 value;
8815         int rc;
8816
8817         if (adapter->mii_bus) {
8818                 int regnum = addr;
8819
8820                 if (devad != MDIO_DEVAD_NONE)
8821                         regnum |= (devad << 16) | MII_ADDR_C45;
8822
8823                 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8824         }
8825
8826         if (prtad != hw->phy.mdio.prtad)
8827                 return -EINVAL;
8828         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8829         if (!rc)
8830                 rc = value;
8831         return rc;
8832 }
8833
8834 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8835                             u16 addr, u16 value)
8836 {
8837         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8838         struct ixgbe_hw *hw = &adapter->hw;
8839
8840         if (adapter->mii_bus) {
8841                 int regnum = addr;
8842
8843                 if (devad != MDIO_DEVAD_NONE)
8844                         regnum |= (devad << 16) | MII_ADDR_C45;
8845
8846                 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8847         }
8848
8849         if (prtad != hw->phy.mdio.prtad)
8850                 return -EINVAL;
8851         return hw->phy.ops.write_reg(hw, addr, devad, value);
8852 }
8853
8854 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8855 {
8856         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8857
8858         switch (cmd) {
8859         case SIOCSHWTSTAMP:
8860                 return ixgbe_ptp_set_ts_config(adapter, req);
8861         case SIOCGHWTSTAMP:
8862                 return ixgbe_ptp_get_ts_config(adapter, req);
8863         case SIOCGMIIPHY:
8864                 if (!adapter->hw.phy.ops.read_reg)
8865                         return -EOPNOTSUPP;
8866                 /* fall through */
8867         default:
8868                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8869         }
8870 }
8871
8872 /**
8873  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8874  * netdev->dev_addrs
8875  * @dev: network interface device structure
8876  *
8877  * Returns non-zero on failure
8878  **/
8879 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8880 {
8881         int err = 0;
8882         struct ixgbe_adapter *adapter = netdev_priv(dev);
8883         struct ixgbe_hw *hw = &adapter->hw;
8884
8885         if (is_valid_ether_addr(hw->mac.san_addr)) {
8886                 rtnl_lock();
8887                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8888                 rtnl_unlock();
8889
8890                 /* update SAN MAC vmdq pool selection */
8891                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8892         }
8893         return err;
8894 }
8895
8896 /**
8897  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8898  * netdev->dev_addrs
8899  * @dev: network interface device structure
8900  *
8901  * Returns non-zero on failure
8902  **/
8903 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8904 {
8905         int err = 0;
8906         struct ixgbe_adapter *adapter = netdev_priv(dev);
8907         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8908
8909         if (is_valid_ether_addr(mac->san_addr)) {
8910                 rtnl_lock();
8911                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8912                 rtnl_unlock();
8913         }
8914         return err;
8915 }
8916
8917 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8918                                    struct ixgbe_ring *ring)
8919 {
8920         u64 bytes, packets;
8921         unsigned int start;
8922
8923         if (ring) {
8924                 do {
8925                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8926                         packets = ring->stats.packets;
8927                         bytes   = ring->stats.bytes;
8928                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8929                 stats->tx_packets += packets;
8930                 stats->tx_bytes   += bytes;
8931         }
8932 }
8933
8934 static void ixgbe_get_stats64(struct net_device *netdev,
8935                               struct rtnl_link_stats64 *stats)
8936 {
8937         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8938         int i;
8939
8940         rcu_read_lock();
8941         for (i = 0; i < adapter->num_rx_queues; i++) {
8942                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8943                 u64 bytes, packets;
8944                 unsigned int start;
8945
8946                 if (ring) {
8947                         do {
8948                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8949                                 packets = ring->stats.packets;
8950                                 bytes   = ring->stats.bytes;
8951                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8952                         stats->rx_packets += packets;
8953                         stats->rx_bytes   += bytes;
8954                 }
8955         }
8956
8957         for (i = 0; i < adapter->num_tx_queues; i++) {
8958                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8959
8960                 ixgbe_get_ring_stats64(stats, ring);
8961         }
8962         for (i = 0; i < adapter->num_xdp_queues; i++) {
8963                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8964
8965                 ixgbe_get_ring_stats64(stats, ring);
8966         }
8967         rcu_read_unlock();
8968
8969         /* following stats updated by ixgbe_watchdog_task() */
8970         stats->multicast        = netdev->stats.multicast;
8971         stats->rx_errors        = netdev->stats.rx_errors;
8972         stats->rx_length_errors = netdev->stats.rx_length_errors;
8973         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8974         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8975 }
8976
8977 #ifdef CONFIG_IXGBE_DCB
8978 /**
8979  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8980  * @adapter: pointer to ixgbe_adapter
8981  * @tc: number of traffic classes currently enabled
8982  *
8983  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8984  * 802.1Q priority maps to a packet buffer that exists.
8985  */
8986 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8987 {
8988         struct ixgbe_hw *hw = &adapter->hw;
8989         u32 reg, rsave;
8990         int i;
8991
8992         /* 82598 have a static priority to TC mapping that can not
8993          * be changed so no validation is needed.
8994          */
8995         if (hw->mac.type == ixgbe_mac_82598EB)
8996                 return;
8997
8998         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8999         rsave = reg;
9000
9001         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
9002                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
9003
9004                 /* If up2tc is out of bounds default to zero */
9005                 if (up2tc > tc)
9006                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
9007         }
9008
9009         if (reg != rsave)
9010                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
9011
9012         return;
9013 }
9014
9015 /**
9016  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
9017  * @adapter: Pointer to adapter struct
9018  *
9019  * Populate the netdev user priority to tc map
9020  */
9021 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9022 {
9023         struct net_device *dev = adapter->netdev;
9024         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9025         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9026         u8 prio;
9027
9028         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9029                 u8 tc = 0;
9030
9031                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9032                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9033                 else if (ets)
9034                         tc = ets->prio_tc[prio];
9035
9036                 netdev_set_prio_tc_map(dev, prio, tc);
9037         }
9038 }
9039
9040 #endif /* CONFIG_IXGBE_DCB */
9041 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9042 {
9043         struct ixgbe_adapter *adapter = data;
9044         struct ixgbe_fwd_adapter *accel;
9045         int pool;
9046
9047         /* we only care about macvlans... */
9048         if (!netif_is_macvlan(vdev))
9049                 return 0;
9050
9051         /* that have hardware offload enabled... */
9052         accel = macvlan_accel_priv(vdev);
9053         if (!accel)
9054                 return 0;
9055
9056         /* If we can relocate to a different bit do so */
9057         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9058         if (pool < adapter->num_rx_pools) {
9059                 set_bit(pool, adapter->fwd_bitmask);
9060                 accel->pool = pool;
9061                 return 0;
9062         }
9063
9064         /* if we cannot find a free pool then disable the offload */
9065         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9066         macvlan_release_l2fw_offload(vdev);
9067
9068         /* unbind the queues and drop the subordinate channel config */
9069         netdev_unbind_sb_channel(adapter->netdev, vdev);
9070         netdev_set_sb_channel(vdev, 0);
9071
9072         kfree(accel);
9073
9074         return 0;
9075 }
9076
9077 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9078 {
9079         struct ixgbe_adapter *adapter = netdev_priv(dev);
9080
9081         /* flush any stale bits out of the fwd bitmask */
9082         bitmap_clear(adapter->fwd_bitmask, 1, 63);
9083
9084         /* walk through upper devices reassigning pools */
9085         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9086                                       adapter);
9087 }
9088
9089 /**
9090  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9091  *
9092  * @dev: net device to configure
9093  * @tc: number of traffic classes to enable
9094  */
9095 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9096 {
9097         struct ixgbe_adapter *adapter = netdev_priv(dev);
9098         struct ixgbe_hw *hw = &adapter->hw;
9099
9100         /* Hardware supports up to 8 traffic classes */
9101         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9102                 return -EINVAL;
9103
9104         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9105                 return -EINVAL;
9106
9107         /* Hardware has to reinitialize queues and interrupts to
9108          * match packet buffer alignment. Unfortunately, the
9109          * hardware is not flexible enough to do this dynamically.
9110          */
9111         if (netif_running(dev))
9112                 ixgbe_close(dev);
9113         else
9114                 ixgbe_reset(adapter);
9115
9116         ixgbe_clear_interrupt_scheme(adapter);
9117
9118 #ifdef CONFIG_IXGBE_DCB
9119         if (tc) {
9120                 if (adapter->xdp_prog) {
9121                         e_warn(probe, "DCB is not supported with XDP\n");
9122
9123                         ixgbe_init_interrupt_scheme(adapter);
9124                         if (netif_running(dev))
9125                                 ixgbe_open(dev);
9126                         return -EINVAL;
9127                 }
9128
9129                 netdev_set_num_tc(dev, tc);
9130                 ixgbe_set_prio_tc_map(adapter);
9131
9132                 adapter->hw_tcs = tc;
9133                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9134
9135                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9136                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9137                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9138                 }
9139         } else {
9140                 netdev_reset_tc(dev);
9141
9142                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9143                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9144
9145                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9146                 adapter->hw_tcs = tc;
9147
9148                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9149                 adapter->dcb_cfg.pfc_mode_enable = false;
9150         }
9151
9152         ixgbe_validate_rtr(adapter, tc);
9153
9154 #endif /* CONFIG_IXGBE_DCB */
9155         ixgbe_init_interrupt_scheme(adapter);
9156
9157         ixgbe_defrag_macvlan_pools(dev);
9158
9159         if (netif_running(dev))
9160                 return ixgbe_open(dev);
9161
9162         return 0;
9163 }
9164
9165 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9166                                struct tc_cls_u32_offload *cls)
9167 {
9168         u32 hdl = cls->knode.handle;
9169         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9170         u32 loc = cls->knode.handle & 0xfffff;
9171         int err = 0, i, j;
9172         struct ixgbe_jump_table *jump = NULL;
9173
9174         if (loc > IXGBE_MAX_HW_ENTRIES)
9175                 return -EINVAL;
9176
9177         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9178                 return -EINVAL;
9179
9180         /* Clear this filter in the link data it is associated with */
9181         if (uhtid != 0x800) {
9182                 jump = adapter->jump_tables[uhtid];
9183                 if (!jump)
9184                         return -EINVAL;
9185                 if (!test_bit(loc - 1, jump->child_loc_map))
9186                         return -EINVAL;
9187                 clear_bit(loc - 1, jump->child_loc_map);
9188         }
9189
9190         /* Check if the filter being deleted is a link */
9191         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9192                 jump = adapter->jump_tables[i];
9193                 if (jump && jump->link_hdl == hdl) {
9194                         /* Delete filters in the hardware in the child hash
9195                          * table associated with this link
9196                          */
9197                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9198                                 if (!test_bit(j, jump->child_loc_map))
9199                                         continue;
9200                                 spin_lock(&adapter->fdir_perfect_lock);
9201                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9202                                                                       NULL,
9203                                                                       j + 1);
9204                                 spin_unlock(&adapter->fdir_perfect_lock);
9205                                 clear_bit(j, jump->child_loc_map);
9206                         }
9207                         /* Remove resources for this link */
9208                         kfree(jump->input);
9209                         kfree(jump->mask);
9210                         kfree(jump);
9211                         adapter->jump_tables[i] = NULL;
9212                         return err;
9213                 }
9214         }
9215
9216         spin_lock(&adapter->fdir_perfect_lock);
9217         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9218         spin_unlock(&adapter->fdir_perfect_lock);
9219         return err;
9220 }
9221
9222 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9223                                             struct tc_cls_u32_offload *cls)
9224 {
9225         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9226
9227         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9228                 return -EINVAL;
9229
9230         /* This ixgbe devices do not support hash tables at the moment
9231          * so abort when given hash tables.
9232          */
9233         if (cls->hnode.divisor > 0)
9234                 return -EINVAL;
9235
9236         set_bit(uhtid - 1, &adapter->tables);
9237         return 0;
9238 }
9239
9240 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9241                                             struct tc_cls_u32_offload *cls)
9242 {
9243         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9244
9245         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9246                 return -EINVAL;
9247
9248         clear_bit(uhtid - 1, &adapter->tables);
9249         return 0;
9250 }
9251
9252 #ifdef CONFIG_NET_CLS_ACT
9253 struct upper_walk_data {
9254         struct ixgbe_adapter *adapter;
9255         u64 action;
9256         int ifindex;
9257         u8 queue;
9258 };
9259
9260 static int get_macvlan_queue(struct net_device *upper, void *_data)
9261 {
9262         if (netif_is_macvlan(upper)) {
9263                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9264                 struct upper_walk_data *data = _data;
9265                 struct ixgbe_adapter *adapter = data->adapter;
9266                 int ifindex = data->ifindex;
9267
9268                 if (vadapter && upper->ifindex == ifindex) {
9269                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9270                         data->action = data->queue;
9271                         return 1;
9272                 }
9273         }
9274
9275         return 0;
9276 }
9277
9278 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9279                                   u8 *queue, u64 *action)
9280 {
9281         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9282         unsigned int num_vfs = adapter->num_vfs, vf;
9283         struct upper_walk_data data;
9284         struct net_device *upper;
9285
9286         /* redirect to a SRIOV VF */
9287         for (vf = 0; vf < num_vfs; ++vf) {
9288                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9289                 if (upper->ifindex == ifindex) {
9290                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9291                         *action = vf + 1;
9292                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9293                         return 0;
9294                 }
9295         }
9296
9297         /* redirect to a offloaded macvlan netdev */
9298         data.adapter = adapter;
9299         data.ifindex = ifindex;
9300         data.action = 0;
9301         data.queue = 0;
9302         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9303                                           get_macvlan_queue, &data)) {
9304                 *action = data.action;
9305                 *queue = data.queue;
9306
9307                 return 0;
9308         }
9309
9310         return -EINVAL;
9311 }
9312
9313 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9314                             struct tcf_exts *exts, u64 *action, u8 *queue)
9315 {
9316         const struct tc_action *a;
9317         int i;
9318
9319         if (!tcf_exts_has_actions(exts))
9320                 return -EINVAL;
9321
9322         tcf_exts_for_each_action(i, a, exts) {
9323                 /* Drop action */
9324                 if (is_tcf_gact_shot(a)) {
9325                         *action = IXGBE_FDIR_DROP_QUEUE;
9326                         *queue = IXGBE_FDIR_DROP_QUEUE;
9327                         return 0;
9328                 }
9329
9330                 /* Redirect to a VF or a offloaded macvlan */
9331                 if (is_tcf_mirred_egress_redirect(a)) {
9332                         struct net_device *dev = tcf_mirred_dev(a);
9333
9334                         if (!dev)
9335                                 return -EINVAL;
9336                         return handle_redirect_action(adapter, dev->ifindex,
9337                                                       queue, action);
9338                 }
9339
9340                 return -EINVAL;
9341         }
9342
9343         return -EINVAL;
9344 }
9345 #else
9346 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9347                             struct tcf_exts *exts, u64 *action, u8 *queue)
9348 {
9349         return -EINVAL;
9350 }
9351 #endif /* CONFIG_NET_CLS_ACT */
9352
9353 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9354                                     union ixgbe_atr_input *mask,
9355                                     struct tc_cls_u32_offload *cls,
9356                                     struct ixgbe_mat_field *field_ptr,
9357                                     struct ixgbe_nexthdr *nexthdr)
9358 {
9359         int i, j, off;
9360         __be32 val, m;
9361         bool found_entry = false, found_jump_field = false;
9362
9363         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9364                 off = cls->knode.sel->keys[i].off;
9365                 val = cls->knode.sel->keys[i].val;
9366                 m = cls->knode.sel->keys[i].mask;
9367
9368                 for (j = 0; field_ptr[j].val; j++) {
9369                         if (field_ptr[j].off == off) {
9370                                 field_ptr[j].val(input, mask, (__force u32)val,
9371                                                  (__force u32)m);
9372                                 input->filter.formatted.flow_type |=
9373                                         field_ptr[j].type;
9374                                 found_entry = true;
9375                                 break;
9376                         }
9377                 }
9378                 if (nexthdr) {
9379                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9380                             nexthdr->val ==
9381                             (__force u32)cls->knode.sel->keys[i].val &&
9382                             nexthdr->mask ==
9383                             (__force u32)cls->knode.sel->keys[i].mask)
9384                                 found_jump_field = true;
9385                         else
9386                                 continue;
9387                 }
9388         }
9389
9390         if (nexthdr && !found_jump_field)
9391                 return -EINVAL;
9392
9393         if (!found_entry)
9394                 return 0;
9395
9396         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9397                                     IXGBE_ATR_L4TYPE_MASK;
9398
9399         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9400                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9401
9402         return 0;
9403 }
9404
9405 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9406                                   struct tc_cls_u32_offload *cls)
9407 {
9408         __be16 protocol = cls->common.protocol;
9409         u32 loc = cls->knode.handle & 0xfffff;
9410         struct ixgbe_hw *hw = &adapter->hw;
9411         struct ixgbe_mat_field *field_ptr;
9412         struct ixgbe_fdir_filter *input = NULL;
9413         union ixgbe_atr_input *mask = NULL;
9414         struct ixgbe_jump_table *jump = NULL;
9415         int i, err = -EINVAL;
9416         u8 queue;
9417         u32 uhtid, link_uhtid;
9418
9419         uhtid = TC_U32_USERHTID(cls->knode.handle);
9420         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9421
9422         /* At the moment cls_u32 jumps to network layer and skips past
9423          * L2 headers. The canonical method to match L2 frames is to use
9424          * negative values. However this is error prone at best but really
9425          * just broken because there is no way to "know" what sort of hdr
9426          * is in front of the network layer. Fix cls_u32 to support L2
9427          * headers when needed.
9428          */
9429         if (protocol != htons(ETH_P_IP))
9430                 return err;
9431
9432         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9433                 e_err(drv, "Location out of range\n");
9434                 return err;
9435         }
9436
9437         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9438          * links and also the fields used to advance the parser across each
9439          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9440          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9441          * To add support for new nodes update ixgbe_model.h parse structures
9442          * this function _should_ be generic try not to hardcode values here.
9443          */
9444         if (uhtid == 0x800) {
9445                 field_ptr = (adapter->jump_tables[0])->mat;
9446         } else {
9447                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9448                         return err;
9449                 if (!adapter->jump_tables[uhtid])
9450                         return err;
9451                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9452         }
9453
9454         if (!field_ptr)
9455                 return err;
9456
9457         /* At this point we know the field_ptr is valid and need to either
9458          * build cls_u32 link or attach filter. Because adding a link to
9459          * a handle that does not exist is invalid and the same for adding
9460          * rules to handles that don't exist.
9461          */
9462
9463         if (link_uhtid) {
9464                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9465
9466                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9467                         return err;
9468
9469                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9470                         return err;
9471
9472                 /* Multiple filters as links to the same hash table are not
9473                  * supported. To add a new filter with the same next header
9474                  * but different match/jump conditions, create a new hash table
9475                  * and link to it.
9476                  */
9477                 if (adapter->jump_tables[link_uhtid] &&
9478                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9479                         e_err(drv, "Link filter exists for link: %x\n",
9480                               link_uhtid);
9481                         return err;
9482                 }
9483
9484                 for (i = 0; nexthdr[i].jump; i++) {
9485                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9486                             nexthdr[i].s != cls->knode.sel->offshift ||
9487                             nexthdr[i].m !=
9488                             (__force u32)cls->knode.sel->offmask)
9489                                 return err;
9490
9491                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9492                         if (!jump)
9493                                 return -ENOMEM;
9494                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9495                         if (!input) {
9496                                 err = -ENOMEM;
9497                                 goto free_jump;
9498                         }
9499                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9500                         if (!mask) {
9501                                 err = -ENOMEM;
9502                                 goto free_input;
9503                         }
9504                         jump->input = input;
9505                         jump->mask = mask;
9506                         jump->link_hdl = cls->knode.handle;
9507
9508                         err = ixgbe_clsu32_build_input(input, mask, cls,
9509                                                        field_ptr, &nexthdr[i]);
9510                         if (!err) {
9511                                 jump->mat = nexthdr[i].jump;
9512                                 adapter->jump_tables[link_uhtid] = jump;
9513                                 break;
9514                         } else {
9515                                 kfree(mask);
9516                                 kfree(input);
9517                                 kfree(jump);
9518                         }
9519                 }
9520                 return 0;
9521         }
9522
9523         input = kzalloc(sizeof(*input), GFP_KERNEL);
9524         if (!input)
9525                 return -ENOMEM;
9526         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9527         if (!mask) {
9528                 err = -ENOMEM;
9529                 goto free_input;
9530         }
9531
9532         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9533                 if ((adapter->jump_tables[uhtid])->input)
9534                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9535                                sizeof(*input));
9536                 if ((adapter->jump_tables[uhtid])->mask)
9537                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9538                                sizeof(*mask));
9539
9540                 /* Lookup in all child hash tables if this location is already
9541                  * filled with a filter
9542                  */
9543                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9544                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9545
9546                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9547                                 e_err(drv, "Filter exists in location: %x\n",
9548                                       loc);
9549                                 err = -EINVAL;
9550                                 goto err_out;
9551                         }
9552                 }
9553         }
9554         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9555         if (err)
9556                 goto err_out;
9557
9558         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9559                                &queue);
9560         if (err < 0)
9561                 goto err_out;
9562
9563         input->sw_idx = loc;
9564
9565         spin_lock(&adapter->fdir_perfect_lock);
9566
9567         if (hlist_empty(&adapter->fdir_filter_list)) {
9568                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9569                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9570                 if (err)
9571                         goto err_out_w_lock;
9572         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9573                 err = -EINVAL;
9574                 goto err_out_w_lock;
9575         }
9576
9577         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9578         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9579                                                     input->sw_idx, queue);
9580         if (!err)
9581                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9582         spin_unlock(&adapter->fdir_perfect_lock);
9583
9584         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9585                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9586
9587         kfree(mask);
9588         return err;
9589 err_out_w_lock:
9590         spin_unlock(&adapter->fdir_perfect_lock);
9591 err_out:
9592         kfree(mask);
9593 free_input:
9594         kfree(input);
9595 free_jump:
9596         kfree(jump);
9597         return err;
9598 }
9599
9600 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9601                                   struct tc_cls_u32_offload *cls_u32)
9602 {
9603         switch (cls_u32->command) {
9604         case TC_CLSU32_NEW_KNODE:
9605         case TC_CLSU32_REPLACE_KNODE:
9606                 return ixgbe_configure_clsu32(adapter, cls_u32);
9607         case TC_CLSU32_DELETE_KNODE:
9608                 return ixgbe_delete_clsu32(adapter, cls_u32);
9609         case TC_CLSU32_NEW_HNODE:
9610         case TC_CLSU32_REPLACE_HNODE:
9611                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9612         case TC_CLSU32_DELETE_HNODE:
9613                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9614         default:
9615                 return -EOPNOTSUPP;
9616         }
9617 }
9618
9619 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9620                                    void *cb_priv)
9621 {
9622         struct ixgbe_adapter *adapter = cb_priv;
9623
9624         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9625                 return -EOPNOTSUPP;
9626
9627         switch (type) {
9628         case TC_SETUP_CLSU32:
9629                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9630         default:
9631                 return -EOPNOTSUPP;
9632         }
9633 }
9634
9635 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9636                                  struct tc_mqprio_qopt *mqprio)
9637 {
9638         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9639         return ixgbe_setup_tc(dev, mqprio->num_tc);
9640 }
9641
9642 static LIST_HEAD(ixgbe_block_cb_list);
9643
9644 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9645                             void *type_data)
9646 {
9647         struct ixgbe_adapter *adapter = netdev_priv(dev);
9648
9649         switch (type) {
9650         case TC_SETUP_BLOCK:
9651                 return flow_block_cb_setup_simple(type_data,
9652                                                   &ixgbe_block_cb_list,
9653                                                   ixgbe_setup_tc_block_cb,
9654                                                   adapter, adapter, true);
9655         case TC_SETUP_QDISC_MQPRIO:
9656                 return ixgbe_setup_tc_mqprio(dev, type_data);
9657         default:
9658                 return -EOPNOTSUPP;
9659         }
9660 }
9661
9662 #ifdef CONFIG_PCI_IOV
9663 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9664 {
9665         struct net_device *netdev = adapter->netdev;
9666
9667         rtnl_lock();
9668         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9669         rtnl_unlock();
9670 }
9671
9672 #endif
9673 void ixgbe_do_reset(struct net_device *netdev)
9674 {
9675         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9676
9677         if (netif_running(netdev))
9678                 ixgbe_reinit_locked(adapter);
9679         else
9680                 ixgbe_reset(adapter);
9681 }
9682
9683 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9684                                             netdev_features_t features)
9685 {
9686         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9687
9688         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9689         if (!(features & NETIF_F_RXCSUM))
9690                 features &= ~NETIF_F_LRO;
9691
9692         /* Turn off LRO if not RSC capable */
9693         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9694                 features &= ~NETIF_F_LRO;
9695
9696         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9697                 e_dev_err("LRO is not supported with XDP\n");
9698                 features &= ~NETIF_F_LRO;
9699         }
9700
9701         return features;
9702 }
9703
9704 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9705 {
9706         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9707                         num_online_cpus());
9708
9709         /* go back to full RSS if we're not running SR-IOV */
9710         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9711                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9712                                     IXGBE_FLAG_SRIOV_ENABLED);
9713
9714         adapter->ring_feature[RING_F_RSS].limit = rss;
9715         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9716
9717         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9718 }
9719
9720 static int ixgbe_set_features(struct net_device *netdev,
9721                               netdev_features_t features)
9722 {
9723         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9724         netdev_features_t changed = netdev->features ^ features;
9725         bool need_reset = false;
9726
9727         /* Make sure RSC matches LRO, reset if change */
9728         if (!(features & NETIF_F_LRO)) {
9729                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9730                         need_reset = true;
9731                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9732         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9733                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9734                 if (adapter->rx_itr_setting == 1 ||
9735                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9736                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9737                         need_reset = true;
9738                 } else if ((changed ^ features) & NETIF_F_LRO) {
9739                         e_info(probe, "rx-usecs set too low, "
9740                                "disabling RSC\n");
9741                 }
9742         }
9743
9744         /*
9745          * Check if Flow Director n-tuple support or hw_tc support was
9746          * enabled or disabled.  If the state changed, we need to reset.
9747          */
9748         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9749                 /* turn off ATR, enable perfect filters and reset */
9750                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9751                         need_reset = true;
9752
9753                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9754                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9755         } else {
9756                 /* turn off perfect filters, enable ATR and reset */
9757                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9758                         need_reset = true;
9759
9760                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9761
9762                 /* We cannot enable ATR if SR-IOV is enabled */
9763                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9764                     /* We cannot enable ATR if we have 2 or more tcs */
9765                     (adapter->hw_tcs > 1) ||
9766                     /* We cannot enable ATR if RSS is disabled */
9767                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9768                     /* A sample rate of 0 indicates ATR disabled */
9769                     (!adapter->atr_sample_rate))
9770                         ; /* do nothing not supported */
9771                 else /* otherwise supported and set the flag */
9772                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9773         }
9774
9775         if (changed & NETIF_F_RXALL)
9776                 need_reset = true;
9777
9778         netdev->features = features;
9779
9780         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9781                 if (features & NETIF_F_RXCSUM) {
9782                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9783                 } else {
9784                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9785
9786                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9787                 }
9788         }
9789
9790         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9791                 if (features & NETIF_F_RXCSUM) {
9792                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9793                 } else {
9794                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9795
9796                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9797                 }
9798         }
9799
9800         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9801                 ixgbe_reset_l2fw_offload(adapter);
9802         else if (need_reset)
9803                 ixgbe_do_reset(netdev);
9804         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9805                             NETIF_F_HW_VLAN_CTAG_FILTER))
9806                 ixgbe_set_rx_mode(netdev);
9807
9808         return 1;
9809 }
9810
9811 /**
9812  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9813  * @dev: The port's netdev
9814  * @ti: Tunnel endpoint information
9815  **/
9816 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9817                                       struct udp_tunnel_info *ti)
9818 {
9819         struct ixgbe_adapter *adapter = netdev_priv(dev);
9820         struct ixgbe_hw *hw = &adapter->hw;
9821         __be16 port = ti->port;
9822         u32 port_shift = 0;
9823         u32 reg;
9824
9825         if (ti->sa_family != AF_INET)
9826                 return;
9827
9828         switch (ti->type) {
9829         case UDP_TUNNEL_TYPE_VXLAN:
9830                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9831                         return;
9832
9833                 if (adapter->vxlan_port == port)
9834                         return;
9835
9836                 if (adapter->vxlan_port) {
9837                         netdev_info(dev,
9838                                     "VXLAN port %d set, not adding port %d\n",
9839                                     ntohs(adapter->vxlan_port),
9840                                     ntohs(port));
9841                         return;
9842                 }
9843
9844                 adapter->vxlan_port = port;
9845                 break;
9846         case UDP_TUNNEL_TYPE_GENEVE:
9847                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9848                         return;
9849
9850                 if (adapter->geneve_port == port)
9851                         return;
9852
9853                 if (adapter->geneve_port) {
9854                         netdev_info(dev,
9855                                     "GENEVE port %d set, not adding port %d\n",
9856                                     ntohs(adapter->geneve_port),
9857                                     ntohs(port));
9858                         return;
9859                 }
9860
9861                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9862                 adapter->geneve_port = port;
9863                 break;
9864         default:
9865                 return;
9866         }
9867
9868         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9869         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9870 }
9871
9872 /**
9873  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9874  * @dev: The port's netdev
9875  * @ti: Tunnel endpoint information
9876  **/
9877 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9878                                       struct udp_tunnel_info *ti)
9879 {
9880         struct ixgbe_adapter *adapter = netdev_priv(dev);
9881         u32 port_mask;
9882
9883         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9884             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9885                 return;
9886
9887         if (ti->sa_family != AF_INET)
9888                 return;
9889
9890         switch (ti->type) {
9891         case UDP_TUNNEL_TYPE_VXLAN:
9892                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9893                         return;
9894
9895                 if (adapter->vxlan_port != ti->port) {
9896                         netdev_info(dev, "VXLAN port %d not found\n",
9897                                     ntohs(ti->port));
9898                         return;
9899                 }
9900
9901                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9902                 break;
9903         case UDP_TUNNEL_TYPE_GENEVE:
9904                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9905                         return;
9906
9907                 if (adapter->geneve_port != ti->port) {
9908                         netdev_info(dev, "GENEVE port %d not found\n",
9909                                     ntohs(ti->port));
9910                         return;
9911                 }
9912
9913                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9914                 break;
9915         default:
9916                 return;
9917         }
9918
9919         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9920         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9921 }
9922
9923 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9924                              struct net_device *dev,
9925                              const unsigned char *addr, u16 vid,
9926                              u16 flags,
9927                              struct netlink_ext_ack *extack)
9928 {
9929         /* guarantee we can provide a unique filter for the unicast address */
9930         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9931                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9932                 u16 pool = VMDQ_P(0);
9933
9934                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9935                         return -ENOMEM;
9936         }
9937
9938         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9939 }
9940
9941 /**
9942  * ixgbe_configure_bridge_mode - set various bridge modes
9943  * @adapter: the private structure
9944  * @mode: requested bridge mode
9945  *
9946  * Configure some settings require for various bridge modes.
9947  **/
9948 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9949                                        __u16 mode)
9950 {
9951         struct ixgbe_hw *hw = &adapter->hw;
9952         unsigned int p, num_pools;
9953         u32 vmdctl;
9954
9955         switch (mode) {
9956         case BRIDGE_MODE_VEPA:
9957                 /* disable Tx loopback, rely on switch hairpin mode */
9958                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9959
9960                 /* must enable Rx switching replication to allow multicast
9961                  * packet reception on all VFs, and to enable source address
9962                  * pruning.
9963                  */
9964                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9965                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9966                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9967
9968                 /* enable Rx source address pruning. Note, this requires
9969                  * replication to be enabled or else it does nothing.
9970                  */
9971                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9972                 for (p = 0; p < num_pools; p++) {
9973                         if (hw->mac.ops.set_source_address_pruning)
9974                                 hw->mac.ops.set_source_address_pruning(hw,
9975                                                                        true,
9976                                                                        p);
9977                 }
9978                 break;
9979         case BRIDGE_MODE_VEB:
9980                 /* enable Tx loopback for internal VF/PF communication */
9981                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9982                                 IXGBE_PFDTXGSWC_VT_LBEN);
9983
9984                 /* disable Rx switching replication unless we have SR-IOV
9985                  * virtual functions
9986                  */
9987                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9988                 if (!adapter->num_vfs)
9989                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9990                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9991
9992                 /* disable Rx source address pruning, since we don't expect to
9993                  * be receiving external loopback of our transmitted frames.
9994                  */
9995                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9996                 for (p = 0; p < num_pools; p++) {
9997                         if (hw->mac.ops.set_source_address_pruning)
9998                                 hw->mac.ops.set_source_address_pruning(hw,
9999                                                                        false,
10000                                                                        p);
10001                 }
10002                 break;
10003         default:
10004                 return -EINVAL;
10005         }
10006
10007         adapter->bridge_mode = mode;
10008
10009         e_info(drv, "enabling bridge mode: %s\n",
10010                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10011
10012         return 0;
10013 }
10014
10015 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
10016                                     struct nlmsghdr *nlh, u16 flags,
10017                                     struct netlink_ext_ack *extack)
10018 {
10019         struct ixgbe_adapter *adapter = netdev_priv(dev);
10020         struct nlattr *attr, *br_spec;
10021         int rem;
10022
10023         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10024                 return -EOPNOTSUPP;
10025
10026         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
10027         if (!br_spec)
10028                 return -EINVAL;
10029
10030         nla_for_each_nested(attr, br_spec, rem) {
10031                 int status;
10032                 __u16 mode;
10033
10034                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
10035                         continue;
10036
10037                 if (nla_len(attr) < sizeof(mode))
10038                         return -EINVAL;
10039
10040                 mode = nla_get_u16(attr);
10041                 status = ixgbe_configure_bridge_mode(adapter, mode);
10042                 if (status)
10043                         return status;
10044
10045                 break;
10046         }
10047
10048         return 0;
10049 }
10050
10051 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
10052                                     struct net_device *dev,
10053                                     u32 filter_mask, int nlflags)
10054 {
10055         struct ixgbe_adapter *adapter = netdev_priv(dev);
10056
10057         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10058                 return 0;
10059
10060         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
10061                                        adapter->bridge_mode, 0, 0, nlflags,
10062                                        filter_mask, NULL);
10063 }
10064
10065 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
10066 {
10067         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10068         struct ixgbe_fwd_adapter *accel;
10069         int tcs = adapter->hw_tcs ? : 1;
10070         int pool, err;
10071
10072         if (adapter->xdp_prog) {
10073                 e_warn(probe, "L2FW offload is not supported with XDP\n");
10074                 return ERR_PTR(-EINVAL);
10075         }
10076
10077         /* The hardware supported by ixgbe only filters on the destination MAC
10078          * address. In order to avoid issues we only support offloading modes
10079          * where the hardware can actually provide the functionality.
10080          */
10081         if (!macvlan_supports_dest_filter(vdev))
10082                 return ERR_PTR(-EMEDIUMTYPE);
10083
10084         /* We need to lock down the macvlan to be a single queue device so that
10085          * we can reuse the tc_to_txq field in the macvlan netdev to represent
10086          * the queue mapping to our netdev.
10087          */
10088         if (netif_is_multiqueue(vdev))
10089                 return ERR_PTR(-ERANGE);
10090
10091         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
10092         if (pool == adapter->num_rx_pools) {
10093                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
10094                 u16 reserved_pools;
10095
10096                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
10097                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
10098                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
10099                         return ERR_PTR(-EBUSY);
10100
10101                 /* Hardware has a limited number of available pools. Each VF,
10102                  * and the PF require a pool. Check to ensure we don't
10103                  * attempt to use more then the available number of pools.
10104                  */
10105                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10106                         return ERR_PTR(-EBUSY);
10107
10108                 /* Enable VMDq flag so device will be set in VM mode */
10109                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10110                                   IXGBE_FLAG_SRIOV_ENABLED;
10111
10112                 /* Try to reserve as many queues per pool as possible,
10113                  * we start with the configurations that support 4 queues
10114                  * per pools, followed by 2, and then by just 1 per pool.
10115                  */
10116                 if (used_pools < 32 && adapter->num_rx_pools < 16)
10117                         reserved_pools = min_t(u16,
10118                                                32 - used_pools,
10119                                                16 - adapter->num_rx_pools);
10120                 else if (adapter->num_rx_pools < 32)
10121                         reserved_pools = min_t(u16,
10122                                                64 - used_pools,
10123                                                32 - adapter->num_rx_pools);
10124                 else
10125                         reserved_pools = 64 - used_pools;
10126
10127
10128                 if (!reserved_pools)
10129                         return ERR_PTR(-EBUSY);
10130
10131                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10132
10133                 /* Force reinit of ring allocation with VMDQ enabled */
10134                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10135                 if (err)
10136                         return ERR_PTR(err);
10137
10138                 if (pool >= adapter->num_rx_pools)
10139                         return ERR_PTR(-ENOMEM);
10140         }
10141
10142         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10143         if (!accel)
10144                 return ERR_PTR(-ENOMEM);
10145
10146         set_bit(pool, adapter->fwd_bitmask);
10147         netdev_set_sb_channel(vdev, pool);
10148         accel->pool = pool;
10149         accel->netdev = vdev;
10150
10151         if (!netif_running(pdev))
10152                 return accel;
10153
10154         err = ixgbe_fwd_ring_up(adapter, accel);
10155         if (err)
10156                 return ERR_PTR(err);
10157
10158         return accel;
10159 }
10160
10161 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10162 {
10163         struct ixgbe_fwd_adapter *accel = priv;
10164         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10165         unsigned int rxbase = accel->rx_base_queue;
10166         unsigned int i;
10167
10168         /* delete unicast filter associated with offloaded interface */
10169         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10170                              VMDQ_P(accel->pool));
10171
10172         /* Allow remaining Rx packets to get flushed out of the
10173          * Rx FIFO before we drop the netdev for the ring.
10174          */
10175         usleep_range(10000, 20000);
10176
10177         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10178                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10179                 struct ixgbe_q_vector *qv = ring->q_vector;
10180
10181                 /* Make sure we aren't processing any packets and clear
10182                  * netdev to shut down the ring.
10183                  */
10184                 if (netif_running(adapter->netdev))
10185                         napi_synchronize(&qv->napi);
10186                 ring->netdev = NULL;
10187         }
10188
10189         /* unbind the queues and drop the subordinate channel config */
10190         netdev_unbind_sb_channel(pdev, accel->netdev);
10191         netdev_set_sb_channel(accel->netdev, 0);
10192
10193         clear_bit(accel->pool, adapter->fwd_bitmask);
10194         kfree(accel);
10195 }
10196
10197 #define IXGBE_MAX_MAC_HDR_LEN           127
10198 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10199
10200 static netdev_features_t
10201 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10202                      netdev_features_t features)
10203 {
10204         unsigned int network_hdr_len, mac_hdr_len;
10205
10206         /* Make certain the headers can be described by a context descriptor */
10207         mac_hdr_len = skb_network_header(skb) - skb->data;
10208         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10209                 return features & ~(NETIF_F_HW_CSUM |
10210                                     NETIF_F_SCTP_CRC |
10211                                     NETIF_F_HW_VLAN_CTAG_TX |
10212                                     NETIF_F_TSO |
10213                                     NETIF_F_TSO6);
10214
10215         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10216         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10217                 return features & ~(NETIF_F_HW_CSUM |
10218                                     NETIF_F_SCTP_CRC |
10219                                     NETIF_F_TSO |
10220                                     NETIF_F_TSO6);
10221
10222         /* We can only support IPV4 TSO in tunnels if we can mangle the
10223          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10224          * IPsec offoad sets skb->encapsulation but still can handle
10225          * the TSO, so it's the exception.
10226          */
10227         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10228 #ifdef CONFIG_IXGBE_IPSEC
10229                 if (!secpath_exists(skb))
10230 #endif
10231                         features &= ~NETIF_F_TSO;
10232         }
10233
10234         return features;
10235 }
10236
10237 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10238 {
10239         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10240         struct ixgbe_adapter *adapter = netdev_priv(dev);
10241         struct bpf_prog *old_prog;
10242         bool need_reset;
10243
10244         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10245                 return -EINVAL;
10246
10247         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10248                 return -EINVAL;
10249
10250         /* verify ixgbe ring attributes are sufficient for XDP */
10251         for (i = 0; i < adapter->num_rx_queues; i++) {
10252                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10253
10254                 if (ring_is_rsc_enabled(ring))
10255                         return -EINVAL;
10256
10257                 if (frame_size > ixgbe_rx_bufsz(ring))
10258                         return -EINVAL;
10259         }
10260
10261         if (nr_cpu_ids > MAX_XDP_QUEUES)
10262                 return -ENOMEM;
10263
10264         old_prog = xchg(&adapter->xdp_prog, prog);
10265         need_reset = (!!prog != !!old_prog);
10266
10267         /* If transitioning XDP modes reconfigure rings */
10268         if (need_reset) {
10269                 int err;
10270
10271                 if (!prog)
10272                         /* Wait until ndo_xsk_wakeup completes. */
10273                         synchronize_rcu();
10274                 err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10275
10276                 if (err) {
10277                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10278                         return -EINVAL;
10279                 }
10280         } else {
10281                 for (i = 0; i < adapter->num_rx_queues; i++)
10282                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10283                             adapter->xdp_prog);
10284         }
10285
10286         if (old_prog)
10287                 bpf_prog_put(old_prog);
10288
10289         /* Kick start the NAPI context if there is an AF_XDP socket open
10290          * on that queue id. This so that receiving will start.
10291          */
10292         if (need_reset && prog)
10293                 for (i = 0; i < adapter->num_rx_queues; i++)
10294                         if (adapter->xdp_ring[i]->xsk_umem)
10295                                 (void)ixgbe_xsk_wakeup(adapter->netdev, i,
10296                                                        XDP_WAKEUP_RX);
10297
10298         return 0;
10299 }
10300
10301 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10302 {
10303         struct ixgbe_adapter *adapter = netdev_priv(dev);
10304
10305         switch (xdp->command) {
10306         case XDP_SETUP_PROG:
10307                 return ixgbe_xdp_setup(dev, xdp->prog);
10308         case XDP_QUERY_PROG:
10309                 xdp->prog_id = adapter->xdp_prog ?
10310                         adapter->xdp_prog->aux->id : 0;
10311                 return 0;
10312         case XDP_SETUP_XSK_UMEM:
10313                 return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem,
10314                                             xdp->xsk.queue_id);
10315
10316         default:
10317                 return -EINVAL;
10318         }
10319 }
10320
10321 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10322 {
10323         /* Force memory writes to complete before letting h/w know there
10324          * are new descriptors to fetch.
10325          */
10326         wmb();
10327         writel(ring->next_to_use, ring->tail);
10328 }
10329
10330 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10331                           struct xdp_frame **frames, u32 flags)
10332 {
10333         struct ixgbe_adapter *adapter = netdev_priv(dev);
10334         struct ixgbe_ring *ring;
10335         int drops = 0;
10336         int i;
10337
10338         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10339                 return -ENETDOWN;
10340
10341         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10342                 return -EINVAL;
10343
10344         /* During program transitions its possible adapter->xdp_prog is assigned
10345          * but ring has not been configured yet. In this case simply abort xmit.
10346          */
10347         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10348         if (unlikely(!ring))
10349                 return -ENXIO;
10350
10351         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10352                 return -ENXIO;
10353
10354         for (i = 0; i < n; i++) {
10355                 struct xdp_frame *xdpf = frames[i];
10356                 int err;
10357
10358                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10359                 if (err != IXGBE_XDP_TX) {
10360                         xdp_return_frame_rx_napi(xdpf);
10361                         drops++;
10362                 }
10363         }
10364
10365         if (unlikely(flags & XDP_XMIT_FLUSH))
10366                 ixgbe_xdp_ring_update_tail(ring);
10367
10368         return n - drops;
10369 }
10370
10371 static const struct net_device_ops ixgbe_netdev_ops = {
10372         .ndo_open               = ixgbe_open,
10373         .ndo_stop               = ixgbe_close,
10374         .ndo_start_xmit         = ixgbe_xmit_frame,
10375         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10376         .ndo_validate_addr      = eth_validate_addr,
10377         .ndo_set_mac_address    = ixgbe_set_mac,
10378         .ndo_change_mtu         = ixgbe_change_mtu,
10379         .ndo_tx_timeout         = ixgbe_tx_timeout,
10380         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10381         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10382         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10383         .ndo_do_ioctl           = ixgbe_ioctl,
10384         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10385         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10386         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10387         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10388         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10389         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10390         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10391         .ndo_get_stats64        = ixgbe_get_stats64,
10392         .ndo_setup_tc           = __ixgbe_setup_tc,
10393 #ifdef IXGBE_FCOE
10394         .ndo_select_queue       = ixgbe_select_queue,
10395         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10396         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10397         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10398         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10399         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10400         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10401         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10402 #endif /* IXGBE_FCOE */
10403         .ndo_set_features = ixgbe_set_features,
10404         .ndo_fix_features = ixgbe_fix_features,
10405         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10406         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10407         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10408         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10409         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10410         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10411         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10412         .ndo_features_check     = ixgbe_features_check,
10413         .ndo_bpf                = ixgbe_xdp,
10414         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10415         .ndo_xsk_wakeup         = ixgbe_xsk_wakeup,
10416 };
10417
10418 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10419                                  struct ixgbe_ring *tx_ring)
10420 {
10421         unsigned long wait_delay, delay_interval;
10422         struct ixgbe_hw *hw = &adapter->hw;
10423         u8 reg_idx = tx_ring->reg_idx;
10424         int wait_loop;
10425         u32 txdctl;
10426
10427         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10428
10429         /* delay mechanism from ixgbe_disable_tx */
10430         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10431
10432         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10433         wait_delay = delay_interval;
10434
10435         while (wait_loop--) {
10436                 usleep_range(wait_delay, wait_delay + 10);
10437                 wait_delay += delay_interval * 2;
10438                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10439
10440                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10441                         return;
10442         }
10443
10444         e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10445 }
10446
10447 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10448                               struct ixgbe_ring *tx_ring)
10449 {
10450         set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10451         ixgbe_disable_txr_hw(adapter, tx_ring);
10452 }
10453
10454 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10455                                  struct ixgbe_ring *rx_ring)
10456 {
10457         unsigned long wait_delay, delay_interval;
10458         struct ixgbe_hw *hw = &adapter->hw;
10459         u8 reg_idx = rx_ring->reg_idx;
10460         int wait_loop;
10461         u32 rxdctl;
10462
10463         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10464         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10465         rxdctl |= IXGBE_RXDCTL_SWFLSH;
10466
10467         /* write value back with RXDCTL.ENABLE bit cleared */
10468         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10469
10470         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10471         if (hw->mac.type == ixgbe_mac_82598EB &&
10472             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10473                 return;
10474
10475         /* delay mechanism from ixgbe_disable_rx */
10476         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10477
10478         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10479         wait_delay = delay_interval;
10480
10481         while (wait_loop--) {
10482                 usleep_range(wait_delay, wait_delay + 10);
10483                 wait_delay += delay_interval * 2;
10484                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10485
10486                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10487                         return;
10488         }
10489
10490         e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10491 }
10492
10493 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10494 {
10495         memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10496         memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10497 }
10498
10499 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10500 {
10501         memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10502         memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10503 }
10504
10505 /**
10506  * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10507  * @adapter: adapter structure
10508  * @ring: ring index
10509  *
10510  * This function disables a certain Rx/Tx/XDP Tx ring. The function
10511  * assumes that the netdev is running.
10512  **/
10513 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10514 {
10515         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10516
10517         rx_ring = adapter->rx_ring[ring];
10518         tx_ring = adapter->tx_ring[ring];
10519         xdp_ring = adapter->xdp_ring[ring];
10520
10521         ixgbe_disable_txr(adapter, tx_ring);
10522         if (xdp_ring)
10523                 ixgbe_disable_txr(adapter, xdp_ring);
10524         ixgbe_disable_rxr_hw(adapter, rx_ring);
10525
10526         if (xdp_ring)
10527                 synchronize_rcu();
10528
10529         /* Rx/Tx/XDP Tx share the same napi context. */
10530         napi_disable(&rx_ring->q_vector->napi);
10531
10532         ixgbe_clean_tx_ring(tx_ring);
10533         if (xdp_ring)
10534                 ixgbe_clean_tx_ring(xdp_ring);
10535         ixgbe_clean_rx_ring(rx_ring);
10536
10537         ixgbe_reset_txr_stats(tx_ring);
10538         if (xdp_ring)
10539                 ixgbe_reset_txr_stats(xdp_ring);
10540         ixgbe_reset_rxr_stats(rx_ring);
10541 }
10542
10543 /**
10544  * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10545  * @adapter: adapter structure
10546  * @ring: ring index
10547  *
10548  * This function enables a certain Rx/Tx/XDP Tx ring. The function
10549  * assumes that the netdev is running.
10550  **/
10551 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10552 {
10553         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10554
10555         rx_ring = adapter->rx_ring[ring];
10556         tx_ring = adapter->tx_ring[ring];
10557         xdp_ring = adapter->xdp_ring[ring];
10558
10559         /* Rx/Tx/XDP Tx share the same napi context. */
10560         napi_enable(&rx_ring->q_vector->napi);
10561
10562         ixgbe_configure_tx_ring(adapter, tx_ring);
10563         if (xdp_ring)
10564                 ixgbe_configure_tx_ring(adapter, xdp_ring);
10565         ixgbe_configure_rx_ring(adapter, rx_ring);
10566
10567         clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10568         if (xdp_ring)
10569                 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10570 }
10571
10572 /**
10573  * ixgbe_enumerate_functions - Get the number of ports this device has
10574  * @adapter: adapter structure
10575  *
10576  * This function enumerates the phsyical functions co-located on a single slot,
10577  * in order to determine how many ports a device has. This is most useful in
10578  * determining the required GT/s of PCIe bandwidth necessary for optimal
10579  * performance.
10580  **/
10581 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10582 {
10583         struct pci_dev *entry, *pdev = adapter->pdev;
10584         int physfns = 0;
10585
10586         /* Some cards can not use the generic count PCIe functions method,
10587          * because they are behind a parent switch, so we hardcode these with
10588          * the correct number of functions.
10589          */
10590         if (ixgbe_pcie_from_parent(&adapter->hw))
10591                 physfns = 4;
10592
10593         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10594                 /* don't count virtual functions */
10595                 if (entry->is_virtfn)
10596                         continue;
10597
10598                 /* When the devices on the bus don't all match our device ID,
10599                  * we can't reliably determine the correct number of
10600                  * functions. This can occur if a function has been direct
10601                  * attached to a virtual machine using VT-d, for example. In
10602                  * this case, simply return -1 to indicate this.
10603                  */
10604                 if ((entry->vendor != pdev->vendor) ||
10605                     (entry->device != pdev->device))
10606                         return -1;
10607
10608                 physfns++;
10609         }
10610
10611         return physfns;
10612 }
10613
10614 /**
10615  * ixgbe_wol_supported - Check whether device supports WoL
10616  * @adapter: the adapter private structure
10617  * @device_id: the device ID
10618  * @subdevice_id: the subsystem device ID
10619  *
10620  * This function is used by probe and ethtool to determine
10621  * which devices have WoL support
10622  *
10623  **/
10624 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10625                          u16 subdevice_id)
10626 {
10627         struct ixgbe_hw *hw = &adapter->hw;
10628         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10629
10630         /* WOL not supported on 82598 */
10631         if (hw->mac.type == ixgbe_mac_82598EB)
10632                 return false;
10633
10634         /* check eeprom to see if WOL is enabled for X540 and newer */
10635         if (hw->mac.type >= ixgbe_mac_X540) {
10636                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10637                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10638                      (hw->bus.func == 0)))
10639                         return true;
10640         }
10641
10642         /* WOL is determined based on device IDs for 82599 MACs */
10643         switch (device_id) {
10644         case IXGBE_DEV_ID_82599_SFP:
10645                 /* Only these subdevices could supports WOL */
10646                 switch (subdevice_id) {
10647                 case IXGBE_SUBDEV_ID_82599_560FLR:
10648                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10649                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10650                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10651                         /* only support first port */
10652                         if (hw->bus.func != 0)
10653                                 break;
10654                         /* fall through */
10655                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10656                 case IXGBE_SUBDEV_ID_82599_SFP:
10657                 case IXGBE_SUBDEV_ID_82599_RNDC:
10658                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10659                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10660                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10661                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10662                         return true;
10663                 }
10664                 break;
10665         case IXGBE_DEV_ID_82599EN_SFP:
10666                 /* Only these subdevices support WOL */
10667                 switch (subdevice_id) {
10668                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10669                         return true;
10670                 }
10671                 break;
10672         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10673                 /* All except this subdevice support WOL */
10674                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10675                         return true;
10676                 break;
10677         case IXGBE_DEV_ID_82599_KX4:
10678                 return  true;
10679         default:
10680                 break;
10681         }
10682
10683         return false;
10684 }
10685
10686 /**
10687  * ixgbe_set_fw_version - Set FW version
10688  * @adapter: the adapter private structure
10689  *
10690  * This function is used by probe and ethtool to determine the FW version to
10691  * format to display. The FW version is taken from the EEPROM/NVM.
10692  */
10693 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10694 {
10695         struct ixgbe_hw *hw = &adapter->hw;
10696         struct ixgbe_nvm_version nvm_ver;
10697
10698         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10699         if (nvm_ver.oem_valid) {
10700                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10701                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10702                          nvm_ver.oem_release);
10703                 return;
10704         }
10705
10706         ixgbe_get_etk_id(hw, &nvm_ver);
10707         ixgbe_get_orom_version(hw, &nvm_ver);
10708
10709         if (nvm_ver.or_valid) {
10710                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10711                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10712                          nvm_ver.or_build, nvm_ver.or_patch);
10713                 return;
10714         }
10715
10716         /* Set ETrack ID format */
10717         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10718                  "0x%08x", nvm_ver.etk_id);
10719 }
10720
10721 /**
10722  * ixgbe_probe - Device Initialization Routine
10723  * @pdev: PCI device information struct
10724  * @ent: entry in ixgbe_pci_tbl
10725  *
10726  * Returns 0 on success, negative on failure
10727  *
10728  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10729  * The OS initialization, configuring of the adapter private structure,
10730  * and a hardware reset occur.
10731  **/
10732 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10733 {
10734         struct net_device *netdev;
10735         struct ixgbe_adapter *adapter = NULL;
10736         struct ixgbe_hw *hw;
10737         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10738         int i, err, pci_using_dac, expected_gts;
10739         unsigned int indices = MAX_TX_QUEUES;
10740         u8 part_str[IXGBE_PBANUM_LENGTH];
10741         bool disable_dev = false;
10742 #ifdef IXGBE_FCOE
10743         u16 device_caps;
10744 #endif
10745         u32 eec;
10746
10747         /* Catch broken hardware that put the wrong VF device ID in
10748          * the PCIe SR-IOV capability.
10749          */
10750         if (pdev->is_virtfn) {
10751                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10752                      pci_name(pdev), pdev->vendor, pdev->device);
10753                 return -EINVAL;
10754         }
10755
10756         err = pci_enable_device_mem(pdev);
10757         if (err)
10758                 return err;
10759
10760         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10761                 pci_using_dac = 1;
10762         } else {
10763                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10764                 if (err) {
10765                         dev_err(&pdev->dev,
10766                                 "No usable DMA configuration, aborting\n");
10767                         goto err_dma;
10768                 }
10769                 pci_using_dac = 0;
10770         }
10771
10772         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10773         if (err) {
10774                 dev_err(&pdev->dev,
10775                         "pci_request_selected_regions failed 0x%x\n", err);
10776                 goto err_pci_reg;
10777         }
10778
10779         pci_enable_pcie_error_reporting(pdev);
10780
10781         pci_set_master(pdev);
10782         pci_save_state(pdev);
10783
10784         if (ii->mac == ixgbe_mac_82598EB) {
10785 #ifdef CONFIG_IXGBE_DCB
10786                 /* 8 TC w/ 4 queues per TC */
10787                 indices = 4 * MAX_TRAFFIC_CLASS;
10788 #else
10789                 indices = IXGBE_MAX_RSS_INDICES;
10790 #endif
10791         }
10792
10793         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10794         if (!netdev) {
10795                 err = -ENOMEM;
10796                 goto err_alloc_etherdev;
10797         }
10798
10799         SET_NETDEV_DEV(netdev, &pdev->dev);
10800
10801         adapter = netdev_priv(netdev);
10802
10803         adapter->netdev = netdev;
10804         adapter->pdev = pdev;
10805         hw = &adapter->hw;
10806         hw->back = adapter;
10807         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10808
10809         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10810                               pci_resource_len(pdev, 0));
10811         adapter->io_addr = hw->hw_addr;
10812         if (!hw->hw_addr) {
10813                 err = -EIO;
10814                 goto err_ioremap;
10815         }
10816
10817         netdev->netdev_ops = &ixgbe_netdev_ops;
10818         ixgbe_set_ethtool_ops(netdev);
10819         netdev->watchdog_timeo = 5 * HZ;
10820         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10821
10822         /* Setup hw api */
10823         hw->mac.ops   = *ii->mac_ops;
10824         hw->mac.type  = ii->mac;
10825         hw->mvals     = ii->mvals;
10826         if (ii->link_ops)
10827                 hw->link.ops  = *ii->link_ops;
10828
10829         /* EEPROM */
10830         hw->eeprom.ops = *ii->eeprom_ops;
10831         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10832         if (ixgbe_removed(hw->hw_addr)) {
10833                 err = -EIO;
10834                 goto err_ioremap;
10835         }
10836         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10837         if (!(eec & BIT(8)))
10838                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10839
10840         /* PHY */
10841         hw->phy.ops = *ii->phy_ops;
10842         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10843         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10844         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10845         hw->phy.mdio.mmds = 0;
10846         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10847         hw->phy.mdio.dev = netdev;
10848         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10849         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10850
10851         /* setup the private structure */
10852         err = ixgbe_sw_init(adapter, ii);
10853         if (err)
10854                 goto err_sw_init;
10855
10856         /* Make sure the SWFW semaphore is in a valid state */
10857         if (hw->mac.ops.init_swfw_sync)
10858                 hw->mac.ops.init_swfw_sync(hw);
10859
10860         /* Make it possible the adapter to be woken up via WOL */
10861         switch (adapter->hw.mac.type) {
10862         case ixgbe_mac_82599EB:
10863         case ixgbe_mac_X540:
10864         case ixgbe_mac_X550:
10865         case ixgbe_mac_X550EM_x:
10866         case ixgbe_mac_x550em_a:
10867                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10868                 break;
10869         default:
10870                 break;
10871         }
10872
10873         /*
10874          * If there is a fan on this device and it has failed log the
10875          * failure.
10876          */
10877         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10878                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10879                 if (esdp & IXGBE_ESDP_SDP1)
10880                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10881         }
10882
10883         if (allow_unsupported_sfp)
10884                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10885
10886         /* reset_hw fills in the perm_addr as well */
10887         hw->phy.reset_if_overtemp = true;
10888         err = hw->mac.ops.reset_hw(hw);
10889         hw->phy.reset_if_overtemp = false;
10890         ixgbe_set_eee_capable(adapter);
10891         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10892                 err = 0;
10893         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10894                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10895                 e_dev_err("Reload the driver after installing a supported module.\n");
10896                 goto err_sw_init;
10897         } else if (err) {
10898                 e_dev_err("HW Init failed: %d\n", err);
10899                 goto err_sw_init;
10900         }
10901
10902 #ifdef CONFIG_PCI_IOV
10903         /* SR-IOV not supported on the 82598 */
10904         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10905                 goto skip_sriov;
10906         /* Mailbox */
10907         ixgbe_init_mbx_params_pf(hw);
10908         hw->mbx.ops = ii->mbx_ops;
10909         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10910         ixgbe_enable_sriov(adapter, max_vfs);
10911 skip_sriov:
10912
10913 #endif
10914         netdev->features = NETIF_F_SG |
10915                            NETIF_F_TSO |
10916                            NETIF_F_TSO6 |
10917                            NETIF_F_RXHASH |
10918                            NETIF_F_RXCSUM |
10919                            NETIF_F_HW_CSUM;
10920
10921 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10922                                     NETIF_F_GSO_GRE_CSUM | \
10923                                     NETIF_F_GSO_IPXIP4 | \
10924                                     NETIF_F_GSO_IPXIP6 | \
10925                                     NETIF_F_GSO_UDP_TUNNEL | \
10926                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10927
10928         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10929         netdev->features |= NETIF_F_GSO_PARTIAL |
10930                             IXGBE_GSO_PARTIAL_FEATURES;
10931
10932         if (hw->mac.type >= ixgbe_mac_82599EB)
10933                 netdev->features |= NETIF_F_SCTP_CRC;
10934
10935 #ifdef CONFIG_IXGBE_IPSEC
10936 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10937                                  NETIF_F_HW_ESP_TX_CSUM | \
10938                                  NETIF_F_GSO_ESP)
10939
10940         if (adapter->ipsec)
10941                 netdev->features |= IXGBE_ESP_FEATURES;
10942 #endif
10943         /* copy netdev features into list of user selectable features */
10944         netdev->hw_features |= netdev->features |
10945                                NETIF_F_HW_VLAN_CTAG_FILTER |
10946                                NETIF_F_HW_VLAN_CTAG_RX |
10947                                NETIF_F_HW_VLAN_CTAG_TX |
10948                                NETIF_F_RXALL |
10949                                NETIF_F_HW_L2FW_DOFFLOAD;
10950
10951         if (hw->mac.type >= ixgbe_mac_82599EB)
10952                 netdev->hw_features |= NETIF_F_NTUPLE |
10953                                        NETIF_F_HW_TC;
10954
10955         if (pci_using_dac)
10956                 netdev->features |= NETIF_F_HIGHDMA;
10957
10958         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10959         netdev->hw_enc_features |= netdev->vlan_features;
10960         netdev->mpls_features |= NETIF_F_SG |
10961                                  NETIF_F_TSO |
10962                                  NETIF_F_TSO6 |
10963                                  NETIF_F_HW_CSUM;
10964         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10965
10966         /* set this bit last since it cannot be part of vlan_features */
10967         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10968                             NETIF_F_HW_VLAN_CTAG_RX |
10969                             NETIF_F_HW_VLAN_CTAG_TX;
10970
10971         netdev->priv_flags |= IFF_UNICAST_FLT;
10972         netdev->priv_flags |= IFF_SUPP_NOFCS;
10973
10974         /* MTU range: 68 - 9710 */
10975         netdev->min_mtu = ETH_MIN_MTU;
10976         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10977
10978 #ifdef CONFIG_IXGBE_DCB
10979         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10980                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10981 #endif
10982
10983 #ifdef IXGBE_FCOE
10984         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10985                 unsigned int fcoe_l;
10986
10987                 if (hw->mac.ops.get_device_caps) {
10988                         hw->mac.ops.get_device_caps(hw, &device_caps);
10989                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10990                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10991                 }
10992
10993
10994                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10995                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10996
10997                 netdev->features |= NETIF_F_FSO |
10998                                     NETIF_F_FCOE_CRC;
10999
11000                 netdev->vlan_features |= NETIF_F_FSO |
11001                                          NETIF_F_FCOE_CRC |
11002                                          NETIF_F_FCOE_MTU;
11003         }
11004 #endif /* IXGBE_FCOE */
11005         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
11006                 netdev->hw_features |= NETIF_F_LRO;
11007         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
11008                 netdev->features |= NETIF_F_LRO;
11009
11010         if (ixgbe_check_fw_error(adapter)) {
11011                 err = -EIO;
11012                 goto err_sw_init;
11013         }
11014
11015         /* make sure the EEPROM is good */
11016         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
11017                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
11018                 err = -EIO;
11019                 goto err_sw_init;
11020         }
11021
11022         eth_platform_get_mac_address(&adapter->pdev->dev,
11023                                      adapter->hw.mac.perm_addr);
11024
11025         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
11026
11027         if (!is_valid_ether_addr(netdev->dev_addr)) {
11028                 e_dev_err("invalid MAC address\n");
11029                 err = -EIO;
11030                 goto err_sw_init;
11031         }
11032
11033         /* Set hw->mac.addr to permanent MAC address */
11034         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
11035         ixgbe_mac_set_default_filter(adapter);
11036
11037         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
11038
11039         if (ixgbe_removed(hw->hw_addr)) {
11040                 err = -EIO;
11041                 goto err_sw_init;
11042         }
11043         INIT_WORK(&adapter->service_task, ixgbe_service_task);
11044         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
11045         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
11046
11047         err = ixgbe_init_interrupt_scheme(adapter);
11048         if (err)
11049                 goto err_sw_init;
11050
11051         for (i = 0; i < adapter->num_rx_queues; i++)
11052                 u64_stats_init(&adapter->rx_ring[i]->syncp);
11053         for (i = 0; i < adapter->num_tx_queues; i++)
11054                 u64_stats_init(&adapter->tx_ring[i]->syncp);
11055         for (i = 0; i < adapter->num_xdp_queues; i++)
11056                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
11057
11058         /* WOL not supported for all devices */
11059         adapter->wol = 0;
11060         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
11061         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
11062                                                 pdev->subsystem_device);
11063         if (hw->wol_enabled)
11064                 adapter->wol = IXGBE_WUFC_MAG;
11065
11066         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
11067
11068         /* save off EEPROM version number */
11069         ixgbe_set_fw_version(adapter);
11070
11071         /* pick up the PCI bus settings for reporting later */
11072         if (ixgbe_pcie_from_parent(hw))
11073                 ixgbe_get_parent_bus_info(adapter);
11074         else
11075                  hw->mac.ops.get_bus_info(hw);
11076
11077         /* calculate the expected PCIe bandwidth required for optimal
11078          * performance. Note that some older parts will never have enough
11079          * bandwidth due to being older generation PCIe parts. We clamp these
11080          * parts to ensure no warning is displayed if it can't be fixed.
11081          */
11082         switch (hw->mac.type) {
11083         case ixgbe_mac_82598EB:
11084                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
11085                 break;
11086         default:
11087                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
11088                 break;
11089         }
11090
11091         /* don't check link if we failed to enumerate functions */
11092         if (expected_gts > 0)
11093                 ixgbe_check_minimum_link(adapter, expected_gts);
11094
11095         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
11096         if (err)
11097                 strlcpy(part_str, "Unknown", sizeof(part_str));
11098         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
11099                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
11100                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
11101                            part_str);
11102         else
11103                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
11104                            hw->mac.type, hw->phy.type, part_str);
11105
11106         e_dev_info("%pM\n", netdev->dev_addr);
11107
11108         /* reset the hardware with the new settings */
11109         err = hw->mac.ops.start_hw(hw);
11110         if (err == IXGBE_ERR_EEPROM_VERSION) {
11111                 /* We are running on a pre-production device, log a warning */
11112                 e_dev_warn("This device is a pre-production adapter/LOM. "
11113                            "Please be aware there may be issues associated "
11114                            "with your hardware.  If you are experiencing "
11115                            "problems please contact your Intel or hardware "
11116                            "representative who provided you with this "
11117                            "hardware.\n");
11118         }
11119         strcpy(netdev->name, "eth%d");
11120         pci_set_drvdata(pdev, adapter);
11121         err = register_netdev(netdev);
11122         if (err)
11123                 goto err_register;
11124
11125
11126         /* power down the optics for 82599 SFP+ fiber */
11127         if (hw->mac.ops.disable_tx_laser)
11128                 hw->mac.ops.disable_tx_laser(hw);
11129
11130         /* carrier off reporting is important to ethtool even BEFORE open */
11131         netif_carrier_off(netdev);
11132
11133 #ifdef CONFIG_IXGBE_DCA
11134         if (dca_add_requester(&pdev->dev) == 0) {
11135                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11136                 ixgbe_setup_dca(adapter);
11137         }
11138 #endif
11139         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11140                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11141                 for (i = 0; i < adapter->num_vfs; i++)
11142                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
11143         }
11144
11145         /* firmware requires driver version to be 0xFFFFFFFF
11146          * since os does not support feature
11147          */
11148         if (hw->mac.ops.set_fw_drv_ver)
11149                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11150                                            sizeof(ixgbe_driver_version) - 1,
11151                                            ixgbe_driver_version);
11152
11153         /* add san mac addr to netdev */
11154         ixgbe_add_sanmac_netdev(netdev);
11155
11156         e_dev_info("%s\n", ixgbe_default_device_descr);
11157
11158 #ifdef CONFIG_IXGBE_HWMON
11159         if (ixgbe_sysfs_init(adapter))
11160                 e_err(probe, "failed to allocate sysfs resources\n");
11161 #endif /* CONFIG_IXGBE_HWMON */
11162
11163         ixgbe_dbg_adapter_init(adapter);
11164
11165         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11166         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11167                 hw->mac.ops.setup_link(hw,
11168                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11169                         true);
11170
11171         ixgbe_mii_bus_init(hw);
11172
11173         return 0;
11174
11175 err_register:
11176         ixgbe_release_hw_control(adapter);
11177         ixgbe_clear_interrupt_scheme(adapter);
11178 err_sw_init:
11179         ixgbe_disable_sriov(adapter);
11180         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11181         iounmap(adapter->io_addr);
11182         kfree(adapter->jump_tables[0]);
11183         kfree(adapter->mac_table);
11184         kfree(adapter->rss_key);
11185         bitmap_free(adapter->af_xdp_zc_qps);
11186 err_ioremap:
11187         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11188         free_netdev(netdev);
11189 err_alloc_etherdev:
11190         pci_release_mem_regions(pdev);
11191 err_pci_reg:
11192 err_dma:
11193         if (!adapter || disable_dev)
11194                 pci_disable_device(pdev);
11195         return err;
11196 }
11197
11198 /**
11199  * ixgbe_remove - Device Removal Routine
11200  * @pdev: PCI device information struct
11201  *
11202  * ixgbe_remove is called by the PCI subsystem to alert the driver
11203  * that it should release a PCI device.  The could be caused by a
11204  * Hot-Plug event, or because the driver is going to be removed from
11205  * memory.
11206  **/
11207 static void ixgbe_remove(struct pci_dev *pdev)
11208 {
11209         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11210         struct net_device *netdev;
11211         bool disable_dev;
11212         int i;
11213
11214         /* if !adapter then we already cleaned up in probe */
11215         if (!adapter)
11216                 return;
11217
11218         netdev  = adapter->netdev;
11219         ixgbe_dbg_adapter_exit(adapter);
11220
11221         set_bit(__IXGBE_REMOVING, &adapter->state);
11222         cancel_work_sync(&adapter->service_task);
11223
11224         if (adapter->mii_bus)
11225                 mdiobus_unregister(adapter->mii_bus);
11226
11227 #ifdef CONFIG_IXGBE_DCA
11228         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11229                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11230                 dca_remove_requester(&pdev->dev);
11231                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11232                                 IXGBE_DCA_CTRL_DCA_DISABLE);
11233         }
11234
11235 #endif
11236 #ifdef CONFIG_IXGBE_HWMON
11237         ixgbe_sysfs_exit(adapter);
11238 #endif /* CONFIG_IXGBE_HWMON */
11239
11240         /* remove the added san mac */
11241         ixgbe_del_sanmac_netdev(netdev);
11242
11243 #ifdef CONFIG_PCI_IOV
11244         ixgbe_disable_sriov(adapter);
11245 #endif
11246         if (netdev->reg_state == NETREG_REGISTERED)
11247                 unregister_netdev(netdev);
11248
11249         ixgbe_stop_ipsec_offload(adapter);
11250         ixgbe_clear_interrupt_scheme(adapter);
11251
11252         ixgbe_release_hw_control(adapter);
11253
11254 #ifdef CONFIG_DCB
11255         kfree(adapter->ixgbe_ieee_pfc);
11256         kfree(adapter->ixgbe_ieee_ets);
11257
11258 #endif
11259         iounmap(adapter->io_addr);
11260         pci_release_mem_regions(pdev);
11261
11262         e_dev_info("complete\n");
11263
11264         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11265                 if (adapter->jump_tables[i]) {
11266                         kfree(adapter->jump_tables[i]->input);
11267                         kfree(adapter->jump_tables[i]->mask);
11268                 }
11269                 kfree(adapter->jump_tables[i]);
11270         }
11271
11272         kfree(adapter->mac_table);
11273         kfree(adapter->rss_key);
11274         bitmap_free(adapter->af_xdp_zc_qps);
11275         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11276         free_netdev(netdev);
11277
11278         pci_disable_pcie_error_reporting(pdev);
11279
11280         if (disable_dev)
11281                 pci_disable_device(pdev);
11282 }
11283
11284 /**
11285  * ixgbe_io_error_detected - called when PCI error is detected
11286  * @pdev: Pointer to PCI device
11287  * @state: The current pci connection state
11288  *
11289  * This function is called after a PCI bus error affecting
11290  * this device has been detected.
11291  */
11292 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11293                                                 pci_channel_state_t state)
11294 {
11295         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11296         struct net_device *netdev = adapter->netdev;
11297
11298 #ifdef CONFIG_PCI_IOV
11299         struct ixgbe_hw *hw = &adapter->hw;
11300         struct pci_dev *bdev, *vfdev;
11301         u32 dw0, dw1, dw2, dw3;
11302         int vf, pos;
11303         u16 req_id, pf_func;
11304
11305         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11306             adapter->num_vfs == 0)
11307                 goto skip_bad_vf_detection;
11308
11309         bdev = pdev->bus->self;
11310         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11311                 bdev = bdev->bus->self;
11312
11313         if (!bdev)
11314                 goto skip_bad_vf_detection;
11315
11316         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11317         if (!pos)
11318                 goto skip_bad_vf_detection;
11319
11320         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11321         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11322         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11323         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11324         if (ixgbe_removed(hw->hw_addr))
11325                 goto skip_bad_vf_detection;
11326
11327         req_id = dw1 >> 16;
11328         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11329         if (!(req_id & 0x0080))
11330                 goto skip_bad_vf_detection;
11331
11332         pf_func = req_id & 0x01;
11333         if ((pf_func & 1) == (pdev->devfn & 1)) {
11334                 unsigned int device_id;
11335
11336                 vf = (req_id & 0x7F) >> 1;
11337                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11338                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11339                                 "%8.8x\tdw3: %8.8x\n",
11340                 dw0, dw1, dw2, dw3);
11341                 switch (adapter->hw.mac.type) {
11342                 case ixgbe_mac_82599EB:
11343                         device_id = IXGBE_82599_VF_DEVICE_ID;
11344                         break;
11345                 case ixgbe_mac_X540:
11346                         device_id = IXGBE_X540_VF_DEVICE_ID;
11347                         break;
11348                 case ixgbe_mac_X550:
11349                         device_id = IXGBE_DEV_ID_X550_VF;
11350                         break;
11351                 case ixgbe_mac_X550EM_x:
11352                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11353                         break;
11354                 case ixgbe_mac_x550em_a:
11355                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11356                         break;
11357                 default:
11358                         device_id = 0;
11359                         break;
11360                 }
11361
11362                 /* Find the pci device of the offending VF */
11363                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11364                 while (vfdev) {
11365                         if (vfdev->devfn == (req_id & 0xFF))
11366                                 break;
11367                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11368                                                device_id, vfdev);
11369                 }
11370                 /*
11371                  * There's a slim chance the VF could have been hot plugged,
11372                  * so if it is no longer present we don't need to issue the
11373                  * VFLR.  Just clean up the AER in that case.
11374                  */
11375                 if (vfdev) {
11376                         pcie_flr(vfdev);
11377                         /* Free device reference count */
11378                         pci_dev_put(vfdev);
11379                 }
11380         }
11381
11382         /*
11383          * Even though the error may have occurred on the other port
11384          * we still need to increment the vf error reference count for
11385          * both ports because the I/O resume function will be called
11386          * for both of them.
11387          */
11388         adapter->vferr_refcount++;
11389
11390         return PCI_ERS_RESULT_RECOVERED;
11391
11392 skip_bad_vf_detection:
11393 #endif /* CONFIG_PCI_IOV */
11394         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11395                 return PCI_ERS_RESULT_DISCONNECT;
11396
11397         if (!netif_device_present(netdev))
11398                 return PCI_ERS_RESULT_DISCONNECT;
11399
11400         rtnl_lock();
11401         netif_device_detach(netdev);
11402
11403         if (netif_running(netdev))
11404                 ixgbe_close_suspend(adapter);
11405
11406         if (state == pci_channel_io_perm_failure) {
11407                 rtnl_unlock();
11408                 return PCI_ERS_RESULT_DISCONNECT;
11409         }
11410
11411         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11412                 pci_disable_device(pdev);
11413         rtnl_unlock();
11414
11415         /* Request a slot reset. */
11416         return PCI_ERS_RESULT_NEED_RESET;
11417 }
11418
11419 /**
11420  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11421  * @pdev: Pointer to PCI device
11422  *
11423  * Restart the card from scratch, as if from a cold-boot.
11424  */
11425 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11426 {
11427         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11428         pci_ers_result_t result;
11429
11430         if (pci_enable_device_mem(pdev)) {
11431                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11432                 result = PCI_ERS_RESULT_DISCONNECT;
11433         } else {
11434                 smp_mb__before_atomic();
11435                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11436                 adapter->hw.hw_addr = adapter->io_addr;
11437                 pci_set_master(pdev);
11438                 pci_restore_state(pdev);
11439                 pci_save_state(pdev);
11440
11441                 pci_wake_from_d3(pdev, false);
11442
11443                 ixgbe_reset(adapter);
11444                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11445                 result = PCI_ERS_RESULT_RECOVERED;
11446         }
11447
11448         return result;
11449 }
11450
11451 /**
11452  * ixgbe_io_resume - called when traffic can start flowing again.
11453  * @pdev: Pointer to PCI device
11454  *
11455  * This callback is called when the error recovery driver tells us that
11456  * its OK to resume normal operation.
11457  */
11458 static void ixgbe_io_resume(struct pci_dev *pdev)
11459 {
11460         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11461         struct net_device *netdev = adapter->netdev;
11462
11463 #ifdef CONFIG_PCI_IOV
11464         if (adapter->vferr_refcount) {
11465                 e_info(drv, "Resuming after VF err\n");
11466                 adapter->vferr_refcount--;
11467                 return;
11468         }
11469
11470 #endif
11471         rtnl_lock();
11472         if (netif_running(netdev))
11473                 ixgbe_open(netdev);
11474
11475         netif_device_attach(netdev);
11476         rtnl_unlock();
11477 }
11478
11479 static const struct pci_error_handlers ixgbe_err_handler = {
11480         .error_detected = ixgbe_io_error_detected,
11481         .slot_reset = ixgbe_io_slot_reset,
11482         .resume = ixgbe_io_resume,
11483 };
11484
11485 static struct pci_driver ixgbe_driver = {
11486         .name     = ixgbe_driver_name,
11487         .id_table = ixgbe_pci_tbl,
11488         .probe    = ixgbe_probe,
11489         .remove   = ixgbe_remove,
11490 #ifdef CONFIG_PM
11491         .suspend  = ixgbe_suspend,
11492         .resume   = ixgbe_resume,
11493 #endif
11494         .shutdown = ixgbe_shutdown,
11495         .sriov_configure = ixgbe_pci_sriov_configure,
11496         .err_handler = &ixgbe_err_handler
11497 };
11498
11499 /**
11500  * ixgbe_init_module - Driver Registration Routine
11501  *
11502  * ixgbe_init_module is the first routine called when the driver is
11503  * loaded. All it does is register with the PCI subsystem.
11504  **/
11505 static int __init ixgbe_init_module(void)
11506 {
11507         int ret;
11508         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11509         pr_info("%s\n", ixgbe_copyright);
11510
11511         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11512         if (!ixgbe_wq) {
11513                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11514                 return -ENOMEM;
11515         }
11516
11517         ixgbe_dbg_init();
11518
11519         ret = pci_register_driver(&ixgbe_driver);
11520         if (ret) {
11521                 destroy_workqueue(ixgbe_wq);
11522                 ixgbe_dbg_exit();
11523                 return ret;
11524         }
11525
11526 #ifdef CONFIG_IXGBE_DCA
11527         dca_register_notify(&dca_notifier);
11528 #endif
11529
11530         return 0;
11531 }
11532
11533 module_init(ixgbe_init_module);
11534
11535 /**
11536  * ixgbe_exit_module - Driver Exit Cleanup Routine
11537  *
11538  * ixgbe_exit_module is called just before the driver is removed
11539  * from memory.
11540  **/
11541 static void __exit ixgbe_exit_module(void)
11542 {
11543 #ifdef CONFIG_IXGBE_DCA
11544         dca_unregister_notify(&dca_notifier);
11545 #endif
11546         pci_unregister_driver(&ixgbe_driver);
11547
11548         ixgbe_dbg_exit();
11549         if (ixgbe_wq) {
11550                 destroy_workqueue(ixgbe_wq);
11551                 ixgbe_wq = NULL;
11552         }
11553 }
11554
11555 #ifdef CONFIG_IXGBE_DCA
11556 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11557                             void *p)
11558 {
11559         int ret_val;
11560
11561         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11562                                          __ixgbe_notify_dca);
11563
11564         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11565 }
11566
11567 #endif /* CONFIG_IXGBE_DCA */
11568
11569 module_exit(ixgbe_exit_module);
11570
11571 /* ixgbe_main.c */