drivers/net/ethernet/intel/e1000e/netdev.c

   1 /* Intel PRO/1000 Linux driver
   2  * Copyright(c) 1999 - 2015 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * Linux NICS <linux.nics@intel.com>
  18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20  */
  21
  22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23
  24 #include <linux/module.h>
  25 #include <linux/types.h>
  26 #include <linux/init.h>
  27 #include <linux/pci.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/pagemap.h>
  30 #include <linux/delay.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/tcp.h>
  34 #include <linux/ipv6.h>
  35 #include <linux/slab.h>
  36 #include <net/checksum.h>
  37 #include <net/ip6_checksum.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/cpu.h>
  41 #include <linux/smp.h>
  42 #include <linux/pm_qos.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/aer.h>
  45 #include <linux/prefetch.h>
  46
  47 #include "e1000.h"
  48
  49 #define DRV_EXTRAVERSION "-k"
  50
  51 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
  52 char e1000e_driver_name[] = "e1000e";
  53 const char e1000e_driver_version[] = DRV_VERSION;
  54
  55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  56 static int debug = -1;
  57 module_param(debug, int, 0);
  58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  59
  60 static const struct e1000_info *e1000_info_tbl[] = {
  61         [board_82571]           = &e1000_82571_info,
  62         [board_82572]           = &e1000_82572_info,
  63         [board_82573]           = &e1000_82573_info,
  64         [board_82574]           = &e1000_82574_info,
  65         [board_82583]           = &e1000_82583_info,
  66         [board_80003es2lan]     = &e1000_es2_info,
  67         [board_ich8lan]         = &e1000_ich8_info,
  68         [board_ich9lan]         = &e1000_ich9_info,
  69         [board_ich10lan]        = &e1000_ich10_info,
  70         [board_pchlan]          = &e1000_pch_info,
  71         [board_pch2lan]         = &e1000_pch2_info,
  72         [board_pch_lpt]         = &e1000_pch_lpt_info,
  73         [board_pch_spt]         = &e1000_pch_spt_info,
  74         [board_pch_cnp]         = &e1000_pch_cnp_info,
  75 };
  76
  77 struct e1000_reg_info {
  78         u32 ofs;
  79         char *name;
  80 };
  81
  82 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  83         /* General Registers */
  84         {E1000_CTRL, "CTRL"},
  85         {E1000_STATUS, "STATUS"},
  86         {E1000_CTRL_EXT, "CTRL_EXT"},
  87
  88         /* Interrupt Registers */
  89         {E1000_ICR, "ICR"},
  90
  91         /* Rx Registers */
  92         {E1000_RCTL, "RCTL"},
  93         {E1000_RDLEN(0), "RDLEN"},
  94         {E1000_RDH(0), "RDH"},
  95         {E1000_RDT(0), "RDT"},
  96         {E1000_RDTR, "RDTR"},
  97         {E1000_RXDCTL(0), "RXDCTL"},
  98         {E1000_ERT, "ERT"},
  99         {E1000_RDBAL(0), "RDBAL"},
 100         {E1000_RDBAH(0), "RDBAH"},
 101         {E1000_RDFH, "RDFH"},
 102         {E1000_RDFT, "RDFT"},
 103         {E1000_RDFHS, "RDFHS"},
 104         {E1000_RDFTS, "RDFTS"},
 105         {E1000_RDFPC, "RDFPC"},
 106
 107         /* Tx Registers */
 108         {E1000_TCTL, "TCTL"},
 109         {E1000_TDBAL(0), "TDBAL"},
 110         {E1000_TDBAH(0), "TDBAH"},
 111         {E1000_TDLEN(0), "TDLEN"},
 112         {E1000_TDH(0), "TDH"},
 113         {E1000_TDT(0), "TDT"},
 114         {E1000_TIDV, "TIDV"},
 115         {E1000_TXDCTL(0), "TXDCTL"},
 116         {E1000_TADV, "TADV"},
 117         {E1000_TARC(0), "TARC"},
 118         {E1000_TDFH, "TDFH"},
 119         {E1000_TDFT, "TDFT"},
 120         {E1000_TDFHS, "TDFHS"},
 121         {E1000_TDFTS, "TDFTS"},
 122         {E1000_TDFPC, "TDFPC"},
 123
 124         /* List Terminator */
 125         {0, NULL}
 126 };
 127
 128 /**
 129  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 130  * @hw: pointer to the HW structure
 131  *
 132  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 133  * be accessing the registers at the same time.  Normally, this is handled in
 134  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 135  * accesses later than it should which could result in the register to have
 136  * an incorrect value.  Workaround this by checking the FWSM register which
 137  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 138  * and try again a number of times.
 139  **/
 140 s32 __ew32_prepare(struct e1000_hw *hw)
 141 {
 142         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 143
 144         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 145                 udelay(50);
 146
 147         return i;
 148 }
 149
 150 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 151 {
 152         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 153                 __ew32_prepare(hw);
 154
 155         writel(val, hw->hw_addr + reg);
 156 }
 157
 158 /**
 159  * e1000_regdump - register printout routine
 160  * @hw: pointer to the HW structure
 161  * @reginfo: pointer to the register info table
 162  **/
 163 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 164 {
 165         int n = 0;
 166         char rname[16];
 167         u32 regs[8];
 168
 169         switch (reginfo->ofs) {
 170         case E1000_RXDCTL(0):
 171                 for (n = 0; n < 2; n++)
 172                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 173                 break;
 174         case E1000_TXDCTL(0):
 175                 for (n = 0; n < 2; n++)
 176                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 177                 break;
 178         case E1000_TARC(0):
 179                 for (n = 0; n < 2; n++)
 180                         regs[n] = __er32(hw, E1000_TARC(n));
 181                 break;
 182         default:
 183                 pr_info("%-15s %08x\n",
 184                         reginfo->name, __er32(hw, reginfo->ofs));
 185                 return;
 186         }
 187
 188         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 189         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 190 }
 191
 192 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 193                                  struct e1000_buffer *bi)
 194 {
 195         int i;
 196         struct e1000_ps_page *ps_page;
 197
 198         for (i = 0; i < adapter->rx_ps_pages; i++) {
 199                 ps_page = &bi->ps_pages[i];
 200
 201                 if (ps_page->page) {
 202                         pr_info("packet dump for ps_page %d:\n", i);
 203                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 204                                        16, 1, page_address(ps_page->page),
 205                                        PAGE_SIZE, true);
 206                 }
 207         }
 208 }
 209
 210 /**
 211  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 212  * @adapter: board private structure
 213  **/
 214 static void e1000e_dump(struct e1000_adapter *adapter)
 215 {
 216         struct net_device *netdev = adapter->netdev;
 217         struct e1000_hw *hw = &adapter->hw;
 218         struct e1000_reg_info *reginfo;
 219         struct e1000_ring *tx_ring = adapter->tx_ring;
 220         struct e1000_tx_desc *tx_desc;
 221         struct my_u0 {
 222                 __le64 a;
 223                 __le64 b;
 224         } *u0;
 225         struct e1000_buffer *buffer_info;
 226         struct e1000_ring *rx_ring = adapter->rx_ring;
 227         union e1000_rx_desc_packet_split *rx_desc_ps;
 228         union e1000_rx_desc_extended *rx_desc;
 229         struct my_u1 {
 230                 __le64 a;
 231                 __le64 b;
 232                 __le64 c;
 233                 __le64 d;
 234         } *u1;
 235         u32 staterr;
 236         int i = 0;
 237
 238         if (!netif_msg_hw(adapter))
 239                 return;
 240
 241         /* Print netdevice Info */
 242         if (netdev) {
 243                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 244                 pr_info("Device Name     state            trans_start\n");
 245                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 246                         netdev->state, dev_trans_start(netdev));
 247         }
 248
 249         /* Print Registers */
 250         dev_info(&adapter->pdev->dev, "Register Dump\n");
 251         pr_info(" Register Name   Value\n");
 252         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 253              reginfo->name; reginfo++) {
 254                 e1000_regdump(hw, reginfo);
 255         }
 256
 257         /* Print Tx Ring Summary */
 258         if (!netdev || !netif_running(netdev))
 259                 return;
 260
 261         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 262         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 263         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 264         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 265                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 266                 (unsigned long long)buffer_info->dma,
 267                 buffer_info->length,
 268                 buffer_info->next_to_watch,
 269                 (unsigned long long)buffer_info->time_stamp);
 270
 271         /* Print Tx Ring */
 272         if (!netif_msg_tx_done(adapter))
 273                 goto rx_ring_summary;
 274
 275         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 276
 277         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 278          *
 279          * Legacy Transmit Descriptor
 280          *   +--------------------------------------------------------------+
 281          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 282          *   +--------------------------------------------------------------+
 283          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 284          *   +--------------------------------------------------------------+
 285          *   63       48 47        36 35    32 31     24 23    16 15        0
 286          *
 287          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 288          *   63      48 47    40 39       32 31             16 15    8 7      0
 289          *   +----------------------------------------------------------------+
 290          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 291          *   +----------------------------------------------------------------+
 292          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 293          *   +----------------------------------------------------------------+
 294          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 295          *
 296          * Extended Data Descriptor (DTYP=0x1)
 297          *   +----------------------------------------------------------------+
 298          * 0 |                     Buffer Address [63:0]                      |
 299          *   +----------------------------------------------------------------+
 300          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 301          *   +----------------------------------------------------------------+
 302          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 303          */
 304         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 305         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 306         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 307         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 308                 const char *next_desc;
 309                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 310                 buffer_info = &tx_ring->buffer_info[i];
 311                 u0 = (struct my_u0 *)tx_desc;
 312                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 313                         next_desc = " NTC/U";
 314                 else if (i == tx_ring->next_to_use)
 315                         next_desc = " NTU";
 316                 else if (i == tx_ring->next_to_clean)
 317                         next_desc = " NTC";
 318                 else
 319                         next_desc = "";
 320                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 321                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 322                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 323                         i,
 324                         (unsigned long long)le64_to_cpu(u0->a),
 325                         (unsigned long long)le64_to_cpu(u0->b),
 326                         (unsigned long long)buffer_info->dma,
 327                         buffer_info->length, buffer_info->next_to_watch,
 328                         (unsigned long long)buffer_info->time_stamp,
 329                         buffer_info->skb, next_desc);
 330
 331                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 332                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 333                                        16, 1, buffer_info->skb->data,
 334                                        buffer_info->skb->len, true);
 335         }
 336
 337         /* Print Rx Ring Summary */
 338 rx_ring_summary:
 339         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 340         pr_info("Queue [NTU] [NTC]\n");
 341         pr_info(" %5d %5X %5X\n",
 342                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 343
 344         /* Print Rx Ring */
 345         if (!netif_msg_rx_status(adapter))
 346                 return;
 347
 348         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 349         switch (adapter->rx_ps_pages) {
 350         case 1:
 351         case 2:
 352         case 3:
 353                 /* [Extended] Packet Split Receive Descriptor Format
 354                  *
 355                  *    +-----------------------------------------------------+
 356                  *  0 |                Buffer Address 0 [63:0]              |
 357                  *    +-----------------------------------------------------+
 358                  *  8 |                Buffer Address 1 [63:0]              |
 359                  *    +-----------------------------------------------------+
 360                  * 16 |                Buffer Address 2 [63:0]              |
 361                  *    +-----------------------------------------------------+
 362                  * 24 |                Buffer Address 3 [63:0]              |
 363                  *    +-----------------------------------------------------+
 364                  */
 365                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 366                 /* [Extended] Receive Descriptor (Write-Back) Format
 367                  *
 368                  *   63       48 47    32 31     13 12    8 7    4 3        0
 369                  *   +------------------------------------------------------+
 370                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 371                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 372                  *   +------------------------------------------------------+
 373                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 374                  *   +------------------------------------------------------+
 375                  *   63       48 47    32 31            20 19               0
 376                  */
 377                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 378                 for (i = 0; i < rx_ring->count; i++) {
 379                         const char *next_desc;
 380                         buffer_info = &rx_ring->buffer_info[i];
 381                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 382                         u1 = (struct my_u1 *)rx_desc_ps;
 383                         staterr =
 384                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 385
 386                         if (i == rx_ring->next_to_use)
 387                                 next_desc = " NTU";
 388                         else if (i == rx_ring->next_to_clean)
 389                                 next_desc = " NTC";
 390                         else
 391                                 next_desc = "";
 392
 393                         if (staterr & E1000_RXD_STAT_DD) {
 394                                 /* Descriptor Done */
 395                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 396                                         "RWB", i,
 397                                         (unsigned long long)le64_to_cpu(u1->a),
 398                                         (unsigned long long)le64_to_cpu(u1->b),
 399                                         (unsigned long long)le64_to_cpu(u1->c),
 400                                         (unsigned long long)le64_to_cpu(u1->d),
 401                                         buffer_info->skb, next_desc);
 402                         } else {
 403                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 404                                         "R  ", i,
 405                                         (unsigned long long)le64_to_cpu(u1->a),
 406                                         (unsigned long long)le64_to_cpu(u1->b),
 407                                         (unsigned long long)le64_to_cpu(u1->c),
 408                                         (unsigned long long)le64_to_cpu(u1->d),
 409                                         (unsigned long long)buffer_info->dma,
 410                                         buffer_info->skb, next_desc);
 411
 412                                 if (netif_msg_pktdata(adapter))
 413                                         e1000e_dump_ps_pages(adapter,
 414                                                              buffer_info);
 415                         }
 416                 }
 417                 break;
 418         default:
 419         case 0:
 420                 /* Extended Receive Descriptor (Read) Format
 421                  *
 422                  *   +-----------------------------------------------------+
 423                  * 0 |                Buffer Address [63:0]                |
 424                  *   +-----------------------------------------------------+
 425                  * 8 |                      Reserved                       |
 426                  *   +-----------------------------------------------------+
 427                  */
 428                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 429                 /* Extended Receive Descriptor (Write-Back) Format
 430                  *
 431                  *   63       48 47    32 31    24 23            4 3        0
 432                  *   +------------------------------------------------------+
 433                  *   |     RSS Hash      |        |               |         |
 434                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 435                  *   | Packet   | IP     |        |               |  Type   |
 436                  *   | Checksum | Ident  |        |               |         |
 437                  *   +------------------------------------------------------+
 438                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 439                  *   +------------------------------------------------------+
 440                  *   63       48 47    32 31            20 19               0
 441                  */
 442                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 443
 444                 for (i = 0; i < rx_ring->count; i++) {
 445                         const char *next_desc;
 446
 447                         buffer_info = &rx_ring->buffer_info[i];
 448                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 449                         u1 = (struct my_u1 *)rx_desc;
 450                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 451
 452                         if (i == rx_ring->next_to_use)
 453                                 next_desc = " NTU";
 454                         else if (i == rx_ring->next_to_clean)
 455                                 next_desc = " NTC";
 456                         else
 457                                 next_desc = "";
 458
 459                         if (staterr & E1000_RXD_STAT_DD) {
 460                                 /* Descriptor Done */
 461                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 462                                         "RWB", i,
 463                                         (unsigned long long)le64_to_cpu(u1->a),
 464                                         (unsigned long long)le64_to_cpu(u1->b),
 465                                         buffer_info->skb, next_desc);
 466                         } else {
 467                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 468                                         "R  ", i,
 469                                         (unsigned long long)le64_to_cpu(u1->a),
 470                                         (unsigned long long)le64_to_cpu(u1->b),
 471                                         (unsigned long long)buffer_info->dma,
 472                                         buffer_info->skb, next_desc);
 473
 474                                 if (netif_msg_pktdata(adapter) &&
 475                                     buffer_info->skb)
 476                                         print_hex_dump(KERN_INFO, "",
 477                                                        DUMP_PREFIX_ADDRESS, 16,
 478                                                        1,
 479                                                        buffer_info->skb->data,
 480                                                        adapter->rx_buffer_len,
 481                                                        true);
 482                         }
 483                 }
 484         }
 485 }
 486
 487 /**
 488  * e1000_desc_unused - calculate if we have unused descriptors
 489  **/
 490 static int e1000_desc_unused(struct e1000_ring *ring)
 491 {
 492         if (ring->next_to_clean > ring->next_to_use)
 493                 return ring->next_to_clean - ring->next_to_use - 1;
 494
 495         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 496 }
 497
 498 /**
 499  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 500  * @adapter: board private structure
 501  * @hwtstamps: time stamp structure to update
 502  * @systim: unsigned 64bit system time value.
 503  *
 504  * Convert the system time value stored in the RX/TXSTMP registers into a
 505  * hwtstamp which can be used by the upper level time stamping functions.
 506  *
 507  * The 'systim_lock' spinlock is used to protect the consistency of the
 508  * system time value. This is needed because reading the 64 bit time
 509  * value involves reading two 32 bit registers. The first read latches the
 510  * value.
 511  **/
 512 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 513                                       struct skb_shared_hwtstamps *hwtstamps,
 514                                       u64 systim)
 515 {
 516         u64 ns;
 517         unsigned long flags;
 518
 519         spin_lock_irqsave(&adapter->systim_lock, flags);
 520         ns = timecounter_cyc2time(&adapter->tc, systim);
 521         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 522
 523         memset(hwtstamps, 0, sizeof(*hwtstamps));
 524         hwtstamps->hwtstamp = ns_to_ktime(ns);
 525 }
 526
 527 /**
 528  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 529  * @adapter: board private structure
 530  * @status: descriptor extended error and status field
 531  * @skb: particular skb to include time stamp
 532  *
 533  * If the time stamp is valid, convert it into the timecounter ns value
 534  * and store that result into the shhwtstamps structure which is passed
 535  * up the network stack.
 536  **/
 537 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 538                                struct sk_buff *skb)
 539 {
 540         struct e1000_hw *hw = &adapter->hw;
 541         u64 rxstmp;
 542
 543         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 544             !(status & E1000_RXDEXT_STATERR_TST) ||
 545             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 546                 return;
 547
 548         /* The Rx time stamp registers contain the time stamp.  No other
 549          * received packet will be time stamped until the Rx time stamp
 550          * registers are read.  Because only one packet can be time stamped
 551          * at a time, the register values must belong to this packet and
 552          * therefore none of the other additional attributes need to be
 553          * compared.
 554          */
 555         rxstmp = (u64)er32(RXSTMPL);
 556         rxstmp |= (u64)er32(RXSTMPH) << 32;
 557         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 558
 559         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 560 }
 561
 562 /**
 563  * e1000_receive_skb - helper function to handle Rx indications
 564  * @adapter: board private structure
 565  * @staterr: descriptor extended error and status field as written by hardware
 566  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 567  * @skb: pointer to sk_buff to be indicated to stack
 568  **/
 569 static void e1000_receive_skb(struct e1000_adapter *adapter,
 570                               struct net_device *netdev, struct sk_buff *skb,
 571                               u32 staterr, __le16 vlan)
 572 {
 573         u16 tag = le16_to_cpu(vlan);
 574
 575         e1000e_rx_hwtstamp(adapter, staterr, skb);
 576
 577         skb->protocol = eth_type_trans(skb, netdev);
 578
 579         if (staterr & E1000_RXD_STAT_VP)
 580                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 581
 582         napi_gro_receive(&adapter->napi, skb);
 583 }
 584
 585 /**
 586  * e1000_rx_checksum - Receive Checksum Offload
 587  * @adapter: board private structure
 588  * @status_err: receive descriptor status and error fields
 589  * @csum: receive descriptor csum field
 590  * @sk_buff: socket buffer with received data
 591  **/
 592 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 593                               struct sk_buff *skb)
 594 {
 595         u16 status = (u16)status_err;
 596         u8 errors = (u8)(status_err >> 24);
 597
 598         skb_checksum_none_assert(skb);
 599
 600         /* Rx checksum disabled */
 601         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 602                 return;
 603
 604         /* Ignore Checksum bit is set */
 605         if (status & E1000_RXD_STAT_IXSM)
 606                 return;
 607
 608         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 609         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 610                 /* let the stack verify checksum errors */
 611                 adapter->hw_csum_err++;
 612                 return;
 613         }
 614
 615         /* TCP/UDP Checksum has not been calculated */
 616         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 617                 return;
 618
 619         /* It must be a TCP or UDP packet with a valid checksum */
 620         skb->ip_summed = CHECKSUM_UNNECESSARY;
 621         adapter->hw_csum_good++;
 622 }
 623
 624 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 625 {
 626         struct e1000_adapter *adapter = rx_ring->adapter;
 627         struct e1000_hw *hw = &adapter->hw;
 628         s32 ret_val = __ew32_prepare(hw);
 629
 630         writel(i, rx_ring->tail);
 631
 632         if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
 633                 u32 rctl = er32(RCTL);
 634
 635                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 636                 e_err("ME firmware caused invalid RDT - resetting\n");
 637                 schedule_work(&adapter->reset_task);
 638         }
 639 }
 640
 641 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 642 {
 643         struct e1000_adapter *adapter = tx_ring->adapter;
 644         struct e1000_hw *hw = &adapter->hw;
 645         s32 ret_val = __ew32_prepare(hw);
 646
 647         writel(i, tx_ring->tail);
 648
 649         if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
 650                 u32 tctl = er32(TCTL);
 651
 652                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 653                 e_err("ME firmware caused invalid TDT - resetting\n");
 654                 schedule_work(&adapter->reset_task);
 655         }
 656 }
 657
 658 /**
 659  * e1000_alloc_rx_buffers - Replace used receive buffers
 660  * @rx_ring: Rx descriptor ring
 661  **/
 662 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 663                                    int cleaned_count, gfp_t gfp)
 664 {
 665         struct e1000_adapter *adapter = rx_ring->adapter;
 666         struct net_device *netdev = adapter->netdev;
 667         struct pci_dev *pdev = adapter->pdev;
 668         union e1000_rx_desc_extended *rx_desc;
 669         struct e1000_buffer *buffer_info;
 670         struct sk_buff *skb;
 671         unsigned int i;
 672         unsigned int bufsz = adapter->rx_buffer_len;
 673
 674         i = rx_ring->next_to_use;
 675         buffer_info = &rx_ring->buffer_info[i];
 676
 677         while (cleaned_count--) {
 678                 skb = buffer_info->skb;
 679                 if (skb) {
 680                         skb_trim(skb, 0);
 681                         goto map_skb;
 682                 }
 683
 684                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 685                 if (!skb) {
 686                         /* Better luck next round */
 687                         adapter->alloc_rx_buff_failed++;
 688                         break;
 689                 }
 690
 691                 buffer_info->skb = skb;
 692 map_skb:
 693                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 694                                                   adapter->rx_buffer_len,
 695                                                   DMA_FROM_DEVICE);
 696                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 697                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 698                         adapter->rx_dma_failed++;
 699                         break;
 700                 }
 701
 702                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 703                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 704
 705                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 706                         /* Force memory writes to complete before letting h/w
 707                          * know there are new descriptors to fetch.  (Only
 708                          * applicable for weak-ordered memory model archs,
 709                          * such as IA-64).
 710                          */
 711                         wmb();
 712                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 713                                 e1000e_update_rdt_wa(rx_ring, i);
 714                         else
 715                                 writel(i, rx_ring->tail);
 716                 }
 717                 i++;
 718                 if (i == rx_ring->count)
 719                         i = 0;
 720                 buffer_info = &rx_ring->buffer_info[i];
 721         }
 722
 723         rx_ring->next_to_use = i;
 724 }
 725
 726 /**
 727  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 728  * @rx_ring: Rx descriptor ring
 729  **/
 730 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 731                                       int cleaned_count, gfp_t gfp)
 732 {
 733         struct e1000_adapter *adapter = rx_ring->adapter;
 734         struct net_device *netdev = adapter->netdev;
 735         struct pci_dev *pdev = adapter->pdev;
 736         union e1000_rx_desc_packet_split *rx_desc;
 737         struct e1000_buffer *buffer_info;
 738         struct e1000_ps_page *ps_page;
 739         struct sk_buff *skb;
 740         unsigned int i, j;
 741
 742         i = rx_ring->next_to_use;
 743         buffer_info = &rx_ring->buffer_info[i];
 744
 745         while (cleaned_count--) {
 746                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 747
 748                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 749                         ps_page = &buffer_info->ps_pages[j];
 750                         if (j >= adapter->rx_ps_pages) {
 751                                 /* all unused desc entries get hw null ptr */
 752                                 rx_desc->read.buffer_addr[j + 1] =
 753                                     ~cpu_to_le64(0);
 754                                 continue;
 755                         }
 756                         if (!ps_page->page) {
 757                                 ps_page->page = alloc_page(gfp);
 758                                 if (!ps_page->page) {
 759                                         adapter->alloc_rx_buff_failed++;
 760                                         goto no_buffers;
 761                                 }
 762                                 ps_page->dma = dma_map_page(&pdev->dev,
 763                                                             ps_page->page,
 764                                                             0, PAGE_SIZE,
 765                                                             DMA_FROM_DEVICE);
 766                                 if (dma_mapping_error(&pdev->dev,
 767                                                       ps_page->dma)) {
 768                                         dev_err(&adapter->pdev->dev,
 769                                                 "Rx DMA page map failed\n");
 770                                         adapter->rx_dma_failed++;
 771                                         goto no_buffers;
 772                                 }
 773                         }
 774                         /* Refresh the desc even if buffer_addrs
 775                          * didn't change because each write-back
 776                          * erases this info.
 777                          */
 778                         rx_desc->read.buffer_addr[j + 1] =
 779                             cpu_to_le64(ps_page->dma);
 780                 }
 781
 782                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 783                                                   gfp);
 784
 785                 if (!skb) {
 786                         adapter->alloc_rx_buff_failed++;
 787                         break;
 788                 }
 789
 790                 buffer_info->skb = skb;
 791                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 792                                                   adapter->rx_ps_bsize0,
 793                                                   DMA_FROM_DEVICE);
 794                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 795                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 796                         adapter->rx_dma_failed++;
 797                         /* cleanup skb */
 798                         dev_kfree_skb_any(skb);
 799                         buffer_info->skb = NULL;
 800                         break;
 801                 }
 802
 803                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 804
 805                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 806                         /* Force memory writes to complete before letting h/w
 807                          * know there are new descriptors to fetch.  (Only
 808                          * applicable for weak-ordered memory model archs,
 809                          * such as IA-64).
 810                          */
 811                         wmb();
 812                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 813                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 814                         else
 815                                 writel(i << 1, rx_ring->tail);
 816                 }
 817
 818                 i++;
 819                 if (i == rx_ring->count)
 820                         i = 0;
 821                 buffer_info = &rx_ring->buffer_info[i];
 822         }
 823
 824 no_buffers:
 825         rx_ring->next_to_use = i;
 826 }
 827
 828 /**
 829  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 830  * @rx_ring: Rx descriptor ring
 831  * @cleaned_count: number of buffers to allocate this pass
 832  **/
 833
 834 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 835                                          int cleaned_count, gfp_t gfp)
 836 {
 837         struct e1000_adapter *adapter = rx_ring->adapter;
 838         struct net_device *netdev = adapter->netdev;
 839         struct pci_dev *pdev = adapter->pdev;
 840         union e1000_rx_desc_extended *rx_desc;
 841         struct e1000_buffer *buffer_info;
 842         struct sk_buff *skb;
 843         unsigned int i;
 844         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 845
 846         i = rx_ring->next_to_use;
 847         buffer_info = &rx_ring->buffer_info[i];
 848
 849         while (cleaned_count--) {
 850                 skb = buffer_info->skb;
 851                 if (skb) {
 852                         skb_trim(skb, 0);
 853                         goto check_page;
 854                 }
 855
 856                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 857                 if (unlikely(!skb)) {
 858                         /* Better luck next round */
 859                         adapter->alloc_rx_buff_failed++;
 860                         break;
 861                 }
 862
 863                 buffer_info->skb = skb;
 864 check_page:
 865                 /* allocate a new page if necessary */
 866                 if (!buffer_info->page) {
 867                         buffer_info->page = alloc_page(gfp);
 868                         if (unlikely(!buffer_info->page)) {
 869                                 adapter->alloc_rx_buff_failed++;
 870                                 break;
 871                         }
 872                 }
 873
 874                 if (!buffer_info->dma) {
 875                         buffer_info->dma = dma_map_page(&pdev->dev,
 876                                                         buffer_info->page, 0,
 877                                                         PAGE_SIZE,
 878                                                         DMA_FROM_DEVICE);
 879                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 880                                 adapter->alloc_rx_buff_failed++;
 881                                 break;
 882                         }
 883                 }
 884
 885                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 886                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 887
 888                 if (unlikely(++i == rx_ring->count))
 889                         i = 0;
 890                 buffer_info = &rx_ring->buffer_info[i];
 891         }
 892
 893         if (likely(rx_ring->next_to_use != i)) {
 894                 rx_ring->next_to_use = i;
 895                 if (unlikely(i-- == 0))
 896                         i = (rx_ring->count - 1);
 897
 898                 /* Force memory writes to complete before letting h/w
 899                  * know there are new descriptors to fetch.  (Only
 900                  * applicable for weak-ordered memory model archs,
 901                  * such as IA-64).
 902                  */
 903                 wmb();
 904                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 905                         e1000e_update_rdt_wa(rx_ring, i);
 906                 else
 907                         writel(i, rx_ring->tail);
 908         }
 909 }
 910
 911 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 912                                  struct sk_buff *skb)
 913 {
 914         if (netdev->features & NETIF_F_RXHASH)
 915                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 916 }
 917
 918 /**
 919  * e1000_clean_rx_irq - Send received data up the network stack
 920  * @rx_ring: Rx descriptor ring
 921  *
 922  * the return value indicates whether actual cleaning was done, there
 923  * is no guarantee that everything was cleaned
 924  **/
 925 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 926                                int work_to_do)
 927 {
 928         struct e1000_adapter *adapter = rx_ring->adapter;
 929         struct net_device *netdev = adapter->netdev;
 930         struct pci_dev *pdev = adapter->pdev;
 931         struct e1000_hw *hw = &adapter->hw;
 932         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 933         struct e1000_buffer *buffer_info, *next_buffer;
 934         u32 length, staterr;
 935         unsigned int i;
 936         int cleaned_count = 0;
 937         bool cleaned = false;
 938         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 939
 940         i = rx_ring->next_to_clean;
 941         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 942         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 943         buffer_info = &rx_ring->buffer_info[i];
 944
 945         while (staterr & E1000_RXD_STAT_DD) {
 946                 struct sk_buff *skb;
 947
 948                 if (*work_done >= work_to_do)
 949                         break;
 950                 (*work_done)++;
 951                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 952
 953                 skb = buffer_info->skb;
 954                 buffer_info->skb = NULL;
 955
 956                 prefetch(skb->data - NET_IP_ALIGN);
 957
 958                 i++;
 959                 if (i == rx_ring->count)
 960                         i = 0;
 961                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 962                 prefetch(next_rxd);
 963
 964                 next_buffer = &rx_ring->buffer_info[i];
 965
 966                 cleaned = true;
 967                 cleaned_count++;
 968                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 969                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 970                 buffer_info->dma = 0;
 971
 972                 length = le16_to_cpu(rx_desc->wb.upper.length);
 973
 974                 /* !EOP means multiple descriptors were used to store a single
 975                  * packet, if that's the case we need to toss it.  In fact, we
 976                  * need to toss every packet with the EOP bit clear and the
 977                  * next frame that _does_ have the EOP bit set, as it is by
 978                  * definition only a frame fragment
 979                  */
 980                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 981                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 982
 983                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 984                         /* All receives must fit into a single buffer */
 985                         e_dbg("Receive packet consumed multiple buffers\n");
 986                         /* recycle */
 987                         buffer_info->skb = skb;
 988                         if (staterr & E1000_RXD_STAT_EOP)
 989                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 990                         goto next_desc;
 991                 }
 992
 993                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 994                              !(netdev->features & NETIF_F_RXALL))) {
 995                         /* recycle */
 996                         buffer_info->skb = skb;
 997                         goto next_desc;
 998                 }
 999
1000                 /* adjust length to remove Ethernet CRC */
1001                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1002                         /* If configured to store CRC, don't subtract FCS,
1003                          * but keep the FCS bytes out of the total_rx_bytes
1004                          * counter
1005                          */
1006                         if (netdev->features & NETIF_F_RXFCS)
1007                                 total_rx_bytes -= 4;
1008                         else
1009                                 length -= 4;
1010                 }
1011
1012                 total_rx_bytes += length;
1013                 total_rx_packets++;
1014
1015                 /* code added for copybreak, this should improve
1016                  * performance for small packets with large amounts
1017                  * of reassembly being done in the stack
1018                  */
1019                 if (length < copybreak) {
1020                         struct sk_buff *new_skb =
1021                                 napi_alloc_skb(&adapter->napi, length);
1022                         if (new_skb) {
1023                                 skb_copy_to_linear_data_offset(new_skb,
1024                                                                -NET_IP_ALIGN,
1025                                                                (skb->data -
1026                                                                 NET_IP_ALIGN),
1027                                                                (length +
1028                                                                 NET_IP_ALIGN));
1029                                 /* save the skb in buffer_info as good */
1030                                 buffer_info->skb = skb;
1031                                 skb = new_skb;
1032                         }
1033                         /* else just continue with the old one */
1034                 }
1035                 /* end copybreak code */
1036                 skb_put(skb, length);
1037
1038                 /* Receive Checksum Offload */
1039                 e1000_rx_checksum(adapter, staterr, skb);
1040
1041                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1042
1043                 e1000_receive_skb(adapter, netdev, skb, staterr,
1044                                   rx_desc->wb.upper.vlan);
1045
1046 next_desc:
1047                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1048
1049                 /* return some buffers to hardware, one at a time is too slow */
1050                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1051                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1052                                               GFP_ATOMIC);
1053                         cleaned_count = 0;
1054                 }
1055
1056                 /* use prefetched values */
1057                 rx_desc = next_rxd;
1058                 buffer_info = next_buffer;
1059
1060                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1061         }
1062         rx_ring->next_to_clean = i;
1063
1064         cleaned_count = e1000_desc_unused(rx_ring);
1065         if (cleaned_count)
1066                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1067
1068         adapter->total_rx_bytes += total_rx_bytes;
1069         adapter->total_rx_packets += total_rx_packets;
1070         return cleaned;
1071 }
1072
1073 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1074                             struct e1000_buffer *buffer_info)
1075 {
1076         struct e1000_adapter *adapter = tx_ring->adapter;
1077
1078         if (buffer_info->dma) {
1079                 if (buffer_info->mapped_as_page)
1080                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1081                                        buffer_info->length, DMA_TO_DEVICE);
1082                 else
1083                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1084                                          buffer_info->length, DMA_TO_DEVICE);
1085                 buffer_info->dma = 0;
1086         }
1087         if (buffer_info->skb) {
1088                 dev_kfree_skb_any(buffer_info->skb);
1089                 buffer_info->skb = NULL;
1090         }
1091         buffer_info->time_stamp = 0;
1092 }
1093
1094 static void e1000_print_hw_hang(struct work_struct *work)
1095 {
1096         struct e1000_adapter *adapter = container_of(work,
1097                                                      struct e1000_adapter,
1098                                                      print_hang_task);
1099         struct net_device *netdev = adapter->netdev;
1100         struct e1000_ring *tx_ring = adapter->tx_ring;
1101         unsigned int i = tx_ring->next_to_clean;
1102         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1103         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1104         struct e1000_hw *hw = &adapter->hw;
1105         u16 phy_status, phy_1000t_status, phy_ext_status;
1106         u16 pci_status;
1107
1108         if (test_bit(__E1000_DOWN, &adapter->state))
1109                 return;
1110
1111         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1112                 /* May be block on write-back, flush and detect again
1113                  * flush pending descriptor writebacks to memory
1114                  */
1115                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1116                 /* execute the writes immediately */
1117                 e1e_flush();
1118                 /* Due to rare timing issues, write to TIDV again to ensure
1119                  * the write is successful
1120                  */
1121                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1122                 /* execute the writes immediately */
1123                 e1e_flush();
1124                 adapter->tx_hang_recheck = true;
1125                 return;
1126         }
1127         adapter->tx_hang_recheck = false;
1128
1129         if (er32(TDH(0)) == er32(TDT(0))) {
1130                 e_dbg("false hang detected, ignoring\n");
1131                 return;
1132         }
1133
1134         /* Real hang detected */
1135         netif_stop_queue(netdev);
1136
1137         e1e_rphy(hw, MII_BMSR, &phy_status);
1138         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1139         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1140
1141         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1142
1143         /* detected Hardware unit hang */
1144         e_err("Detected Hardware Unit Hang:\n"
1145               "  TDH                  <%x>\n"
1146               "  TDT                  <%x>\n"
1147               "  next_to_use          <%x>\n"
1148               "  next_to_clean        <%x>\n"
1149               "buffer_info[next_to_clean]:\n"
1150               "  time_stamp           <%lx>\n"
1151               "  next_to_watch        <%x>\n"
1152               "  jiffies              <%lx>\n"
1153               "  next_to_watch.status <%x>\n"
1154               "MAC Status             <%x>\n"
1155               "PHY Status             <%x>\n"
1156               "PHY 1000BASE-T Status  <%x>\n"
1157               "PHY Extended Status    <%x>\n"
1158               "PCI Status             <%x>\n",
1159               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1160               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1161               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1162               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1163
1164         e1000e_dump(adapter);
1165
1166         /* Suggest workaround for known h/w issue */
1167         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1168                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1169 }
1170
1171 /**
1172  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1173  * @work: pointer to work struct
1174  *
1175  * This work function polls the TSYNCTXCTL valid bit to determine when a
1176  * timestamp has been taken for the current stored skb.  The timestamp must
1177  * be for this skb because only one such packet is allowed in the queue.
1178  */
1179 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1180 {
1181         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1182                                                      tx_hwtstamp_work);
1183         struct e1000_hw *hw = &adapter->hw;
1184
1185         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1186                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1187                 struct skb_shared_hwtstamps shhwtstamps;
1188                 u64 txstmp;
1189
1190                 txstmp = er32(TXSTMPL);
1191                 txstmp |= (u64)er32(TXSTMPH) << 32;
1192
1193                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1194
1195                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1196                  * prior to notifying the stack of a Tx timestamp.
1197                  */
1198                 adapter->tx_hwtstamp_skb = NULL;
1199                 wmb(); /* force write prior to skb_tstamp_tx */
1200
1201                 skb_tstamp_tx(skb, &shhwtstamps);
1202                 dev_kfree_skb_any(skb);
1203         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1204                               + adapter->tx_timeout_factor * HZ)) {
1205                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1206                 adapter->tx_hwtstamp_skb = NULL;
1207                 adapter->tx_hwtstamp_timeouts++;
1208                 e_warn("clearing Tx timestamp hang\n");
1209         } else {
1210                 /* reschedule to check later */
1211                 schedule_work(&adapter->tx_hwtstamp_work);
1212         }
1213 }
1214
1215 /**
1216  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1217  * @tx_ring: Tx descriptor ring
1218  *
1219  * the return value indicates whether actual cleaning was done, there
1220  * is no guarantee that everything was cleaned
1221  **/
1222 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1223 {
1224         struct e1000_adapter *adapter = tx_ring->adapter;
1225         struct net_device *netdev = adapter->netdev;
1226         struct e1000_hw *hw = &adapter->hw;
1227         struct e1000_tx_desc *tx_desc, *eop_desc;
1228         struct e1000_buffer *buffer_info;
1229         unsigned int i, eop;
1230         unsigned int count = 0;
1231         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1232         unsigned int bytes_compl = 0, pkts_compl = 0;
1233
1234         i = tx_ring->next_to_clean;
1235         eop = tx_ring->buffer_info[i].next_to_watch;
1236         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1237
1238         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1239                (count < tx_ring->count)) {
1240                 bool cleaned = false;
1241
1242                 dma_rmb();              /* read buffer_info after eop_desc */
1243                 for (; !cleaned; count++) {
1244                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1245                         buffer_info = &tx_ring->buffer_info[i];
1246                         cleaned = (i == eop);
1247
1248                         if (cleaned) {
1249                                 total_tx_packets += buffer_info->segs;
1250                                 total_tx_bytes += buffer_info->bytecount;
1251                                 if (buffer_info->skb) {
1252                                         bytes_compl += buffer_info->skb->len;
1253                                         pkts_compl++;
1254                                 }
1255                         }
1256
1257                         e1000_put_txbuf(tx_ring, buffer_info);
1258                         tx_desc->upper.data = 0;
1259
1260                         i++;
1261                         if (i == tx_ring->count)
1262                                 i = 0;
1263                 }
1264
1265                 if (i == tx_ring->next_to_use)
1266                         break;
1267                 eop = tx_ring->buffer_info[i].next_to_watch;
1268                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1269         }
1270
1271         tx_ring->next_to_clean = i;
1272
1273         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1274
1275 #define TX_WAKE_THRESHOLD 32
1276         if (count && netif_carrier_ok(netdev) &&
1277             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1278                 /* Make sure that anybody stopping the queue after this
1279                  * sees the new next_to_clean.
1280                  */
1281                 smp_mb();
1282
1283                 if (netif_queue_stopped(netdev) &&
1284                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1285                         netif_wake_queue(netdev);
1286                         ++adapter->restart_queue;
1287                 }
1288         }
1289
1290         if (adapter->detect_tx_hung) {
1291                 /* Detect a transmit hang in hardware, this serializes the
1292                  * check with the clearing of time_stamp and movement of i
1293                  */
1294                 adapter->detect_tx_hung = false;
1295                 if (tx_ring->buffer_info[i].time_stamp &&
1296                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1297                                + (adapter->tx_timeout_factor * HZ)) &&
1298                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1299                         schedule_work(&adapter->print_hang_task);
1300                 else
1301                         adapter->tx_hang_recheck = false;
1302         }
1303         adapter->total_tx_bytes += total_tx_bytes;
1304         adapter->total_tx_packets += total_tx_packets;
1305         return count < tx_ring->count;
1306 }
1307
1308 /**
1309  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1310  * @rx_ring: Rx descriptor ring
1311  *
1312  * the return value indicates whether actual cleaning was done, there
1313  * is no guarantee that everything was cleaned
1314  **/
1315 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1316                                   int work_to_do)
1317 {
1318         struct e1000_adapter *adapter = rx_ring->adapter;
1319         struct e1000_hw *hw = &adapter->hw;
1320         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1321         struct net_device *netdev = adapter->netdev;
1322         struct pci_dev *pdev = adapter->pdev;
1323         struct e1000_buffer *buffer_info, *next_buffer;
1324         struct e1000_ps_page *ps_page;
1325         struct sk_buff *skb;
1326         unsigned int i, j;
1327         u32 length, staterr;
1328         int cleaned_count = 0;
1329         bool cleaned = false;
1330         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1331
1332         i = rx_ring->next_to_clean;
1333         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1334         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1335         buffer_info = &rx_ring->buffer_info[i];
1336
1337         while (staterr & E1000_RXD_STAT_DD) {
1338                 if (*work_done >= work_to_do)
1339                         break;
1340                 (*work_done)++;
1341                 skb = buffer_info->skb;
1342                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1343
1344                 /* in the packet split case this is header only */
1345                 prefetch(skb->data - NET_IP_ALIGN);
1346
1347                 i++;
1348                 if (i == rx_ring->count)
1349                         i = 0;
1350                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1351                 prefetch(next_rxd);
1352
1353                 next_buffer = &rx_ring->buffer_info[i];
1354
1355                 cleaned = true;
1356                 cleaned_count++;
1357                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1358                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1359                 buffer_info->dma = 0;
1360
1361                 /* see !EOP comment in other Rx routine */
1362                 if (!(staterr & E1000_RXD_STAT_EOP))
1363                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1364
1365                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1366                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1367                         dev_kfree_skb_irq(skb);
1368                         if (staterr & E1000_RXD_STAT_EOP)
1369                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1370                         goto next_desc;
1371                 }
1372
1373                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1374                              !(netdev->features & NETIF_F_RXALL))) {
1375                         dev_kfree_skb_irq(skb);
1376                         goto next_desc;
1377                 }
1378
1379                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1380
1381                 if (!length) {
1382                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1383                         dev_kfree_skb_irq(skb);
1384                         goto next_desc;
1385                 }
1386
1387                 /* Good Receive */
1388                 skb_put(skb, length);
1389
1390                 {
1391                         /* this looks ugly, but it seems compiler issues make
1392                          * it more efficient than reusing j
1393                          */
1394                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1395
1396                         /* page alloc/put takes too long and effects small
1397                          * packet throughput, so unsplit small packets and
1398                          * save the alloc/put only valid in softirq (napi)
1399                          * context to call kmap_*
1400                          */
1401                         if (l1 && (l1 <= copybreak) &&
1402                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1403                                 u8 *vaddr;
1404
1405                                 ps_page = &buffer_info->ps_pages[0];
1406
1407                                 /* there is no documentation about how to call
1408                                  * kmap_atomic, so we can't hold the mapping
1409                                  * very long
1410                                  */
1411                                 dma_sync_single_for_cpu(&pdev->dev,
1412                                                         ps_page->dma,
1413                                                         PAGE_SIZE,
1414                                                         DMA_FROM_DEVICE);
1415                                 vaddr = kmap_atomic(ps_page->page);
1416                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1417                                 kunmap_atomic(vaddr);
1418                                 dma_sync_single_for_device(&pdev->dev,
1419                                                            ps_page->dma,
1420                                                            PAGE_SIZE,
1421                                                            DMA_FROM_DEVICE);
1422
1423                                 /* remove the CRC */
1424                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1425                                         if (!(netdev->features & NETIF_F_RXFCS))
1426                                                 l1 -= 4;
1427                                 }
1428
1429                                 skb_put(skb, l1);
1430                                 goto copydone;
1431                         }       /* if */
1432                 }
1433
1434                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1435                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1436                         if (!length)
1437                                 break;
1438
1439                         ps_page = &buffer_info->ps_pages[j];
1440                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1441                                        DMA_FROM_DEVICE);
1442                         ps_page->dma = 0;
1443                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1444                         ps_page->page = NULL;
1445                         skb->len += length;
1446                         skb->data_len += length;
1447                         skb->truesize += PAGE_SIZE;
1448                 }
1449
1450                 /* strip the ethernet crc, problem is we're using pages now so
1451                  * this whole operation can get a little cpu intensive
1452                  */
1453                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1454                         if (!(netdev->features & NETIF_F_RXFCS))
1455                                 pskb_trim(skb, skb->len - 4);
1456                 }
1457
1458 copydone:
1459                 total_rx_bytes += skb->len;
1460                 total_rx_packets++;
1461
1462                 e1000_rx_checksum(adapter, staterr, skb);
1463
1464                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1465
1466                 if (rx_desc->wb.upper.header_status &
1467                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1468                         adapter->rx_hdr_split++;
1469
1470                 e1000_receive_skb(adapter, netdev, skb, staterr,
1471                                   rx_desc->wb.middle.vlan);
1472
1473 next_desc:
1474                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1475                 buffer_info->skb = NULL;
1476
1477                 /* return some buffers to hardware, one at a time is too slow */
1478                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1479                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1480                                               GFP_ATOMIC);
1481                         cleaned_count = 0;
1482                 }
1483
1484                 /* use prefetched values */
1485                 rx_desc = next_rxd;
1486                 buffer_info = next_buffer;
1487
1488                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1489         }
1490         rx_ring->next_to_clean = i;
1491
1492         cleaned_count = e1000_desc_unused(rx_ring);
1493         if (cleaned_count)
1494                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1495
1496         adapter->total_rx_bytes += total_rx_bytes;
1497         adapter->total_rx_packets += total_rx_packets;
1498         return cleaned;
1499 }
1500
1501 /**
1502  * e1000_consume_page - helper function
1503  **/
1504 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1505                                u16 length)
1506 {
1507         bi->page = NULL;
1508         skb->len += length;
1509         skb->data_len += length;
1510         skb->truesize += PAGE_SIZE;
1511 }
1512
1513 /**
1514  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1515  * @adapter: board private structure
1516  *
1517  * the return value indicates whether actual cleaning was done, there
1518  * is no guarantee that everything was cleaned
1519  **/
1520 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1521                                      int work_to_do)
1522 {
1523         struct e1000_adapter *adapter = rx_ring->adapter;
1524         struct net_device *netdev = adapter->netdev;
1525         struct pci_dev *pdev = adapter->pdev;
1526         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1527         struct e1000_buffer *buffer_info, *next_buffer;
1528         u32 length, staterr;
1529         unsigned int i;
1530         int cleaned_count = 0;
1531         bool cleaned = false;
1532         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1533         struct skb_shared_info *shinfo;
1534
1535         i = rx_ring->next_to_clean;
1536         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1537         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1538         buffer_info = &rx_ring->buffer_info[i];
1539
1540         while (staterr & E1000_RXD_STAT_DD) {
1541                 struct sk_buff *skb;
1542
1543                 if (*work_done >= work_to_do)
1544                         break;
1545                 (*work_done)++;
1546                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1547
1548                 skb = buffer_info->skb;
1549                 buffer_info->skb = NULL;
1550
1551                 ++i;
1552                 if (i == rx_ring->count)
1553                         i = 0;
1554                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1555                 prefetch(next_rxd);
1556
1557                 next_buffer = &rx_ring->buffer_info[i];
1558
1559                 cleaned = true;
1560                 cleaned_count++;
1561                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1562                                DMA_FROM_DEVICE);
1563                 buffer_info->dma = 0;
1564
1565                 length = le16_to_cpu(rx_desc->wb.upper.length);
1566
1567                 /* errors is only valid for DD + EOP descriptors */
1568                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1569                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1570                               !(netdev->features & NETIF_F_RXALL)))) {
1571                         /* recycle both page and skb */
1572                         buffer_info->skb = skb;
1573                         /* an error means any chain goes out the window too */
1574                         if (rx_ring->rx_skb_top)
1575                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1576                         rx_ring->rx_skb_top = NULL;
1577                         goto next_desc;
1578                 }
1579 #define rxtop (rx_ring->rx_skb_top)
1580                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1581                         /* this descriptor is only the beginning (or middle) */
1582                         if (!rxtop) {
1583                                 /* this is the beginning of a chain */
1584                                 rxtop = skb;
1585                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1586                                                    0, length);
1587                         } else {
1588                                 /* this is the middle of a chain */
1589                                 shinfo = skb_shinfo(rxtop);
1590                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1591                                                    buffer_info->page, 0,
1592                                                    length);
1593                                 /* re-use the skb, only consumed the page */
1594                                 buffer_info->skb = skb;
1595                         }
1596                         e1000_consume_page(buffer_info, rxtop, length);
1597                         goto next_desc;
1598                 } else {
1599                         if (rxtop) {
1600                                 /* end of the chain */
1601                                 shinfo = skb_shinfo(rxtop);
1602                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1603                                                    buffer_info->page, 0,
1604                                                    length);
1605                                 /* re-use the current skb, we only consumed the
1606                                  * page
1607                                  */
1608                                 buffer_info->skb = skb;
1609                                 skb = rxtop;
1610                                 rxtop = NULL;
1611                                 e1000_consume_page(buffer_info, skb, length);
1612                         } else {
1613                                 /* no chain, got EOP, this buf is the packet
1614                                  * copybreak to save the put_page/alloc_page
1615                                  */
1616                                 if (length <= copybreak &&
1617                                     skb_tailroom(skb) >= length) {
1618                                         u8 *vaddr;
1619                                         vaddr = kmap_atomic(buffer_info->page);
1620                                         memcpy(skb_tail_pointer(skb), vaddr,
1621                                                length);
1622                                         kunmap_atomic(vaddr);
1623                                         /* re-use the page, so don't erase
1624                                          * buffer_info->page
1625                                          */
1626                                         skb_put(skb, length);
1627                                 } else {
1628                                         skb_fill_page_desc(skb, 0,
1629                                                            buffer_info->page, 0,
1630                                                            length);
1631                                         e1000_consume_page(buffer_info, skb,
1632                                                            length);
1633                                 }
1634                         }
1635                 }
1636
1637                 /* Receive Checksum Offload */
1638                 e1000_rx_checksum(adapter, staterr, skb);
1639
1640                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1641
1642                 /* probably a little skewed due to removing CRC */
1643                 total_rx_bytes += skb->len;
1644                 total_rx_packets++;
1645
1646                 /* eth type trans needs skb->data to point to something */
1647                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1648                         e_err("pskb_may_pull failed.\n");
1649                         dev_kfree_skb_irq(skb);
1650                         goto next_desc;
1651                 }
1652
1653                 e1000_receive_skb(adapter, netdev, skb, staterr,
1654                                   rx_desc->wb.upper.vlan);
1655
1656 next_desc:
1657                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1658
1659                 /* return some buffers to hardware, one at a time is too slow */
1660                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1661                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1662                                               GFP_ATOMIC);
1663                         cleaned_count = 0;
1664                 }
1665
1666                 /* use prefetched values */
1667                 rx_desc = next_rxd;
1668                 buffer_info = next_buffer;
1669
1670                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1671         }
1672         rx_ring->next_to_clean = i;
1673
1674         cleaned_count = e1000_desc_unused(rx_ring);
1675         if (cleaned_count)
1676                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1677
1678         adapter->total_rx_bytes += total_rx_bytes;
1679         adapter->total_rx_packets += total_rx_packets;
1680         return cleaned;
1681 }
1682
1683 /**
1684  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1685  * @rx_ring: Rx descriptor ring
1686  **/
1687 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1688 {
1689         struct e1000_adapter *adapter = rx_ring->adapter;
1690         struct e1000_buffer *buffer_info;
1691         struct e1000_ps_page *ps_page;
1692         struct pci_dev *pdev = adapter->pdev;
1693         unsigned int i, j;
1694
1695         /* Free all the Rx ring sk_buffs */
1696         for (i = 0; i < rx_ring->count; i++) {
1697                 buffer_info = &rx_ring->buffer_info[i];
1698                 if (buffer_info->dma) {
1699                         if (adapter->clean_rx == e1000_clean_rx_irq)
1700                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1701                                                  adapter->rx_buffer_len,
1702                                                  DMA_FROM_DEVICE);
1703                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1704                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1705                                                PAGE_SIZE, DMA_FROM_DEVICE);
1706                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1707                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1708                                                  adapter->rx_ps_bsize0,
1709                                                  DMA_FROM_DEVICE);
1710                         buffer_info->dma = 0;
1711                 }
1712
1713                 if (buffer_info->page) {
1714                         put_page(buffer_info->page);
1715                         buffer_info->page = NULL;
1716                 }
1717
1718                 if (buffer_info->skb) {
1719                         dev_kfree_skb(buffer_info->skb);
1720                         buffer_info->skb = NULL;
1721                 }
1722
1723                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1724                         ps_page = &buffer_info->ps_pages[j];
1725                         if (!ps_page->page)
1726                                 break;
1727                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1728                                        DMA_FROM_DEVICE);
1729                         ps_page->dma = 0;
1730                         put_page(ps_page->page);
1731                         ps_page->page = NULL;
1732                 }
1733         }
1734
1735         /* there also may be some cached data from a chained receive */
1736         if (rx_ring->rx_skb_top) {
1737                 dev_kfree_skb(rx_ring->rx_skb_top);
1738                 rx_ring->rx_skb_top = NULL;
1739         }
1740
1741         /* Zero out the descriptor ring */
1742         memset(rx_ring->desc, 0, rx_ring->size);
1743
1744         rx_ring->next_to_clean = 0;
1745         rx_ring->next_to_use = 0;
1746         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1747 }
1748
1749 static void e1000e_downshift_workaround(struct work_struct *work)
1750 {
1751         struct e1000_adapter *adapter = container_of(work,
1752                                                      struct e1000_adapter,
1753                                                      downshift_task);
1754
1755         if (test_bit(__E1000_DOWN, &adapter->state))
1756                 return;
1757
1758         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1759 }
1760
1761 /**
1762  * e1000_intr_msi - Interrupt Handler
1763  * @irq: interrupt number
1764  * @data: pointer to a network interface device structure
1765  **/
1766 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1767 {
1768         struct net_device *netdev = data;
1769         struct e1000_adapter *adapter = netdev_priv(netdev);
1770         struct e1000_hw *hw = &adapter->hw;
1771         u32 icr = er32(ICR);
1772
1773         /* read ICR disables interrupts using IAM */
1774         if (icr & E1000_ICR_LSC) {
1775                 hw->mac.get_link_status = true;
1776                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1777                  * disconnect (LSC) before accessing any PHY registers
1778                  */
1779                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1780                     (!(er32(STATUS) & E1000_STATUS_LU)))
1781                         schedule_work(&adapter->downshift_task);
1782
1783                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1784                  * link down event; disable receives here in the ISR and reset
1785                  * adapter in watchdog
1786                  */
1787                 if (netif_carrier_ok(netdev) &&
1788                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1789                         /* disable receives */
1790                         u32 rctl = er32(RCTL);
1791
1792                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1793                         adapter->flags |= FLAG_RESTART_NOW;
1794                 }
1795                 /* guard against interrupt when we're going down */
1796                 if (!test_bit(__E1000_DOWN, &adapter->state))
1797                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1798         }
1799
1800         /* Reset on uncorrectable ECC error */
1801         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1802                 u32 pbeccsts = er32(PBECCSTS);
1803
1804                 adapter->corr_errors +=
1805                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1806                 adapter->uncorr_errors +=
1807                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1808                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1809
1810                 /* Do the reset outside of interrupt context */
1811                 schedule_work(&adapter->reset_task);
1812
1813                 /* return immediately since reset is imminent */
1814                 return IRQ_HANDLED;
1815         }
1816
1817         if (napi_schedule_prep(&adapter->napi)) {
1818                 adapter->total_tx_bytes = 0;
1819                 adapter->total_tx_packets = 0;
1820                 adapter->total_rx_bytes = 0;
1821                 adapter->total_rx_packets = 0;
1822                 __napi_schedule(&adapter->napi);
1823         }
1824
1825         return IRQ_HANDLED;
1826 }
1827
1828 /**
1829  * e1000_intr - Interrupt Handler
1830  * @irq: interrupt number
1831  * @data: pointer to a network interface device structure
1832  **/
1833 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1834 {
1835         struct net_device *netdev = data;
1836         struct e1000_adapter *adapter = netdev_priv(netdev);
1837         struct e1000_hw *hw = &adapter->hw;
1838         u32 rctl, icr = er32(ICR);
1839
1840         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1841                 return IRQ_NONE;        /* Not our interrupt */
1842
1843         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1844          * not set, then the adapter didn't send an interrupt
1845          */
1846         if (!(icr & E1000_ICR_INT_ASSERTED))
1847                 return IRQ_NONE;
1848
1849         /* Interrupt Auto-Mask...upon reading ICR,
1850          * interrupts are masked.  No need for the
1851          * IMC write
1852          */
1853
1854         if (icr & E1000_ICR_LSC) {
1855                 hw->mac.get_link_status = true;
1856                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1857                  * disconnect (LSC) before accessing any PHY registers
1858                  */
1859                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1860                     (!(er32(STATUS) & E1000_STATUS_LU)))
1861                         schedule_work(&adapter->downshift_task);
1862
1863                 /* 80003ES2LAN workaround--
1864                  * For packet buffer work-around on link down event;
1865                  * disable receives here in the ISR and
1866                  * reset adapter in watchdog
1867                  */
1868                 if (netif_carrier_ok(netdev) &&
1869                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1870                         /* disable receives */
1871                         rctl = er32(RCTL);
1872                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1873                         adapter->flags |= FLAG_RESTART_NOW;
1874                 }
1875                 /* guard against interrupt when we're going down */
1876                 if (!test_bit(__E1000_DOWN, &adapter->state))
1877                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1878         }
1879
1880         /* Reset on uncorrectable ECC error */
1881         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1882                 u32 pbeccsts = er32(PBECCSTS);
1883
1884                 adapter->corr_errors +=
1885                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1886                 adapter->uncorr_errors +=
1887                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1888                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1889
1890                 /* Do the reset outside of interrupt context */
1891                 schedule_work(&adapter->reset_task);
1892
1893                 /* return immediately since reset is imminent */
1894                 return IRQ_HANDLED;
1895         }
1896
1897         if (napi_schedule_prep(&adapter->napi)) {
1898                 adapter->total_tx_bytes = 0;
1899                 adapter->total_tx_packets = 0;
1900                 adapter->total_rx_bytes = 0;
1901                 adapter->total_rx_packets = 0;
1902                 __napi_schedule(&adapter->napi);
1903         }
1904
1905         return IRQ_HANDLED;
1906 }
1907
1908 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1909 {
1910         struct net_device *netdev = data;
1911         struct e1000_adapter *adapter = netdev_priv(netdev);
1912         struct e1000_hw *hw = &adapter->hw;
1913         u32 icr = er32(ICR);
1914
1915         if (icr & adapter->eiac_mask)
1916                 ew32(ICS, (icr & adapter->eiac_mask));
1917
1918         if (icr & E1000_ICR_LSC) {
1919                 hw->mac.get_link_status = true;
1920                 /* guard against interrupt when we're going down */
1921                 if (!test_bit(__E1000_DOWN, &adapter->state))
1922                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1923         }
1924
1925         if (!test_bit(__E1000_DOWN, &adapter->state))
1926                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1927
1928         return IRQ_HANDLED;
1929 }
1930
1931 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1932 {
1933         struct net_device *netdev = data;
1934         struct e1000_adapter *adapter = netdev_priv(netdev);
1935         struct e1000_hw *hw = &adapter->hw;
1936         struct e1000_ring *tx_ring = adapter->tx_ring;
1937
1938         adapter->total_tx_bytes = 0;
1939         adapter->total_tx_packets = 0;
1940
1941         if (!e1000_clean_tx_irq(tx_ring))
1942                 /* Ring was not completely cleaned, so fire another interrupt */
1943                 ew32(ICS, tx_ring->ims_val);
1944
1945         if (!test_bit(__E1000_DOWN, &adapter->state))
1946                 ew32(IMS, adapter->tx_ring->ims_val);
1947
1948         return IRQ_HANDLED;
1949 }
1950
1951 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1952 {
1953         struct net_device *netdev = data;
1954         struct e1000_adapter *adapter = netdev_priv(netdev);
1955         struct e1000_ring *rx_ring = adapter->rx_ring;
1956
1957         /* Write the ITR value calculated at the end of the
1958          * previous interrupt.
1959          */
1960         if (rx_ring->set_itr) {
1961                 u32 itr = rx_ring->itr_val ?
1962                           1000000000 / (rx_ring->itr_val * 256) : 0;
1963
1964                 writel(itr, rx_ring->itr_register);
1965                 rx_ring->set_itr = 0;
1966         }
1967
1968         if (napi_schedule_prep(&adapter->napi)) {
1969                 adapter->total_rx_bytes = 0;
1970                 adapter->total_rx_packets = 0;
1971                 __napi_schedule(&adapter->napi);
1972         }
1973         return IRQ_HANDLED;
1974 }
1975
1976 /**
1977  * e1000_configure_msix - Configure MSI-X hardware
1978  *
1979  * e1000_configure_msix sets up the hardware to properly
1980  * generate MSI-X interrupts.
1981  **/
1982 static void e1000_configure_msix(struct e1000_adapter *adapter)
1983 {
1984         struct e1000_hw *hw = &adapter->hw;
1985         struct e1000_ring *rx_ring = adapter->rx_ring;
1986         struct e1000_ring *tx_ring = adapter->tx_ring;
1987         int vector = 0;
1988         u32 ctrl_ext, ivar = 0;
1989
1990         adapter->eiac_mask = 0;
1991
1992         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1993         if (hw->mac.type == e1000_82574) {
1994                 u32 rfctl = er32(RFCTL);
1995
1996                 rfctl |= E1000_RFCTL_ACK_DIS;
1997                 ew32(RFCTL, rfctl);
1998         }
1999
2000         /* Configure Rx vector */
2001         rx_ring->ims_val = E1000_IMS_RXQ0;
2002         adapter->eiac_mask |= rx_ring->ims_val;
2003         if (rx_ring->itr_val)
2004                 writel(1000000000 / (rx_ring->itr_val * 256),
2005                        rx_ring->itr_register);
2006         else
2007                 writel(1, rx_ring->itr_register);
2008         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2009
2010         /* Configure Tx vector */
2011         tx_ring->ims_val = E1000_IMS_TXQ0;
2012         vector++;
2013         if (tx_ring->itr_val)
2014                 writel(1000000000 / (tx_ring->itr_val * 256),
2015                        tx_ring->itr_register);
2016         else
2017                 writel(1, tx_ring->itr_register);
2018         adapter->eiac_mask |= tx_ring->ims_val;
2019         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2020
2021         /* set vector for Other Causes, e.g. link changes */
2022         vector++;
2023         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2024         if (rx_ring->itr_val)
2025                 writel(1000000000 / (rx_ring->itr_val * 256),
2026                        hw->hw_addr + E1000_EITR_82574(vector));
2027         else
2028                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2029
2030         /* Cause Tx interrupts on every write back */
2031         ivar |= BIT(31);
2032
2033         ew32(IVAR, ivar);
2034
2035         /* enable MSI-X PBA support */
2036         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2037         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2038         ew32(CTRL_EXT, ctrl_ext);
2039         e1e_flush();
2040 }
2041
2042 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2043 {
2044         if (adapter->msix_entries) {
2045                 pci_disable_msix(adapter->pdev);
2046                 kfree(adapter->msix_entries);
2047                 adapter->msix_entries = NULL;
2048         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2049                 pci_disable_msi(adapter->pdev);
2050                 adapter->flags &= ~FLAG_MSI_ENABLED;
2051         }
2052 }
2053
2054 /**
2055  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2056  *
2057  * Attempt to configure interrupts using the best available
2058  * capabilities of the hardware and kernel.
2059  **/
2060 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2061 {
2062         int err;
2063         int i;
2064
2065         switch (adapter->int_mode) {
2066         case E1000E_INT_MODE_MSIX:
2067                 if (adapter->flags & FLAG_HAS_MSIX) {
2068                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2069                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2070                                                         sizeof(struct
2071                                                                msix_entry),
2072                                                         GFP_KERNEL);
2073                         if (adapter->msix_entries) {
2074                                 struct e1000_adapter *a = adapter;
2075
2076                                 for (i = 0; i < adapter->num_vectors; i++)
2077                                         adapter->msix_entries[i].entry = i;
2078
2079                                 err = pci_enable_msix_range(a->pdev,
2080                                                             a->msix_entries,
2081                                                             a->num_vectors,
2082                                                             a->num_vectors);
2083                                 if (err > 0)
2084                                         return;
2085                         }
2086                         /* MSI-X failed, so fall through and try MSI */
2087                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2088                         e1000e_reset_interrupt_capability(adapter);
2089                 }
2090                 adapter->int_mode = E1000E_INT_MODE_MSI;
2091                 /* Fall through */
2092         case E1000E_INT_MODE_MSI:
2093                 if (!pci_enable_msi(adapter->pdev)) {
2094                         adapter->flags |= FLAG_MSI_ENABLED;
2095                 } else {
2096                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2097                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2098                 }
2099                 /* Fall through */
2100         case E1000E_INT_MODE_LEGACY:
2101                 /* Don't do anything; this is the system default */
2102                 break;
2103         }
2104
2105         /* store the number of vectors being used */
2106         adapter->num_vectors = 1;
2107 }
2108
2109 /**
2110  * e1000_request_msix - Initialize MSI-X interrupts
2111  *
2112  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2113  * kernel.
2114  **/
2115 static int e1000_request_msix(struct e1000_adapter *adapter)
2116 {
2117         struct net_device *netdev = adapter->netdev;
2118         int err = 0, vector = 0;
2119
2120         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2121                 snprintf(adapter->rx_ring->name,
2122                          sizeof(adapter->rx_ring->name) - 1,
2123                          "%.14s-rx-0", netdev->name);
2124         else
2125                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2126         err = request_irq(adapter->msix_entries[vector].vector,
2127                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2128                           netdev);
2129         if (err)
2130                 return err;
2131         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2132             E1000_EITR_82574(vector);
2133         adapter->rx_ring->itr_val = adapter->itr;
2134         vector++;
2135
2136         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2137                 snprintf(adapter->tx_ring->name,
2138                          sizeof(adapter->tx_ring->name) - 1,
2139                          "%.14s-tx-0", netdev->name);
2140         else
2141                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2142         err = request_irq(adapter->msix_entries[vector].vector,
2143                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2144                           netdev);
2145         if (err)
2146                 return err;
2147         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2148             E1000_EITR_82574(vector);
2149         adapter->tx_ring->itr_val = adapter->itr;
2150         vector++;
2151
2152         err = request_irq(adapter->msix_entries[vector].vector,
2153                           e1000_msix_other, 0, netdev->name, netdev);
2154         if (err)
2155                 return err;
2156
2157         e1000_configure_msix(adapter);
2158
2159         return 0;
2160 }
2161
2162 /**
2163  * e1000_request_irq - initialize interrupts
2164  *
2165  * Attempts to configure interrupts using the best available
2166  * capabilities of the hardware and kernel.
2167  **/
2168 static int e1000_request_irq(struct e1000_adapter *adapter)
2169 {
2170         struct net_device *netdev = adapter->netdev;
2171         int err;
2172
2173         if (adapter->msix_entries) {
2174                 err = e1000_request_msix(adapter);
2175                 if (!err)
2176                         return err;
2177                 /* fall back to MSI */
2178                 e1000e_reset_interrupt_capability(adapter);
2179                 adapter->int_mode = E1000E_INT_MODE_MSI;
2180                 e1000e_set_interrupt_capability(adapter);
2181         }
2182         if (adapter->flags & FLAG_MSI_ENABLED) {
2183                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2184                                   netdev->name, netdev);
2185                 if (!err)
2186                         return err;
2187
2188                 /* fall back to legacy interrupt */
2189                 e1000e_reset_interrupt_capability(adapter);
2190                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2191         }
2192
2193         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2194                           netdev->name, netdev);
2195         if (err)
2196                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2197
2198         return err;
2199 }
2200
2201 static void e1000_free_irq(struct e1000_adapter *adapter)
2202 {
2203         struct net_device *netdev = adapter->netdev;
2204
2205         if (adapter->msix_entries) {
2206                 int vector = 0;
2207
2208                 free_irq(adapter->msix_entries[vector].vector, netdev);
2209                 vector++;
2210
2211                 free_irq(adapter->msix_entries[vector].vector, netdev);
2212                 vector++;
2213
2214                 /* Other Causes interrupt vector */
2215                 free_irq(adapter->msix_entries[vector].vector, netdev);
2216                 return;
2217         }
2218
2219         free_irq(adapter->pdev->irq, netdev);
2220 }
2221
2222 /**
2223  * e1000_irq_disable - Mask off interrupt generation on the NIC
2224  **/
2225 static void e1000_irq_disable(struct e1000_adapter *adapter)
2226 {
2227         struct e1000_hw *hw = &adapter->hw;
2228
2229         ew32(IMC, ~0);
2230         if (adapter->msix_entries)
2231                 ew32(EIAC_82574, 0);
2232         e1e_flush();
2233
2234         if (adapter->msix_entries) {
2235                 int i;
2236
2237                 for (i = 0; i < adapter->num_vectors; i++)
2238                         synchronize_irq(adapter->msix_entries[i].vector);
2239         } else {
2240                 synchronize_irq(adapter->pdev->irq);
2241         }
2242 }
2243
2244 /**
2245  * e1000_irq_enable - Enable default interrupt generation settings
2246  **/
2247 static void e1000_irq_enable(struct e1000_adapter *adapter)
2248 {
2249         struct e1000_hw *hw = &adapter->hw;
2250
2251         if (adapter->msix_entries) {
2252                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2253                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2254                      IMS_OTHER_MASK);
2255         } else if (hw->mac.type >= e1000_pch_lpt) {
2256                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2257         } else {
2258                 ew32(IMS, IMS_ENABLE_MASK);
2259         }
2260         e1e_flush();
2261 }
2262
2263 /**
2264  * e1000e_get_hw_control - get control of the h/w from f/w
2265  * @adapter: address of board private structure
2266  *
2267  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2268  * For ASF and Pass Through versions of f/w this means that
2269  * the driver is loaded. For AMT version (only with 82573)
2270  * of the f/w this means that the network i/f is open.
2271  **/
2272 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2273 {
2274         struct e1000_hw *hw = &adapter->hw;
2275         u32 ctrl_ext;
2276         u32 swsm;
2277
2278         /* Let firmware know the driver has taken over */
2279         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2280                 swsm = er32(SWSM);
2281                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2282         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2283                 ctrl_ext = er32(CTRL_EXT);
2284                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2285         }
2286 }
2287
2288 /**
2289  * e1000e_release_hw_control - release control of the h/w to f/w
2290  * @adapter: address of board private structure
2291  *
2292  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2293  * For ASF and Pass Through versions of f/w this means that the
2294  * driver is no longer loaded. For AMT version (only with 82573) i
2295  * of the f/w this means that the network i/f is closed.
2296  *
2297  **/
2298 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2299 {
2300         struct e1000_hw *hw = &adapter->hw;
2301         u32 ctrl_ext;
2302         u32 swsm;
2303
2304         /* Let firmware taken over control of h/w */
2305         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2306                 swsm = er32(SWSM);
2307                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2308         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2309                 ctrl_ext = er32(CTRL_EXT);
2310                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2311         }
2312 }
2313
2314 /**
2315  * e1000_alloc_ring_dma - allocate memory for a ring structure
2316  **/
2317 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2318                                 struct e1000_ring *ring)
2319 {
2320         struct pci_dev *pdev = adapter->pdev;
2321
2322         ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
2323                                          GFP_KERNEL);
2324         if (!ring->desc)
2325                 return -ENOMEM;
2326
2327         return 0;
2328 }
2329
2330 /**
2331  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2332  * @tx_ring: Tx descriptor ring
2333  *
2334  * Return 0 on success, negative on failure
2335  **/
2336 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2337 {
2338         struct e1000_adapter *adapter = tx_ring->adapter;
2339         int err = -ENOMEM, size;
2340
2341         size = sizeof(struct e1000_buffer) * tx_ring->count;
2342         tx_ring->buffer_info = vzalloc(size);
2343         if (!tx_ring->buffer_info)
2344                 goto err;
2345
2346         /* round up to nearest 4K */
2347         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2348         tx_ring->size = ALIGN(tx_ring->size, 4096);
2349
2350         err = e1000_alloc_ring_dma(adapter, tx_ring);
2351         if (err)
2352                 goto err;
2353
2354         tx_ring->next_to_use = 0;
2355         tx_ring->next_to_clean = 0;
2356
2357         return 0;
2358 err:
2359         vfree(tx_ring->buffer_info);
2360         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2361         return err;
2362 }
2363
2364 /**
2365  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2366  * @rx_ring: Rx descriptor ring
2367  *
2368  * Returns 0 on success, negative on failure
2369  **/
2370 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2371 {
2372         struct e1000_adapter *adapter = rx_ring->adapter;
2373         struct e1000_buffer *buffer_info;
2374         int i, size, desc_len, err = -ENOMEM;
2375
2376         size = sizeof(struct e1000_buffer) * rx_ring->count;
2377         rx_ring->buffer_info = vzalloc(size);
2378         if (!rx_ring->buffer_info)
2379                 goto err;
2380
2381         for (i = 0; i < rx_ring->count; i++) {
2382                 buffer_info = &rx_ring->buffer_info[i];
2383                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2384                                                 sizeof(struct e1000_ps_page),
2385                                                 GFP_KERNEL);
2386                 if (!buffer_info->ps_pages)
2387                         goto err_pages;
2388         }
2389
2390         desc_len = sizeof(union e1000_rx_desc_packet_split);
2391
2392         /* Round up to nearest 4K */
2393         rx_ring->size = rx_ring->count * desc_len;
2394         rx_ring->size = ALIGN(rx_ring->size, 4096);
2395
2396         err = e1000_alloc_ring_dma(adapter, rx_ring);
2397         if (err)
2398                 goto err_pages;
2399
2400         rx_ring->next_to_clean = 0;
2401         rx_ring->next_to_use = 0;
2402         rx_ring->rx_skb_top = NULL;
2403
2404         return 0;
2405
2406 err_pages:
2407         for (i = 0; i < rx_ring->count; i++) {
2408                 buffer_info = &rx_ring->buffer_info[i];
2409                 kfree(buffer_info->ps_pages);
2410         }
2411 err:
2412         vfree(rx_ring->buffer_info);
2413         e_err("Unable to allocate memory for the receive descriptor ring\n");
2414         return err;
2415 }
2416
2417 /**
2418  * e1000_clean_tx_ring - Free Tx Buffers
2419  * @tx_ring: Tx descriptor ring
2420  **/
2421 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2422 {
2423         struct e1000_adapter *adapter = tx_ring->adapter;
2424         struct e1000_buffer *buffer_info;
2425         unsigned long size;
2426         unsigned int i;
2427
2428         for (i = 0; i < tx_ring->count; i++) {
2429                 buffer_info = &tx_ring->buffer_info[i];
2430                 e1000_put_txbuf(tx_ring, buffer_info);
2431         }
2432
2433         netdev_reset_queue(adapter->netdev);
2434         size = sizeof(struct e1000_buffer) * tx_ring->count;
2435         memset(tx_ring->buffer_info, 0, size);
2436
2437         memset(tx_ring->desc, 0, tx_ring->size);
2438
2439         tx_ring->next_to_use = 0;
2440         tx_ring->next_to_clean = 0;
2441 }
2442
2443 /**
2444  * e1000e_free_tx_resources - Free Tx Resources per Queue
2445  * @tx_ring: Tx descriptor ring
2446  *
2447  * Free all transmit software resources
2448  **/
2449 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2450 {
2451         struct e1000_adapter *adapter = tx_ring->adapter;
2452         struct pci_dev *pdev = adapter->pdev;
2453
2454         e1000_clean_tx_ring(tx_ring);
2455
2456         vfree(tx_ring->buffer_info);
2457         tx_ring->buffer_info = NULL;
2458
2459         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2460                           tx_ring->dma);
2461         tx_ring->desc = NULL;
2462 }
2463
2464 /**
2465  * e1000e_free_rx_resources - Free Rx Resources
2466  * @rx_ring: Rx descriptor ring
2467  *
2468  * Free all receive software resources
2469  **/
2470 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2471 {
2472         struct e1000_adapter *adapter = rx_ring->adapter;
2473         struct pci_dev *pdev = adapter->pdev;
2474         int i;
2475
2476         e1000_clean_rx_ring(rx_ring);
2477
2478         for (i = 0; i < rx_ring->count; i++)
2479                 kfree(rx_ring->buffer_info[i].ps_pages);
2480
2481         vfree(rx_ring->buffer_info);
2482         rx_ring->buffer_info = NULL;
2483
2484         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2485                           rx_ring->dma);
2486         rx_ring->desc = NULL;
2487 }
2488
2489 /**
2490  * e1000_update_itr - update the dynamic ITR value based on statistics
2491  * @adapter: pointer to adapter
2492  * @itr_setting: current adapter->itr
2493  * @packets: the number of packets during this measurement interval
2494  * @bytes: the number of bytes during this measurement interval
2495  *
2496  *      Stores a new ITR value based on packets and byte
2497  *      counts during the last interrupt.  The advantage of per interrupt
2498  *      computation is faster updates and more accurate ITR for the current
2499  *      traffic pattern.  Constants in this function were computed
2500  *      based on theoretical maximum wire speed and thresholds were set based
2501  *      on testing data as well as attempting to minimize response time
2502  *      while increasing bulk throughput.  This functionality is controlled
2503  *      by the InterruptThrottleRate module parameter.
2504  **/
2505 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2506 {
2507         unsigned int retval = itr_setting;
2508
2509         if (packets == 0)
2510                 return itr_setting;
2511
2512         switch (itr_setting) {
2513         case lowest_latency:
2514                 /* handle TSO and jumbo frames */
2515                 if (bytes / packets > 8000)
2516                         retval = bulk_latency;
2517                 else if ((packets < 5) && (bytes > 512))
2518                         retval = low_latency;
2519                 break;
2520         case low_latency:       /* 50 usec aka 20000 ints/s */
2521                 if (bytes > 10000) {
2522                         /* this if handles the TSO accounting */
2523                         if (bytes / packets > 8000)
2524                                 retval = bulk_latency;
2525                         else if ((packets < 10) || ((bytes / packets) > 1200))
2526                                 retval = bulk_latency;
2527                         else if ((packets > 35))
2528                                 retval = lowest_latency;
2529                 } else if (bytes / packets > 2000) {
2530                         retval = bulk_latency;
2531                 } else if (packets <= 2 && bytes < 512) {
2532                         retval = lowest_latency;
2533                 }
2534                 break;
2535         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2536                 if (bytes > 25000) {
2537                         if (packets > 35)
2538                                 retval = low_latency;
2539                 } else if (bytes < 6000) {
2540                         retval = low_latency;
2541                 }
2542                 break;
2543         }
2544
2545         return retval;
2546 }
2547
2548 static void e1000_set_itr(struct e1000_adapter *adapter)
2549 {
2550         u16 current_itr;
2551         u32 new_itr = adapter->itr;
2552
2553         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2554         if (adapter->link_speed != SPEED_1000) {
2555                 current_itr = 0;
2556                 new_itr = 4000;
2557                 goto set_itr_now;
2558         }
2559
2560         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2561                 new_itr = 0;
2562                 goto set_itr_now;
2563         }
2564
2565         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2566                                            adapter->total_tx_packets,
2567                                            adapter->total_tx_bytes);
2568         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2569         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2570                 adapter->tx_itr = low_latency;
2571
2572         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2573                                            adapter->total_rx_packets,
2574                                            adapter->total_rx_bytes);
2575         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2576         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2577                 adapter->rx_itr = low_latency;
2578
2579         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2580
2581         /* counts and packets in update_itr are dependent on these numbers */
2582         switch (current_itr) {
2583         case lowest_latency:
2584                 new_itr = 70000;
2585                 break;
2586         case low_latency:
2587                 new_itr = 20000;        /* aka hwitr = ~200 */
2588                 break;
2589         case bulk_latency:
2590                 new_itr = 4000;
2591                 break;
2592         default:
2593                 break;
2594         }
2595
2596 set_itr_now:
2597         if (new_itr != adapter->itr) {
2598                 /* this attempts to bias the interrupt rate towards Bulk
2599                  * by adding intermediate steps when interrupt rate is
2600                  * increasing
2601                  */
2602                 new_itr = new_itr > adapter->itr ?
2603                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2604                 adapter->itr = new_itr;
2605                 adapter->rx_ring->itr_val = new_itr;
2606                 if (adapter->msix_entries)
2607                         adapter->rx_ring->set_itr = 1;
2608                 else
2609                         e1000e_write_itr(adapter, new_itr);
2610         }
2611 }
2612
2613 /**
2614  * e1000e_write_itr - write the ITR value to the appropriate registers
2615  * @adapter: address of board private structure
2616  * @itr: new ITR value to program
2617  *
2618  * e1000e_write_itr determines if the adapter is in MSI-X mode
2619  * and, if so, writes the EITR registers with the ITR value.
2620  * Otherwise, it writes the ITR value into the ITR register.
2621  **/
2622 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2623 {
2624         struct e1000_hw *hw = &adapter->hw;
2625         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2626
2627         if (adapter->msix_entries) {
2628                 int vector;
2629
2630                 for (vector = 0; vector < adapter->num_vectors; vector++)
2631                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2632         } else {
2633                 ew32(ITR, new_itr);
2634         }
2635 }
2636
2637 /**
2638  * e1000_alloc_queues - Allocate memory for all rings
2639  * @adapter: board private structure to initialize
2640  **/
2641 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2642 {
2643         int size = sizeof(struct e1000_ring);
2644
2645         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2646         if (!adapter->tx_ring)
2647                 goto err;
2648         adapter->tx_ring->count = adapter->tx_ring_count;
2649         adapter->tx_ring->adapter = adapter;
2650
2651         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2652         if (!adapter->rx_ring)
2653                 goto err;
2654         adapter->rx_ring->count = adapter->rx_ring_count;
2655         adapter->rx_ring->adapter = adapter;
2656
2657         return 0;
2658 err:
2659         e_err("Unable to allocate memory for queues\n");
2660         kfree(adapter->rx_ring);
2661         kfree(adapter->tx_ring);
2662         return -ENOMEM;
2663 }
2664
2665 /**
2666  * e1000e_poll - NAPI Rx polling callback
2667  * @napi: struct associated with this polling callback
2668  * @weight: number of packets driver is allowed to process this poll
2669  **/
2670 static int e1000e_poll(struct napi_struct *napi, int weight)
2671 {
2672         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2673                                                      napi);
2674         struct e1000_hw *hw = &adapter->hw;
2675         struct net_device *poll_dev = adapter->netdev;
2676         int tx_cleaned = 1, work_done = 0;
2677
2678         adapter = netdev_priv(poll_dev);
2679
2680         if (!adapter->msix_entries ||
2681             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2682                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2683
2684         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2685
2686         if (!tx_cleaned)
2687                 work_done = weight;
2688
2689         /* If weight not fully consumed, exit the polling mode */
2690         if (work_done < weight) {
2691                 if (adapter->itr_setting & 3)
2692                         e1000_set_itr(adapter);
2693                 napi_complete_done(napi, work_done);
2694                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2695                         if (adapter->msix_entries)
2696                                 ew32(IMS, adapter->rx_ring->ims_val);
2697                         else
2698                                 e1000_irq_enable(adapter);
2699                 }
2700         }
2701
2702         return work_done;
2703 }
2704
2705 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2706                                  __always_unused __be16 proto, u16 vid)
2707 {
2708         struct e1000_adapter *adapter = netdev_priv(netdev);
2709         struct e1000_hw *hw = &adapter->hw;
2710         u32 vfta, index;
2711
2712         /* don't update vlan cookie if already programmed */
2713         if ((adapter->hw.mng_cookie.status &
2714              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2715             (vid == adapter->mng_vlan_id))
2716                 return 0;
2717
2718         /* add VID to filter table */
2719         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2720                 index = (vid >> 5) & 0x7F;
2721                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2722                 vfta |= BIT((vid & 0x1F));
2723                 hw->mac.ops.write_vfta(hw, index, vfta);
2724         }
2725
2726         set_bit(vid, adapter->active_vlans);
2727
2728         return 0;
2729 }
2730
2731 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2732                                   __always_unused __be16 proto, u16 vid)
2733 {
2734         struct e1000_adapter *adapter = netdev_priv(netdev);
2735         struct e1000_hw *hw = &adapter->hw;
2736         u32 vfta, index;
2737
2738         if ((adapter->hw.mng_cookie.status &
2739              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2740             (vid == adapter->mng_vlan_id)) {
2741                 /* release control to f/w */
2742                 e1000e_release_hw_control(adapter);
2743                 return 0;
2744         }
2745
2746         /* remove VID from filter table */
2747         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2748                 index = (vid >> 5) & 0x7F;
2749                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2750                 vfta &= ~BIT((vid & 0x1F));
2751                 hw->mac.ops.write_vfta(hw, index, vfta);
2752         }
2753
2754         clear_bit(vid, adapter->active_vlans);
2755
2756         return 0;
2757 }
2758
2759 /**
2760  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2761  * @adapter: board private structure to initialize
2762  **/
2763 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2764 {
2765         struct net_device *netdev = adapter->netdev;
2766         struct e1000_hw *hw = &adapter->hw;
2767         u32 rctl;
2768
2769         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2770                 /* disable VLAN receive filtering */
2771                 rctl = er32(RCTL);
2772                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2773                 ew32(RCTL, rctl);
2774
2775                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2776                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2777                                                adapter->mng_vlan_id);
2778                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2779                 }
2780         }
2781 }
2782
2783 /**
2784  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2785  * @adapter: board private structure to initialize
2786  **/
2787 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2788 {
2789         struct e1000_hw *hw = &adapter->hw;
2790         u32 rctl;
2791
2792         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2793                 /* enable VLAN receive filtering */
2794                 rctl = er32(RCTL);
2795                 rctl |= E1000_RCTL_VFE;
2796                 rctl &= ~E1000_RCTL_CFIEN;
2797                 ew32(RCTL, rctl);
2798         }
2799 }
2800
2801 /**
2802  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2803  * @adapter: board private structure to initialize
2804  **/
2805 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2806 {
2807         struct e1000_hw *hw = &adapter->hw;
2808         u32 ctrl;
2809
2810         /* disable VLAN tag insert/strip */
2811         ctrl = er32(CTRL);
2812         ctrl &= ~E1000_CTRL_VME;
2813         ew32(CTRL, ctrl);
2814 }
2815
2816 /**
2817  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2818  * @adapter: board private structure to initialize
2819  **/
2820 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2821 {
2822         struct e1000_hw *hw = &adapter->hw;
2823         u32 ctrl;
2824
2825         /* enable VLAN tag insert/strip */
2826         ctrl = er32(CTRL);
2827         ctrl |= E1000_CTRL_VME;
2828         ew32(CTRL, ctrl);
2829 }
2830
2831 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2832 {
2833         struct net_device *netdev = adapter->netdev;
2834         u16 vid = adapter->hw.mng_cookie.vlan_id;
2835         u16 old_vid = adapter->mng_vlan_id;
2836
2837         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2838                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2839                 adapter->mng_vlan_id = vid;
2840         }
2841
2842         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2843                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2844 }
2845
2846 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2847 {
2848         u16 vid;
2849
2850         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2851
2852         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2853             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2854 }
2855
2856 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2857 {
2858         struct e1000_hw *hw = &adapter->hw;
2859         u32 manc, manc2h, mdef, i, j;
2860
2861         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2862                 return;
2863
2864         manc = er32(MANC);
2865
2866         /* enable receiving management packets to the host. this will probably
2867          * generate destination unreachable messages from the host OS, but
2868          * the packets will be handled on SMBUS
2869          */
2870         manc |= E1000_MANC_EN_MNG2HOST;
2871         manc2h = er32(MANC2H);
2872
2873         switch (hw->mac.type) {
2874         default:
2875                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2876                 break;
2877         case e1000_82574:
2878         case e1000_82583:
2879                 /* Check if IPMI pass-through decision filter already exists;
2880                  * if so, enable it.
2881                  */
2882                 for (i = 0, j = 0; i < 8; i++) {
2883                         mdef = er32(MDEF(i));
2884
2885                         /* Ignore filters with anything other than IPMI ports */
2886                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2887                                 continue;
2888
2889                         /* Enable this decision filter in MANC2H */
2890                         if (mdef)
2891                                 manc2h |= BIT(i);
2892
2893                         j |= mdef;
2894                 }
2895
2896                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2897                         break;
2898
2899                 /* Create new decision filter in an empty filter */
2900                 for (i = 0, j = 0; i < 8; i++)
2901                         if (er32(MDEF(i)) == 0) {
2902                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2903                                                E1000_MDEF_PORT_664));
2904                                 manc2h |= BIT(1);
2905                                 j++;
2906                                 break;
2907                         }
2908
2909                 if (!j)
2910                         e_warn("Unable to create IPMI pass-through filter\n");
2911                 break;
2912         }
2913
2914         ew32(MANC2H, manc2h);
2915         ew32(MANC, manc);
2916 }
2917
2918 /**
2919  * e1000_configure_tx - Configure Transmit Unit after Reset
2920  * @adapter: board private structure
2921  *
2922  * Configure the Tx unit of the MAC after a reset.
2923  **/
2924 static void e1000_configure_tx(struct e1000_adapter *adapter)
2925 {
2926         struct e1000_hw *hw = &adapter->hw;
2927         struct e1000_ring *tx_ring = adapter->tx_ring;
2928         u64 tdba;
2929         u32 tdlen, tctl, tarc;
2930
2931         /* Setup the HW Tx Head and Tail descriptor pointers */
2932         tdba = tx_ring->dma;
2933         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2934         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2935         ew32(TDBAH(0), (tdba >> 32));
2936         ew32(TDLEN(0), tdlen);
2937         ew32(TDH(0), 0);
2938         ew32(TDT(0), 0);
2939         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2940         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2941
2942         writel(0, tx_ring->head);
2943         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2944                 e1000e_update_tdt_wa(tx_ring, 0);
2945         else
2946                 writel(0, tx_ring->tail);
2947
2948         /* Set the Tx Interrupt Delay register */
2949         ew32(TIDV, adapter->tx_int_delay);
2950         /* Tx irq moderation */
2951         ew32(TADV, adapter->tx_abs_int_delay);
2952
2953         if (adapter->flags2 & FLAG2_DMA_BURST) {
2954                 u32 txdctl = er32(TXDCTL(0));
2955
2956                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2957                             E1000_TXDCTL_WTHRESH);
2958                 /* set up some performance related parameters to encourage the
2959                  * hardware to use the bus more efficiently in bursts, depends
2960                  * on the tx_int_delay to be enabled,
2961                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2962                  * hthresh = 1 ==> prefetch when one or more available
2963                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2964                  * BEWARE: this seems to work but should be considered first if
2965                  * there are Tx hangs or other Tx related bugs
2966                  */
2967                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2968                 ew32(TXDCTL(0), txdctl);
2969         }
2970         /* erratum work around: set txdctl the same for both queues */
2971         ew32(TXDCTL(1), er32(TXDCTL(0)));
2972
2973         /* Program the Transmit Control Register */
2974         tctl = er32(TCTL);
2975         tctl &= ~E1000_TCTL_CT;
2976         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2977                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2978
2979         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2980                 tarc = er32(TARC(0));
2981                 /* set the speed mode bit, we'll clear it if we're not at
2982                  * gigabit link later
2983                  */
2984 #define SPEED_MODE_BIT BIT(21)
2985                 tarc |= SPEED_MODE_BIT;
2986                 ew32(TARC(0), tarc);
2987         }
2988
2989         /* errata: program both queues to unweighted RR */
2990         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2991                 tarc = er32(TARC(0));
2992                 tarc |= 1;
2993                 ew32(TARC(0), tarc);
2994                 tarc = er32(TARC(1));
2995                 tarc |= 1;
2996                 ew32(TARC(1), tarc);
2997         }
2998
2999         /* Setup Transmit Descriptor Settings for eop descriptor */
3000         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3001
3002         /* only set IDE if we are delaying interrupts using the timers */
3003         if (adapter->tx_int_delay)
3004                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3005
3006         /* enable Report Status bit */
3007         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3008
3009         ew32(TCTL, tctl);
3010
3011         hw->mac.ops.config_collision_dist(hw);
3012
3013         /* SPT and KBL Si errata workaround to avoid data corruption */
3014         if (hw->mac.type == e1000_pch_spt) {
3015                 u32 reg_val;
3016
3017                 reg_val = er32(IOSFPC);
3018                 reg_val |= E1000_RCTL_RDMTS_HEX;
3019                 ew32(IOSFPC, reg_val);
3020
3021                 reg_val = er32(TARC(0));
3022                 /* SPT and KBL Si errata workaround to avoid Tx hang.
3023                  * Dropping the number of outstanding requests from
3024                  * 3 to 2 in order to avoid a buffer overrun.
3025                  */
3026                 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3027                 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3028                 ew32(TARC(0), reg_val);
3029         }
3030 }
3031
3032 /**
3033  * e1000_setup_rctl - configure the receive control registers
3034  * @adapter: Board private structure
3035  **/
3036 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3037                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3038 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3039 {
3040         struct e1000_hw *hw = &adapter->hw;
3041         u32 rctl, rfctl;
3042         u32 pages = 0;
3043
3044         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3045          * If jumbo frames not set, program related MAC/PHY registers
3046          * to h/w defaults
3047          */
3048         if (hw->mac.type >= e1000_pch2lan) {
3049                 s32 ret_val;
3050
3051                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3052                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3053                 else
3054                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3055
3056                 if (ret_val)
3057                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3058         }
3059
3060         /* Program MC offset vector base */
3061         rctl = er32(RCTL);
3062         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3063         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3064             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3065             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3066
3067         /* Do not Store bad packets */
3068         rctl &= ~E1000_RCTL_SBP;
3069
3070         /* Enable Long Packet receive */
3071         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3072                 rctl &= ~E1000_RCTL_LPE;
3073         else
3074                 rctl |= E1000_RCTL_LPE;
3075
3076         /* Some systems expect that the CRC is included in SMBUS traffic. The
3077          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3078          * host memory when this is enabled
3079          */
3080         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3081                 rctl |= E1000_RCTL_SECRC;
3082
3083         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3084         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3085                 u16 phy_data;
3086
3087                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3088                 phy_data &= 0xfff8;
3089                 phy_data |= BIT(2);
3090                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3091
3092                 e1e_rphy(hw, 22, &phy_data);
3093                 phy_data &= 0x0fff;
3094                 phy_data |= BIT(14);
3095                 e1e_wphy(hw, 0x10, 0x2823);
3096                 e1e_wphy(hw, 0x11, 0x0003);
3097                 e1e_wphy(hw, 22, phy_data);
3098         }
3099
3100         /* Setup buffer sizes */
3101         rctl &= ~E1000_RCTL_SZ_4096;
3102         rctl |= E1000_RCTL_BSEX;
3103         switch (adapter->rx_buffer_len) {
3104         case 2048:
3105         default:
3106                 rctl |= E1000_RCTL_SZ_2048;
3107                 rctl &= ~E1000_RCTL_BSEX;
3108                 break;
3109         case 4096:
3110                 rctl |= E1000_RCTL_SZ_4096;
3111                 break;
3112         case 8192:
3113                 rctl |= E1000_RCTL_SZ_8192;
3114                 break;
3115         case 16384:
3116                 rctl |= E1000_RCTL_SZ_16384;
3117                 break;
3118         }
3119
3120         /* Enable Extended Status in all Receive Descriptors */
3121         rfctl = er32(RFCTL);
3122         rfctl |= E1000_RFCTL_EXTEN;
3123         ew32(RFCTL, rfctl);
3124
3125         /* 82571 and greater support packet-split where the protocol
3126          * header is placed in skb->data and the packet data is
3127          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3128          * In the case of a non-split, skb->data is linearly filled,
3129          * followed by the page buffers.  Therefore, skb->data is
3130          * sized to hold the largest protocol header.
3131          *
3132          * allocations using alloc_page take too long for regular MTU
3133          * so only enable packet split for jumbo frames
3134          *
3135          * Using pages when the page size is greater than 16k wastes
3136          * a lot of memory, since we allocate 3 pages at all times
3137          * per packet.
3138          */
3139         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3140         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3141                 adapter->rx_ps_pages = pages;
3142         else
3143                 adapter->rx_ps_pages = 0;
3144
3145         if (adapter->rx_ps_pages) {
3146                 u32 psrctl = 0;
3147
3148                 /* Enable Packet split descriptors */
3149                 rctl |= E1000_RCTL_DTYP_PS;
3150
3151                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3152
3153                 switch (adapter->rx_ps_pages) {
3154                 case 3:
3155                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3156                         /* fall-through */
3157                 case 2:
3158                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3159                         /* fall-through */
3160                 case 1:
3161                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3162                         break;
3163                 }
3164
3165                 ew32(PSRCTL, psrctl);
3166         }
3167
3168         /* This is useful for sniffing bad packets. */
3169         if (adapter->netdev->features & NETIF_F_RXALL) {
3170                 /* UPE and MPE will be handled by normal PROMISC logic
3171                  * in e1000e_set_rx_mode
3172                  */
3173                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3174                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3175                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3176
3177                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3178                           E1000_RCTL_DPF |      /* Allow filtered pause */
3179                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3180                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3181                  * and that breaks VLANs.
3182                  */
3183         }
3184
3185         ew32(RCTL, rctl);
3186         /* just started the receive unit, no need to restart */
3187         adapter->flags &= ~FLAG_RESTART_NOW;
3188 }
3189
3190 /**
3191  * e1000_configure_rx - Configure Receive Unit after Reset
3192  * @adapter: board private structure
3193  *
3194  * Configure the Rx unit of the MAC after a reset.
3195  **/
3196 static void e1000_configure_rx(struct e1000_adapter *adapter)
3197 {
3198         struct e1000_hw *hw = &adapter->hw;
3199         struct e1000_ring *rx_ring = adapter->rx_ring;
3200         u64 rdba;
3201         u32 rdlen, rctl, rxcsum, ctrl_ext;
3202
3203         if (adapter->rx_ps_pages) {
3204                 /* this is a 32 byte descriptor */
3205                 rdlen = rx_ring->count *
3206                     sizeof(union e1000_rx_desc_packet_split);
3207                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3208                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3209         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3210                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3211                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3212                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3213         } else {
3214                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3215                 adapter->clean_rx = e1000_clean_rx_irq;
3216                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3217         }
3218
3219         /* disable receives while setting up the descriptors */
3220         rctl = er32(RCTL);
3221         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3222                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3223         e1e_flush();
3224         usleep_range(10000, 20000);
3225
3226         if (adapter->flags2 & FLAG2_DMA_BURST) {
3227                 /* set the writeback threshold (only takes effect if the RDTR
3228                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3229                  * enable prefetching of 0x20 Rx descriptors
3230                  * granularity = 01
3231                  * wthresh = 04,
3232                  * hthresh = 04,
3233                  * pthresh = 0x20
3234                  */
3235                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3236                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3237
3238                 /* override the delay timers for enabling bursting, only if
3239                  * the value was not set by the user via module options
3240                  */
3241                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3242                         adapter->rx_int_delay = BURST_RDTR;
3243                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3244                         adapter->rx_abs_int_delay = BURST_RADV;
3245         }
3246
3247         /* set the Receive Delay Timer Register */
3248         ew32(RDTR, adapter->rx_int_delay);
3249
3250         /* irq moderation */
3251         ew32(RADV, adapter->rx_abs_int_delay);
3252         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3253                 e1000e_write_itr(adapter, adapter->itr);
3254
3255         ctrl_ext = er32(CTRL_EXT);
3256         /* Auto-Mask interrupts upon ICR access */
3257         ctrl_ext |= E1000_CTRL_EXT_IAME;
3258         ew32(IAM, 0xffffffff);
3259         ew32(CTRL_EXT, ctrl_ext);
3260         e1e_flush();
3261
3262         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3263          * the Base and Length of the Rx Descriptor Ring
3264          */
3265         rdba = rx_ring->dma;
3266         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3267         ew32(RDBAH(0), (rdba >> 32));
3268         ew32(RDLEN(0), rdlen);
3269         ew32(RDH(0), 0);
3270         ew32(RDT(0), 0);
3271         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3272         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3273
3274         writel(0, rx_ring->head);
3275         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3276                 e1000e_update_rdt_wa(rx_ring, 0);
3277         else
3278                 writel(0, rx_ring->tail);
3279
3280         /* Enable Receive Checksum Offload for TCP and UDP */
3281         rxcsum = er32(RXCSUM);
3282         if (adapter->netdev->features & NETIF_F_RXCSUM)
3283                 rxcsum |= E1000_RXCSUM_TUOFL;
3284         else
3285                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3286         ew32(RXCSUM, rxcsum);
3287
3288         /* With jumbo frames, excessive C-state transition latencies result
3289          * in dropped transactions.
3290          */
3291         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3292                 u32 lat =
3293                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3294                      adapter->max_frame_size) * 8 / 1000;
3295
3296                 if (adapter->flags & FLAG_IS_ICH) {
3297                         u32 rxdctl = er32(RXDCTL(0));
3298
3299                         ew32(RXDCTL(0), rxdctl | 0x3);
3300                 }
3301
3302                 pm_qos_update_request(&adapter->pm_qos_req, lat);
3303         } else {
3304                 pm_qos_update_request(&adapter->pm_qos_req,
3305                                       PM_QOS_DEFAULT_VALUE);
3306         }
3307
3308         /* Enable Receives */
3309         ew32(RCTL, rctl);
3310 }
3311
3312 /**
3313  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3314  * @netdev: network interface device structure
3315  *
3316  * Writes multicast address list to the MTA hash table.
3317  * Returns: -ENOMEM on failure
3318  *                0 on no addresses written
3319  *                X on writing X addresses to MTA
3320  */
3321 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3322 {
3323         struct e1000_adapter *adapter = netdev_priv(netdev);
3324         struct e1000_hw *hw = &adapter->hw;
3325         struct netdev_hw_addr *ha;
3326         u8 *mta_list;
3327         int i;
3328
3329         if (netdev_mc_empty(netdev)) {
3330                 /* nothing to program, so clear mc list */
3331                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3332                 return 0;
3333         }
3334
3335         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3336         if (!mta_list)
3337                 return -ENOMEM;
3338
3339         /* update_mc_addr_list expects a packed array of only addresses. */
3340         i = 0;
3341         netdev_for_each_mc_addr(ha, netdev)
3342             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3343
3344         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3345         kfree(mta_list);
3346
3347         return netdev_mc_count(netdev);
3348 }
3349
3350 /**
3351  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3352  * @netdev: network interface device structure
3353  *
3354  * Writes unicast address list to the RAR table.
3355  * Returns: -ENOMEM on failure/insufficient address space
3356  *                0 on no addresses written
3357  *                X on writing X addresses to the RAR table
3358  **/
3359 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3360 {
3361         struct e1000_adapter *adapter = netdev_priv(netdev);
3362         struct e1000_hw *hw = &adapter->hw;
3363         unsigned int rar_entries;
3364         int count = 0;
3365
3366         rar_entries = hw->mac.ops.rar_get_count(hw);
3367
3368         /* save a rar entry for our hardware address */
3369         rar_entries--;
3370
3371         /* save a rar entry for the LAA workaround */
3372         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3373                 rar_entries--;
3374
3375         /* return ENOMEM indicating insufficient memory for addresses */
3376         if (netdev_uc_count(netdev) > rar_entries)
3377                 return -ENOMEM;
3378
3379         if (!netdev_uc_empty(netdev) && rar_entries) {
3380                 struct netdev_hw_addr *ha;
3381
3382                 /* write the addresses in reverse order to avoid write
3383                  * combining
3384                  */
3385                 netdev_for_each_uc_addr(ha, netdev) {
3386                         int ret_val;
3387
3388                         if (!rar_entries)
3389                                 break;
3390                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3391                         if (ret_val < 0)
3392                                 return -ENOMEM;
3393                         count++;
3394                 }
3395         }
3396
3397         /* zero out the remaining RAR entries not used above */
3398         for (; rar_entries > 0; rar_entries--) {
3399                 ew32(RAH(rar_entries), 0);
3400                 ew32(RAL(rar_entries), 0);
3401         }
3402         e1e_flush();
3403
3404         return count;
3405 }
3406
3407 /**
3408  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3409  * @netdev: network interface device structure
3410  *
3411  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3412  * address list or the network interface flags are updated.  This routine is
3413  * responsible for configuring the hardware for proper unicast, multicast,
3414  * promiscuous mode, and all-multi behavior.
3415  **/
3416 static void e1000e_set_rx_mode(struct net_device *netdev)
3417 {
3418         struct e1000_adapter *adapter = netdev_priv(netdev);
3419         struct e1000_hw *hw = &adapter->hw;
3420         u32 rctl;
3421
3422         if (pm_runtime_suspended(netdev->dev.parent))
3423                 return;
3424
3425         /* Check for Promiscuous and All Multicast modes */
3426         rctl = er32(RCTL);
3427
3428         /* clear the affected bits */
3429         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3430
3431         if (netdev->flags & IFF_PROMISC) {
3432                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3433                 /* Do not hardware filter VLANs in promisc mode */
3434                 e1000e_vlan_filter_disable(adapter);
3435         } else {
3436                 int count;
3437
3438                 if (netdev->flags & IFF_ALLMULTI) {
3439                         rctl |= E1000_RCTL_MPE;
3440                 } else {
3441                         /* Write addresses to the MTA, if the attempt fails
3442                          * then we should just turn on promiscuous mode so
3443                          * that we can at least receive multicast traffic
3444                          */
3445                         count = e1000e_write_mc_addr_list(netdev);
3446                         if (count < 0)
3447                                 rctl |= E1000_RCTL_MPE;
3448                 }
3449                 e1000e_vlan_filter_enable(adapter);
3450                 /* Write addresses to available RAR registers, if there is not
3451                  * sufficient space to store all the addresses then enable
3452                  * unicast promiscuous mode
3453                  */
3454                 count = e1000e_write_uc_addr_list(netdev);
3455                 if (count < 0)
3456                         rctl |= E1000_RCTL_UPE;
3457         }
3458
3459         ew32(RCTL, rctl);
3460
3461         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3462                 e1000e_vlan_strip_enable(adapter);
3463         else
3464                 e1000e_vlan_strip_disable(adapter);
3465 }
3466
3467 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3468 {
3469         struct e1000_hw *hw = &adapter->hw;
3470         u32 mrqc, rxcsum;
3471         u32 rss_key[10];
3472         int i;
3473
3474         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3475         for (i = 0; i < 10; i++)
3476                 ew32(RSSRK(i), rss_key[i]);
3477
3478         /* Direct all traffic to queue 0 */
3479         for (i = 0; i < 32; i++)
3480                 ew32(RETA(i), 0);
3481
3482         /* Disable raw packet checksumming so that RSS hash is placed in
3483          * descriptor on writeback.
3484          */
3485         rxcsum = er32(RXCSUM);
3486         rxcsum |= E1000_RXCSUM_PCSD;
3487
3488         ew32(RXCSUM, rxcsum);
3489
3490         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3491                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3492                 E1000_MRQC_RSS_FIELD_IPV6 |
3493                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3494                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3495
3496         ew32(MRQC, mrqc);
3497 }
3498
3499 /**
3500  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3501  * @adapter: board private structure
3502  * @timinca: pointer to returned time increment attributes
3503  *
3504  * Get attributes for incrementing the System Time Register SYSTIML/H at
3505  * the default base frequency, and set the cyclecounter shift value.
3506  **/
3507 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3508 {
3509         struct e1000_hw *hw = &adapter->hw;
3510         u32 incvalue, incperiod, shift;
3511
3512         /* Make sure clock is enabled on I217/I218/I219  before checking
3513          * the frequency
3514          */
3515         if ((hw->mac.type >= e1000_pch_lpt) &&
3516             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3517             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3518                 u32 fextnvm7 = er32(FEXTNVM7);
3519
3520                 if (!(fextnvm7 & BIT(0))) {
3521                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3522                         e1e_flush();
3523                 }
3524         }
3525
3526         switch (hw->mac.type) {
3527         case e1000_pch2lan:
3528                 /* Stable 96MHz frequency */
3529                 incperiod = INCPERIOD_96MHZ;
3530                 incvalue = INCVALUE_96MHZ;
3531                 shift = INCVALUE_SHIFT_96MHZ;
3532                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3533                 break;
3534         case e1000_pch_lpt:
3535                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3536                         /* Stable 96MHz frequency */
3537                         incperiod = INCPERIOD_96MHZ;
3538                         incvalue = INCVALUE_96MHZ;
3539                         shift = INCVALUE_SHIFT_96MHZ;
3540                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3541                 } else {
3542                         /* Stable 25MHz frequency */
3543                         incperiod = INCPERIOD_25MHZ;
3544                         incvalue = INCVALUE_25MHZ;
3545                         shift = INCVALUE_SHIFT_25MHZ;
3546                         adapter->cc.shift = shift;
3547                 }
3548                 break;
3549         case e1000_pch_spt:
3550                 /* Stable 24MHz frequency */
3551                 incperiod = INCPERIOD_24MHZ;
3552                 incvalue = INCVALUE_24MHZ;
3553                 shift = INCVALUE_SHIFT_24MHZ;
3554                 adapter->cc.shift = shift;
3555                 break;
3556         case e1000_pch_cnp:
3557                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3558                         /* Stable 24MHz frequency */
3559                         incperiod = INCPERIOD_24MHZ;
3560                         incvalue = INCVALUE_24MHZ;
3561                         shift = INCVALUE_SHIFT_24MHZ;
3562                         adapter->cc.shift = shift;
3563                 } else {
3564                         /* Stable 38400KHz frequency */
3565                         incperiod = INCPERIOD_38400KHZ;
3566                         incvalue = INCVALUE_38400KHZ;
3567                         shift = INCVALUE_SHIFT_38400KHZ;
3568                         adapter->cc.shift = shift;
3569                 }
3570                 break;
3571         case e1000_82574:
3572         case e1000_82583:
3573                 /* Stable 25MHz frequency */
3574                 incperiod = INCPERIOD_25MHZ;
3575                 incvalue = INCVALUE_25MHZ;
3576                 shift = INCVALUE_SHIFT_25MHZ;
3577                 adapter->cc.shift = shift;
3578                 break;
3579         default:
3580                 return -EINVAL;
3581         }
3582
3583         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3584                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3585
3586         return 0;
3587 }
3588
3589 /**
3590  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3591  * @adapter: board private structure
3592  *
3593  * Outgoing time stamping can be enabled and disabled. Play nice and
3594  * disable it when requested, although it shouldn't cause any overhead
3595  * when no packet needs it. At most one packet in the queue may be
3596  * marked for time stamping, otherwise it would be impossible to tell
3597  * for sure to which packet the hardware time stamp belongs.
3598  *
3599  * Incoming time stamping has to be configured via the hardware filters.
3600  * Not all combinations are supported, in particular event type has to be
3601  * specified. Matching the kind of event packet is not supported, with the
3602  * exception of "all V2 events regardless of level 2 or 4".
3603  **/
3604 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3605                                   struct hwtstamp_config *config)
3606 {
3607         struct e1000_hw *hw = &adapter->hw;
3608         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3609         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3610         u32 rxmtrl = 0;
3611         u16 rxudp = 0;
3612         bool is_l4 = false;
3613         bool is_l2 = false;
3614         u32 regval;
3615
3616         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3617                 return -EINVAL;
3618
3619         /* flags reserved for future extensions - must be zero */
3620         if (config->flags)
3621                 return -EINVAL;
3622
3623         switch (config->tx_type) {
3624         case HWTSTAMP_TX_OFF:
3625                 tsync_tx_ctl = 0;
3626                 break;
3627         case HWTSTAMP_TX_ON:
3628                 break;
3629         default:
3630                 return -ERANGE;
3631         }
3632
3633         switch (config->rx_filter) {
3634         case HWTSTAMP_FILTER_NONE:
3635                 tsync_rx_ctl = 0;
3636                 break;
3637         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3638                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3639                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3640                 is_l4 = true;
3641                 break;
3642         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3643                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3644                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3645                 is_l4 = true;
3646                 break;
3647         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3648                 /* Also time stamps V2 L2 Path Delay Request/Response */
3649                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3650                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3651                 is_l2 = true;
3652                 break;
3653         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3654                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3655                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3656                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3657                 is_l2 = true;
3658                 break;
3659         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3660                 /* Hardware cannot filter just V2 L4 Sync messages;
3661                  * fall-through to V2 (both L2 and L4) Sync.
3662                  */
3663         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3664                 /* Also time stamps V2 Path Delay Request/Response. */
3665                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3666                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3667                 is_l2 = true;
3668                 is_l4 = true;
3669                 break;
3670         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3671                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3672                  * fall-through to V2 (both L2 and L4) Delay Request.
3673                  */
3674         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3675                 /* Also time stamps V2 Path Delay Request/Response. */
3676                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3677                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3678                 is_l2 = true;
3679                 is_l4 = true;
3680                 break;
3681         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3682         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3683                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3684                  * fall-through to all V2 (both L2 and L4) Events.
3685                  */
3686         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3687                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3688                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3689                 is_l2 = true;
3690                 is_l4 = true;
3691                 break;
3692         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3693                 /* For V1, the hardware can only filter Sync messages or
3694                  * Delay Request messages but not both so fall-through to
3695                  * time stamp all packets.
3696                  */
3697         case HWTSTAMP_FILTER_NTP_ALL:
3698         case HWTSTAMP_FILTER_ALL:
3699                 is_l2 = true;
3700                 is_l4 = true;
3701                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3702                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3703                 break;
3704         default:
3705                 return -ERANGE;
3706         }
3707
3708         adapter->hwtstamp_config = *config;
3709
3710         /* enable/disable Tx h/w time stamping */
3711         regval = er32(TSYNCTXCTL);
3712         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3713         regval |= tsync_tx_ctl;
3714         ew32(TSYNCTXCTL, regval);
3715         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3716             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3717                 e_err("Timesync Tx Control register not set as expected\n");
3718                 return -EAGAIN;
3719         }
3720
3721         /* enable/disable Rx h/w time stamping */
3722         regval = er32(TSYNCRXCTL);
3723         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3724         regval |= tsync_rx_ctl;
3725         ew32(TSYNCRXCTL, regval);
3726         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3727                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3728             (regval & (E1000_TSYNCRXCTL_ENABLED |
3729                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3730                 e_err("Timesync Rx Control register not set as expected\n");
3731                 return -EAGAIN;
3732         }
3733
3734         /* L2: define ethertype filter for time stamped packets */
3735         if (is_l2)
3736                 rxmtrl |= ETH_P_1588;
3737
3738         /* define which PTP packets get time stamped */
3739         ew32(RXMTRL, rxmtrl);
3740
3741         /* Filter by destination port */
3742         if (is_l4) {
3743                 rxudp = PTP_EV_PORT;
3744                 cpu_to_be16s(&rxudp);
3745         }
3746         ew32(RXUDP, rxudp);
3747
3748         e1e_flush();
3749
3750         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3751         er32(RXSTMPH);
3752         er32(TXSTMPH);
3753
3754         return 0;
3755 }
3756
3757 /**
3758  * e1000_configure - configure the hardware for Rx and Tx
3759  * @adapter: private board structure
3760  **/
3761 static void e1000_configure(struct e1000_adapter *adapter)
3762 {
3763         struct e1000_ring *rx_ring = adapter->rx_ring;
3764
3765         e1000e_set_rx_mode(adapter->netdev);
3766
3767         e1000_restore_vlan(adapter);
3768         e1000_init_manageability_pt(adapter);
3769
3770         e1000_configure_tx(adapter);
3771
3772         if (adapter->netdev->features & NETIF_F_RXHASH)
3773                 e1000e_setup_rss_hash(adapter);
3774         e1000_setup_rctl(adapter);
3775         e1000_configure_rx(adapter);
3776         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3777 }
3778
3779 /**
3780  * e1000e_power_up_phy - restore link in case the phy was powered down
3781  * @adapter: address of board private structure
3782  *
3783  * The phy may be powered down to save power and turn off link when the
3784  * driver is unloaded and wake on lan is not enabled (among others)
3785  * *** this routine MUST be followed by a call to e1000e_reset ***
3786  **/
3787 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3788 {
3789         if (adapter->hw.phy.ops.power_up)
3790                 adapter->hw.phy.ops.power_up(&adapter->hw);
3791
3792         adapter->hw.mac.ops.setup_link(&adapter->hw);
3793 }
3794
3795 /**
3796  * e1000_power_down_phy - Power down the PHY
3797  *
3798  * Power down the PHY so no link is implied when interface is down.
3799  * The PHY cannot be powered down if management or WoL is active.
3800  */
3801 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3802 {
3803         if (adapter->hw.phy.ops.power_down)
3804                 adapter->hw.phy.ops.power_down(&adapter->hw);
3805 }
3806
3807 /**
3808  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3809  *
3810  * We want to clear all pending descriptors from the TX ring.
3811  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3812  * the data of the next descriptor. We don't care about the data we are about
3813  * to reset the HW.
3814  */
3815 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3816 {
3817         struct e1000_hw *hw = &adapter->hw;
3818         struct e1000_ring *tx_ring = adapter->tx_ring;
3819         struct e1000_tx_desc *tx_desc = NULL;
3820         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3821         u16 size = 512;
3822
3823         tctl = er32(TCTL);
3824         ew32(TCTL, tctl | E1000_TCTL_EN);
3825         tdt = er32(TDT(0));
3826         BUG_ON(tdt != tx_ring->next_to_use);
3827         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3828         tx_desc->buffer_addr = tx_ring->dma;
3829
3830         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3831         tx_desc->upper.data = 0;
3832         /* flush descriptors to memory before notifying the HW */
3833         wmb();
3834         tx_ring->next_to_use++;
3835         if (tx_ring->next_to_use == tx_ring->count)
3836                 tx_ring->next_to_use = 0;
3837         ew32(TDT(0), tx_ring->next_to_use);
3838         mmiowb();
3839         usleep_range(200, 250);
3840 }
3841
3842 /**
3843  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3844  *
3845  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3846  */
3847 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3848 {
3849         u32 rctl, rxdctl;
3850         struct e1000_hw *hw = &adapter->hw;
3851
3852         rctl = er32(RCTL);
3853         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3854         e1e_flush();
3855         usleep_range(100, 150);
3856
3857         rxdctl = er32(RXDCTL(0));
3858         /* zero the lower 14 bits (prefetch and host thresholds) */
3859         rxdctl &= 0xffffc000;
3860
3861         /* update thresholds: prefetch threshold to 31, host threshold to 1
3862          * and make sure the granularity is "descriptors" and not "cache lines"
3863          */
3864         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3865
3866         ew32(RXDCTL(0), rxdctl);
3867         /* momentarily enable the RX ring for the changes to take effect */
3868         ew32(RCTL, rctl | E1000_RCTL_EN);
3869         e1e_flush();
3870         usleep_range(100, 150);
3871         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3872 }
3873
3874 /**
3875  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3876  *
3877  * In i219, the descriptor rings must be emptied before resetting the HW
3878  * or before changing the device state to D3 during runtime (runtime PM).
3879  *
3880  * Failure to do this will cause the HW to enter a unit hang state which can
3881  * only be released by PCI reset on the device
3882  *
3883  */
3884
3885 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3886 {
3887         u16 hang_state;
3888         u32 fext_nvm11, tdlen;
3889         struct e1000_hw *hw = &adapter->hw;
3890
3891         /* First, disable MULR fix in FEXTNVM11 */
3892         fext_nvm11 = er32(FEXTNVM11);
3893         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3894         ew32(FEXTNVM11, fext_nvm11);
3895         /* do nothing if we're not in faulty state, or if the queue is empty */
3896         tdlen = er32(TDLEN(0));
3897         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3898                              &hang_state);
3899         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3900                 return;
3901         e1000_flush_tx_ring(adapter);
3902         /* recheck, maybe the fault is caused by the rx ring */
3903         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3904                              &hang_state);
3905         if (hang_state & FLUSH_DESC_REQUIRED)
3906                 e1000_flush_rx_ring(adapter);
3907 }
3908
3909 /**
3910  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3911  * @adapter: board private structure
3912  *
3913  * When the MAC is reset, all hardware bits for timesync will be reset to the
3914  * default values. This function will restore the settings last in place.
3915  * Since the clock SYSTIME registers are reset, we will simply restore the
3916  * cyclecounter to the kernel real clock time.
3917  **/
3918 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3919 {
3920         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3921         struct e1000_hw *hw = &adapter->hw;
3922         unsigned long flags;
3923         u32 timinca;
3924         s32 ret_val;
3925
3926         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3927                 return;
3928
3929         if (info->adjfreq) {
3930                 /* restore the previous ptp frequency delta */
3931                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3932         } else {
3933                 /* set the default base frequency if no adjustment possible */
3934                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3935                 if (!ret_val)
3936                         ew32(TIMINCA, timinca);
3937         }
3938
3939         if (ret_val) {
3940                 dev_warn(&adapter->pdev->dev,
3941                          "Failed to restore TIMINCA clock rate delta: %d\n",
3942                          ret_val);
3943                 return;
3944         }
3945
3946         /* reset the systim ns time counter */
3947         spin_lock_irqsave(&adapter->systim_lock, flags);
3948         timecounter_init(&adapter->tc, &adapter->cc,
3949                          ktime_to_ns(ktime_get_real()));
3950         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3951
3952         /* restore the previous hwtstamp configuration settings */
3953         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3954 }
3955
3956 /**
3957  * e1000e_reset - bring the hardware into a known good state
3958  *
3959  * This function boots the hardware and enables some settings that
3960  * require a configuration cycle of the hardware - those cannot be
3961  * set/changed during runtime. After reset the device needs to be
3962  * properly configured for Rx, Tx etc.
3963  */
3964 void e1000e_reset(struct e1000_adapter *adapter)
3965 {
3966         struct e1000_mac_info *mac = &adapter->hw.mac;
3967         struct e1000_fc_info *fc = &adapter->hw.fc;
3968         struct e1000_hw *hw = &adapter->hw;
3969         u32 tx_space, min_tx_space, min_rx_space;
3970         u32 pba = adapter->pba;
3971         u16 hwm;
3972
3973         /* reset Packet Buffer Allocation to default */
3974         ew32(PBA, pba);
3975
3976         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3977                 /* To maintain wire speed transmits, the Tx FIFO should be
3978                  * large enough to accommodate two full transmit packets,
3979                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3980                  * the Rx FIFO should be large enough to accommodate at least
3981                  * one full receive packet and is similarly rounded up and
3982                  * expressed in KB.
3983                  */
3984                 pba = er32(PBA);
3985                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3986                 tx_space = pba >> 16;
3987                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3988                 pba &= 0xffff;
3989                 /* the Tx fifo also stores 16 bytes of information about the Tx
3990                  * but don't include ethernet FCS because hardware appends it
3991                  */
3992                 min_tx_space = (adapter->max_frame_size +
3993                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3994                 min_tx_space = ALIGN(min_tx_space, 1024);
3995                 min_tx_space >>= 10;
3996                 /* software strips receive CRC, so leave room for it */
3997                 min_rx_space = adapter->max_frame_size;
3998                 min_rx_space = ALIGN(min_rx_space, 1024);
3999                 min_rx_space >>= 10;
4000
4001                 /* If current Tx allocation is less than the min Tx FIFO size,
4002                  * and the min Tx FIFO size is less than the current Rx FIFO
4003                  * allocation, take space away from current Rx allocation
4004                  */
4005                 if ((tx_space < min_tx_space) &&
4006                     ((min_tx_space - tx_space) < pba)) {
4007                         pba -= min_tx_space - tx_space;
4008
4009                         /* if short on Rx space, Rx wins and must trump Tx
4010                          * adjustment
4011                          */
4012                         if (pba < min_rx_space)
4013                                 pba = min_rx_space;
4014                 }
4015
4016                 ew32(PBA, pba);
4017         }
4018
4019         /* flow control settings
4020          *
4021          * The high water mark must be low enough to fit one full frame
4022          * (or the size used for early receive) above it in the Rx FIFO.
4023          * Set it to the lower of:
4024          * - 90% of the Rx FIFO size, and
4025          * - the full Rx FIFO size minus one full frame
4026          */
4027         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4028                 fc->pause_time = 0xFFFF;
4029         else
4030                 fc->pause_time = E1000_FC_PAUSE_TIME;
4031         fc->send_xon = true;
4032         fc->current_mode = fc->requested_mode;
4033
4034         switch (hw->mac.type) {
4035         case e1000_ich9lan:
4036         case e1000_ich10lan:
4037                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4038                         pba = 14;
4039                         ew32(PBA, pba);
4040                         fc->high_water = 0x2800;
4041                         fc->low_water = fc->high_water - 8;
4042                         break;
4043                 }
4044                 /* fall-through */
4045         default:
4046                 hwm = min(((pba << 10) * 9 / 10),
4047                           ((pba << 10) - adapter->max_frame_size));
4048
4049                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4050                 fc->low_water = fc->high_water - 8;
4051                 break;
4052         case e1000_pchlan:
4053                 /* Workaround PCH LOM adapter hangs with certain network
4054                  * loads.  If hangs persist, try disabling Tx flow control.
4055                  */
4056                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4057                         fc->high_water = 0x3500;
4058                         fc->low_water = 0x1500;
4059                 } else {
4060                         fc->high_water = 0x5000;
4061                         fc->low_water = 0x3000;
4062                 }
4063                 fc->refresh_time = 0x1000;
4064                 break;
4065         case e1000_pch2lan:
4066         case e1000_pch_lpt:
4067         case e1000_pch_spt:
4068         case e1000_pch_cnp:
4069                 fc->refresh_time = 0x0400;
4070
4071                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4072                         fc->high_water = 0x05C20;
4073                         fc->low_water = 0x05048;
4074                         fc->pause_time = 0x0650;
4075                         break;
4076                 }
4077
4078                 pba = 14;
4079                 ew32(PBA, pba);
4080                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4081                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4082                 break;
4083         }
4084
4085         /* Alignment of Tx data is on an arbitrary byte boundary with the
4086          * maximum size per Tx descriptor limited only to the transmit
4087          * allocation of the packet buffer minus 96 bytes with an upper
4088          * limit of 24KB due to receive synchronization limitations.
4089          */
4090         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4091                                        24 << 10);
4092
4093         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4094          * fit in receive buffer.
4095          */
4096         if (adapter->itr_setting & 0x3) {
4097                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4098                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4099                                 dev_info(&adapter->pdev->dev,
4100                                          "Interrupt Throttle Rate off\n");
4101                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4102                                 e1000e_write_itr(adapter, 0);
4103                         }
4104                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4105                         dev_info(&adapter->pdev->dev,
4106                                  "Interrupt Throttle Rate on\n");
4107                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4108                         adapter->itr = 20000;
4109                         e1000e_write_itr(adapter, adapter->itr);
4110                 }
4111         }
4112
4113         if (hw->mac.type >= e1000_pch_spt)
4114                 e1000_flush_desc_rings(adapter);
4115         /* Allow time for pending master requests to run */
4116         mac->ops.reset_hw(hw);
4117
4118         /* For parts with AMT enabled, let the firmware know
4119          * that the network interface is in control
4120          */
4121         if (adapter->flags & FLAG_HAS_AMT)
4122                 e1000e_get_hw_control(adapter);
4123
4124         ew32(WUC, 0);
4125
4126         if (mac->ops.init_hw(hw))
4127                 e_err("Hardware Error\n");
4128
4129         e1000_update_mng_vlan(adapter);
4130
4131         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4132         ew32(VET, ETH_P_8021Q);
4133
4134         e1000e_reset_adaptive(hw);
4135
4136         /* restore systim and hwtstamp settings */
4137         e1000e_systim_reset(adapter);
4138
4139         /* Set EEE advertisement as appropriate */
4140         if (adapter->flags2 & FLAG2_HAS_EEE) {
4141                 s32 ret_val;
4142                 u16 adv_addr;
4143
4144                 switch (hw->phy.type) {
4145                 case e1000_phy_82579:
4146                         adv_addr = I82579_EEE_ADVERTISEMENT;
4147                         break;
4148                 case e1000_phy_i217:
4149                         adv_addr = I217_EEE_ADVERTISEMENT;
4150                         break;
4151                 default:
4152                         dev_err(&adapter->pdev->dev,
4153                                 "Invalid PHY type setting EEE advertisement\n");
4154                         return;
4155                 }
4156
4157                 ret_val = hw->phy.ops.acquire(hw);
4158                 if (ret_val) {
4159                         dev_err(&adapter->pdev->dev,
4160                                 "EEE advertisement - unable to acquire PHY\n");
4161                         return;
4162                 }
4163
4164                 e1000_write_emi_reg_locked(hw, adv_addr,
4165                                            hw->dev_spec.ich8lan.eee_disable ?
4166                                            0 : adapter->eee_advert);
4167
4168                 hw->phy.ops.release(hw);
4169         }
4170
4171         if (!netif_running(adapter->netdev) &&
4172             !test_bit(__E1000_TESTING, &adapter->state))
4173                 e1000_power_down_phy(adapter);
4174
4175         e1000_get_phy_info(hw);
4176
4177         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4178             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4179                 u16 phy_data = 0;
4180                 /* speed up time to link by disabling smart power down, ignore
4181                  * the return value of this function because there is nothing
4182                  * different we would do if it failed
4183                  */
4184                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4185                 phy_data &= ~IGP02E1000_PM_SPD;
4186                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4187         }
4188         if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4189                 u32 reg;
4190
4191                 /* Fextnvm7 @ 0xe4[2] = 1 */
4192                 reg = er32(FEXTNVM7);
4193                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4194                 ew32(FEXTNVM7, reg);
4195                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4196                 reg = er32(FEXTNVM9);
4197                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4198                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4199                 ew32(FEXTNVM9, reg);
4200         }
4201
4202 }
4203
4204 /**
4205  * e1000e_trigger_lsc - trigger an LSC interrupt
4206  * @adapter:
4207  *
4208  * Fire a link status change interrupt to start the watchdog.
4209  **/
4210 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4211 {
4212         struct e1000_hw *hw = &adapter->hw;
4213
4214         if (adapter->msix_entries)
4215                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4216         else
4217                 ew32(ICS, E1000_ICS_LSC);
4218 }
4219
4220 void e1000e_up(struct e1000_adapter *adapter)
4221 {
4222         /* hardware has been reset, we need to reload some things */
4223         e1000_configure(adapter);
4224
4225         clear_bit(__E1000_DOWN, &adapter->state);
4226
4227         if (adapter->msix_entries)
4228                 e1000_configure_msix(adapter);
4229         e1000_irq_enable(adapter);
4230
4231         /* Tx queue started by watchdog timer when link is up */
4232
4233         e1000e_trigger_lsc(adapter);
4234 }
4235
4236 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4237 {
4238         struct e1000_hw *hw = &adapter->hw;
4239
4240         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4241                 return;
4242
4243         /* flush pending descriptor writebacks to memory */
4244         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4245         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4246
4247         /* execute the writes immediately */
4248         e1e_flush();
4249
4250         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4251          * write is successful
4252          */
4253         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4254         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4255
4256         /* execute the writes immediately */
4257         e1e_flush();
4258 }
4259
4260 static void e1000e_update_stats(struct e1000_adapter *adapter);
4261
4262 /**
4263  * e1000e_down - quiesce the device and optionally reset the hardware
4264  * @adapter: board private structure
4265  * @reset: boolean flag to reset the hardware or not
4266  */
4267 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4268 {
4269         struct net_device *netdev = adapter->netdev;
4270         struct e1000_hw *hw = &adapter->hw;
4271         u32 tctl, rctl;
4272
4273         /* signal that we're down so the interrupt handler does not
4274          * reschedule our watchdog timer
4275          */
4276         set_bit(__E1000_DOWN, &adapter->state);
4277
4278         netif_carrier_off(netdev);
4279
4280         /* disable receives in the hardware */
4281         rctl = er32(RCTL);
4282         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4283                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4284         /* flush and sleep below */
4285
4286         netif_stop_queue(netdev);
4287
4288         /* disable transmits in the hardware */
4289         tctl = er32(TCTL);
4290         tctl &= ~E1000_TCTL_EN;
4291         ew32(TCTL, tctl);
4292
4293         /* flush both disables and wait for them to finish */
4294         e1e_flush();
4295         usleep_range(10000, 20000);
4296
4297         e1000_irq_disable(adapter);
4298
4299         napi_synchronize(&adapter->napi);
4300
4301         del_timer_sync(&adapter->watchdog_timer);
4302         del_timer_sync(&adapter->phy_info_timer);
4303
4304         spin_lock(&adapter->stats64_lock);
4305         e1000e_update_stats(adapter);
4306         spin_unlock(&adapter->stats64_lock);
4307
4308         e1000e_flush_descriptors(adapter);
4309
4310         adapter->link_speed = 0;
4311         adapter->link_duplex = 0;
4312
4313         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4314         if ((hw->mac.type >= e1000_pch2lan) &&
4315             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4316             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4317                 e_dbg("failed to disable jumbo frame workaround mode\n");
4318
4319         if (!pci_channel_offline(adapter->pdev)) {
4320                 if (reset)
4321                         e1000e_reset(adapter);
4322                 else if (hw->mac.type >= e1000_pch_spt)
4323                         e1000_flush_desc_rings(adapter);
4324         }
4325         e1000_clean_tx_ring(adapter->tx_ring);
4326         e1000_clean_rx_ring(adapter->rx_ring);
4327 }
4328
4329 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4330 {
4331         might_sleep();
4332         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4333                 usleep_range(1000, 2000);
4334         e1000e_down(adapter, true);
4335         e1000e_up(adapter);
4336         clear_bit(__E1000_RESETTING, &adapter->state);
4337 }
4338
4339 /**
4340  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4341  * @hw: pointer to the HW structure
4342  * @systim: time value read, sanitized and returned
4343  *
4344  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4345  * check to see that the time is incrementing at a reasonable
4346  * rate and is a multiple of incvalue.
4347  **/
4348 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim)
4349 {
4350         u64 time_delta, rem, temp;
4351         u64 systim_next;
4352         u32 incvalue;
4353         int i;
4354
4355         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4356         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4357                 /* latch SYSTIMH on read of SYSTIML */
4358                 systim_next = (u64)er32(SYSTIML);
4359                 systim_next |= (u64)er32(SYSTIMH) << 32;
4360
4361                 time_delta = systim_next - systim;
4362                 temp = time_delta;
4363                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4364                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4365
4366                 systim = systim_next;
4367
4368                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4369                         break;
4370         }
4371
4372         return systim;
4373 }
4374
4375 /**
4376  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4377  * @cc: cyclecounter structure
4378  **/
4379 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4380 {
4381         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4382                                                      cc);
4383         struct e1000_hw *hw = &adapter->hw;
4384         u32 systimel, systimeh;
4385         u64 systim;
4386         /* SYSTIMH latching upon SYSTIML read does not work well.
4387          * This means that if SYSTIML overflows after we read it but before
4388          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4389          * will experience a huge non linear increment in the systime value
4390          * to fix that we test for overflow and if true, we re-read systime.
4391          */
4392         systimel = er32(SYSTIML);
4393         systimeh = er32(SYSTIMH);
4394         /* Is systimel is so large that overflow is possible? */
4395         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4396                 u32 systimel_2 = er32(SYSTIML);
4397                 if (systimel > systimel_2) {
4398                         /* There was an overflow, read again SYSTIMH, and use
4399                          * systimel_2
4400                          */
4401                         systimeh = er32(SYSTIMH);
4402                         systimel = systimel_2;
4403                 }
4404         }
4405         systim = (u64)systimel;
4406         systim |= (u64)systimeh << 32;
4407
4408         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4409                 systim = e1000e_sanitize_systim(hw, systim);
4410
4411         return systim;
4412 }
4413
4414 /**
4415  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4416  * @adapter: board private structure to initialize
4417  *
4418  * e1000_sw_init initializes the Adapter private data structure.
4419  * Fields are initialized based on PCI device information and
4420  * OS network device settings (MTU size).
4421  **/
4422 static int e1000_sw_init(struct e1000_adapter *adapter)
4423 {
4424         struct net_device *netdev = adapter->netdev;
4425
4426         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4427         adapter->rx_ps_bsize0 = 128;
4428         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4429         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4430         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4431         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4432
4433         spin_lock_init(&adapter->stats64_lock);
4434
4435         e1000e_set_interrupt_capability(adapter);
4436
4437         if (e1000_alloc_queues(adapter))
4438                 return -ENOMEM;
4439
4440         /* Setup hardware time stamping cyclecounter */
4441         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4442                 adapter->cc.read = e1000e_cyclecounter_read;
4443                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4444                 adapter->cc.mult = 1;
4445                 /* cc.shift set in e1000e_get_base_tininca() */
4446
4447                 spin_lock_init(&adapter->systim_lock);
4448                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4449         }
4450
4451         /* Explicitly disable IRQ since the NIC can be in any state. */
4452         e1000_irq_disable(adapter);
4453
4454         set_bit(__E1000_DOWN, &adapter->state);
4455         return 0;
4456 }
4457
4458 /**
4459  * e1000_intr_msi_test - Interrupt Handler
4460  * @irq: interrupt number
4461  * @data: pointer to a network interface device structure
4462  **/
4463 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4464 {
4465         struct net_device *netdev = data;
4466         struct e1000_adapter *adapter = netdev_priv(netdev);
4467         struct e1000_hw *hw = &adapter->hw;
4468         u32 icr = er32(ICR);
4469
4470         e_dbg("icr is %08X\n", icr);
4471         if (icr & E1000_ICR_RXSEQ) {
4472                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4473                 /* Force memory writes to complete before acknowledging the
4474                  * interrupt is handled.
4475                  */
4476                 wmb();
4477         }
4478
4479         return IRQ_HANDLED;
4480 }
4481
4482 /**
4483  * e1000_test_msi_interrupt - Returns 0 for successful test
4484  * @adapter: board private struct
4485  *
4486  * code flow taken from tg3.c
4487  **/
4488 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4489 {
4490         struct net_device *netdev = adapter->netdev;
4491         struct e1000_hw *hw = &adapter->hw;
4492         int err;
4493
4494         /* poll_enable hasn't been called yet, so don't need disable */
4495         /* clear any pending events */
4496         er32(ICR);
4497
4498         /* free the real vector and request a test handler */
4499         e1000_free_irq(adapter);
4500         e1000e_reset_interrupt_capability(adapter);
4501
4502         /* Assume that the test fails, if it succeeds then the test
4503          * MSI irq handler will unset this flag
4504          */
4505         adapter->flags |= FLAG_MSI_TEST_FAILED;
4506
4507         err = pci_enable_msi(adapter->pdev);
4508         if (err)
4509                 goto msi_test_failed;
4510
4511         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4512                           netdev->name, netdev);
4513         if (err) {
4514                 pci_disable_msi(adapter->pdev);
4515                 goto msi_test_failed;
4516         }
4517
4518         /* Force memory writes to complete before enabling and firing an
4519          * interrupt.
4520          */
4521         wmb();
4522
4523         e1000_irq_enable(adapter);
4524
4525         /* fire an unusual interrupt on the test handler */
4526         ew32(ICS, E1000_ICS_RXSEQ);
4527         e1e_flush();
4528         msleep(100);
4529
4530         e1000_irq_disable(adapter);
4531
4532         rmb();                  /* read flags after interrupt has been fired */
4533
4534         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4535                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4536                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4537         } else {
4538                 e_dbg("MSI interrupt test succeeded!\n");
4539         }
4540
4541         free_irq(adapter->pdev->irq, netdev);
4542         pci_disable_msi(adapter->pdev);
4543
4544 msi_test_failed:
4545         e1000e_set_interrupt_capability(adapter);
4546         return e1000_request_irq(adapter);
4547 }
4548
4549 /**
4550  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4551  * @adapter: board private struct
4552  *
4553  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4554  **/
4555 static int e1000_test_msi(struct e1000_adapter *adapter)
4556 {
4557         int err;
4558         u16 pci_cmd;
4559
4560         if (!(adapter->flags & FLAG_MSI_ENABLED))
4561                 return 0;
4562
4563         /* disable SERR in case the MSI write causes a master abort */
4564         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4565         if (pci_cmd & PCI_COMMAND_SERR)
4566                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4567                                       pci_cmd & ~PCI_COMMAND_SERR);
4568
4569         err = e1000_test_msi_interrupt(adapter);
4570
4571         /* re-enable SERR */
4572         if (pci_cmd & PCI_COMMAND_SERR) {
4573                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4574                 pci_cmd |= PCI_COMMAND_SERR;
4575                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4576         }
4577
4578         return err;
4579 }
4580
4581 /**
4582  * e1000e_open - Called when a network interface is made active
4583  * @netdev: network interface device structure
4584  *
4585  * Returns 0 on success, negative value on failure
4586  *
4587  * The open entry point is called when a network interface is made
4588  * active by the system (IFF_UP).  At this point all resources needed
4589  * for transmit and receive operations are allocated, the interrupt
4590  * handler is registered with the OS, the watchdog timer is started,
4591  * and the stack is notified that the interface is ready.
4592  **/
4593 int e1000e_open(struct net_device *netdev)
4594 {
4595         struct e1000_adapter *adapter = netdev_priv(netdev);
4596         struct e1000_hw *hw = &adapter->hw;
4597         struct pci_dev *pdev = adapter->pdev;
4598         int err;
4599
4600         /* disallow open during test */
4601         if (test_bit(__E1000_TESTING, &adapter->state))
4602                 return -EBUSY;
4603
4604         pm_runtime_get_sync(&pdev->dev);
4605
4606         netif_carrier_off(netdev);
4607         netif_stop_queue(netdev);
4608
4609         /* allocate transmit descriptors */
4610         err = e1000e_setup_tx_resources(adapter->tx_ring);
4611         if (err)
4612                 goto err_setup_tx;
4613
4614         /* allocate receive descriptors */
4615         err = e1000e_setup_rx_resources(adapter->rx_ring);
4616         if (err)
4617                 goto err_setup_rx;
4618
4619         /* If AMT is enabled, let the firmware know that the network
4620          * interface is now open and reset the part to a known state.
4621          */
4622         if (adapter->flags & FLAG_HAS_AMT) {
4623                 e1000e_get_hw_control(adapter);
4624                 e1000e_reset(adapter);
4625         }
4626
4627         e1000e_power_up_phy(adapter);
4628
4629         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4630         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4631                 e1000_update_mng_vlan(adapter);
4632
4633         /* DMA latency requirement to workaround jumbo issue */
4634         pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4635                            PM_QOS_DEFAULT_VALUE);
4636
4637         /* before we allocate an interrupt, we must be ready to handle it.
4638          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4639          * as soon as we call pci_request_irq, so we have to setup our
4640          * clean_rx handler before we do so.
4641          */
4642         e1000_configure(adapter);
4643
4644         err = e1000_request_irq(adapter);
4645         if (err)
4646                 goto err_req_irq;
4647
4648         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4649          * ignore e1000e MSI messages, which means we need to test our MSI
4650          * interrupt now
4651          */
4652         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4653                 err = e1000_test_msi(adapter);
4654                 if (err) {
4655                         e_err("Interrupt allocation failed\n");
4656                         goto err_req_irq;
4657                 }
4658         }
4659
4660         /* From here on the code is the same as e1000e_up() */
4661         clear_bit(__E1000_DOWN, &adapter->state);
4662
4663         napi_enable(&adapter->napi);
4664
4665         e1000_irq_enable(adapter);
4666
4667         adapter->tx_hang_recheck = false;
4668
4669         hw->mac.get_link_status = true;
4670         pm_runtime_put(&pdev->dev);
4671
4672         e1000e_trigger_lsc(adapter);
4673
4674         return 0;
4675
4676 err_req_irq:
4677         pm_qos_remove_request(&adapter->pm_qos_req);
4678         e1000e_release_hw_control(adapter);
4679         e1000_power_down_phy(adapter);
4680         e1000e_free_rx_resources(adapter->rx_ring);
4681 err_setup_rx:
4682         e1000e_free_tx_resources(adapter->tx_ring);
4683 err_setup_tx:
4684         e1000e_reset(adapter);
4685         pm_runtime_put_sync(&pdev->dev);
4686
4687         return err;
4688 }
4689
4690 /**
4691  * e1000e_close - Disables a network interface
4692  * @netdev: network interface device structure
4693  *
4694  * Returns 0, this is not allowed to fail
4695  *
4696  * The close entry point is called when an interface is de-activated
4697  * by the OS.  The hardware is still under the drivers control, but
4698  * needs to be disabled.  A global MAC reset is issued to stop the
4699  * hardware, and all transmit and receive resources are freed.
4700  **/
4701 int e1000e_close(struct net_device *netdev)
4702 {
4703         struct e1000_adapter *adapter = netdev_priv(netdev);
4704         struct pci_dev *pdev = adapter->pdev;
4705         int count = E1000_CHECK_RESET_COUNT;
4706
4707         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4708                 usleep_range(10000, 20000);
4709
4710         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4711
4712         pm_runtime_get_sync(&pdev->dev);
4713
4714         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4715                 e1000e_down(adapter, true);
4716                 e1000_free_irq(adapter);
4717
4718                 /* Link status message must follow this format */
4719                 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4720         }
4721
4722         napi_disable(&adapter->napi);
4723
4724         e1000e_free_tx_resources(adapter->tx_ring);
4725         e1000e_free_rx_resources(adapter->rx_ring);
4726
4727         /* kill manageability vlan ID if supported, but not if a vlan with
4728          * the same ID is registered on the host OS (let 8021q kill it)
4729          */
4730         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4731                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4732                                        adapter->mng_vlan_id);
4733
4734         /* If AMT is enabled, let the firmware know that the network
4735          * interface is now closed
4736          */
4737         if ((adapter->flags & FLAG_HAS_AMT) &&
4738             !test_bit(__E1000_TESTING, &adapter->state))
4739                 e1000e_release_hw_control(adapter);
4740
4741         pm_qos_remove_request(&adapter->pm_qos_req);
4742
4743         pm_runtime_put_sync(&pdev->dev);
4744
4745         return 0;
4746 }
4747
4748 /**
4749  * e1000_set_mac - Change the Ethernet Address of the NIC
4750  * @netdev: network interface device structure
4751  * @p: pointer to an address structure
4752  *
4753  * Returns 0 on success, negative on failure
4754  **/
4755 static int e1000_set_mac(struct net_device *netdev, void *p)
4756 {
4757         struct e1000_adapter *adapter = netdev_priv(netdev);
4758         struct e1000_hw *hw = &adapter->hw;
4759         struct sockaddr *addr = p;
4760
4761         if (!is_valid_ether_addr(addr->sa_data))
4762                 return -EADDRNOTAVAIL;
4763
4764         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4765         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4766
4767         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4768
4769         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4770                 /* activate the work around */
4771                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4772
4773                 /* Hold a copy of the LAA in RAR[14] This is done so that
4774                  * between the time RAR[0] gets clobbered  and the time it
4775                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4776                  * of the RARs and no incoming packets directed to this port
4777                  * are dropped. Eventually the LAA will be in RAR[0] and
4778                  * RAR[14]
4779                  */
4780                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4781                                     adapter->hw.mac.rar_entry_count - 1);
4782         }
4783
4784         return 0;
4785 }
4786
4787 /**
4788  * e1000e_update_phy_task - work thread to update phy
4789  * @work: pointer to our work struct
4790  *
4791  * this worker thread exists because we must acquire a
4792  * semaphore to read the phy, which we could msleep while
4793  * waiting for it, and we can't msleep in a timer.
4794  **/
4795 static void e1000e_update_phy_task(struct work_struct *work)
4796 {
4797         struct e1000_adapter *adapter = container_of(work,
4798                                                      struct e1000_adapter,
4799                                                      update_phy_task);
4800         struct e1000_hw *hw = &adapter->hw;
4801
4802         if (test_bit(__E1000_DOWN, &adapter->state))
4803                 return;
4804
4805         e1000_get_phy_info(hw);
4806
4807         /* Enable EEE on 82579 after link up */
4808         if (hw->phy.type >= e1000_phy_82579)
4809                 e1000_set_eee_pchlan(hw);
4810 }
4811
4812 /**
4813  * e1000_update_phy_info - timre call-back to update PHY info
4814  * @data: pointer to adapter cast into an unsigned long
4815  *
4816  * Need to wait a few seconds after link up to get diagnostic information from
4817  * the phy
4818  **/
4819 static void e1000_update_phy_info(unsigned long data)
4820 {
4821         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4822
4823         if (test_bit(__E1000_DOWN, &adapter->state))
4824                 return;
4825
4826         schedule_work(&adapter->update_phy_task);
4827 }
4828
4829 /**
4830  * e1000e_update_phy_stats - Update the PHY statistics counters
4831  * @adapter: board private structure
4832  *
4833  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4834  **/
4835 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4836 {
4837         struct e1000_hw *hw = &adapter->hw;
4838         s32 ret_val;
4839         u16 phy_data;
4840
4841         ret_val = hw->phy.ops.acquire(hw);
4842         if (ret_val)
4843                 return;
4844
4845         /* A page set is expensive so check if already on desired page.
4846          * If not, set to the page with the PHY status registers.
4847          */
4848         hw->phy.addr = 1;
4849         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4850                                            &phy_data);
4851         if (ret_val)
4852                 goto release;
4853         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4854                 ret_val = hw->phy.ops.set_page(hw,
4855                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4856                 if (ret_val)
4857                         goto release;
4858         }
4859
4860         /* Single Collision Count */
4861         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4862         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4863         if (!ret_val)
4864                 adapter->stats.scc += phy_data;
4865
4866         /* Excessive Collision Count */
4867         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4868         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4869         if (!ret_val)
4870                 adapter->stats.ecol += phy_data;
4871
4872         /* Multiple Collision Count */
4873         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4874         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4875         if (!ret_val)
4876                 adapter->stats.mcc += phy_data;
4877
4878         /* Late Collision Count */
4879         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4880         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4881         if (!ret_val)
4882                 adapter->stats.latecol += phy_data;
4883
4884         /* Collision Count - also used for adaptive IFS */
4885         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4886         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4887         if (!ret_val)
4888                 hw->mac.collision_delta = phy_data;
4889
4890         /* Defer Count */
4891         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4892         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4893         if (!ret_val)
4894                 adapter->stats.dc += phy_data;
4895
4896         /* Transmit with no CRS */
4897         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4898         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4899         if (!ret_val)
4900                 adapter->stats.tncrs += phy_data;
4901
4902 release:
4903         hw->phy.ops.release(hw);
4904 }
4905
4906 /**
4907  * e1000e_update_stats - Update the board statistics counters
4908  * @adapter: board private structure
4909  **/
4910 static void e1000e_update_stats(struct e1000_adapter *adapter)
4911 {
4912         struct net_device *netdev = adapter->netdev;
4913         struct e1000_hw *hw = &adapter->hw;
4914         struct pci_dev *pdev = adapter->pdev;
4915
4916         /* Prevent stats update while adapter is being reset, or if the pci
4917          * connection is down.
4918          */
4919         if (adapter->link_speed == 0)
4920                 return;
4921         if (pci_channel_offline(pdev))
4922                 return;
4923
4924         adapter->stats.crcerrs += er32(CRCERRS);
4925         adapter->stats.gprc += er32(GPRC);
4926         adapter->stats.gorc += er32(GORCL);
4927         er32(GORCH);            /* Clear gorc */
4928         adapter->stats.bprc += er32(BPRC);
4929         adapter->stats.mprc += er32(MPRC);
4930         adapter->stats.roc += er32(ROC);
4931
4932         adapter->stats.mpc += er32(MPC);
4933
4934         /* Half-duplex statistics */
4935         if (adapter->link_duplex == HALF_DUPLEX) {
4936                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4937                         e1000e_update_phy_stats(adapter);
4938                 } else {
4939                         adapter->stats.scc += er32(SCC);
4940                         adapter->stats.ecol += er32(ECOL);
4941                         adapter->stats.mcc += er32(MCC);
4942                         adapter->stats.latecol += er32(LATECOL);
4943                         adapter->stats.dc += er32(DC);
4944
4945                         hw->mac.collision_delta = er32(COLC);
4946
4947                         if ((hw->mac.type != e1000_82574) &&
4948                             (hw->mac.type != e1000_82583))
4949                                 adapter->stats.tncrs += er32(TNCRS);
4950                 }
4951                 adapter->stats.colc += hw->mac.collision_delta;
4952         }
4953
4954         adapter->stats.xonrxc += er32(XONRXC);
4955         adapter->stats.xontxc += er32(XONTXC);
4956         adapter->stats.xoffrxc += er32(XOFFRXC);
4957         adapter->stats.xofftxc += er32(XOFFTXC);
4958         adapter->stats.gptc += er32(GPTC);
4959         adapter->stats.gotc += er32(GOTCL);
4960         er32(GOTCH);            /* Clear gotc */
4961         adapter->stats.rnbc += er32(RNBC);
4962         adapter->stats.ruc += er32(RUC);
4963
4964         adapter->stats.mptc += er32(MPTC);
4965         adapter->stats.bptc += er32(BPTC);
4966
4967         /* used for adaptive IFS */
4968
4969         hw->mac.tx_packet_delta = er32(TPT);
4970         adapter->stats.tpt += hw->mac.tx_packet_delta;
4971
4972         adapter->stats.algnerrc += er32(ALGNERRC);
4973         adapter->stats.rxerrc += er32(RXERRC);
4974         adapter->stats.cexterr += er32(CEXTERR);
4975         adapter->stats.tsctc += er32(TSCTC);
4976         adapter->stats.tsctfc += er32(TSCTFC);
4977
4978         /* Fill out the OS statistics structure */
4979         netdev->stats.multicast = adapter->stats.mprc;
4980         netdev->stats.collisions = adapter->stats.colc;
4981
4982         /* Rx Errors */
4983
4984         /* RLEC on some newer hardware can be incorrect so build
4985          * our own version based on RUC and ROC
4986          */
4987         netdev->stats.rx_errors = adapter->stats.rxerrc +
4988             adapter->stats.crcerrs + adapter->stats.algnerrc +
4989             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4990         netdev->stats.rx_length_errors = adapter->stats.ruc +
4991             adapter->stats.roc;
4992         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4993         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4994         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4995
4996         /* Tx Errors */
4997         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4998         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4999         netdev->stats.tx_window_errors = adapter->stats.latecol;
5000         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5001
5002         /* Tx Dropped needs to be maintained elsewhere */
5003
5004         /* Management Stats */
5005         adapter->stats.mgptc += er32(MGTPTC);
5006         adapter->stats.mgprc += er32(MGTPRC);
5007         adapter->stats.mgpdc += er32(MGTPDC);
5008
5009         /* Correctable ECC Errors */
5010         if (hw->mac.type >= e1000_pch_lpt) {
5011                 u32 pbeccsts = er32(PBECCSTS);
5012
5013                 adapter->corr_errors +=
5014                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5015                 adapter->uncorr_errors +=
5016                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5017                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5018         }
5019 }
5020
5021 /**
5022  * e1000_phy_read_status - Update the PHY register status snapshot
5023  * @adapter: board private structure
5024  **/
5025 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5026 {
5027         struct e1000_hw *hw = &adapter->hw;
5028         struct e1000_phy_regs *phy = &adapter->phy_regs;
5029
5030         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5031             (er32(STATUS) & E1000_STATUS_LU) &&
5032             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5033                 int ret_val;
5034
5035                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5036                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5037                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5038                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5039                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5040                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5041                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5042                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5043                 if (ret_val)
5044                         e_warn("Error reading PHY register\n");
5045         } else {
5046                 /* Do not read PHY registers if link is not up
5047                  * Set values to typical power-on defaults
5048                  */
5049                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5050                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5051                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5052                              BMSR_ERCAP);
5053                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5054                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5055                 phy->lpa = 0;
5056                 phy->expansion = EXPANSION_ENABLENPAGE;
5057                 phy->ctrl1000 = ADVERTISE_1000FULL;
5058                 phy->stat1000 = 0;
5059                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5060         }
5061 }
5062
5063 static void e1000_print_link_info(struct e1000_adapter *adapter)
5064 {
5065         struct e1000_hw *hw = &adapter->hw;
5066         u32 ctrl = er32(CTRL);
5067
5068         /* Link status message must follow this format for user tools */
5069         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5070                 adapter->netdev->name, adapter->link_speed,
5071                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5072                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5073                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5074                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5075 }
5076
5077 static bool e1000e_has_link(struct e1000_adapter *adapter)
5078 {
5079         struct e1000_hw *hw = &adapter->hw;
5080         bool link_active = false;
5081         s32 ret_val = 0;
5082
5083         /* get_link_status is set on LSC (link status) interrupt or
5084          * Rx sequence error interrupt.  get_link_status will stay
5085          * false until the check_for_link establishes link
5086          * for copper adapters ONLY
5087          */
5088         switch (hw->phy.media_type) {
5089         case e1000_media_type_copper:
5090                 if (hw->mac.get_link_status) {
5091                         ret_val = hw->mac.ops.check_for_link(hw);
5092                         link_active = !hw->mac.get_link_status;
5093                 } else {
5094                         link_active = true;
5095                 }
5096                 break;
5097         case e1000_media_type_fiber:
5098                 ret_val = hw->mac.ops.check_for_link(hw);
5099                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5100                 break;
5101         case e1000_media_type_internal_serdes:
5102                 ret_val = hw->mac.ops.check_for_link(hw);
5103                 link_active = adapter->hw.mac.serdes_has_link;
5104                 break;
5105         default:
5106         case e1000_media_type_unknown:
5107                 break;
5108         }
5109
5110         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5111             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5112                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5113                 e_info("Gigabit has been disabled, downgrading speed\n");
5114         }
5115
5116         return link_active;
5117 }
5118
5119 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5120 {
5121         /* make sure the receive unit is started */
5122         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5123             (adapter->flags & FLAG_RESTART_NOW)) {
5124                 struct e1000_hw *hw = &adapter->hw;
5125                 u32 rctl = er32(RCTL);
5126
5127                 ew32(RCTL, rctl | E1000_RCTL_EN);
5128                 adapter->flags &= ~FLAG_RESTART_NOW;
5129         }
5130 }
5131
5132 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5133 {
5134         struct e1000_hw *hw = &adapter->hw;
5135
5136         /* With 82574 controllers, PHY needs to be checked periodically
5137          * for hung state and reset, if two calls return true
5138          */
5139         if (e1000_check_phy_82574(hw))
5140                 adapter->phy_hang_count++;
5141         else
5142                 adapter->phy_hang_count = 0;
5143
5144         if (adapter->phy_hang_count > 1) {
5145                 adapter->phy_hang_count = 0;
5146                 e_dbg("PHY appears hung - resetting\n");
5147                 schedule_work(&adapter->reset_task);
5148         }
5149 }
5150
5151 /**
5152  * e1000_watchdog - Timer Call-back
5153  * @data: pointer to adapter cast into an unsigned long
5154  **/
5155 static void e1000_watchdog(unsigned long data)
5156 {
5157         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5158
5159         /* Do the rest outside of interrupt context */
5160         schedule_work(&adapter->watchdog_task);
5161
5162         /* TODO: make this use queue_delayed_work() */
5163 }
5164
5165 static void e1000_watchdog_task(struct work_struct *work)
5166 {
5167         struct e1000_adapter *adapter = container_of(work,
5168                                                      struct e1000_adapter,
5169                                                      watchdog_task);
5170         struct net_device *netdev = adapter->netdev;
5171         struct e1000_mac_info *mac = &adapter->hw.mac;
5172         struct e1000_phy_info *phy = &adapter->hw.phy;
5173         struct e1000_ring *tx_ring = adapter->tx_ring;
5174         struct e1000_hw *hw = &adapter->hw;
5175         u32 link, tctl;
5176
5177         if (test_bit(__E1000_DOWN, &adapter->state))
5178                 return;
5179
5180         link = e1000e_has_link(adapter);
5181         if ((netif_carrier_ok(netdev)) && link) {
5182                 /* Cancel scheduled suspend requests. */
5183                 pm_runtime_resume(netdev->dev.parent);
5184
5185                 e1000e_enable_receives(adapter);
5186                 goto link_up;
5187         }
5188
5189         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5190             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5191                 e1000_update_mng_vlan(adapter);
5192
5193         if (link) {
5194                 if (!netif_carrier_ok(netdev)) {
5195                         bool txb2b = true;
5196
5197                         /* Cancel scheduled suspend requests. */
5198                         pm_runtime_resume(netdev->dev.parent);
5199
5200                         /* update snapshot of PHY registers on LSC */
5201                         e1000_phy_read_status(adapter);
5202                         mac->ops.get_link_up_info(&adapter->hw,
5203                                                   &adapter->link_speed,
5204                                                   &adapter->link_duplex);
5205                         e1000_print_link_info(adapter);
5206
5207                         /* check if SmartSpeed worked */
5208                         e1000e_check_downshift(hw);
5209                         if (phy->speed_downgraded)
5210                                 netdev_warn(netdev,
5211                                             "Link Speed was downgraded by SmartSpeed\n");
5212
5213                         /* On supported PHYs, check for duplex mismatch only
5214                          * if link has autonegotiated at 10/100 half
5215                          */
5216                         if ((hw->phy.type == e1000_phy_igp_3 ||
5217                              hw->phy.type == e1000_phy_bm) &&
5218                             hw->mac.autoneg &&
5219                             (adapter->link_speed == SPEED_10 ||
5220                              adapter->link_speed == SPEED_100) &&
5221                             (adapter->link_duplex == HALF_DUPLEX)) {
5222                                 u16 autoneg_exp;
5223
5224                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5225
5226                                 if (!(autoneg_exp & EXPANSION_NWAY))
5227                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5228                         }
5229
5230                         /* adjust timeout factor according to speed/duplex */
5231                         adapter->tx_timeout_factor = 1;
5232                         switch (adapter->link_speed) {
5233                         case SPEED_10:
5234                                 txb2b = false;
5235                                 adapter->tx_timeout_factor = 16;
5236                                 break;
5237                         case SPEED_100:
5238                                 txb2b = false;
5239                                 adapter->tx_timeout_factor = 10;
5240                                 break;
5241                         }
5242
5243                         /* workaround: re-program speed mode bit after
5244                          * link-up event
5245                          */
5246                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5247                             !txb2b) {
5248                                 u32 tarc0;
5249
5250                                 tarc0 = er32(TARC(0));
5251                                 tarc0 &= ~SPEED_MODE_BIT;
5252                                 ew32(TARC(0), tarc0);
5253                         }
5254
5255                         /* disable TSO for pcie and 10/100 speeds, to avoid
5256                          * some hardware issues
5257                          */
5258                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5259                                 switch (adapter->link_speed) {
5260                                 case SPEED_10:
5261                                 case SPEED_100:
5262                                         e_info("10/100 speed: disabling TSO\n");
5263                                         netdev->features &= ~NETIF_F_TSO;
5264                                         netdev->features &= ~NETIF_F_TSO6;
5265                                         break;
5266                                 case SPEED_1000:
5267                                         netdev->features |= NETIF_F_TSO;
5268                                         netdev->features |= NETIF_F_TSO6;
5269                                         break;
5270                                 default:
5271                                         /* oops */
5272                                         break;
5273                                 }
5274                         }
5275
5276                         /* enable transmits in the hardware, need to do this
5277                          * after setting TARC(0)
5278                          */
5279                         tctl = er32(TCTL);
5280                         tctl |= E1000_TCTL_EN;
5281                         ew32(TCTL, tctl);
5282
5283                         /* Perform any post-link-up configuration before
5284                          * reporting link up.
5285                          */
5286                         if (phy->ops.cfg_on_link_up)
5287                                 phy->ops.cfg_on_link_up(hw);
5288
5289                         netif_wake_queue(netdev);
5290                         netif_carrier_on(netdev);
5291
5292                         if (!test_bit(__E1000_DOWN, &adapter->state))
5293                                 mod_timer(&adapter->phy_info_timer,
5294                                           round_jiffies(jiffies + 2 * HZ));
5295                 }
5296         } else {
5297                 if (netif_carrier_ok(netdev)) {
5298                         adapter->link_speed = 0;
5299                         adapter->link_duplex = 0;
5300                         /* Link status message must follow this format */
5301                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5302                         netif_carrier_off(netdev);
5303                         netif_stop_queue(netdev);
5304                         if (!test_bit(__E1000_DOWN, &adapter->state))
5305                                 mod_timer(&adapter->phy_info_timer,
5306                                           round_jiffies(jiffies + 2 * HZ));
5307
5308                         /* 8000ES2LAN requires a Rx packet buffer work-around
5309                          * on link down event; reset the controller to flush
5310                          * the Rx packet buffer.
5311                          */
5312                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5313                                 adapter->flags |= FLAG_RESTART_NOW;
5314                         else
5315                                 pm_schedule_suspend(netdev->dev.parent,
5316                                                     LINK_TIMEOUT);
5317                 }
5318         }
5319
5320 link_up:
5321         spin_lock(&adapter->stats64_lock);
5322         e1000e_update_stats(adapter);
5323
5324         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5325         adapter->tpt_old = adapter->stats.tpt;
5326         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5327         adapter->colc_old = adapter->stats.colc;
5328
5329         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5330         adapter->gorc_old = adapter->stats.gorc;
5331         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5332         adapter->gotc_old = adapter->stats.gotc;
5333         spin_unlock(&adapter->stats64_lock);
5334
5335         /* If the link is lost the controller stops DMA, but
5336          * if there is queued Tx work it cannot be done.  So
5337          * reset the controller to flush the Tx packet buffers.
5338          */
5339         if (!netif_carrier_ok(netdev) &&
5340             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5341                 adapter->flags |= FLAG_RESTART_NOW;
5342
5343         /* If reset is necessary, do it outside of interrupt context. */
5344         if (adapter->flags & FLAG_RESTART_NOW) {
5345                 schedule_work(&adapter->reset_task);
5346                 /* return immediately since reset is imminent */
5347                 return;
5348         }
5349
5350         e1000e_update_adaptive(&adapter->hw);
5351
5352         /* Simple mode for Interrupt Throttle Rate (ITR) */
5353         if (adapter->itr_setting == 4) {
5354                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5355                  * Total asymmetrical Tx or Rx gets ITR=8000;
5356                  * everyone else is between 2000-8000.
5357                  */
5358                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5359                 u32 dif = (adapter->gotc > adapter->gorc ?
5360                            adapter->gotc - adapter->gorc :
5361                            adapter->gorc - adapter->gotc) / 10000;
5362                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5363
5364                 e1000e_write_itr(adapter, itr);
5365         }
5366
5367         /* Cause software interrupt to ensure Rx ring is cleaned */
5368         if (adapter->msix_entries)
5369                 ew32(ICS, adapter->rx_ring->ims_val);
5370         else
5371                 ew32(ICS, E1000_ICS_RXDMT0);
5372
5373         /* flush pending descriptors to memory before detecting Tx hang */
5374         e1000e_flush_descriptors(adapter);
5375
5376         /* Force detection of hung controller every watchdog period */
5377         adapter->detect_tx_hung = true;
5378
5379         /* With 82571 controllers, LAA may be overwritten due to controller
5380          * reset from the other port. Set the appropriate LAA in RAR[0]
5381          */
5382         if (e1000e_get_laa_state_82571(hw))
5383                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5384
5385         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5386                 e1000e_check_82574_phy_workaround(adapter);
5387
5388         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5389         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5390                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5391                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5392                         er32(RXSTMPH);
5393                         adapter->rx_hwtstamp_cleared++;
5394                 } else {
5395                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5396                 }
5397         }
5398
5399         /* Reset the timer */
5400         if (!test_bit(__E1000_DOWN, &adapter->state))
5401                 mod_timer(&adapter->watchdog_timer,
5402                           round_jiffies(jiffies + 2 * HZ));
5403 }
5404
5405 #define E1000_TX_FLAGS_CSUM             0x00000001
5406 #define E1000_TX_FLAGS_VLAN             0x00000002
5407 #define E1000_TX_FLAGS_TSO              0x00000004
5408 #define E1000_TX_FLAGS_IPV4             0x00000008
5409 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5410 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5411 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5412 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5413
5414 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5415                      __be16 protocol)
5416 {
5417         struct e1000_context_desc *context_desc;
5418         struct e1000_buffer *buffer_info;
5419         unsigned int i;
5420         u32 cmd_length = 0;
5421         u16 ipcse = 0, mss;
5422         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5423         int err;
5424
5425         if (!skb_is_gso(skb))
5426                 return 0;
5427
5428         err = skb_cow_head(skb, 0);
5429         if (err < 0)
5430                 return err;
5431
5432         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5433         mss = skb_shinfo(skb)->gso_size;
5434         if (protocol == htons(ETH_P_IP)) {
5435                 struct iphdr *iph = ip_hdr(skb);
5436                 iph->tot_len = 0;
5437                 iph->check = 0;
5438                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5439                                                          0, IPPROTO_TCP, 0);
5440                 cmd_length = E1000_TXD_CMD_IP;
5441                 ipcse = skb_transport_offset(skb) - 1;
5442         } else if (skb_is_gso_v6(skb)) {
5443                 ipv6_hdr(skb)->payload_len = 0;
5444                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5445                                                        &ipv6_hdr(skb)->daddr,
5446                                                        0, IPPROTO_TCP, 0);
5447                 ipcse = 0;
5448         }
5449         ipcss = skb_network_offset(skb);
5450         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5451         tucss = skb_transport_offset(skb);
5452         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5453
5454         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5455                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5456
5457         i = tx_ring->next_to_use;
5458         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5459         buffer_info = &tx_ring->buffer_info[i];
5460
5461         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5462         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5463         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5464         context_desc->upper_setup.tcp_fields.tucss = tucss;
5465         context_desc->upper_setup.tcp_fields.tucso = tucso;
5466         context_desc->upper_setup.tcp_fields.tucse = 0;
5467         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5468         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5469         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5470
5471         buffer_info->time_stamp = jiffies;
5472         buffer_info->next_to_watch = i;
5473
5474         i++;
5475         if (i == tx_ring->count)
5476                 i = 0;
5477         tx_ring->next_to_use = i;
5478
5479         return 1;
5480 }
5481
5482 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5483                           __be16 protocol)
5484 {
5485         struct e1000_adapter *adapter = tx_ring->adapter;
5486         struct e1000_context_desc *context_desc;
5487         struct e1000_buffer *buffer_info;
5488         unsigned int i;
5489         u8 css;
5490         u32 cmd_len = E1000_TXD_CMD_DEXT;
5491
5492         if (skb->ip_summed != CHECKSUM_PARTIAL)
5493                 return false;
5494
5495         switch (protocol) {
5496         case cpu_to_be16(ETH_P_IP):
5497                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5498                         cmd_len |= E1000_TXD_CMD_TCP;
5499                 break;
5500         case cpu_to_be16(ETH_P_IPV6):
5501                 /* XXX not handling all IPV6 headers */
5502                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5503                         cmd_len |= E1000_TXD_CMD_TCP;
5504                 break;
5505         default:
5506                 if (unlikely(net_ratelimit()))
5507                         e_warn("checksum_partial proto=%x!\n",
5508                                be16_to_cpu(protocol));
5509                 break;
5510         }
5511
5512         css = skb_checksum_start_offset(skb);
5513
5514         i = tx_ring->next_to_use;
5515         buffer_info = &tx_ring->buffer_info[i];
5516         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5517
5518         context_desc->lower_setup.ip_config = 0;
5519         context_desc->upper_setup.tcp_fields.tucss = css;
5520         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5521         context_desc->upper_setup.tcp_fields.tucse = 0;
5522         context_desc->tcp_seg_setup.data = 0;
5523         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5524
5525         buffer_info->time_stamp = jiffies;
5526         buffer_info->next_to_watch = i;
5527
5528         i++;
5529         if (i == tx_ring->count)
5530                 i = 0;
5531         tx_ring->next_to_use = i;
5532
5533         return true;
5534 }
5535
5536 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5537                         unsigned int first, unsigned int max_per_txd,
5538                         unsigned int nr_frags)
5539 {
5540         struct e1000_adapter *adapter = tx_ring->adapter;
5541         struct pci_dev *pdev = adapter->pdev;
5542         struct e1000_buffer *buffer_info;
5543         unsigned int len = skb_headlen(skb);
5544         unsigned int offset = 0, size, count = 0, i;
5545         unsigned int f, bytecount, segs;
5546
5547         i = tx_ring->next_to_use;
5548
5549         while (len) {
5550                 buffer_info = &tx_ring->buffer_info[i];
5551                 size = min(len, max_per_txd);
5552
5553                 buffer_info->length = size;
5554                 buffer_info->time_stamp = jiffies;
5555                 buffer_info->next_to_watch = i;
5556                 buffer_info->dma = dma_map_single(&pdev->dev,
5557                                                   skb->data + offset,
5558                                                   size, DMA_TO_DEVICE);
5559                 buffer_info->mapped_as_page = false;
5560                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5561                         goto dma_error;
5562
5563                 len -= size;
5564                 offset += size;
5565                 count++;
5566
5567                 if (len) {
5568                         i++;
5569                         if (i == tx_ring->count)
5570                                 i = 0;
5571                 }
5572         }
5573
5574         for (f = 0; f < nr_frags; f++) {
5575                 const struct skb_frag_struct *frag;
5576
5577                 frag = &skb_shinfo(skb)->frags[f];
5578                 len = skb_frag_size(frag);
5579                 offset = 0;
5580
5581                 while (len) {
5582                         i++;
5583                         if (i == tx_ring->count)
5584                                 i = 0;
5585
5586                         buffer_info = &tx_ring->buffer_info[i];
5587                         size = min(len, max_per_txd);
5588
5589                         buffer_info->length = size;
5590                         buffer_info->time_stamp = jiffies;
5591                         buffer_info->next_to_watch = i;
5592                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5593                                                             offset, size,
5594                                                             DMA_TO_DEVICE);
5595                         buffer_info->mapped_as_page = true;
5596                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5597                                 goto dma_error;
5598
5599                         len -= size;
5600                         offset += size;
5601                         count++;
5602                 }
5603         }
5604
5605         segs = skb_shinfo(skb)->gso_segs ? : 1;
5606         /* multiply data chunks by size of headers */
5607         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5608
5609         tx_ring->buffer_info[i].skb = skb;
5610         tx_ring->buffer_info[i].segs = segs;
5611         tx_ring->buffer_info[i].bytecount = bytecount;
5612         tx_ring->buffer_info[first].next_to_watch = i;
5613
5614         return count;
5615
5616 dma_error:
5617         dev_err(&pdev->dev, "Tx DMA map failed\n");
5618         buffer_info->dma = 0;
5619         if (count)
5620                 count--;
5621
5622         while (count--) {
5623                 if (i == 0)
5624                         i += tx_ring->count;
5625                 i--;
5626                 buffer_info = &tx_ring->buffer_info[i];
5627                 e1000_put_txbuf(tx_ring, buffer_info);
5628         }
5629
5630         return 0;
5631 }
5632
5633 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5634 {
5635         struct e1000_adapter *adapter = tx_ring->adapter;
5636         struct e1000_tx_desc *tx_desc = NULL;
5637         struct e1000_buffer *buffer_info;
5638         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5639         unsigned int i;
5640
5641         if (tx_flags & E1000_TX_FLAGS_TSO) {
5642                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5643                     E1000_TXD_CMD_TSE;
5644                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5645
5646                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5647                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5648         }
5649
5650         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5651                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5652                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5653         }
5654
5655         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5656                 txd_lower |= E1000_TXD_CMD_VLE;
5657                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5658         }
5659
5660         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5661                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5662
5663         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5664                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5665                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5666         }
5667
5668         i = tx_ring->next_to_use;
5669
5670         do {
5671                 buffer_info = &tx_ring->buffer_info[i];
5672                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5673                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5674                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5675                                                   buffer_info->length);
5676                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5677
5678                 i++;
5679                 if (i == tx_ring->count)
5680                         i = 0;
5681         } while (--count > 0);
5682
5683         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5684
5685         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5686         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5687                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5688
5689         /* Force memory writes to complete before letting h/w
5690          * know there are new descriptors to fetch.  (Only
5691          * applicable for weak-ordered memory model archs,
5692          * such as IA-64).
5693          */
5694         wmb();
5695
5696         tx_ring->next_to_use = i;
5697 }
5698
5699 #define MINIMUM_DHCP_PACKET_SIZE 282
5700 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5701                                     struct sk_buff *skb)
5702 {
5703         struct e1000_hw *hw = &adapter->hw;
5704         u16 length, offset;
5705
5706         if (skb_vlan_tag_present(skb) &&
5707             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5708               (adapter->hw.mng_cookie.status &
5709                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5710                 return 0;
5711
5712         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5713                 return 0;
5714
5715         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5716                 return 0;
5717
5718         {
5719                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5720                 struct udphdr *udp;
5721
5722                 if (ip->protocol != IPPROTO_UDP)
5723                         return 0;
5724
5725                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5726                 if (ntohs(udp->dest) != 67)
5727                         return 0;
5728
5729                 offset = (u8 *)udp + 8 - skb->data;
5730                 length = skb->len - offset;
5731                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5732         }
5733
5734         return 0;
5735 }
5736
5737 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5738 {
5739         struct e1000_adapter *adapter = tx_ring->adapter;
5740
5741         netif_stop_queue(adapter->netdev);
5742         /* Herbert's original patch had:
5743          *  smp_mb__after_netif_stop_queue();
5744          * but since that doesn't exist yet, just open code it.
5745          */
5746         smp_mb();
5747
5748         /* We need to check again in a case another CPU has just
5749          * made room available.
5750          */
5751         if (e1000_desc_unused(tx_ring) < size)
5752                 return -EBUSY;
5753
5754         /* A reprieve! */
5755         netif_start_queue(adapter->netdev);
5756         ++adapter->restart_queue;
5757         return 0;
5758 }
5759
5760 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5761 {
5762         BUG_ON(size > tx_ring->count);
5763
5764         if (e1000_desc_unused(tx_ring) >= size)
5765                 return 0;
5766         return __e1000_maybe_stop_tx(tx_ring, size);
5767 }
5768
5769 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5770                                     struct net_device *netdev)
5771 {
5772         struct e1000_adapter *adapter = netdev_priv(netdev);
5773         struct e1000_ring *tx_ring = adapter->tx_ring;
5774         unsigned int first;
5775         unsigned int tx_flags = 0;
5776         unsigned int len = skb_headlen(skb);
5777         unsigned int nr_frags;
5778         unsigned int mss;
5779         int count = 0;
5780         int tso;
5781         unsigned int f;
5782         __be16 protocol = vlan_get_protocol(skb);
5783
5784         if (test_bit(__E1000_DOWN, &adapter->state)) {
5785                 dev_kfree_skb_any(skb);
5786                 return NETDEV_TX_OK;
5787         }
5788
5789         if (skb->len <= 0) {
5790                 dev_kfree_skb_any(skb);
5791                 return NETDEV_TX_OK;
5792         }
5793
5794         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5795          * pad skb in order to meet this minimum size requirement
5796          */
5797         if (skb_put_padto(skb, 17))
5798                 return NETDEV_TX_OK;
5799
5800         mss = skb_shinfo(skb)->gso_size;
5801         if (mss) {
5802                 u8 hdr_len;
5803
5804                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5805                  * points to just header, pull a few bytes of payload from
5806                  * frags into skb->data
5807                  */
5808                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5809                 /* we do this workaround for ES2LAN, but it is un-necessary,
5810                  * avoiding it could save a lot of cycles
5811                  */
5812                 if (skb->data_len && (hdr_len == len)) {
5813                         unsigned int pull_size;
5814
5815                         pull_size = min_t(unsigned int, 4, skb->data_len);
5816                         if (!__pskb_pull_tail(skb, pull_size)) {
5817                                 e_err("__pskb_pull_tail failed.\n");
5818                                 dev_kfree_skb_any(skb);
5819                                 return NETDEV_TX_OK;
5820                         }
5821                         len = skb_headlen(skb);
5822                 }
5823         }
5824
5825         /* reserve a descriptor for the offload context */
5826         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5827                 count++;
5828         count++;
5829
5830         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5831
5832         nr_frags = skb_shinfo(skb)->nr_frags;
5833         for (f = 0; f < nr_frags; f++)
5834                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5835                                       adapter->tx_fifo_limit);
5836
5837         if (adapter->hw.mac.tx_pkt_filtering)
5838                 e1000_transfer_dhcp_info(adapter, skb);
5839
5840         /* need: count + 2 desc gap to keep tail from touching
5841          * head, otherwise try next time
5842          */
5843         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5844                 return NETDEV_TX_BUSY;
5845
5846         if (skb_vlan_tag_present(skb)) {
5847                 tx_flags |= E1000_TX_FLAGS_VLAN;
5848                 tx_flags |= (skb_vlan_tag_get(skb) <<
5849                              E1000_TX_FLAGS_VLAN_SHIFT);
5850         }
5851
5852         first = tx_ring->next_to_use;
5853
5854         tso = e1000_tso(tx_ring, skb, protocol);
5855         if (tso < 0) {
5856                 dev_kfree_skb_any(skb);
5857                 return NETDEV_TX_OK;
5858         }
5859
5860         if (tso)
5861                 tx_flags |= E1000_TX_FLAGS_TSO;
5862         else if (e1000_tx_csum(tx_ring, skb, protocol))
5863                 tx_flags |= E1000_TX_FLAGS_CSUM;
5864
5865         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5866          * 82571 hardware supports TSO capabilities for IPv6 as well...
5867          * no longer assume, we must.
5868          */
5869         if (protocol == htons(ETH_P_IP))
5870                 tx_flags |= E1000_TX_FLAGS_IPV4;
5871
5872         if (unlikely(skb->no_fcs))
5873                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5874
5875         /* if count is 0 then mapping error has occurred */
5876         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5877                              nr_frags);
5878         if (count) {
5879                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5880                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5881                         if (!adapter->tx_hwtstamp_skb) {
5882                                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5883                                 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5884                                 adapter->tx_hwtstamp_skb = skb_get(skb);
5885                                 adapter->tx_hwtstamp_start = jiffies;
5886                                 schedule_work(&adapter->tx_hwtstamp_work);
5887                         } else {
5888                                 adapter->tx_hwtstamp_skipped++;
5889                         }
5890                 }
5891
5892                 skb_tx_timestamp(skb);
5893
5894                 netdev_sent_queue(netdev, skb->len);
5895                 e1000_tx_queue(tx_ring, tx_flags, count);
5896                 /* Make sure there is space in the ring for the next send. */
5897                 e1000_maybe_stop_tx(tx_ring,
5898                                     (MAX_SKB_FRAGS *
5899                                      DIV_ROUND_UP(PAGE_SIZE,
5900                                                   adapter->tx_fifo_limit) + 2));
5901
5902                 if (!skb->xmit_more ||
5903                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5904                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5905                                 e1000e_update_tdt_wa(tx_ring,
5906                                                      tx_ring->next_to_use);
5907                         else
5908                                 writel(tx_ring->next_to_use, tx_ring->tail);
5909
5910                         /* we need this if more than one processor can write
5911                          * to our tail at a time, it synchronizes IO on
5912                          *IA64/Altix systems
5913                          */
5914                         mmiowb();
5915                 }
5916         } else {
5917                 dev_kfree_skb_any(skb);
5918                 tx_ring->buffer_info[first].time_stamp = 0;
5919                 tx_ring->next_to_use = first;
5920         }
5921
5922         return NETDEV_TX_OK;
5923 }
5924
5925 /**
5926  * e1000_tx_timeout - Respond to a Tx Hang
5927  * @netdev: network interface device structure
5928  **/
5929 static void e1000_tx_timeout(struct net_device *netdev)
5930 {
5931         struct e1000_adapter *adapter = netdev_priv(netdev);
5932
5933         /* Do the reset outside of interrupt context */
5934         adapter->tx_timeout_count++;
5935         schedule_work(&adapter->reset_task);
5936 }
5937
5938 static void e1000_reset_task(struct work_struct *work)
5939 {
5940         struct e1000_adapter *adapter;
5941         adapter = container_of(work, struct e1000_adapter, reset_task);
5942
5943         /* don't run the task if already down */
5944         if (test_bit(__E1000_DOWN, &adapter->state))
5945                 return;
5946
5947         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5948                 e1000e_dump(adapter);
5949                 e_err("Reset adapter unexpectedly\n");
5950         }
5951         e1000e_reinit_locked(adapter);
5952 }
5953
5954 /**
5955  * e1000_get_stats64 - Get System Network Statistics
5956  * @netdev: network interface device structure
5957  * @stats: rtnl_link_stats64 pointer
5958  *
5959  * Returns the address of the device statistics structure.
5960  **/
5961 void e1000e_get_stats64(struct net_device *netdev,
5962                         struct rtnl_link_stats64 *stats)
5963 {
5964         struct e1000_adapter *adapter = netdev_priv(netdev);
5965
5966         spin_lock(&adapter->stats64_lock);
5967         e1000e_update_stats(adapter);
5968         /* Fill out the OS statistics structure */
5969         stats->rx_bytes = adapter->stats.gorc;
5970         stats->rx_packets = adapter->stats.gprc;
5971         stats->tx_bytes = adapter->stats.gotc;
5972         stats->tx_packets = adapter->stats.gptc;
5973         stats->multicast = adapter->stats.mprc;
5974         stats->collisions = adapter->stats.colc;
5975
5976         /* Rx Errors */
5977
5978         /* RLEC on some newer hardware can be incorrect so build
5979          * our own version based on RUC and ROC
5980          */
5981         stats->rx_errors = adapter->stats.rxerrc +
5982             adapter->stats.crcerrs + adapter->stats.algnerrc +
5983             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5984         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5985         stats->rx_crc_errors = adapter->stats.crcerrs;
5986         stats->rx_frame_errors = adapter->stats.algnerrc;
5987         stats->rx_missed_errors = adapter->stats.mpc;
5988
5989         /* Tx Errors */
5990         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5991         stats->tx_aborted_errors = adapter->stats.ecol;
5992         stats->tx_window_errors = adapter->stats.latecol;
5993         stats->tx_carrier_errors = adapter->stats.tncrs;
5994
5995         /* Tx Dropped needs to be maintained elsewhere */
5996
5997         spin_unlock(&adapter->stats64_lock);
5998 }
5999
6000 /**
6001  * e1000_change_mtu - Change the Maximum Transfer Unit
6002  * @netdev: network interface device structure
6003  * @new_mtu: new value for maximum frame size
6004  *
6005  * Returns 0 on success, negative on failure
6006  **/
6007 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6008 {
6009         struct e1000_adapter *adapter = netdev_priv(netdev);
6010         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6011
6012         /* Jumbo frame support */
6013         if ((new_mtu > ETH_DATA_LEN) &&
6014             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6015                 e_err("Jumbo Frames not supported.\n");
6016                 return -EINVAL;
6017         }
6018
6019         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6020         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6021             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6022             (new_mtu > ETH_DATA_LEN)) {
6023                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6024                 return -EINVAL;
6025         }
6026
6027         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6028                 usleep_range(1000, 2000);
6029         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6030         adapter->max_frame_size = max_frame;
6031         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6032         netdev->mtu = new_mtu;
6033
6034         pm_runtime_get_sync(netdev->dev.parent);
6035
6036         if (netif_running(netdev))
6037                 e1000e_down(adapter, true);
6038
6039         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6040          * means we reserve 2 more, this pushes us to allocate from the next
6041          * larger slab size.
6042          * i.e. RXBUFFER_2048 --> size-4096 slab
6043          * However with the new *_jumbo_rx* routines, jumbo receives will use
6044          * fragmented skbs
6045          */
6046
6047         if (max_frame <= 2048)
6048                 adapter->rx_buffer_len = 2048;
6049         else
6050                 adapter->rx_buffer_len = 4096;
6051
6052         /* adjust allocation if LPE protects us, and we aren't using SBP */
6053         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6054                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6055
6056         if (netif_running(netdev))
6057                 e1000e_up(adapter);
6058         else
6059                 e1000e_reset(adapter);
6060
6061         pm_runtime_put_sync(netdev->dev.parent);
6062
6063         clear_bit(__E1000_RESETTING, &adapter->state);
6064
6065         return 0;
6066 }
6067
6068 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6069                            int cmd)
6070 {
6071         struct e1000_adapter *adapter = netdev_priv(netdev);
6072         struct mii_ioctl_data *data = if_mii(ifr);
6073
6074         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6075                 return -EOPNOTSUPP;
6076
6077         switch (cmd) {
6078         case SIOCGMIIPHY:
6079                 data->phy_id = adapter->hw.phy.addr;
6080                 break;
6081         case SIOCGMIIREG:
6082                 e1000_phy_read_status(adapter);
6083
6084                 switch (data->reg_num & 0x1F) {
6085                 case MII_BMCR:
6086                         data->val_out = adapter->phy_regs.bmcr;
6087                         break;
6088                 case MII_BMSR:
6089                         data->val_out = adapter->phy_regs.bmsr;
6090                         break;
6091                 case MII_PHYSID1:
6092                         data->val_out = (adapter->hw.phy.id >> 16);
6093                         break;
6094                 case MII_PHYSID2:
6095                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6096                         break;
6097                 case MII_ADVERTISE:
6098                         data->val_out = adapter->phy_regs.advertise;
6099                         break;
6100                 case MII_LPA:
6101                         data->val_out = adapter->phy_regs.lpa;
6102                         break;
6103                 case MII_EXPANSION:
6104                         data->val_out = adapter->phy_regs.expansion;
6105                         break;
6106                 case MII_CTRL1000:
6107                         data->val_out = adapter->phy_regs.ctrl1000;
6108                         break;
6109                 case MII_STAT1000:
6110                         data->val_out = adapter->phy_regs.stat1000;
6111                         break;
6112                 case MII_ESTATUS:
6113                         data->val_out = adapter->phy_regs.estatus;
6114                         break;
6115                 default:
6116                         return -EIO;
6117                 }
6118                 break;
6119         case SIOCSMIIREG:
6120         default:
6121                 return -EOPNOTSUPP;
6122         }
6123         return 0;
6124 }
6125
6126 /**
6127  * e1000e_hwtstamp_ioctl - control hardware time stamping
6128  * @netdev: network interface device structure
6129  * @ifreq: interface request
6130  *
6131  * Outgoing time stamping can be enabled and disabled. Play nice and
6132  * disable it when requested, although it shouldn't cause any overhead
6133  * when no packet needs it. At most one packet in the queue may be
6134  * marked for time stamping, otherwise it would be impossible to tell
6135  * for sure to which packet the hardware time stamp belongs.
6136  *
6137  * Incoming time stamping has to be configured via the hardware filters.
6138  * Not all combinations are supported, in particular event type has to be
6139  * specified. Matching the kind of event packet is not supported, with the
6140  * exception of "all V2 events regardless of level 2 or 4".
6141  **/
6142 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6143 {
6144         struct e1000_adapter *adapter = netdev_priv(netdev);
6145         struct hwtstamp_config config;
6146         int ret_val;
6147
6148         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6149                 return -EFAULT;
6150
6151         ret_val = e1000e_config_hwtstamp(adapter, &config);
6152         if (ret_val)
6153                 return ret_val;
6154
6155         switch (config.rx_filter) {
6156         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6157         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6158         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6159         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6160         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6161         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6162                 /* With V2 type filters which specify a Sync or Delay Request,
6163                  * Path Delay Request/Response messages are also time stamped
6164                  * by hardware so notify the caller the requested packets plus
6165                  * some others are time stamped.
6166                  */
6167                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6168                 break;
6169         default:
6170                 break;
6171         }
6172
6173         return copy_to_user(ifr->ifr_data, &config,
6174                             sizeof(config)) ? -EFAULT : 0;
6175 }
6176
6177 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6178 {
6179         struct e1000_adapter *adapter = netdev_priv(netdev);
6180
6181         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6182                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6183 }
6184
6185 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6186 {
6187         switch (cmd) {
6188         case SIOCGMIIPHY:
6189         case SIOCGMIIREG:
6190         case SIOCSMIIREG:
6191                 return e1000_mii_ioctl(netdev, ifr, cmd);
6192         case SIOCSHWTSTAMP:
6193                 return e1000e_hwtstamp_set(netdev, ifr);
6194         case SIOCGHWTSTAMP:
6195                 return e1000e_hwtstamp_get(netdev, ifr);
6196         default:
6197                 return -EOPNOTSUPP;
6198         }
6199 }
6200
6201 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6202 {
6203         struct e1000_hw *hw = &adapter->hw;
6204         u32 i, mac_reg, wuc;
6205         u16 phy_reg, wuc_enable;
6206         int retval;
6207
6208         /* copy MAC RARs to PHY RARs */
6209         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6210
6211         retval = hw->phy.ops.acquire(hw);
6212         if (retval) {
6213                 e_err("Could not acquire PHY\n");
6214                 return retval;
6215         }
6216
6217         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6218         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6219         if (retval)
6220                 goto release;
6221
6222         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6223         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6224                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6225                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6226                                            (u16)(mac_reg & 0xFFFF));
6227                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6228                                            (u16)((mac_reg >> 16) & 0xFFFF));
6229         }
6230
6231         /* configure PHY Rx Control register */
6232         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6233         mac_reg = er32(RCTL);
6234         if (mac_reg & E1000_RCTL_UPE)
6235                 phy_reg |= BM_RCTL_UPE;
6236         if (mac_reg & E1000_RCTL_MPE)
6237                 phy_reg |= BM_RCTL_MPE;
6238         phy_reg &= ~(BM_RCTL_MO_MASK);
6239         if (mac_reg & E1000_RCTL_MO_3)
6240                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6241                             << BM_RCTL_MO_SHIFT);
6242         if (mac_reg & E1000_RCTL_BAM)
6243                 phy_reg |= BM_RCTL_BAM;
6244         if (mac_reg & E1000_RCTL_PMCF)
6245                 phy_reg |= BM_RCTL_PMCF;
6246         mac_reg = er32(CTRL);
6247         if (mac_reg & E1000_CTRL_RFCE)
6248                 phy_reg |= BM_RCTL_RFCE;
6249         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6250
6251         wuc = E1000_WUC_PME_EN;
6252         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6253                 wuc |= E1000_WUC_APME;
6254
6255         /* enable PHY wakeup in MAC register */
6256         ew32(WUFC, wufc);
6257         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6258                    E1000_WUC_PME_STATUS | wuc));
6259
6260         /* configure and enable PHY wakeup in PHY registers */
6261         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6262         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6263
6264         /* activate PHY wakeup */
6265         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6266         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6267         if (retval)
6268                 e_err("Could not set PHY Host Wakeup bit\n");
6269 release:
6270         hw->phy.ops.release(hw);
6271
6272         return retval;
6273 }
6274
6275 static void e1000e_flush_lpic(struct pci_dev *pdev)
6276 {
6277         struct net_device *netdev = pci_get_drvdata(pdev);
6278         struct e1000_adapter *adapter = netdev_priv(netdev);
6279         struct e1000_hw *hw = &adapter->hw;
6280         u32 ret_val;
6281
6282         pm_runtime_get_sync(netdev->dev.parent);
6283
6284         ret_val = hw->phy.ops.acquire(hw);
6285         if (ret_val)
6286                 goto fl_out;
6287
6288         pr_info("EEE TX LPI TIMER: %08X\n",
6289                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6290
6291         hw->phy.ops.release(hw);
6292
6293 fl_out:
6294         pm_runtime_put_sync(netdev->dev.parent);
6295 }
6296
6297 static int e1000e_pm_freeze(struct device *dev)
6298 {
6299         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6300         struct e1000_adapter *adapter = netdev_priv(netdev);
6301
6302         netif_device_detach(netdev);
6303
6304         if (netif_running(netdev)) {
6305                 int count = E1000_CHECK_RESET_COUNT;
6306
6307                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6308                         usleep_range(10000, 20000);
6309
6310                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6311
6312                 /* Quiesce the device without resetting the hardware */
6313                 e1000e_down(adapter, false);
6314                 e1000_free_irq(adapter);
6315         }
6316         e1000e_reset_interrupt_capability(adapter);
6317
6318         /* Allow time for pending master requests to run */
6319         e1000e_disable_pcie_master(&adapter->hw);
6320
6321         return 0;
6322 }
6323
6324 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6325 {
6326         struct net_device *netdev = pci_get_drvdata(pdev);
6327         struct e1000_adapter *adapter = netdev_priv(netdev);
6328         struct e1000_hw *hw = &adapter->hw;
6329         u32 ctrl, ctrl_ext, rctl, status;
6330         /* Runtime suspend should only enable wakeup for link changes */
6331         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6332         int retval = 0;
6333
6334         status = er32(STATUS);
6335         if (status & E1000_STATUS_LU)
6336                 wufc &= ~E1000_WUFC_LNKC;
6337
6338         if (wufc) {
6339                 e1000_setup_rctl(adapter);
6340                 e1000e_set_rx_mode(netdev);
6341
6342                 /* turn on all-multi mode if wake on multicast is enabled */
6343                 if (wufc & E1000_WUFC_MC) {
6344                         rctl = er32(RCTL);
6345                         rctl |= E1000_RCTL_MPE;
6346                         ew32(RCTL, rctl);
6347                 }
6348
6349                 ctrl = er32(CTRL);
6350                 ctrl |= E1000_CTRL_ADVD3WUC;
6351                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6352                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6353                 ew32(CTRL, ctrl);
6354
6355                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6356                     adapter->hw.phy.media_type ==
6357                     e1000_media_type_internal_serdes) {
6358                         /* keep the laser running in D3 */
6359                         ctrl_ext = er32(CTRL_EXT);
6360                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6361                         ew32(CTRL_EXT, ctrl_ext);
6362                 }
6363
6364                 if (!runtime)
6365                         e1000e_power_up_phy(adapter);
6366
6367                 if (adapter->flags & FLAG_IS_ICH)
6368                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6369
6370                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6371                         /* enable wakeup by the PHY */
6372                         retval = e1000_init_phy_wakeup(adapter, wufc);
6373                         if (retval)
6374                                 return retval;
6375                 } else {
6376                         /* enable wakeup by the MAC */
6377                         ew32(WUFC, wufc);
6378                         ew32(WUC, E1000_WUC_PME_EN);
6379                 }
6380         } else {
6381                 ew32(WUC, 0);
6382                 ew32(WUFC, 0);
6383
6384                 e1000_power_down_phy(adapter);
6385         }
6386
6387         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6388                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6389         } else if (hw->mac.type >= e1000_pch_lpt) {
6390                 if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6391                         /* ULP does not support wake from unicast, multicast
6392                          * or broadcast.
6393                          */
6394                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6395
6396                 if (retval)
6397                         return retval;
6398         }
6399
6400         /* Ensure that the appropriate bits are set in LPI_CTRL
6401          * for EEE in Sx
6402          */
6403         if ((hw->phy.type >= e1000_phy_i217) &&
6404             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6405                 u16 lpi_ctrl = 0;
6406
6407                 retval = hw->phy.ops.acquire(hw);
6408                 if (!retval) {
6409                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6410                                                  &lpi_ctrl);
6411                         if (!retval) {
6412                                 if (adapter->eee_advert &
6413                                     hw->dev_spec.ich8lan.eee_lp_ability &
6414                                     I82579_EEE_100_SUPPORTED)
6415                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6416                                 if (adapter->eee_advert &
6417                                     hw->dev_spec.ich8lan.eee_lp_ability &
6418                                     I82579_EEE_1000_SUPPORTED)
6419                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6420
6421                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6422                                                          lpi_ctrl);
6423                         }
6424                 }
6425                 hw->phy.ops.release(hw);
6426         }
6427
6428         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6429          * would have already happened in close and is redundant.
6430          */
6431         e1000e_release_hw_control(adapter);
6432
6433         pci_clear_master(pdev);
6434
6435         /* The pci-e switch on some quad port adapters will report a
6436          * correctable error when the MAC transitions from D0 to D3.  To
6437          * prevent this we need to mask off the correctable errors on the
6438          * downstream port of the pci-e switch.
6439          *
6440          * We don't have the associated upstream bridge while assigning
6441          * the PCI device into guest. For example, the KVM on power is
6442          * one of the cases.
6443          */
6444         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6445                 struct pci_dev *us_dev = pdev->bus->self;
6446                 u16 devctl;
6447
6448                 if (!us_dev)
6449                         return 0;
6450
6451                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6452                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6453                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6454
6455                 pci_save_state(pdev);
6456                 pci_prepare_to_sleep(pdev);
6457
6458                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6459         }
6460
6461         return 0;
6462 }
6463
6464 /**
6465  * __e1000e_disable_aspm - Disable ASPM states
6466  * @pdev: pointer to PCI device struct
6467  * @state: bit-mask of ASPM states to disable
6468  * @locked: indication if this context holds pci_bus_sem locked.
6469  *
6470  * Some devices *must* have certain ASPM states disabled per hardware errata.
6471  **/
6472 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6473 {
6474         struct pci_dev *parent = pdev->bus->self;
6475         u16 aspm_dis_mask = 0;
6476         u16 pdev_aspmc, parent_aspmc;
6477
6478         switch (state) {
6479         case PCIE_LINK_STATE_L0S:
6480         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6481                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6482                 /* fall-through - can't have L1 without L0s */
6483         case PCIE_LINK_STATE_L1:
6484                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6485                 break;
6486         default:
6487                 return;
6488         }
6489
6490         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6491         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6492
6493         if (parent) {
6494                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6495                                           &parent_aspmc);
6496                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6497         }
6498
6499         /* Nothing to do if the ASPM states to be disabled already are */
6500         if (!(pdev_aspmc & aspm_dis_mask) &&
6501             (!parent || !(parent_aspmc & aspm_dis_mask)))
6502                 return;
6503
6504         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6505                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6506                  "L0s" : "",
6507                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6508                  "L1" : "");
6509
6510 #ifdef CONFIG_PCIEASPM
6511         if (locked)
6512                 pci_disable_link_state_locked(pdev, state);
6513         else
6514                 pci_disable_link_state(pdev, state);
6515
6516         /* Double-check ASPM control.  If not disabled by the above, the
6517          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6518          * not enabled); override by writing PCI config space directly.
6519          */
6520         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6521         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6522
6523         if (!(aspm_dis_mask & pdev_aspmc))
6524                 return;
6525 #endif
6526
6527         /* Both device and parent should have the same ASPM setting.
6528          * Disable ASPM in downstream component first and then upstream.
6529          */
6530         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6531
6532         if (parent)
6533                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6534                                            aspm_dis_mask);
6535 }
6536
6537 /**
6538  * e1000e_disable_aspm - Disable ASPM states.
6539  * @pdev: pointer to PCI device struct
6540  * @state: bit-mask of ASPM states to disable
6541  *
6542  * This function acquires the pci_bus_sem!
6543  * Some devices *must* have certain ASPM states disabled per hardware errata.
6544  **/
6545 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6546 {
6547         __e1000e_disable_aspm(pdev, state, 0);
6548 }
6549
6550 /**
6551  * e1000e_disable_aspm_locked   Disable ASPM states.
6552  * @pdev: pointer to PCI device struct
6553  * @state: bit-mask of ASPM states to disable
6554  *
6555  * This function must be called with pci_bus_sem acquired!
6556  * Some devices *must* have certain ASPM states disabled per hardware errata.
6557  **/
6558 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6559 {
6560         __e1000e_disable_aspm(pdev, state, 1);
6561 }
6562
6563 #ifdef CONFIG_PM
6564 static int __e1000_resume(struct pci_dev *pdev)
6565 {
6566         struct net_device *netdev = pci_get_drvdata(pdev);
6567         struct e1000_adapter *adapter = netdev_priv(netdev);
6568         struct e1000_hw *hw = &adapter->hw;
6569         u16 aspm_disable_flag = 0;
6570
6571         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6572                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6573         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6574                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6575         if (aspm_disable_flag)
6576                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6577
6578         pci_set_master(pdev);
6579
6580         if (hw->mac.type >= e1000_pch2lan)
6581                 e1000_resume_workarounds_pchlan(&adapter->hw);
6582
6583         e1000e_power_up_phy(adapter);
6584
6585         /* report the system wakeup cause from S3/S4 */
6586         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6587                 u16 phy_data;
6588
6589                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6590                 if (phy_data) {
6591                         e_info("PHY Wakeup cause - %s\n",
6592                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6593                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6594                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6595                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6596                                phy_data & E1000_WUS_LNKC ?
6597                                "Link Status Change" : "other");
6598                 }
6599                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6600         } else {
6601                 u32 wus = er32(WUS);
6602
6603                 if (wus) {
6604                         e_info("MAC Wakeup cause - %s\n",
6605                                wus & E1000_WUS_EX ? "Unicast Packet" :
6606                                wus & E1000_WUS_MC ? "Multicast Packet" :
6607                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6608                                wus & E1000_WUS_MAG ? "Magic Packet" :
6609                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6610                                "other");
6611                 }
6612                 ew32(WUS, ~0);
6613         }
6614
6615         e1000e_reset(adapter);
6616
6617         e1000_init_manageability_pt(adapter);
6618
6619         /* If the controller has AMT, do not set DRV_LOAD until the interface
6620          * is up.  For all other cases, let the f/w know that the h/w is now
6621          * under the control of the driver.
6622          */
6623         if (!(adapter->flags & FLAG_HAS_AMT))
6624                 e1000e_get_hw_control(adapter);
6625
6626         return 0;
6627 }
6628
6629 #ifdef CONFIG_PM_SLEEP
6630 static int e1000e_pm_thaw(struct device *dev)
6631 {
6632         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6633         struct e1000_adapter *adapter = netdev_priv(netdev);
6634
6635         e1000e_set_interrupt_capability(adapter);
6636         if (netif_running(netdev)) {
6637                 u32 err = e1000_request_irq(adapter);
6638
6639                 if (err)
6640                         return err;
6641
6642                 e1000e_up(adapter);
6643         }
6644
6645         netif_device_attach(netdev);
6646
6647         return 0;
6648 }
6649
6650 static int e1000e_pm_suspend(struct device *dev)
6651 {
6652         struct pci_dev *pdev = to_pci_dev(dev);
6653         int rc;
6654
6655         e1000e_flush_lpic(pdev);
6656
6657         e1000e_pm_freeze(dev);
6658
6659         rc = __e1000_shutdown(pdev, false);
6660         if (rc)
6661                 e1000e_pm_thaw(dev);
6662
6663         return rc;
6664 }
6665
6666 static int e1000e_pm_resume(struct device *dev)
6667 {
6668         struct pci_dev *pdev = to_pci_dev(dev);
6669         int rc;
6670
6671         rc = __e1000_resume(pdev);
6672         if (rc)
6673                 return rc;
6674
6675         return e1000e_pm_thaw(dev);
6676 }
6677 #endif /* CONFIG_PM_SLEEP */
6678
6679 static int e1000e_pm_runtime_idle(struct device *dev)
6680 {
6681         struct pci_dev *pdev = to_pci_dev(dev);
6682         struct net_device *netdev = pci_get_drvdata(pdev);
6683         struct e1000_adapter *adapter = netdev_priv(netdev);
6684         u16 eee_lp;
6685
6686         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6687
6688         if (!e1000e_has_link(adapter)) {
6689                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6690                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6691         }
6692
6693         return -EBUSY;
6694 }
6695
6696 static int e1000e_pm_runtime_resume(struct device *dev)
6697 {
6698         struct pci_dev *pdev = to_pci_dev(dev);
6699         struct net_device *netdev = pci_get_drvdata(pdev);
6700         struct e1000_adapter *adapter = netdev_priv(netdev);
6701         int rc;
6702
6703         rc = __e1000_resume(pdev);
6704         if (rc)
6705                 return rc;
6706
6707         if (netdev->flags & IFF_UP)
6708                 e1000e_up(adapter);
6709
6710         return rc;
6711 }
6712
6713 static int e1000e_pm_runtime_suspend(struct device *dev)
6714 {
6715         struct pci_dev *pdev = to_pci_dev(dev);
6716         struct net_device *netdev = pci_get_drvdata(pdev);
6717         struct e1000_adapter *adapter = netdev_priv(netdev);
6718
6719         if (netdev->flags & IFF_UP) {
6720                 int count = E1000_CHECK_RESET_COUNT;
6721
6722                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6723                         usleep_range(10000, 20000);
6724
6725                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6726
6727                 /* Down the device without resetting the hardware */
6728                 e1000e_down(adapter, false);
6729         }
6730
6731         if (__e1000_shutdown(pdev, true)) {
6732                 e1000e_pm_runtime_resume(dev);
6733                 return -EBUSY;
6734         }
6735
6736         return 0;
6737 }
6738 #endif /* CONFIG_PM */
6739
6740 static void e1000_shutdown(struct pci_dev *pdev)
6741 {
6742         e1000e_flush_lpic(pdev);
6743
6744         e1000e_pm_freeze(&pdev->dev);
6745
6746         __e1000_shutdown(pdev, false);
6747 }
6748
6749 #ifdef CONFIG_NET_POLL_CONTROLLER
6750
6751 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6752 {
6753         struct net_device *netdev = data;
6754         struct e1000_adapter *adapter = netdev_priv(netdev);
6755
6756         if (adapter->msix_entries) {
6757                 int vector, msix_irq;
6758
6759                 vector = 0;
6760                 msix_irq = adapter->msix_entries[vector].vector;
6761                 if (disable_hardirq(msix_irq))
6762                         e1000_intr_msix_rx(msix_irq, netdev);
6763                 enable_irq(msix_irq);
6764
6765                 vector++;
6766                 msix_irq = adapter->msix_entries[vector].vector;
6767                 if (disable_hardirq(msix_irq))
6768                         e1000_intr_msix_tx(msix_irq, netdev);
6769                 enable_irq(msix_irq);
6770
6771                 vector++;
6772                 msix_irq = adapter->msix_entries[vector].vector;
6773                 if (disable_hardirq(msix_irq))
6774                         e1000_msix_other(msix_irq, netdev);
6775                 enable_irq(msix_irq);
6776         }
6777
6778         return IRQ_HANDLED;
6779 }
6780
6781 /**
6782  * e1000_netpoll
6783  * @netdev: network interface device structure
6784  *
6785  * Polling 'interrupt' - used by things like netconsole to send skbs
6786  * without having to re-enable interrupts. It's not called while
6787  * the interrupt routine is executing.
6788  */
6789 static void e1000_netpoll(struct net_device *netdev)
6790 {
6791         struct e1000_adapter *adapter = netdev_priv(netdev);
6792
6793         switch (adapter->int_mode) {
6794         case E1000E_INT_MODE_MSIX:
6795                 e1000_intr_msix(adapter->pdev->irq, netdev);
6796                 break;
6797         case E1000E_INT_MODE_MSI:
6798                 if (disable_hardirq(adapter->pdev->irq))
6799                         e1000_intr_msi(adapter->pdev->irq, netdev);
6800                 enable_irq(adapter->pdev->irq);
6801                 break;
6802         default:                /* E1000E_INT_MODE_LEGACY */
6803                 if (disable_hardirq(adapter->pdev->irq))
6804                         e1000_intr(adapter->pdev->irq, netdev);
6805                 enable_irq(adapter->pdev->irq);
6806                 break;
6807         }
6808 }
6809 #endif
6810
6811 /**
6812  * e1000_io_error_detected - called when PCI error is detected
6813  * @pdev: Pointer to PCI device
6814  * @state: The current pci connection state
6815  *
6816  * This function is called after a PCI bus error affecting
6817  * this device has been detected.
6818  */
6819 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6820                                                 pci_channel_state_t state)
6821 {
6822         struct net_device *netdev = pci_get_drvdata(pdev);
6823         struct e1000_adapter *adapter = netdev_priv(netdev);
6824
6825         netif_device_detach(netdev);
6826
6827         if (state == pci_channel_io_perm_failure)
6828                 return PCI_ERS_RESULT_DISCONNECT;
6829
6830         if (netif_running(netdev))
6831                 e1000e_down(adapter, true);
6832         pci_disable_device(pdev);
6833
6834         /* Request a slot slot reset. */
6835         return PCI_ERS_RESULT_NEED_RESET;
6836 }
6837
6838 /**
6839  * e1000_io_slot_reset - called after the pci bus has been reset.
6840  * @pdev: Pointer to PCI device
6841  *
6842  * Restart the card from scratch, as if from a cold-boot. Implementation
6843  * resembles the first-half of the e1000e_pm_resume routine.
6844  */
6845 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6846 {
6847         struct net_device *netdev = pci_get_drvdata(pdev);
6848         struct e1000_adapter *adapter = netdev_priv(netdev);
6849         struct e1000_hw *hw = &adapter->hw;
6850         u16 aspm_disable_flag = 0;
6851         int err;
6852         pci_ers_result_t result;
6853
6854         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6855                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6856         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6857                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6858         if (aspm_disable_flag)
6859                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6860
6861         err = pci_enable_device_mem(pdev);
6862         if (err) {
6863                 dev_err(&pdev->dev,
6864                         "Cannot re-enable PCI device after reset.\n");
6865                 result = PCI_ERS_RESULT_DISCONNECT;
6866         } else {
6867                 pdev->state_saved = true;
6868                 pci_restore_state(pdev);
6869                 pci_set_master(pdev);
6870
6871                 pci_enable_wake(pdev, PCI_D3hot, 0);
6872                 pci_enable_wake(pdev, PCI_D3cold, 0);
6873
6874                 e1000e_reset(adapter);
6875                 ew32(WUS, ~0);
6876                 result = PCI_ERS_RESULT_RECOVERED;
6877         }
6878
6879         pci_cleanup_aer_uncorrect_error_status(pdev);
6880
6881         return result;
6882 }
6883
6884 /**
6885  * e1000_io_resume - called when traffic can start flowing again.
6886  * @pdev: Pointer to PCI device
6887  *
6888  * This callback is called when the error recovery driver tells us that
6889  * its OK to resume normal operation. Implementation resembles the
6890  * second-half of the e1000e_pm_resume routine.
6891  */
6892 static void e1000_io_resume(struct pci_dev *pdev)
6893 {
6894         struct net_device *netdev = pci_get_drvdata(pdev);
6895         struct e1000_adapter *adapter = netdev_priv(netdev);
6896
6897         e1000_init_manageability_pt(adapter);
6898
6899         if (netif_running(netdev))
6900                 e1000e_up(adapter);
6901
6902         netif_device_attach(netdev);
6903
6904         /* If the controller has AMT, do not set DRV_LOAD until the interface
6905          * is up.  For all other cases, let the f/w know that the h/w is now
6906          * under the control of the driver.
6907          */
6908         if (!(adapter->flags & FLAG_HAS_AMT))
6909                 e1000e_get_hw_control(adapter);
6910 }
6911
6912 static void e1000_print_device_info(struct e1000_adapter *adapter)
6913 {
6914         struct e1000_hw *hw = &adapter->hw;
6915         struct net_device *netdev = adapter->netdev;
6916         u32 ret_val;
6917         u8 pba_str[E1000_PBANUM_LENGTH];
6918
6919         /* print bus type/speed/width info */
6920         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6921                /* bus width */
6922                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6923                 "Width x1"),
6924                /* MAC address */
6925                netdev->dev_addr);
6926         e_info("Intel(R) PRO/%s Network Connection\n",
6927                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6928         ret_val = e1000_read_pba_string_generic(hw, pba_str,
6929                                                 E1000_PBANUM_LENGTH);
6930         if (ret_val)
6931                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6932         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6933                hw->mac.type, hw->phy.type, pba_str);
6934 }
6935
6936 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6937 {
6938         struct e1000_hw *hw = &adapter->hw;
6939         int ret_val;
6940         u16 buf = 0;
6941
6942         if (hw->mac.type != e1000_82573)
6943                 return;
6944
6945         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6946         le16_to_cpus(&buf);
6947         if (!ret_val && (!(buf & BIT(0)))) {
6948                 /* Deep Smart Power Down (DSPD) */
6949                 dev_warn(&adapter->pdev->dev,
6950                          "Warning: detected DSPD enabled in EEPROM\n");
6951         }
6952 }
6953
6954 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6955                                             netdev_features_t features)
6956 {
6957         struct e1000_adapter *adapter = netdev_priv(netdev);
6958         struct e1000_hw *hw = &adapter->hw;
6959
6960         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6961         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6962                 features &= ~NETIF_F_RXFCS;
6963
6964         /* Since there is no support for separate Rx/Tx vlan accel
6965          * enable/disable make sure Tx flag is always in same state as Rx.
6966          */
6967         if (features & NETIF_F_HW_VLAN_CTAG_RX)
6968                 features |= NETIF_F_HW_VLAN_CTAG_TX;
6969         else
6970                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6971
6972         return features;
6973 }
6974
6975 static int e1000_set_features(struct net_device *netdev,
6976                               netdev_features_t features)
6977 {
6978         struct e1000_adapter *adapter = netdev_priv(netdev);
6979         netdev_features_t changed = features ^ netdev->features;
6980
6981         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6982                 adapter->flags |= FLAG_TSO_FORCE;
6983
6984         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6985                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6986                          NETIF_F_RXALL)))
6987                 return 0;
6988
6989         if (changed & NETIF_F_RXFCS) {
6990                 if (features & NETIF_F_RXFCS) {
6991                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6992                 } else {
6993                         /* We need to take it back to defaults, which might mean
6994                          * stripping is still disabled at the adapter level.
6995                          */
6996                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6997                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6998                         else
6999                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7000                 }
7001         }
7002
7003         netdev->features = features;
7004
7005         if (netif_running(netdev))
7006                 e1000e_reinit_locked(adapter);
7007         else
7008                 e1000e_reset(adapter);
7009
7010         return 0;
7011 }
7012
7013 static const struct net_device_ops e1000e_netdev_ops = {
7014         .ndo_open               = e1000e_open,
7015         .ndo_stop               = e1000e_close,
7016         .ndo_start_xmit         = e1000_xmit_frame,
7017         .ndo_get_stats64        = e1000e_get_stats64,
7018         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7019         .ndo_set_mac_address    = e1000_set_mac,
7020         .ndo_change_mtu         = e1000_change_mtu,
7021         .ndo_do_ioctl           = e1000_ioctl,
7022         .ndo_tx_timeout         = e1000_tx_timeout,
7023         .ndo_validate_addr      = eth_validate_addr,
7024
7025         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7026         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7027 #ifdef CONFIG_NET_POLL_CONTROLLER
7028         .ndo_poll_controller    = e1000_netpoll,
7029 #endif
7030         .ndo_set_features = e1000_set_features,
7031         .ndo_fix_features = e1000_fix_features,
7032         .ndo_features_check     = passthru_features_check,
7033 };
7034
7035 /**
7036  * e1000_probe - Device Initialization Routine
7037  * @pdev: PCI device information struct
7038  * @ent: entry in e1000_pci_tbl
7039  *
7040  * Returns 0 on success, negative on failure
7041  *
7042  * e1000_probe initializes an adapter identified by a pci_dev structure.
7043  * The OS initialization, configuring of the adapter private structure,
7044  * and a hardware reset occur.
7045  **/
7046 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7047 {
7048         struct net_device *netdev;
7049         struct e1000_adapter *adapter;
7050         struct e1000_hw *hw;
7051         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7052         resource_size_t mmio_start, mmio_len;
7053         resource_size_t flash_start, flash_len;
7054         static int cards_found;
7055         u16 aspm_disable_flag = 0;
7056         int bars, i, err, pci_using_dac;
7057         u16 eeprom_data = 0;
7058         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7059         s32 ret_val = 0;
7060
7061         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7062                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7063         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7064                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7065         if (aspm_disable_flag)
7066                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7067
7068         err = pci_enable_device_mem(pdev);
7069         if (err)
7070                 return err;
7071
7072         pci_using_dac = 0;
7073         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7074         if (!err) {
7075                 pci_using_dac = 1;
7076         } else {
7077                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7078                 if (err) {
7079                         dev_err(&pdev->dev,
7080                                 "No usable DMA configuration, aborting\n");
7081                         goto err_dma;
7082                 }
7083         }
7084
7085         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7086         err = pci_request_selected_regions_exclusive(pdev, bars,
7087                                                      e1000e_driver_name);
7088         if (err)
7089                 goto err_pci_reg;
7090
7091         /* AER (Advanced Error Reporting) hooks */
7092         pci_enable_pcie_error_reporting(pdev);
7093
7094         pci_set_master(pdev);
7095         /* PCI config space info */
7096         err = pci_save_state(pdev);
7097         if (err)
7098                 goto err_alloc_etherdev;
7099
7100         err = -ENOMEM;
7101         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7102         if (!netdev)
7103                 goto err_alloc_etherdev;
7104
7105         SET_NETDEV_DEV(netdev, &pdev->dev);
7106
7107         netdev->irq = pdev->irq;
7108
7109         pci_set_drvdata(pdev, netdev);
7110         adapter = netdev_priv(netdev);
7111         hw = &adapter->hw;
7112         adapter->netdev = netdev;
7113         adapter->pdev = pdev;
7114         adapter->ei = ei;
7115         adapter->pba = ei->pba;
7116         adapter->flags = ei->flags;
7117         adapter->flags2 = ei->flags2;
7118         adapter->hw.adapter = adapter;
7119         adapter->hw.mac.type = ei->mac;
7120         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7121         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7122
7123         mmio_start = pci_resource_start(pdev, 0);
7124         mmio_len = pci_resource_len(pdev, 0);
7125
7126         err = -EIO;
7127         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7128         if (!adapter->hw.hw_addr)
7129                 goto err_ioremap;
7130
7131         if ((adapter->flags & FLAG_HAS_FLASH) &&
7132             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7133             (hw->mac.type < e1000_pch_spt)) {
7134                 flash_start = pci_resource_start(pdev, 1);
7135                 flash_len = pci_resource_len(pdev, 1);
7136                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7137                 if (!adapter->hw.flash_address)
7138                         goto err_flashmap;
7139         }
7140
7141         /* Set default EEE advertisement */
7142         if (adapter->flags2 & FLAG2_HAS_EEE)
7143                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7144
7145         /* construct the net_device struct */
7146         netdev->netdev_ops = &e1000e_netdev_ops;
7147         e1000e_set_ethtool_ops(netdev);
7148         netdev->watchdog_timeo = 5 * HZ;
7149         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7150         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7151
7152         netdev->mem_start = mmio_start;
7153         netdev->mem_end = mmio_start + mmio_len;
7154
7155         adapter->bd_number = cards_found++;
7156
7157         e1000e_check_options(adapter);
7158
7159         /* setup adapter struct */
7160         err = e1000_sw_init(adapter);
7161         if (err)
7162                 goto err_sw_init;
7163
7164         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7165         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7166         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7167
7168         err = ei->get_variants(adapter);
7169         if (err)
7170                 goto err_hw_init;
7171
7172         if ((adapter->flags & FLAG_IS_ICH) &&
7173             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7174             (hw->mac.type < e1000_pch_spt))
7175                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7176
7177         hw->mac.ops.get_bus_info(&adapter->hw);
7178
7179         adapter->hw.phy.autoneg_wait_to_complete = 0;
7180
7181         /* Copper options */
7182         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7183                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7184                 adapter->hw.phy.disable_polarity_correction = 0;
7185                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7186         }
7187
7188         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7189                 dev_info(&pdev->dev,
7190                          "PHY reset is blocked due to SOL/IDER session.\n");
7191
7192         /* Set initial default active device features */
7193         netdev->features = (NETIF_F_SG |
7194                             NETIF_F_HW_VLAN_CTAG_RX |
7195                             NETIF_F_HW_VLAN_CTAG_TX |
7196                             NETIF_F_TSO |
7197                             NETIF_F_TSO6 |
7198                             NETIF_F_RXHASH |
7199                             NETIF_F_RXCSUM |
7200                             NETIF_F_HW_CSUM);
7201
7202         /* Set user-changeable features (subset of all device features) */
7203         netdev->hw_features = netdev->features;
7204         netdev->hw_features |= NETIF_F_RXFCS;
7205         netdev->priv_flags |= IFF_SUPP_NOFCS;
7206         netdev->hw_features |= NETIF_F_RXALL;
7207
7208         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7209                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7210
7211         netdev->vlan_features |= (NETIF_F_SG |
7212                                   NETIF_F_TSO |
7213                                   NETIF_F_TSO6 |
7214                                   NETIF_F_HW_CSUM);
7215
7216         netdev->priv_flags |= IFF_UNICAST_FLT;
7217
7218         if (pci_using_dac) {
7219                 netdev->features |= NETIF_F_HIGHDMA;
7220                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7221         }
7222
7223         /* MTU range: 68 - max_hw_frame_size */
7224         netdev->min_mtu = ETH_MIN_MTU;
7225         netdev->max_mtu = adapter->max_hw_frame_size -
7226                           (VLAN_ETH_HLEN + ETH_FCS_LEN);
7227
7228         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7229                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7230
7231         /* before reading the NVM, reset the controller to
7232          * put the device in a known good starting state
7233          */
7234         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7235
7236         /* systems with ASPM and others may see the checksum fail on the first
7237          * attempt. Let's give it a few tries
7238          */
7239         for (i = 0;; i++) {
7240                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7241                         break;
7242                 if (i == 2) {
7243                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7244                         err = -EIO;
7245                         goto err_eeprom;
7246                 }
7247         }
7248
7249         e1000_eeprom_checks(adapter);
7250
7251         /* copy the MAC address */
7252         if (e1000e_read_mac_addr(&adapter->hw))
7253                 dev_err(&pdev->dev,
7254                         "NVM Read Error while reading MAC address\n");
7255
7256         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7257
7258         if (!is_valid_ether_addr(netdev->dev_addr)) {
7259                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7260                         netdev->dev_addr);
7261                 err = -EIO;
7262                 goto err_eeprom;
7263         }
7264
7265         init_timer(&adapter->watchdog_timer);
7266         adapter->watchdog_timer.function = e1000_watchdog;
7267         adapter->watchdog_timer.data = (unsigned long)adapter;
7268
7269         init_timer(&adapter->phy_info_timer);
7270         adapter->phy_info_timer.function = e1000_update_phy_info;
7271         adapter->phy_info_timer.data = (unsigned long)adapter;
7272
7273         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7274         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7275         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7276         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7277         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7278
7279         /* Initialize link parameters. User can change them with ethtool */
7280         adapter->hw.mac.autoneg = 1;
7281         adapter->fc_autoneg = true;
7282         adapter->hw.fc.requested_mode = e1000_fc_default;
7283         adapter->hw.fc.current_mode = e1000_fc_default;
7284         adapter->hw.phy.autoneg_advertised = 0x2f;
7285
7286         /* Initial Wake on LAN setting - If APM wake is enabled in
7287          * the EEPROM, enable the ACPI Magic Packet filter
7288          */
7289         if (adapter->flags & FLAG_APME_IN_WUC) {
7290                 /* APME bit in EEPROM is mapped to WUC.APME */
7291                 eeprom_data = er32(WUC);
7292                 eeprom_apme_mask = E1000_WUC_APME;
7293                 if ((hw->mac.type > e1000_ich10lan) &&
7294                     (eeprom_data & E1000_WUC_PHY_WAKE))
7295                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7296         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7297                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7298                     (adapter->hw.bus.func == 1))
7299                         ret_val = e1000_read_nvm(&adapter->hw,
7300                                               NVM_INIT_CONTROL3_PORT_B,
7301                                               1, &eeprom_data);
7302                 else
7303                         ret_val = e1000_read_nvm(&adapter->hw,
7304                                               NVM_INIT_CONTROL3_PORT_A,
7305                                               1, &eeprom_data);
7306         }
7307
7308         /* fetch WoL from EEPROM */
7309         if (ret_val)
7310                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7311         else if (eeprom_data & eeprom_apme_mask)
7312                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7313
7314         /* now that we have the eeprom settings, apply the special cases
7315          * where the eeprom may be wrong or the board simply won't support
7316          * wake on lan on a particular port
7317          */
7318         if (!(adapter->flags & FLAG_HAS_WOL))
7319                 adapter->eeprom_wol = 0;
7320
7321         /* initialize the wol settings based on the eeprom settings */
7322         adapter->wol = adapter->eeprom_wol;
7323
7324         /* make sure adapter isn't asleep if manageability is enabled */
7325         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7326             (hw->mac.ops.check_mng_mode(hw)))
7327                 device_wakeup_enable(&pdev->dev);
7328
7329         /* save off EEPROM version number */
7330         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7331
7332         if (ret_val) {
7333                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7334                 adapter->eeprom_vers = 0;
7335         }
7336
7337         /* init PTP hardware clock */
7338         e1000e_ptp_init(adapter);
7339
7340         /* reset the hardware with the new settings */
7341         e1000e_reset(adapter);
7342
7343         /* If the controller has AMT, do not set DRV_LOAD until the interface
7344          * is up.  For all other cases, let the f/w know that the h/w is now
7345          * under the control of the driver.
7346          */
7347         if (!(adapter->flags & FLAG_HAS_AMT))
7348                 e1000e_get_hw_control(adapter);
7349
7350         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7351         err = register_netdev(netdev);
7352         if (err)
7353                 goto err_register;
7354
7355         /* carrier off reporting is important to ethtool even BEFORE open */
7356         netif_carrier_off(netdev);
7357
7358         e1000_print_device_info(adapter);
7359
7360         if (pci_dev_run_wake(pdev))
7361                 pm_runtime_put_noidle(&pdev->dev);
7362
7363         return 0;
7364
7365 err_register:
7366         if (!(adapter->flags & FLAG_HAS_AMT))
7367                 e1000e_release_hw_control(adapter);
7368 err_eeprom:
7369         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7370                 e1000_phy_hw_reset(&adapter->hw);
7371 err_hw_init:
7372         kfree(adapter->tx_ring);
7373         kfree(adapter->rx_ring);
7374 err_sw_init:
7375         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7376                 iounmap(adapter->hw.flash_address);
7377         e1000e_reset_interrupt_capability(adapter);
7378 err_flashmap:
7379         iounmap(adapter->hw.hw_addr);
7380 err_ioremap:
7381         free_netdev(netdev);
7382 err_alloc_etherdev:
7383         pci_release_mem_regions(pdev);
7384 err_pci_reg:
7385 err_dma:
7386         pci_disable_device(pdev);
7387         return err;
7388 }
7389
7390 /**
7391  * e1000_remove - Device Removal Routine
7392  * @pdev: PCI device information struct
7393  *
7394  * e1000_remove is called by the PCI subsystem to alert the driver
7395  * that it should release a PCI device.  The could be caused by a
7396  * Hot-Plug event, or because the driver is going to be removed from
7397  * memory.
7398  **/
7399 static void e1000_remove(struct pci_dev *pdev)
7400 {
7401         struct net_device *netdev = pci_get_drvdata(pdev);
7402         struct e1000_adapter *adapter = netdev_priv(netdev);
7403         bool down = test_bit(__E1000_DOWN, &adapter->state);
7404
7405         e1000e_ptp_remove(adapter);
7406
7407         /* The timers may be rescheduled, so explicitly disable them
7408          * from being rescheduled.
7409          */
7410         if (!down)
7411                 set_bit(__E1000_DOWN, &adapter->state);
7412         del_timer_sync(&adapter->watchdog_timer);
7413         del_timer_sync(&adapter->phy_info_timer);
7414
7415         cancel_work_sync(&adapter->reset_task);
7416         cancel_work_sync(&adapter->watchdog_task);
7417         cancel_work_sync(&adapter->downshift_task);
7418         cancel_work_sync(&adapter->update_phy_task);
7419         cancel_work_sync(&adapter->print_hang_task);
7420
7421         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7422                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7423                 if (adapter->tx_hwtstamp_skb) {
7424                         dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7425                         adapter->tx_hwtstamp_skb = NULL;
7426                 }
7427         }
7428
7429         /* Don't lie to e1000_close() down the road. */
7430         if (!down)
7431                 clear_bit(__E1000_DOWN, &adapter->state);
7432         unregister_netdev(netdev);
7433
7434         if (pci_dev_run_wake(pdev))
7435                 pm_runtime_get_noresume(&pdev->dev);
7436
7437         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7438          * would have already happened in close and is redundant.
7439          */
7440         e1000e_release_hw_control(adapter);
7441
7442         e1000e_reset_interrupt_capability(adapter);
7443         kfree(adapter->tx_ring);
7444         kfree(adapter->rx_ring);
7445
7446         iounmap(adapter->hw.hw_addr);
7447         if ((adapter->hw.flash_address) &&
7448             (adapter->hw.mac.type < e1000_pch_spt))
7449                 iounmap(adapter->hw.flash_address);
7450         pci_release_mem_regions(pdev);
7451
7452         free_netdev(netdev);
7453
7454         /* AER disable */
7455         pci_disable_pcie_error_reporting(pdev);
7456
7457         pci_disable_device(pdev);
7458 }
7459
7460 /* PCI Error Recovery (ERS) */
7461 static const struct pci_error_handlers e1000_err_handler = {
7462         .error_detected = e1000_io_error_detected,
7463         .slot_reset = e1000_io_slot_reset,
7464         .resume = e1000_io_resume,
7465 };
7466
7467 static const struct pci_device_id e1000_pci_tbl[] = {
7468         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7469         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7470         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7471         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7472           board_82571 },
7473         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7474         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7475         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7476         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7477         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7478
7479         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7480         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7481         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7482         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7483
7484         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7485         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7486         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7487
7488         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7489         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7490         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7491
7492         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7493           board_80003es2lan },
7494         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7495           board_80003es2lan },
7496         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7497           board_80003es2lan },
7498         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7499           board_80003es2lan },
7500
7501         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7502         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7503         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7504         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7505         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7506         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7507         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7508         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7509
7510         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7511         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7512         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7513         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7514         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7515         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7516         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7517         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7518         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7519
7520         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7521         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7522         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7523
7524         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7525         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7526         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7527
7528         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7529         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7530         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7531         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7532
7533         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7534         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7535
7536         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7537         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7538         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7539         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7540         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7541         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7542         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7543         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7544         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7545         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7546         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7547         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7548         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7549         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7550         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7551         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7552         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7553         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7554         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7555         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7556         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7557         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7558         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7559         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7560         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7561
7562         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7563 };
7564 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7565
7566 static const struct dev_pm_ops e1000_pm_ops = {
7567 #ifdef CONFIG_PM_SLEEP
7568         .suspend        = e1000e_pm_suspend,
7569         .resume         = e1000e_pm_resume,
7570         .freeze         = e1000e_pm_freeze,
7571         .thaw           = e1000e_pm_thaw,
7572         .poweroff       = e1000e_pm_suspend,
7573         .restore        = e1000e_pm_resume,
7574 #endif
7575         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7576                            e1000e_pm_runtime_idle)
7577 };
7578
7579 /* PCI Device API Driver */
7580 static struct pci_driver e1000_driver = {
7581         .name     = e1000e_driver_name,
7582         .id_table = e1000_pci_tbl,
7583         .probe    = e1000_probe,
7584         .remove   = e1000_remove,
7585         .driver   = {
7586                 .pm = &e1000_pm_ops,
7587         },
7588         .shutdown = e1000_shutdown,
7589         .err_handler = &e1000_err_handler
7590 };
7591
7592 /**
7593  * e1000_init_module - Driver Registration Routine
7594  *
7595  * e1000_init_module is the first routine called when the driver is
7596  * loaded. All it does is register with the PCI subsystem.
7597  **/
7598 static int __init e1000_init_module(void)
7599 {
7600         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7601                 e1000e_driver_version);
7602         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7603
7604         return pci_register_driver(&e1000_driver);
7605 }
7606 module_init(e1000_init_module);
7607
7608 /**
7609  * e1000_exit_module - Driver Exit Cleanup Routine
7610  *
7611  * e1000_exit_module is called just before the driver is removed
7612  * from memory.
7613  **/
7614 static void __exit e1000_exit_module(void)
7615 {
7616         pci_unregister_driver(&e1000_driver);
7617 }
7618 module_exit(e1000_exit_module);
7619
7620 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7621 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7622 MODULE_LICENSE("GPL");
7623 MODULE_VERSION(DRV_VERSION);
7624
7625 /* netdev.c */