drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (c) 2018-2019 Hisilicon Limited. */
   3
   4 #include <linux/debugfs.h>
   5 #include <linux/device.h>
   6
   7 #include "hnae3.h"
   8 #include "hns3_enet.h"
   9
  10 #define HNS3_DBG_READ_LEN 256
  11 #define HNS3_DBG_WRITE_LEN 1024
  12
  13 static struct dentry *hns3_dbgfs_root;
  14
  15 static int hns3_dbg_queue_info(struct hnae3_handle *h,
  16                                const char *cmd_buf)
  17 {
  18         struct hns3_nic_priv *priv = h->priv;
  19         struct hns3_nic_ring_data *ring_data;
  20         struct hns3_enet_ring *ring;
  21         u32 base_add_l, base_add_h;
  22         u32 queue_num, queue_max;
  23         u32 value, i = 0;
  24         int cnt;
  25
  26         if (!priv->ring_data) {
  27                 dev_err(&h->pdev->dev, "ring_data is NULL\n");
  28                 return -EFAULT;
  29         }
  30
  31         queue_max = h->kinfo.num_tqps;
  32         cnt = kstrtouint(&cmd_buf[11], 0, &queue_num);
  33         if (cnt)
  34                 queue_num = 0;
  35         else
  36                 queue_max = queue_num + 1;
  37
  38         dev_info(&h->pdev->dev, "queue info\n");
  39
  40         if (queue_num >= h->kinfo.num_tqps) {
  41                 dev_err(&h->pdev->dev,
  42                         "Queue number(%u) is out of range(0-%u)\n", queue_num,
  43                         h->kinfo.num_tqps - 1);
  44                 return -EINVAL;
  45         }
  46
  47         ring_data = priv->ring_data;
  48         for (i = queue_num; i < queue_max; i++) {
  49                 /* Each cycle needs to determine whether the instance is reset,
  50                  * to prevent reference to invalid memory. And need to ensure
  51                  * that the following code is executed within 100ms.
  52                  */
  53                 if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
  54                     test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
  55                         return -EPERM;
  56
  57                 ring = ring_data[(u32)(i + h->kinfo.num_tqps)].ring;
  58                 base_add_h = readl_relaxed(ring->tqp->io_base +
  59                                            HNS3_RING_RX_RING_BASEADDR_H_REG);
  60                 base_add_l = readl_relaxed(ring->tqp->io_base +
  61                                            HNS3_RING_RX_RING_BASEADDR_L_REG);
  62                 dev_info(&h->pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i,
  63                          base_add_h, base_add_l);
  64
  65                 value = readl_relaxed(ring->tqp->io_base +
  66                                       HNS3_RING_RX_RING_BD_NUM_REG);
  67                 dev_info(&h->pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value);
  68
  69                 value = readl_relaxed(ring->tqp->io_base +
  70                                       HNS3_RING_RX_RING_BD_LEN_REG);
  71                 dev_info(&h->pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value);
  72
  73                 value = readl_relaxed(ring->tqp->io_base +
  74                                       HNS3_RING_RX_RING_TAIL_REG);
  75                 dev_info(&h->pdev->dev, "RX(%d) RING TAIL: %u\n", i, value);
  76
  77                 value = readl_relaxed(ring->tqp->io_base +
  78                                       HNS3_RING_RX_RING_HEAD_REG);
  79                 dev_info(&h->pdev->dev, "RX(%d) RING HEAD: %u\n", i, value);
  80
  81                 value = readl_relaxed(ring->tqp->io_base +
  82                                       HNS3_RING_RX_RING_FBDNUM_REG);
  83                 dev_info(&h->pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value);
  84
  85                 value = readl_relaxed(ring->tqp->io_base +
  86                                       HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
  87                 dev_info(&h->pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value);
  88
  89                 ring = ring_data[i].ring;
  90                 base_add_h = readl_relaxed(ring->tqp->io_base +
  91                                            HNS3_RING_TX_RING_BASEADDR_H_REG);
  92                 base_add_l = readl_relaxed(ring->tqp->io_base +
  93                                            HNS3_RING_TX_RING_BASEADDR_L_REG);
  94                 dev_info(&h->pdev->dev, "TX(%d) BASE ADD: 0x%08x%08x\n", i,
  95                          base_add_h, base_add_l);
  96
  97                 value = readl_relaxed(ring->tqp->io_base +
  98                                       HNS3_RING_TX_RING_BD_NUM_REG);
  99                 dev_info(&h->pdev->dev, "TX(%d) RING BD NUM: %u\n", i, value);
 100
 101                 value = readl_relaxed(ring->tqp->io_base +
 102                                       HNS3_RING_TX_RING_TC_REG);
 103                 dev_info(&h->pdev->dev, "TX(%d) RING TC: %u\n", i, value);
 104
 105                 value = readl_relaxed(ring->tqp->io_base +
 106                                       HNS3_RING_TX_RING_TAIL_REG);
 107                 dev_info(&h->pdev->dev, "TX(%d) RING TAIL: %u\n", i, value);
 108
 109                 value = readl_relaxed(ring->tqp->io_base +
 110                                       HNS3_RING_TX_RING_HEAD_REG);
 111                 dev_info(&h->pdev->dev, "TX(%d) RING HEAD: %u\n", i, value);
 112
 113                 value = readl_relaxed(ring->tqp->io_base +
 114                                       HNS3_RING_TX_RING_FBDNUM_REG);
 115                 dev_info(&h->pdev->dev, "TX(%d) RING FBDNUM: %u\n", i, value);
 116
 117                 value = readl_relaxed(ring->tqp->io_base +
 118                                       HNS3_RING_TX_RING_OFFSET_REG);
 119                 dev_info(&h->pdev->dev, "TX(%d) RING OFFSET: %u\n", i, value);
 120
 121                 value = readl_relaxed(ring->tqp->io_base +
 122                                       HNS3_RING_TX_RING_PKTNUM_RECORD_REG);
 123                 dev_info(&h->pdev->dev, "TX(%d) RING PKTNUM: %u\n\n", i,
 124                          value);
 125         }
 126
 127         return 0;
 128 }
 129
 130 static int hns3_dbg_queue_map(struct hnae3_handle *h)
 131 {
 132         struct hns3_nic_priv *priv = h->priv;
 133         struct hns3_nic_ring_data *ring_data;
 134         int i;
 135
 136         if (!h->ae_algo->ops->get_global_queue_id)
 137                 return -EOPNOTSUPP;
 138
 139         dev_info(&h->pdev->dev, "map info for queue id and vector id\n");
 140         dev_info(&h->pdev->dev,
 141                  "local queue id | global queue id | vector id\n");
 142         for (i = 0; i < h->kinfo.num_tqps; i++) {
 143                 u16 global_qid;
 144
 145                 global_qid = h->ae_algo->ops->get_global_queue_id(h, i);
 146                 ring_data = &priv->ring_data[i];
 147                 if (!ring_data || !ring_data->ring ||
 148                     !ring_data->ring->tqp_vector)
 149                         continue;
 150
 151                 dev_info(&h->pdev->dev,
 152                          "      %4d            %4d            %4d\n",
 153                          i, global_qid,
 154                          ring_data->ring->tqp_vector->vector_irq);
 155         }
 156
 157         return 0;
 158 }
 159
 160 static int hns3_dbg_bd_info(struct hnae3_handle *h, const char *cmd_buf)
 161 {
 162         struct hns3_nic_priv *priv = h->priv;
 163         struct hns3_nic_ring_data *ring_data;
 164         struct hns3_desc *rx_desc, *tx_desc;
 165         struct device *dev = &h->pdev->dev;
 166         struct hns3_enet_ring *ring;
 167         u32 tx_index, rx_index;
 168         u32 q_num, value;
 169         dma_addr_t addr;
 170         int cnt;
 171
 172         cnt = sscanf(&cmd_buf[8], "%u %u", &q_num, &tx_index);
 173         if (cnt == 2) {
 174                 rx_index = tx_index;
 175         } else if (cnt != 1) {
 176                 dev_err(dev, "bd info: bad command string, cnt=%d\n", cnt);
 177                 return -EINVAL;
 178         }
 179
 180         if (q_num >= h->kinfo.num_tqps) {
 181                 dev_err(dev, "Queue number(%u) is out of range(0-%u)\n", q_num,
 182                         h->kinfo.num_tqps - 1);
 183                 return -EINVAL;
 184         }
 185
 186         ring_data = priv->ring_data;
 187         ring  = ring_data[q_num].ring;
 188         value = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_TAIL_REG);
 189         tx_index = (cnt == 1) ? value : tx_index;
 190
 191         if (tx_index >= ring->desc_num) {
 192                 dev_err(dev, "bd index(%u) is out of range(0-%u)\n", tx_index,
 193                         ring->desc_num - 1);
 194                 return -EINVAL;
 195         }
 196
 197         tx_desc = &ring->desc[tx_index];
 198         addr = le64_to_cpu(tx_desc->addr);
 199         dev_info(dev, "TX Queue Num: %u, BD Index: %u\n", q_num, tx_index);
 200         dev_info(dev, "(TX)addr: %pad\n", &addr);
 201         dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.vlan_tag);
 202         dev_info(dev, "(TX)send_size: %u\n", tx_desc->tx.send_size);
 203         dev_info(dev, "(TX)vlan_tso: %u\n", tx_desc->tx.type_cs_vlan_tso);
 204         dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
 205         dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
 206         dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
 207         dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.outer_vlan_tag);
 208         dev_info(dev, "(TX)tv: %u\n", tx_desc->tx.tv);
 209         dev_info(dev, "(TX)vlan_msec: %u\n", tx_desc->tx.ol_type_vlan_msec);
 210         dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
 211         dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
 212         dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
 213         dev_info(dev, "(TX)paylen: %u\n", tx_desc->tx.paylen);
 214         dev_info(dev, "(TX)vld_ra_ri: %u\n", tx_desc->tx.bdtp_fe_sc_vld_ra_ri);
 215         dev_info(dev, "(TX)mss: %u\n", tx_desc->tx.mss);
 216
 217         ring  = ring_data[q_num + h->kinfo.num_tqps].ring;
 218         value = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_TAIL_REG);
 219         rx_index = (cnt == 1) ? value : tx_index;
 220         rx_desc  = &ring->desc[rx_index];
 221
 222         addr = le64_to_cpu(rx_desc->addr);
 223         dev_info(dev, "RX Queue Num: %u, BD Index: %u\n", q_num, rx_index);
 224         dev_info(dev, "(RX)addr: %pad\n", &addr);
 225         dev_info(dev, "(RX)l234_info: %u\n", rx_desc->rx.l234_info);
 226         dev_info(dev, "(RX)pkt_len: %u\n", rx_desc->rx.pkt_len);
 227         dev_info(dev, "(RX)size: %u\n", rx_desc->rx.size);
 228         dev_info(dev, "(RX)rss_hash: %u\n", rx_desc->rx.rss_hash);
 229         dev_info(dev, "(RX)fd_id: %u\n", rx_desc->rx.fd_id);
 230         dev_info(dev, "(RX)vlan_tag: %u\n", rx_desc->rx.vlan_tag);
 231         dev_info(dev, "(RX)o_dm_vlan_id_fb: %u\n", rx_desc->rx.o_dm_vlan_id_fb);
 232         dev_info(dev, "(RX)ot_vlan_tag: %u\n", rx_desc->rx.ot_vlan_tag);
 233         dev_info(dev, "(RX)bd_base_info: %u\n", rx_desc->rx.bd_base_info);
 234
 235         return 0;
 236 }
 237
 238 static void hns3_dbg_help(struct hnae3_handle *h)
 239 {
 240 #define HNS3_DBG_BUF_LEN 256
 241
 242         char printf_buf[HNS3_DBG_BUF_LEN];
 243
 244         dev_info(&h->pdev->dev, "available commands\n");
 245         dev_info(&h->pdev->dev, "queue info <number>\n");
 246         dev_info(&h->pdev->dev, "queue map\n");
 247         dev_info(&h->pdev->dev, "bd info <q_num> <bd index>\n");
 248
 249         if (!hns3_is_phys_func(h->pdev))
 250                 return;
 251
 252         dev_info(&h->pdev->dev, "dump fd tcam\n");
 253         dev_info(&h->pdev->dev, "dump tc\n");
 254         dev_info(&h->pdev->dev, "dump tm map <q_num>\n");
 255         dev_info(&h->pdev->dev, "dump tm\n");
 256         dev_info(&h->pdev->dev, "dump qos pause cfg\n");
 257         dev_info(&h->pdev->dev, "dump qos pri map\n");
 258         dev_info(&h->pdev->dev, "dump qos buf cfg\n");
 259         dev_info(&h->pdev->dev, "dump mng tbl\n");
 260         dev_info(&h->pdev->dev, "dump reset info\n");
 261         dev_info(&h->pdev->dev, "dump m7 info\n");
 262         dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n");
 263         dev_info(&h->pdev->dev, "dump mac tnl status\n");
 264
 265         memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
 266         strncat(printf_buf, "dump reg [[bios common] [ssu <port_id>]",
 267                 HNS3_DBG_BUF_LEN - 1);
 268         strncat(printf_buf + strlen(printf_buf),
 269                 " [igu egu <port_id>] [rpu <tc_queue_num>]",
 270                 HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
 271         strncat(printf_buf + strlen(printf_buf),
 272                 " [rtc] [ppp] [rcb] [tqp <queue_num>]]\n",
 273                 HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
 274         dev_info(&h->pdev->dev, "%s", printf_buf);
 275
 276         memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
 277         strncat(printf_buf, "dump reg dcb <port_id> <pri_id> <pg_id>",
 278                 HNS3_DBG_BUF_LEN - 1);
 279         strncat(printf_buf + strlen(printf_buf), " <rq_id> <nq_id> <qset_id>\n",
 280                 HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
 281         dev_info(&h->pdev->dev, "%s", printf_buf);
 282 }
 283
 284 static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
 285                                  size_t count, loff_t *ppos)
 286 {
 287         int uncopy_bytes;
 288         char *buf;
 289         int len;
 290
 291         if (*ppos != 0)
 292                 return 0;
 293
 294         if (count < HNS3_DBG_READ_LEN)
 295                 return -ENOSPC;
 296
 297         buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
 298         if (!buf)
 299                 return -ENOMEM;
 300
 301         len = snprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
 302                        "Please echo help to cmd to get help information");
 303         uncopy_bytes = copy_to_user(buffer, buf, len);
 304
 305         kfree(buf);
 306
 307         if (uncopy_bytes)
 308                 return -EFAULT;
 309
 310         return (*ppos = len);
 311 }
 312
 313 static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
 314                                   size_t count, loff_t *ppos)
 315 {
 316         struct hnae3_handle *handle = filp->private_data;
 317         struct hns3_nic_priv *priv  = handle->priv;
 318         char *cmd_buf, *cmd_buf_tmp;
 319         int uncopied_bytes;
 320         int ret = 0;
 321
 322         if (*ppos != 0)
 323                 return 0;
 324
 325         /* Judge if the instance is being reset. */
 326         if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
 327             test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
 328                 return 0;
 329
 330         if (count > HNS3_DBG_WRITE_LEN)
 331                 return -ENOSPC;
 332
 333         cmd_buf = kzalloc(count + 1, GFP_KERNEL);
 334         if (!cmd_buf)
 335                 return count;
 336
 337         uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
 338         if (uncopied_bytes) {
 339                 kfree(cmd_buf);
 340                 return -EFAULT;
 341         }
 342
 343         cmd_buf[count] = '\0';
 344
 345         cmd_buf_tmp = strchr(cmd_buf, '\n');
 346         if (cmd_buf_tmp) {
 347                 *cmd_buf_tmp = '\0';
 348                 count = cmd_buf_tmp - cmd_buf + 1;
 349         }
 350
 351         if (strncmp(cmd_buf, "help", 4) == 0)
 352                 hns3_dbg_help(handle);
 353         else if (strncmp(cmd_buf, "queue info", 10) == 0)
 354                 ret = hns3_dbg_queue_info(handle, cmd_buf);
 355         else if (strncmp(cmd_buf, "queue map", 9) == 0)
 356                 ret = hns3_dbg_queue_map(handle);
 357         else if (strncmp(cmd_buf, "bd info", 7) == 0)
 358                 ret = hns3_dbg_bd_info(handle, cmd_buf);
 359         else if (handle->ae_algo->ops->dbg_run_cmd)
 360                 ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf);
 361         else
 362                 ret = -EOPNOTSUPP;
 363
 364         if (ret)
 365                 hns3_dbg_help(handle);
 366
 367         kfree(cmd_buf);
 368         cmd_buf = NULL;
 369
 370         return count;
 371 }
 372
 373 static const struct file_operations hns3_dbg_cmd_fops = {
 374         .owner = THIS_MODULE,
 375         .open  = simple_open,
 376         .read  = hns3_dbg_cmd_read,
 377         .write = hns3_dbg_cmd_write,
 378 };
 379
 380 void hns3_dbg_init(struct hnae3_handle *handle)
 381 {
 382         const char *name = pci_name(handle->pdev);
 383
 384         handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root);
 385
 386         debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
 387                             &hns3_dbg_cmd_fops);
 388 }
 389
 390 void hns3_dbg_uninit(struct hnae3_handle *handle)
 391 {
 392         debugfs_remove_recursive(handle->hnae3_dbgfs);
 393         handle->hnae3_dbgfs = NULL;
 394 }
 395
 396 void hns3_dbg_register_debugfs(const char *debugfs_dir_name)
 397 {
 398         hns3_dbgfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
 399 }
 400
 401 void hns3_dbg_unregister_debugfs(void)
 402 {
 403         debugfs_remove_recursive(hns3_dbgfs_root);
 404         hns3_dbgfs_root = NULL;
 405 }