Linux-libre 4.15.7-gnu
[librecmc/linux-libre.git] / drivers / media / platform / vsp1 / vsp1_rpf.c
1 /*
2  * vsp1_rpf.c  --  R-Car VSP1 Read Pixel Formatter
3  *
4  * Copyright (C) 2013-2014 Renesas Electronics Corporation
5  *
6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13
14 #include <linux/device.h>
15
16 #include <media/v4l2-subdev.h>
17
18 #include "vsp1.h"
19 #include "vsp1_dl.h"
20 #include "vsp1_pipe.h"
21 #include "vsp1_rwpf.h"
22 #include "vsp1_video.h"
23
24 #define RPF_MAX_WIDTH                           8190
25 #define RPF_MAX_HEIGHT                          8190
26
27 /* -----------------------------------------------------------------------------
28  * Device Access
29  */
30
31 static inline void vsp1_rpf_write(struct vsp1_rwpf *rpf,
32                                   struct vsp1_dl_list *dl, u32 reg, u32 data)
33 {
34         vsp1_dl_list_write(dl, reg + rpf->entity.index * VI6_RPF_OFFSET, data);
35 }
36
37 /* -----------------------------------------------------------------------------
38  * V4L2 Subdevice Operations
39  */
40
41 static const struct v4l2_subdev_ops rpf_ops = {
42         .pad    = &vsp1_rwpf_pad_ops,
43 };
44
45 /* -----------------------------------------------------------------------------
46  * VSP1 Entity Operations
47  */
48
49 static void rpf_configure(struct vsp1_entity *entity,
50                           struct vsp1_pipeline *pipe,
51                           struct vsp1_dl_list *dl,
52                           enum vsp1_entity_params params)
53 {
54         struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
55         const struct vsp1_format_info *fmtinfo = rpf->fmtinfo;
56         const struct v4l2_pix_format_mplane *format = &rpf->format;
57         const struct v4l2_mbus_framefmt *source_format;
58         const struct v4l2_mbus_framefmt *sink_format;
59         unsigned int left = 0;
60         unsigned int top = 0;
61         u32 pstride;
62         u32 infmt;
63
64         if (params == VSP1_ENTITY_PARAMS_RUNTIME) {
65                 vsp1_rpf_write(rpf, dl, VI6_RPF_VRTCOL_SET,
66                                rpf->alpha << VI6_RPF_VRTCOL_SET_LAYA_SHIFT);
67                 vsp1_rpf_write(rpf, dl, VI6_RPF_MULT_ALPHA, rpf->mult_alpha |
68                                (rpf->alpha << VI6_RPF_MULT_ALPHA_RATIO_SHIFT));
69
70                 vsp1_pipeline_propagate_alpha(pipe, dl, rpf->alpha);
71                 return;
72         }
73
74         if (params == VSP1_ENTITY_PARAMS_PARTITION) {
75                 struct vsp1_device *vsp1 = rpf->entity.vsp1;
76                 struct vsp1_rwpf_memory mem = rpf->mem;
77                 struct v4l2_rect crop;
78
79                 /*
80                  * Source size and crop offsets.
81                  *
82                  * The crop offsets correspond to the location of the crop
83                  * rectangle top left corner in the plane buffer. Only two
84                  * offsets are needed, as planes 2 and 3 always have identical
85                  * strides.
86                  */
87                 crop = *vsp1_rwpf_get_crop(rpf, rpf->entity.config);
88
89                 /*
90                  * Partition Algorithm Control
91                  *
92                  * The partition algorithm can split this frame into multiple
93                  * slices. We must scale our partition window based on the pipe
94                  * configuration to match the destination partition window.
95                  * To achieve this, we adjust our crop to provide a 'sub-crop'
96                  * matching the expected partition window. Only 'left' and
97                  * 'width' need to be adjusted.
98                  */
99                 if (pipe->partitions > 1) {
100                         crop.width = pipe->partition->rpf.width;
101                         crop.left += pipe->partition->rpf.left;
102                 }
103
104                 vsp1_rpf_write(rpf, dl, VI6_RPF_SRC_BSIZE,
105                                (crop.width << VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT) |
106                                (crop.height << VI6_RPF_SRC_BSIZE_BVSIZE_SHIFT));
107                 vsp1_rpf_write(rpf, dl, VI6_RPF_SRC_ESIZE,
108                                (crop.width << VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT) |
109                                (crop.height << VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT));
110
111                 mem.addr[0] += crop.top * format->plane_fmt[0].bytesperline
112                              + crop.left * fmtinfo->bpp[0] / 8;
113
114                 if (format->num_planes > 1) {
115                         unsigned int offset;
116
117                         offset = crop.top * format->plane_fmt[1].bytesperline
118                                + crop.left / fmtinfo->hsub
119                                * fmtinfo->bpp[1] / 8;
120                         mem.addr[1] += offset;
121                         mem.addr[2] += offset;
122                 }
123
124                 /*
125                  * On Gen3 hardware the SPUVS bit has no effect on 3-planar
126                  * formats. Swap the U and V planes manually in that case.
127                  */
128                 if (vsp1->info->gen == 3 && format->num_planes == 3 &&
129                     fmtinfo->swap_uv)
130                         swap(mem.addr[1], mem.addr[2]);
131
132                 vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_Y, mem.addr[0]);
133                 vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C0, mem.addr[1]);
134                 vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C1, mem.addr[2]);
135                 return;
136         }
137
138         /* Stride */
139         pstride = format->plane_fmt[0].bytesperline
140                 << VI6_RPF_SRCM_PSTRIDE_Y_SHIFT;
141         if (format->num_planes > 1)
142                 pstride |= format->plane_fmt[1].bytesperline
143                         << VI6_RPF_SRCM_PSTRIDE_C_SHIFT;
144
145         vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_PSTRIDE, pstride);
146
147         /* Format */
148         sink_format = vsp1_entity_get_pad_format(&rpf->entity,
149                                                  rpf->entity.config,
150                                                  RWPF_PAD_SINK);
151         source_format = vsp1_entity_get_pad_format(&rpf->entity,
152                                                    rpf->entity.config,
153                                                    RWPF_PAD_SOURCE);
154
155         infmt = VI6_RPF_INFMT_CIPM
156               | (fmtinfo->hwfmt << VI6_RPF_INFMT_RDFMT_SHIFT);
157
158         if (fmtinfo->swap_yc)
159                 infmt |= VI6_RPF_INFMT_SPYCS;
160         if (fmtinfo->swap_uv)
161                 infmt |= VI6_RPF_INFMT_SPUVS;
162
163         if (sink_format->code != source_format->code)
164                 infmt |= VI6_RPF_INFMT_CSC;
165
166         vsp1_rpf_write(rpf, dl, VI6_RPF_INFMT, infmt);
167         vsp1_rpf_write(rpf, dl, VI6_RPF_DSWAP, fmtinfo->swap);
168
169         /* Output location */
170         if (pipe->bru) {
171                 const struct v4l2_rect *compose;
172
173                 compose = vsp1_entity_get_pad_selection(pipe->bru,
174                                                         pipe->bru->config,
175                                                         rpf->bru_input,
176                                                         V4L2_SEL_TGT_COMPOSE);
177                 left = compose->left;
178                 top = compose->top;
179         }
180
181         vsp1_rpf_write(rpf, dl, VI6_RPF_LOC,
182                        (left << VI6_RPF_LOC_HCOORD_SHIFT) |
183                        (top << VI6_RPF_LOC_VCOORD_SHIFT));
184
185         /*
186          * On Gen2 use the alpha channel (extended to 8 bits) when available or
187          * a fixed alpha value set through the V4L2_CID_ALPHA_COMPONENT control
188          * otherwise.
189          *
190          * The Gen3 RPF has extended alpha capability and can both multiply the
191          * alpha channel by a fixed global alpha value, and multiply the pixel
192          * components to convert the input to premultiplied alpha.
193          *
194          * As alpha premultiplication is available in the BRU for both Gen2 and
195          * Gen3 we handle it there and use the Gen3 alpha multiplier for global
196          * alpha multiplication only. This however prevents conversion to
197          * premultiplied alpha if no BRU is present in the pipeline. If that use
198          * case turns out to be useful we will revisit the implementation (for
199          * Gen3 only).
200          *
201          * We enable alpha multiplication on Gen3 using the fixed alpha value
202          * set through the V4L2_CID_ALPHA_COMPONENT control when the input
203          * contains an alpha channel. On Gen2 the global alpha is ignored in
204          * that case.
205          *
206          * In all cases, disable color keying.
207          */
208         vsp1_rpf_write(rpf, dl, VI6_RPF_ALPH_SEL, VI6_RPF_ALPH_SEL_AEXT_EXT |
209                        (fmtinfo->alpha ? VI6_RPF_ALPH_SEL_ASEL_PACKED
210                                        : VI6_RPF_ALPH_SEL_ASEL_FIXED));
211
212         if (entity->vsp1->info->gen == 3) {
213                 u32 mult;
214
215                 if (fmtinfo->alpha) {
216                         /*
217                          * When the input contains an alpha channel enable the
218                          * alpha multiplier. If the input is premultiplied we
219                          * need to multiply both the alpha channel and the pixel
220                          * components by the global alpha value to keep them
221                          * premultiplied. Otherwise multiply the alpha channel
222                          * only.
223                          */
224                         bool premultiplied = format->flags
225                                            & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
226
227                         mult = VI6_RPF_MULT_ALPHA_A_MMD_RATIO
228                              | (premultiplied ?
229                                 VI6_RPF_MULT_ALPHA_P_MMD_RATIO :
230                                 VI6_RPF_MULT_ALPHA_P_MMD_NONE);
231                 } else {
232                         /*
233                          * When the input doesn't contain an alpha channel the
234                          * global alpha value is applied in the unpacking unit,
235                          * the alpha multiplier isn't needed and must be
236                          * disabled.
237                          */
238                         mult = VI6_RPF_MULT_ALPHA_A_MMD_NONE
239                              | VI6_RPF_MULT_ALPHA_P_MMD_NONE;
240                 }
241
242                 rpf->mult_alpha = mult;
243         }
244
245         vsp1_rpf_write(rpf, dl, VI6_RPF_MSK_CTRL, 0);
246         vsp1_rpf_write(rpf, dl, VI6_RPF_CKEY_CTRL, 0);
247
248 }
249
250 static void rpf_partition(struct vsp1_entity *entity,
251                           struct vsp1_pipeline *pipe,
252                           struct vsp1_partition *partition,
253                           unsigned int partition_idx,
254                           struct vsp1_partition_window *window)
255 {
256         partition->rpf = *window;
257 }
258
259 static const struct vsp1_entity_operations rpf_entity_ops = {
260         .configure = rpf_configure,
261         .partition = rpf_partition,
262 };
263
264 /* -----------------------------------------------------------------------------
265  * Initialization and Cleanup
266  */
267
268 struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index)
269 {
270         struct vsp1_rwpf *rpf;
271         char name[6];
272         int ret;
273
274         rpf = devm_kzalloc(vsp1->dev, sizeof(*rpf), GFP_KERNEL);
275         if (rpf == NULL)
276                 return ERR_PTR(-ENOMEM);
277
278         rpf->max_width = RPF_MAX_WIDTH;
279         rpf->max_height = RPF_MAX_HEIGHT;
280
281         rpf->entity.ops = &rpf_entity_ops;
282         rpf->entity.type = VSP1_ENTITY_RPF;
283         rpf->entity.index = index;
284
285         sprintf(name, "rpf.%u", index);
286         ret = vsp1_entity_init(vsp1, &rpf->entity, name, 2, &rpf_ops,
287                                MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER);
288         if (ret < 0)
289                 return ERR_PTR(ret);
290
291         /* Initialize the control handler. */
292         ret = vsp1_rwpf_init_ctrls(rpf, 0);
293         if (ret < 0) {
294                 dev_err(vsp1->dev, "rpf%u: failed to initialize controls\n",
295                         index);
296                 goto error;
297         }
298
299         v4l2_ctrl_handler_setup(&rpf->ctrls);
300
301         return rpf;
302
303 error:
304         vsp1_entity_destroy(&rpf->entity);
305         return ERR_PTR(ret);
306 }