1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CCDC module
7 * Copyright (C) 2009-2010 Nokia Corporation
8 * Copyright (C) 2009 Texas Instruments, Inc.
10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 * Sakari Ailus <sakari.ailus@iki.fi>
14 #include <linux/module.h>
15 #include <linux/uaccess.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <media/v4l2-event.h>
28 #define CCDC_MIN_WIDTH 32
29 #define CCDC_MIN_HEIGHT 32
31 static struct v4l2_mbus_framefmt *
32 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
33 unsigned int pad, enum v4l2_subdev_format_whence which);
35 static const unsigned int ccdc_fmts[] = {
37 MEDIA_BUS_FMT_Y10_1X10,
38 MEDIA_BUS_FMT_Y12_1X12,
39 MEDIA_BUS_FMT_SGRBG8_1X8,
40 MEDIA_BUS_FMT_SRGGB8_1X8,
41 MEDIA_BUS_FMT_SBGGR8_1X8,
42 MEDIA_BUS_FMT_SGBRG8_1X8,
43 MEDIA_BUS_FMT_SGRBG10_1X10,
44 MEDIA_BUS_FMT_SRGGB10_1X10,
45 MEDIA_BUS_FMT_SBGGR10_1X10,
46 MEDIA_BUS_FMT_SGBRG10_1X10,
47 MEDIA_BUS_FMT_SGRBG12_1X12,
48 MEDIA_BUS_FMT_SRGGB12_1X12,
49 MEDIA_BUS_FMT_SBGGR12_1X12,
50 MEDIA_BUS_FMT_SGBRG12_1X12,
51 MEDIA_BUS_FMT_YUYV8_2X8,
52 MEDIA_BUS_FMT_UYVY8_2X8,
56 * ccdc_print_status - Print current CCDC Module register values.
57 * @ccdc: Pointer to ISP CCDC device.
59 * Also prints other debug information stored in the CCDC module.
61 #define CCDC_PRINT_REGISTER(isp, name)\
62 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
63 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
65 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
67 struct isp_device *isp = to_isp_device(ccdc);
69 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
71 CCDC_PRINT_REGISTER(isp, PCR);
72 CCDC_PRINT_REGISTER(isp, SYN_MODE);
73 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
74 CCDC_PRINT_REGISTER(isp, PIX_LINES);
75 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
76 CCDC_PRINT_REGISTER(isp, VERT_START);
77 CCDC_PRINT_REGISTER(isp, VERT_LINES);
78 CCDC_PRINT_REGISTER(isp, CULLING);
79 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
80 CCDC_PRINT_REGISTER(isp, SDOFST);
81 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
82 CCDC_PRINT_REGISTER(isp, CLAMP);
83 CCDC_PRINT_REGISTER(isp, DCSUB);
84 CCDC_PRINT_REGISTER(isp, COLPTN);
85 CCDC_PRINT_REGISTER(isp, BLKCMP);
86 CCDC_PRINT_REGISTER(isp, FPC);
87 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
88 CCDC_PRINT_REGISTER(isp, VDINT);
89 CCDC_PRINT_REGISTER(isp, ALAW);
90 CCDC_PRINT_REGISTER(isp, REC656IF);
91 CCDC_PRINT_REGISTER(isp, CFG);
92 CCDC_PRINT_REGISTER(isp, FMTCFG);
93 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
94 CCDC_PRINT_REGISTER(isp, FMT_VERT);
95 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
96 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
97 CCDC_PRINT_REGISTER(isp, PRGODD0);
98 CCDC_PRINT_REGISTER(isp, PRGODD1);
99 CCDC_PRINT_REGISTER(isp, VP_OUT);
100 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
101 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
102 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
103 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
105 dev_dbg(isp->dev, "--------------------------------------------\n");
109 * omap3isp_ccdc_busy - Get busy state of the CCDC.
110 * @ccdc: Pointer to ISP CCDC device.
112 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
114 struct isp_device *isp = to_isp_device(ccdc);
116 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
120 /* -----------------------------------------------------------------------------
121 * Lens Shading Compensation
125 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
126 * @ccdc: Pointer to ISP CCDC device.
127 * @lsc_cfg: the LSC configuration to check.
129 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
131 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
132 struct omap3isp_ccdc_lsc_config *lsc_cfg)
134 struct isp_device *isp = to_isp_device(ccdc);
135 struct v4l2_mbus_framefmt *format;
136 unsigned int paxel_width, paxel_height;
137 unsigned int paxel_shift_x, paxel_shift_y;
138 unsigned int min_width, min_height, min_size;
139 unsigned int input_width, input_height;
141 paxel_shift_x = lsc_cfg->gain_mode_m;
142 paxel_shift_y = lsc_cfg->gain_mode_n;
144 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
145 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
146 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
150 if (lsc_cfg->offset & 3) {
152 "CCDC: LSC: Offset must be a multiple of 4\n");
156 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
157 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
161 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
162 V4L2_SUBDEV_FORMAT_ACTIVE);
163 input_width = format->width;
164 input_height = format->height;
166 /* Calculate minimum bytesize for validation */
167 paxel_width = 1 << paxel_shift_x;
168 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
169 >> paxel_shift_x) + 1;
171 paxel_height = 1 << paxel_shift_y;
172 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
173 >> paxel_shift_y) + 1;
175 min_size = 4 * min_width * min_height;
176 if (min_size > lsc_cfg->size) {
177 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
180 if (lsc_cfg->offset < (min_width * 4)) {
181 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
184 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
185 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
192 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
193 * @ccdc: Pointer to ISP CCDC device.
195 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
198 isp_reg_writel(to_isp_device(ccdc), addr,
199 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
203 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
204 * @ccdc: Pointer to ISP CCDC device.
206 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
207 struct omap3isp_ccdc_lsc_config *cfg)
209 struct isp_device *isp = to_isp_device(ccdc);
212 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
213 ISPCCDC_LSC_TABLE_OFFSET);
216 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
217 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
218 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
219 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
222 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
223 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
224 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
225 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
226 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
227 ISPCCDC_LSC_INITIAL);
230 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
232 struct isp_device *isp = to_isp_device(ccdc);
235 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
236 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
239 for (wait = 0; wait < 1000; wait++) {
240 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
241 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
242 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
243 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
255 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
256 * @ccdc: Pointer to ISP CCDC device.
257 * @enable: 0 Disables LSC, 1 Enables LSC.
259 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
261 struct isp_device *isp = to_isp_device(ccdc);
262 const struct v4l2_mbus_framefmt *format =
263 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
264 V4L2_SUBDEV_FORMAT_ACTIVE);
266 if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) &&
267 (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) &&
268 (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) &&
269 (format->code != MEDIA_BUS_FMT_SGBRG10_1X10))
273 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
275 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
276 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
279 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
280 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
281 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
282 ccdc->lsc.state = LSC_STATE_STOPPED;
283 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
286 ccdc->lsc.state = LSC_STATE_RUNNING;
288 ccdc->lsc.state = LSC_STATE_STOPPING;
294 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
296 struct isp_device *isp = to_isp_device(ccdc);
298 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
302 /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
303 * @ccdc: Pointer to ISP CCDC device
304 * @req: New configuration request
306 * context: in_interrupt()
308 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
309 struct ispccdc_lsc_config_req *req)
314 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
315 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
319 if (ccdc_lsc_busy(ccdc))
322 ccdc_lsc_setup_regs(ccdc, &req->config);
323 ccdc_lsc_program_table(ccdc, req->table.dma);
328 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
329 * @ccdc: Pointer to ISP CCDC device.
331 * Disables LSC, and defers enablement to shadow registers update time.
333 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
335 struct isp_device *isp = to_isp_device(ccdc);
337 * From OMAP3 TRM: When this event is pending, the module
338 * goes into transparent mode (output =input). Normal
339 * operation can be resumed at the start of the next frame
341 * 1) Clearing this event
342 * 2) Disabling the LSC module
345 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
347 ccdc->lsc.state = LSC_STATE_STOPPED;
350 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
351 struct ispccdc_lsc_config_req *req)
353 struct isp_device *isp = to_isp_device(ccdc);
358 if (req->table.addr) {
359 sg_free_table(&req->table.sgt);
360 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
367 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
368 struct list_head *queue)
370 struct ispccdc_lsc_config_req *req, *n;
373 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
374 list_for_each_entry_safe(req, n, queue, list) {
375 list_del(&req->list);
376 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
377 ccdc_lsc_free_request(ccdc, req);
378 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
380 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
383 static void ccdc_lsc_free_table_work(struct work_struct *work)
385 struct isp_ccdc_device *ccdc;
386 struct ispccdc_lsc *lsc;
388 lsc = container_of(work, struct ispccdc_lsc, table_work);
389 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
391 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
395 * ccdc_lsc_config - Configure the LSC module from a userspace request
397 * Store the request LSC configuration in the LSC engine request pointer. The
398 * configuration will be applied to the hardware when the CCDC will be enabled,
399 * or at the next LSC interrupt if the CCDC is already running.
401 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
402 struct omap3isp_ccdc_update_config *config)
404 struct isp_device *isp = to_isp_device(ccdc);
405 struct ispccdc_lsc_config_req *req;
410 update = config->update &
411 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
415 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
416 dev_dbg(to_device(ccdc),
417 "%s: Both LSC configuration and table need to be supplied\n",
422 req = kzalloc(sizeof(*req), GFP_KERNEL);
426 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
427 if (copy_from_user(&req->config, config->lsc_cfg,
428 sizeof(req->config))) {
435 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
438 if (req->table.addr == NULL) {
443 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
444 req->table.addr, req->table.dma,
449 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
450 req->table.sgt.nents, DMA_TO_DEVICE);
452 if (copy_from_user(req->table.addr, config->lsc,
458 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
459 req->table.sgt.nents, DMA_TO_DEVICE);
462 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
463 if (ccdc->lsc.request) {
464 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
465 schedule_work(&ccdc->lsc.table_work);
467 ccdc->lsc.request = req;
468 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
474 ccdc_lsc_free_request(ccdc, req);
479 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
484 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
485 ret = ccdc->lsc.active != NULL;
486 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
491 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
493 struct ispccdc_lsc *lsc = &ccdc->lsc;
495 if (lsc->state != LSC_STATE_STOPPED)
499 list_add_tail(&lsc->active->list, &lsc->free_queue);
503 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
504 omap3isp_sbl_disable(to_isp_device(ccdc),
505 OMAP3_ISP_SBL_CCDC_LSC_READ);
506 list_add_tail(&lsc->request->list, &lsc->free_queue);
511 lsc->active = lsc->request;
513 __ccdc_lsc_enable(ccdc, 1);
516 if (!list_empty(&lsc->free_queue))
517 schedule_work(&lsc->table_work);
522 /* -----------------------------------------------------------------------------
523 * Parameters configuration
527 * ccdc_configure_clamp - Configure optical-black or digital clamping
528 * @ccdc: Pointer to ISP CCDC device.
530 * The CCDC performs either optical-black or digital clamp. Configure and enable
531 * the selected clamp method.
533 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
535 struct isp_device *isp = to_isp_device(ccdc);
539 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
540 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
541 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
542 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
543 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
545 isp_reg_writel(isp, ccdc->clamp.dcsubval,
546 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
549 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
550 ISPCCDC_CLAMP_CLAMPEN,
551 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
555 * ccdc_configure_fpc - Configure Faulty Pixel Correction
556 * @ccdc: Pointer to ISP CCDC device.
558 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
560 struct isp_device *isp = to_isp_device(ccdc);
562 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
567 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
569 /* The FPNUM field must be set before enabling FPC. */
570 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
571 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
572 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
573 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
577 * ccdc_configure_black_comp - Configure Black Level Compensation.
578 * @ccdc: Pointer to ISP CCDC device.
580 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
582 struct isp_device *isp = to_isp_device(ccdc);
585 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
586 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
587 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
588 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
590 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
594 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
595 * @ccdc: Pointer to ISP CCDC device.
597 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
599 struct isp_device *isp = to_isp_device(ccdc);
601 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
602 ISPCCDC_SYN_MODE_LPF,
603 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
607 * ccdc_configure_alaw - Configure A-law compression.
608 * @ccdc: Pointer to ISP CCDC device.
610 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
612 struct isp_device *isp = to_isp_device(ccdc);
613 const struct isp_format_info *info;
616 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
618 switch (info->width) {
623 alaw = ISPCCDC_ALAW_GWDI_9_0;
626 alaw = ISPCCDC_ALAW_GWDI_10_1;
629 alaw = ISPCCDC_ALAW_GWDI_11_2;
632 alaw = ISPCCDC_ALAW_GWDI_12_3;
637 alaw |= ISPCCDC_ALAW_CCDTBL;
639 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
643 * ccdc_config_imgattr - Configure sensor image specific attributes.
644 * @ccdc: Pointer to ISP CCDC device.
645 * @colptn: Color pattern of the sensor.
647 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
649 struct isp_device *isp = to_isp_device(ccdc);
651 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
655 * ccdc_config - Set CCDC configuration from userspace
656 * @ccdc: Pointer to ISP CCDC device.
657 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
659 * Returns 0 if successful, -EINVAL if the pointer to the configuration
660 * structure is null, or the copy_from_user function fails to copy user space
661 * memory to kernel space memory.
663 static int ccdc_config(struct isp_ccdc_device *ccdc,
664 struct omap3isp_ccdc_update_config *ccdc_struct)
666 struct isp_device *isp = to_isp_device(ccdc);
669 spin_lock_irqsave(&ccdc->lock, flags);
670 ccdc->shadow_update = 1;
671 spin_unlock_irqrestore(&ccdc->lock, flags);
673 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
674 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
675 ccdc->update |= OMAP3ISP_CCDC_ALAW;
678 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
679 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
680 ccdc->update |= OMAP3ISP_CCDC_LPF;
683 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
684 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
685 sizeof(ccdc->clamp))) {
686 ccdc->shadow_update = 0;
690 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
691 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
694 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
695 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
696 sizeof(ccdc->blcomp))) {
697 ccdc->shadow_update = 0;
701 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
704 ccdc->shadow_update = 0;
706 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
707 struct omap3isp_ccdc_fpc fpc;
708 struct ispccdc_fpc fpc_old = { .addr = NULL, };
709 struct ispccdc_fpc fpc_new;
712 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
715 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
718 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
721 size = fpc.fpnum * 4;
724 * The table address must be 64-bytes aligned, which is
725 * guaranteed by dma_alloc_coherent().
727 fpc_new.fpnum = fpc.fpnum;
728 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
731 if (fpc_new.addr == NULL)
734 if (copy_from_user(fpc_new.addr,
735 (__force void __user *)(long)fpc.fpcaddr,
737 dma_free_coherent(isp->dev, size, fpc_new.addr,
746 ccdc_configure_fpc(ccdc);
748 if (fpc_old.addr != NULL)
749 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
750 fpc_old.addr, fpc_old.dma);
753 return ccdc_lsc_config(ccdc, ccdc_struct);
756 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
758 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
759 ccdc_configure_alaw(ccdc);
760 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
763 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
764 ccdc_configure_lpf(ccdc);
765 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
768 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
769 ccdc_configure_clamp(ccdc);
770 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
773 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
774 ccdc_configure_black_comp(ccdc);
775 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
780 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
781 * @isp: Pointer to ISP device
783 void omap3isp_ccdc_restore_context(struct isp_device *isp)
785 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
787 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
789 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
790 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
791 ccdc_apply_controls(ccdc);
792 ccdc_configure_fpc(ccdc);
795 /* -----------------------------------------------------------------------------
796 * Format- and pipeline-related configuration helpers
800 * ccdc_config_vp - Configure the Video Port.
801 * @ccdc: Pointer to ISP CCDC device.
803 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
805 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
806 struct isp_device *isp = to_isp_device(ccdc);
807 const struct isp_format_info *info;
808 struct v4l2_mbus_framefmt *format;
809 unsigned long l3_ick = pipe->l3_ick;
810 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
811 unsigned int div = 0;
812 u32 fmtcfg = ISPCCDC_FMTCFG_VPEN;
814 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
817 /* Disable the video port when the input format isn't supported.
818 * This is indicated by a pixel code set to 0.
820 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
824 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
825 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
826 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
827 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
828 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
829 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
831 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
832 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
833 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
835 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
837 switch (info->width) {
840 fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0;
843 fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1;
846 fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2;
849 fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3;
854 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
855 else if (pipe->external_rate)
856 div = l3_ick / pipe->external_rate;
858 div = clamp(div, 2U, max_div);
859 fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
861 isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
865 * ccdc_config_outlineoffset - Configure memory saving output line offset
866 * @ccdc: Pointer to ISP CCDC device.
867 * @bpl: Number of bytes per line when stored in memory.
868 * @field: Field order when storing interlaced formats in memory.
870 * Configure the offsets for the line output control:
872 * - The horizontal line offset is defined as the number of bytes between the
873 * start of two consecutive lines in memory. Set it to the given bytes per
876 * - The field offset value is defined as the number of lines to offset the
877 * start of the field identified by FID = 1. Set it to one.
879 * - The line offset values are defined as the number of lines (as defined by
880 * the horizontal line offset) between the start of two consecutive lines for
881 * all combinations of odd/even lines in odd/even fields. When interleaving
882 * fields set them all to two lines, and to one line otherwise.
884 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
886 enum v4l2_field field)
888 struct isp_device *isp = to_isp_device(ccdc);
891 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
895 case V4L2_FIELD_INTERLACED_TB:
896 case V4L2_FIELD_INTERLACED_BT:
897 /* When interleaving fields in memory offset field one by one
898 * line and set the line offset to two lines.
900 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
901 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
902 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
903 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
907 /* In all other cases set the line offsets to one line. */
911 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
915 * ccdc_set_outaddr - Set memory address to save output image
916 * @ccdc: Pointer to ISP CCDC device.
917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
919 * Sets the memory address where the output will be saved.
921 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
923 struct isp_device *isp = to_isp_device(ccdc);
925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930 * @ccdc: Pointer to ISP CCDC device.
931 * @max_rate: Maximum calculated data rate.
933 * Returns in *max_rate less value between calculated and passed
935 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 unsigned int *max_rate)
938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
945 * TRM says that for parallel sensors the maximum data rate
946 * should be 90% form L3/2 clock, otherwise just L3/2.
948 if (ccdc->input == CCDC_INPUT_PARALLEL)
949 rate = pipe->l3_ick / 2 * 9 / 10;
951 rate = pipe->l3_ick / 2;
953 *max_rate = min(*max_rate, rate);
957 * ccdc_config_sync_if - Set CCDC sync interface configuration
958 * @ccdc: Pointer to ISP CCDC device.
959 * @parcfg: Parallel interface platform data (may be NULL)
960 * @data_size: Data size
962 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
963 struct isp_parallel_cfg *parcfg,
964 unsigned int data_size)
966 struct isp_device *isp = to_isp_device(ccdc);
967 const struct v4l2_mbus_framefmt *format;
968 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
970 format = &ccdc->formats[CCDC_PAD_SINK];
972 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
973 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
974 /* According to the OMAP3 TRM the input mode only affects SYNC
975 * mode, enabling BT.656 mode should take precedence. However,
976 * in practice setting the input mode to YCbCr data on 8 bits
977 * seems to be required in BT.656 mode. In SYNC mode set it to
978 * YCbCr on 16 bits as the bridge is enabled in that case.
981 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
983 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
994 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
997 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
1001 if (parcfg && parcfg->data_pol)
1002 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1004 if (parcfg && parcfg->hs_pol)
1005 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1007 /* The polarity of the vertical sync signal output by the BT.656
1008 * decoder is not documented and seems to be active low.
1010 if ((parcfg && parcfg->vs_pol) || ccdc->bt656)
1011 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1013 if (parcfg && parcfg->fld_pol)
1014 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1016 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1018 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1019 * hardware seems to ignore it in all other input modes.
1021 if (format->code == MEDIA_BUS_FMT_UYVY8_2X8)
1022 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1025 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1028 /* Enable or disable BT.656 mode, including error correction for the
1029 * synchronization codes.
1032 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1033 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1035 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1036 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1040 /* CCDC formats descriptions */
1041 static const u32 ccdc_sgrbg_pattern =
1042 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1043 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1044 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1045 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1046 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1047 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1048 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1049 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1050 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1051 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1054 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1055 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1059 static const u32 ccdc_srggb_pattern =
1060 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1061 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1062 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1063 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1064 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1065 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1066 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1067 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1068 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1069 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1070 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1071 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1072 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1073 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1074 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1075 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1077 static const u32 ccdc_sbggr_pattern =
1078 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1079 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1080 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1081 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1082 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1083 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1084 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1085 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1086 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1087 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1090 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1091 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1095 static const u32 ccdc_sgbrg_pattern =
1096 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1097 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1098 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1099 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1100 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1101 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1102 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1103 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1104 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1105 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1106 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1107 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1108 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1109 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1110 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1111 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1113 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1115 struct isp_device *isp = to_isp_device(ccdc);
1116 struct isp_parallel_cfg *parcfg = NULL;
1117 struct v4l2_subdev *sensor;
1118 struct v4l2_mbus_framefmt *format;
1119 const struct v4l2_rect *crop;
1120 const struct isp_format_info *fmt_info;
1121 struct v4l2_subdev_format fmt_src;
1122 unsigned int depth_out;
1123 unsigned int depth_in = 0;
1124 struct media_pad *pad;
1125 unsigned long flags;
1126 unsigned int bridge;
1133 ccdc->bt656 = false;
1136 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
1137 sensor = media_entity_to_v4l2_subdev(pad->entity);
1138 if (ccdc->input == CCDC_INPUT_PARALLEL) {
1139 struct v4l2_subdev *sd =
1140 to_isp_pipeline(&ccdc->subdev.entity)->external;
1142 parcfg = &v4l2_subdev_to_bus_cfg(sd)->bus.parallel;
1143 ccdc->bt656 = parcfg->bt656;
1147 format = &ccdc->formats[CCDC_PAD_SINK];
1149 /* Compute the lane shifter shift value and enable the bridge when the
1150 * input format is a non-BT.656 YUV variant.
1152 fmt_src.pad = pad->index;
1153 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1154 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1155 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1156 depth_in = fmt_info->width;
1159 fmt_info = omap3isp_video_format_info(format->code);
1160 depth_out = fmt_info->width;
1161 shift = depth_in - depth_out;
1164 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1165 else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8)
1166 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1167 else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8)
1168 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1170 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1172 omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge);
1174 /* Configure the sync interface. */
1175 ccdc_config_sync_if(ccdc, parcfg, depth_out);
1177 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1179 /* Use the raw, unprocessed data when writing to memory. The H3A and
1180 * histogram modules are still fed with lens shading corrected data.
1182 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1184 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1185 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1187 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1189 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1190 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1192 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1195 switch (format->code) {
1196 case MEDIA_BUS_FMT_SRGGB10_1X10:
1197 case MEDIA_BUS_FMT_SRGGB12_1X12:
1198 ccdc_pattern = ccdc_srggb_pattern;
1200 case MEDIA_BUS_FMT_SBGGR10_1X10:
1201 case MEDIA_BUS_FMT_SBGGR12_1X12:
1202 ccdc_pattern = ccdc_sbggr_pattern;
1204 case MEDIA_BUS_FMT_SGBRG10_1X10:
1205 case MEDIA_BUS_FMT_SGBRG12_1X12:
1206 ccdc_pattern = ccdc_sgbrg_pattern;
1210 ccdc_pattern = ccdc_sgrbg_pattern;
1213 ccdc_config_imgattr(ccdc, ccdc_pattern);
1215 /* Generate VD0 on the last line of the image and VD1 on the
1218 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1219 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1220 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1222 /* CCDC_PAD_SOURCE_OF */
1223 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1226 /* The horizontal coordinates are expressed in pixel clock cycles. We
1227 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in
1228 * SYNC mode regardless of the format as the bridge is enabled for YUV
1229 * formats in that case.
1232 sph = crop->left * 2;
1233 nph = crop->width * 2 - 1;
1236 nph = crop->width - 1;
1239 isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1240 (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1241 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1242 isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) |
1243 (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT),
1244 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1245 isp_reg_writel(isp, (crop->height - 1)
1246 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1247 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1249 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1252 /* When interleaving fields enable processing of the field input signal.
1253 * This will cause the line output control module to apply the field
1254 * offset to field 1.
1256 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1257 (format->field == V4L2_FIELD_INTERLACED_TB ||
1258 format->field == V4L2_FIELD_INTERLACED_BT))
1259 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
1261 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1264 if (format->code == MEDIA_BUS_FMT_YUYV8_1X16)
1265 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1268 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1271 /* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode
1272 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad
1275 if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656)
1276 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1278 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1280 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1282 /* CCDC_PAD_SOURCE_VP */
1283 ccdc_config_vp(ccdc);
1285 /* Lens shading correction. */
1286 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1287 if (ccdc->lsc.request == NULL)
1290 WARN_ON(ccdc->lsc.active);
1292 /* Get last good LSC configuration. If it is not supported for
1293 * the current active resolution discard it.
1295 if (ccdc->lsc.active == NULL &&
1296 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1297 ccdc->lsc.active = ccdc->lsc.request;
1299 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1300 schedule_work(&ccdc->lsc.table_work);
1303 ccdc->lsc.request = NULL;
1306 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1308 ccdc_apply_controls(ccdc);
1311 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1313 struct isp_device *isp = to_isp_device(ccdc);
1315 /* Avoid restarting the CCDC when streaming is stopping. */
1316 if (enable && ccdc->stopping & CCDC_STOP_REQUEST)
1319 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1320 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1322 ccdc->running = enable;
1325 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1327 unsigned long flags;
1330 spin_lock_irqsave(&ccdc->lock, flags);
1331 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1332 ccdc->stopping = CCDC_STOP_REQUEST;
1334 ccdc->stopping = CCDC_STOP_FINISHED;
1335 spin_unlock_irqrestore(&ccdc->lock, flags);
1337 ret = wait_event_timeout(ccdc->wait,
1338 ccdc->stopping == CCDC_STOP_FINISHED,
1339 msecs_to_jiffies(2000));
1342 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1345 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1347 mutex_lock(&ccdc->ioctl_lock);
1348 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1349 ccdc->lsc.request = ccdc->lsc.active;
1350 ccdc->lsc.active = NULL;
1351 cancel_work_sync(&ccdc->lsc.table_work);
1352 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1353 mutex_unlock(&ccdc->ioctl_lock);
1355 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1357 return ret > 0 ? 0 : ret;
1360 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1362 if (ccdc_lsc_is_configured(ccdc))
1363 __ccdc_lsc_enable(ccdc, 1);
1364 __ccdc_enable(ccdc, 1);
1367 /* -----------------------------------------------------------------------------
1368 * Interrupt handling
1372 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1373 * @ccdc: Pointer to ISP CCDC device.
1375 * Returns zero if the CCDC is idle and the image has been written to
1378 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1380 struct isp_device *isp = to_isp_device(ccdc);
1382 return omap3isp_ccdc_busy(ccdc)
1383 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1384 ISPSBL_CCDC_WR_0_DATA_READY)
1385 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1386 ISPSBL_CCDC_WR_0_DATA_READY)
1387 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1388 ISPSBL_CCDC_WR_0_DATA_READY)
1389 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1390 ISPSBL_CCDC_WR_0_DATA_READY);
1394 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1395 * @ccdc: Pointer to ISP CCDC device.
1396 * @max_wait: Max retry count in us for wait for idle/busy transition.
1398 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1399 unsigned int max_wait)
1401 unsigned int wait = 0;
1404 max_wait = 10000; /* 10 ms */
1406 for (wait = 0; wait <= max_wait; wait++) {
1407 if (!ccdc_sbl_busy(ccdc))
1417 /* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1418 * @ccdc: Pointer to ISP CCDC device.
1419 * @event: Pointing which event trigger handler
1421 * Return 1 when the event and stopping request combination is satisfied,
1424 static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1428 switch ((ccdc->stopping & 3) | event) {
1429 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1430 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1431 __ccdc_lsc_enable(ccdc, 0);
1432 __ccdc_enable(ccdc, 0);
1433 ccdc->stopping = CCDC_STOP_EXECUTED;
1436 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1437 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1438 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1439 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1443 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1444 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1448 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1452 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1453 wake_up(&ccdc->wait);
1460 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1462 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1463 struct video_device *vdev = ccdc->subdev.devnode;
1464 struct v4l2_event event;
1466 /* Frame number propagation */
1467 atomic_inc(&pipe->frame_number);
1469 memset(&event, 0, sizeof(event));
1470 event.type = V4L2_EVENT_FRAME_SYNC;
1471 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1473 v4l2_event_queue(vdev, &event);
1477 * ccdc_lsc_isr - Handle LSC events
1478 * @ccdc: Pointer to ISP CCDC device.
1479 * @events: LSC events
1481 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1483 unsigned long flags;
1485 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1486 struct isp_pipeline *pipe =
1487 to_isp_pipeline(&ccdc->subdev.entity);
1489 ccdc_lsc_error_handler(ccdc);
1491 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1494 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1497 /* LSC_DONE interrupt occur, there are two cases
1498 * 1. stopping for reconfiguration
1499 * 2. stopping because of STREAM OFF command
1501 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1503 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1504 ccdc->lsc.state = LSC_STATE_STOPPED;
1506 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1509 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1512 /* LSC is in STOPPING state, change to the new state */
1513 ccdc->lsc.state = LSC_STATE_STOPPED;
1515 /* This is an exception. Start of frame and LSC_DONE interrupt
1516 * have been received on the same time. Skip this event and wait
1519 if (events & IRQ0STATUS_HS_VS_IRQ)
1522 /* The LSC engine is stopped at this point. Enable it if there's a
1525 if (ccdc->lsc.request == NULL)
1528 ccdc_lsc_enable(ccdc);
1531 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1535 * Check whether the CCDC has captured all fields necessary to complete the
1538 static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc)
1540 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1541 struct isp_device *isp = to_isp_device(ccdc);
1542 enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field;
1543 enum v4l2_field field;
1545 /* When the input is progressive fields don't matter. */
1546 if (of_field == V4L2_FIELD_NONE)
1549 /* Read the current field identifier. */
1550 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1551 & ISPCCDC_SYN_MODE_FLDSTAT
1552 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1554 /* When capturing fields in alternate order just store the current field
1555 * identifier in the pipeline.
1557 if (of_field == V4L2_FIELD_ALTERNATE) {
1558 pipe->field = field;
1562 /* The format is interlaced. Make sure we've captured both fields. */
1563 ccdc->fields |= field == V4L2_FIELD_BOTTOM
1564 ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP;
1566 if (ccdc->fields != CCDC_FIELD_BOTH)
1569 /* Verify that the field just captured corresponds to the last field
1570 * needed based on the desired field order.
1572 if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) ||
1573 (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM))
1576 /* The buffer can be completed, reset the fields for the next buffer. */
1582 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1584 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1585 struct isp_device *isp = to_isp_device(ccdc);
1586 struct isp_buffer *buffer;
1588 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1589 * doesn't explicitly state if that's supposed to happen or not, so it
1590 * can be considered as a hardware bug or as a feature, but we have to
1591 * deal with it anyway). Disabling the CCDC when no buffer is available
1592 * would thus not be enough, we need to handle the situation explicitly.
1594 if (list_empty(&ccdc->video_out.dmaqueue))
1597 /* We're in continuous mode, and memory writes were disabled due to a
1598 * buffer underrun. Re-enable them now that we have a buffer. The buffer
1599 * address has been set in ccdc_video_queue.
1601 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1606 /* Wait for the CCDC to become idle. */
1607 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1608 dev_info(isp->dev, "CCDC won't become idle!\n");
1609 media_entity_enum_set(&isp->crashed, &ccdc->subdev.entity);
1610 omap3isp_pipeline_cancel_stream(pipe);
1614 /* Don't restart CCDC if we're just about to stop streaming. */
1615 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1616 ccdc->stopping & CCDC_STOP_REQUEST)
1619 if (!ccdc_has_all_fields(ccdc))
1622 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1624 ccdc_set_outaddr(ccdc, buffer->dma);
1626 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1628 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1629 isp_pipeline_ready(pipe))
1630 omap3isp_pipeline_set_stream(pipe,
1631 ISP_PIPELINE_STREAM_SINGLESHOT);
1633 return buffer != NULL;
1637 * ccdc_vd0_isr - Handle VD0 event
1638 * @ccdc: Pointer to ISP CCDC device.
1640 * Executes LSC deferred enablement before next frame starts.
1642 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1644 unsigned long flags;
1647 /* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus
1648 * need to increment the frame counter here.
1651 struct isp_pipeline *pipe =
1652 to_isp_pipeline(&ccdc->subdev.entity);
1654 atomic_inc(&pipe->frame_number);
1657 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in
1658 * the VD1 interrupt handler in that mode without risking a CCDC stall
1659 * if a short frame is received.
1662 spin_lock_irqsave(&ccdc->lock, flags);
1663 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1664 ccdc->output & CCDC_OUTPUT_MEMORY) {
1665 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1666 __ccdc_lsc_enable(ccdc, 0);
1667 __ccdc_enable(ccdc, 0);
1669 ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1);
1670 spin_unlock_irqrestore(&ccdc->lock, flags);
1673 spin_lock_irqsave(&ccdc->lock, flags);
1674 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1675 spin_unlock_irqrestore(&ccdc->lock, flags);
1679 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1680 restart = ccdc_isr_buffer(ccdc);
1682 if (!ccdc->shadow_update)
1683 ccdc_apply_controls(ccdc);
1684 spin_unlock_irqrestore(&ccdc->lock, flags);
1691 * ccdc_vd1_isr - Handle VD1 event
1692 * @ccdc: Pointer to ISP CCDC device.
1694 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1696 unsigned long flags;
1698 /* In BT.656 mode the synchronization signals are generated by the CCDC
1699 * from the embedded sync codes. The VD0 and VD1 interrupts are thus
1700 * only triggered when the CCDC is enabled, unlike external sync mode
1701 * where the line counter runs even when the CCDC is stopped. We can't
1702 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated
1703 * for a short frame, which would result in the CCDC being stopped and
1704 * no VD interrupt generated anymore. The CCDC is stopped from the VD0
1705 * interrupt handler instead for BT.656.
1710 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1713 * Depending on the CCDC pipeline state, CCDC stopping should be
1714 * handled differently. In SINGLESHOT we emulate an internal CCDC
1715 * stopping because the CCDC hw works only in continuous mode.
1716 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1717 * data to memory the CCDC and LSC are stopped immediately but
1718 * without change the CCDC stopping state machine. The CCDC
1719 * stopping state machine should be used only when user request
1720 * for stopping is received (SINGLESHOT is an exception).
1722 switch (ccdc->state) {
1723 case ISP_PIPELINE_STREAM_SINGLESHOT:
1724 ccdc->stopping = CCDC_STOP_REQUEST;
1727 case ISP_PIPELINE_STREAM_CONTINUOUS:
1728 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1729 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1730 __ccdc_lsc_enable(ccdc, 0);
1731 __ccdc_enable(ccdc, 0);
1735 case ISP_PIPELINE_STREAM_STOPPED:
1739 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1742 if (ccdc->lsc.request == NULL)
1746 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1747 * do the appropriate changes in registers
1749 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1750 __ccdc_lsc_enable(ccdc, 0);
1751 ccdc->lsc.state = LSC_STATE_RECONFIG;
1755 /* LSC has been in STOPPED state, enable it */
1756 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1757 ccdc_lsc_enable(ccdc);
1760 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1764 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1765 * @ccdc: Pointer to ISP CCDC device.
1766 * @events: CCDC events
1768 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1770 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1773 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1776 ccdc_lsc_isr(ccdc, events);
1778 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1781 if (events & IRQ0STATUS_HS_VS_IRQ)
1782 ccdc_hs_vs_isr(ccdc);
1787 /* -----------------------------------------------------------------------------
1788 * ISP video operations
1791 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1793 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1794 unsigned long flags;
1795 bool restart = false;
1797 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1800 ccdc_set_outaddr(ccdc, buffer->dma);
1802 /* We now have a buffer queued on the output, restart the pipeline
1803 * on the next CCDC interrupt if running in continuous mode (or when
1804 * starting the stream) in external sync mode, or immediately in BT.656
1805 * sync mode as no CCDC interrupt is generated when the CCDC is stopped
1808 spin_lock_irqsave(&ccdc->lock, flags);
1809 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running &&
1814 spin_unlock_irqrestore(&ccdc->lock, flags);
1822 static const struct isp_video_operations ccdc_video_ops = {
1823 .queue = ccdc_video_queue,
1826 /* -----------------------------------------------------------------------------
1827 * V4L2 subdev operations
1831 * ccdc_ioctl - CCDC module private ioctl's
1832 * @sd: ISP CCDC V4L2 subdevice
1833 * @cmd: ioctl command
1834 * @arg: ioctl argument
1836 * Return 0 on success or a negative error code otherwise.
1838 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1840 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1844 case VIDIOC_OMAP3ISP_CCDC_CFG:
1845 mutex_lock(&ccdc->ioctl_lock);
1846 ret = ccdc_config(ccdc, arg);
1847 mutex_unlock(&ccdc->ioctl_lock);
1851 return -ENOIOCTLCMD;
1857 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1858 struct v4l2_event_subscription *sub)
1860 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1863 /* line number is zero at frame start */
1867 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
1870 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1871 struct v4l2_event_subscription *sub)
1873 return v4l2_event_unsubscribe(fh, sub);
1877 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1878 * @sd: ISP CCDC V4L2 subdevice
1879 * @enable: Enable/disable stream
1881 * When writing to memory, the CCDC hardware can't be enabled without a memory
1882 * buffer to write to. As the s_stream operation is called in response to a
1883 * STREAMON call without any buffer queued yet, just update the enabled field
1884 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1886 * When not writing to memory enable the CCDC immediately.
1888 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1890 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1891 struct isp_device *isp = to_isp_device(ccdc);
1894 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1895 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1898 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1899 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1902 ccdc_configure(ccdc);
1904 ccdc_print_status(ccdc);
1908 case ISP_PIPELINE_STREAM_CONTINUOUS:
1909 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1910 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1912 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1918 case ISP_PIPELINE_STREAM_SINGLESHOT:
1919 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1920 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1921 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1926 case ISP_PIPELINE_STREAM_STOPPED:
1927 ret = ccdc_disable(ccdc);
1928 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1929 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1930 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1935 ccdc->state = enable;
1939 static struct v4l2_mbus_framefmt *
1940 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1941 unsigned int pad, enum v4l2_subdev_format_whence which)
1943 if (which == V4L2_SUBDEV_FORMAT_TRY)
1944 return v4l2_subdev_get_try_format(&ccdc->subdev, cfg, pad);
1946 return &ccdc->formats[pad];
1949 static struct v4l2_rect *
1950 __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1951 enum v4l2_subdev_format_whence which)
1953 if (which == V4L2_SUBDEV_FORMAT_TRY)
1954 return v4l2_subdev_get_try_crop(&ccdc->subdev, cfg, CCDC_PAD_SOURCE_OF);
1960 * ccdc_try_format - Try video format on a pad
1961 * @ccdc: ISP CCDC device
1962 * @cfg : V4L2 subdev pad configuration
1967 ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1968 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1969 enum v4l2_subdev_format_whence which)
1971 const struct isp_format_info *info;
1973 unsigned int width = fmt->width;
1974 unsigned int height = fmt->height;
1975 struct v4l2_rect *crop;
1976 enum v4l2_field field;
1981 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1982 if (fmt->code == ccdc_fmts[i])
1986 /* If not found, use SGRBG10 as default */
1987 if (i >= ARRAY_SIZE(ccdc_fmts))
1988 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1990 /* Clamp the input size. */
1991 fmt->width = clamp_t(u32, width, 32, 4096);
1992 fmt->height = clamp_t(u32, height, 32, 4096);
1994 /* Default to progressive field order. */
1995 if (fmt->field == V4L2_FIELD_ANY)
1996 fmt->field = V4L2_FIELD_NONE;
2000 case CCDC_PAD_SOURCE_OF:
2001 pixelcode = fmt->code;
2003 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
2005 /* In SYNC mode the bridge converts YUV formats from 2X8 to
2006 * 1X16. In BT.656 no such conversion occurs. As we don't know
2007 * at this point whether the source will use SYNC or BT.656 mode
2008 * let's pretend the conversion always occurs. The CCDC will be
2009 * configured to pack bytes in BT.656, hiding the inaccuracy.
2010 * In all cases bytes can be swapped.
2012 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2013 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2014 /* Use the user requested format if YUV. */
2015 if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 ||
2016 pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 ||
2017 pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 ||
2018 pixelcode == MEDIA_BUS_FMT_UYVY8_1X16)
2019 fmt->code = pixelcode;
2021 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8)
2022 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
2023 else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2024 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
2027 /* Hardcode the output size to the crop rectangle size. */
2028 crop = __ccdc_get_crop(ccdc, cfg, which);
2029 fmt->width = crop->width;
2030 fmt->height = crop->height;
2032 /* When input format is interlaced with alternating fields the
2033 * CCDC can interleave the fields.
2035 if (fmt->field == V4L2_FIELD_ALTERNATE &&
2036 (field == V4L2_FIELD_INTERLACED_TB ||
2037 field == V4L2_FIELD_INTERLACED_BT)) {
2044 case CCDC_PAD_SOURCE_VP:
2045 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
2047 /* The video port interface truncates the data to 10 bits. */
2048 info = omap3isp_video_format_info(fmt->code);
2049 fmt->code = info->truncated;
2051 /* YUV formats are not supported by the video port. */
2052 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2053 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2056 /* The number of lines that can be clocked out from the video
2057 * port output must be at least one line less than the number
2060 fmt->width = clamp_t(u32, width, 32, fmt->width);
2061 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
2065 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
2066 * stored on 2 bytes.
2068 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2072 * ccdc_try_crop - Validate a crop rectangle
2073 * @ccdc: ISP CCDC device
2074 * @sink: format on the sink pad
2075 * @crop: crop rectangle to be validated
2077 static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
2078 const struct v4l2_mbus_framefmt *sink,
2079 struct v4l2_rect *crop)
2081 const struct isp_format_info *info;
2082 unsigned int max_width;
2084 /* For Bayer formats, restrict left/top and width/height to even values
2085 * to keep the Bayer pattern.
2087 info = omap3isp_video_format_info(sink->code);
2088 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2093 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
2094 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
2096 /* The data formatter truncates the number of horizontal output pixels
2097 * to a multiple of 16. To avoid clipping data, allow callers to request
2098 * an output size bigger than the input size up to the nearest multiple
2101 max_width = (sink->width - crop->left + 15) & ~15;
2102 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
2104 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
2105 sink->height - crop->top);
2107 /* Odd width/height values don't make sense for Bayer formats. */
2108 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2115 * ccdc_enum_mbus_code - Handle pixel format enumeration
2116 * @sd : pointer to v4l2 subdev structure
2117 * @cfg : V4L2 subdev pad configuration
2118 * @code : pointer to v4l2_subdev_mbus_code_enum structure
2119 * return -EINVAL or zero on success
2121 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
2122 struct v4l2_subdev_pad_config *cfg,
2123 struct v4l2_subdev_mbus_code_enum *code)
2125 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2126 struct v4l2_mbus_framefmt *format;
2128 switch (code->pad) {
2130 if (code->index >= ARRAY_SIZE(ccdc_fmts))
2133 code->code = ccdc_fmts[code->index];
2136 case CCDC_PAD_SOURCE_OF:
2137 format = __ccdc_get_format(ccdc, cfg, code->pad,
2140 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2141 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2142 /* In YUV mode the CCDC can swap bytes. */
2143 if (code->index == 0)
2144 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
2145 else if (code->index == 1)
2146 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
2150 /* In raw mode, no configurable format confversion is
2153 if (code->index == 0)
2154 code->code = format->code;
2160 case CCDC_PAD_SOURCE_VP:
2161 /* The CCDC supports no configurable format conversion
2162 * compatible with the video port. Enumerate a single output
2165 if (code->index != 0)
2168 format = __ccdc_get_format(ccdc, cfg, code->pad,
2171 /* A pixel code equal to 0 means that the video port doesn't
2172 * support the input format. Don't enumerate any pixel code.
2174 if (format->code == 0)
2177 code->code = format->code;
2187 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2188 struct v4l2_subdev_pad_config *cfg,
2189 struct v4l2_subdev_frame_size_enum *fse)
2191 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2192 struct v4l2_mbus_framefmt format;
2194 if (fse->index != 0)
2197 format.code = fse->code;
2200 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2201 fse->min_width = format.width;
2202 fse->min_height = format.height;
2204 if (format.code != fse->code)
2207 format.code = fse->code;
2210 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2211 fse->max_width = format.width;
2212 fse->max_height = format.height;
2218 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2219 * @sd: ISP CCDC V4L2 subdevice
2220 * @cfg: V4L2 subdev pad configuration
2221 * @sel: Selection rectangle
2223 * The only supported rectangles are the crop rectangles on the output formatter
2226 * Return 0 on success or a negative error code otherwise.
2228 static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2229 struct v4l2_subdev_selection *sel)
2231 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2232 struct v4l2_mbus_framefmt *format;
2234 if (sel->pad != CCDC_PAD_SOURCE_OF)
2237 switch (sel->target) {
2238 case V4L2_SEL_TGT_CROP_BOUNDS:
2241 sel->r.width = INT_MAX;
2242 sel->r.height = INT_MAX;
2244 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2245 ccdc_try_crop(ccdc, format, &sel->r);
2248 case V4L2_SEL_TGT_CROP:
2249 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2260 * ccdc_set_selection - Set a selection rectangle on a pad
2261 * @sd: ISP CCDC V4L2 subdevice
2262 * @cfg: V4L2 subdev pad configuration
2263 * @sel: Selection rectangle
2265 * The only supported rectangle is the actual crop rectangle on the output
2266 * formatter source pad.
2268 * Return 0 on success or a negative error code otherwise.
2270 static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2271 struct v4l2_subdev_selection *sel)
2273 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2274 struct v4l2_mbus_framefmt *format;
2276 if (sel->target != V4L2_SEL_TGT_CROP ||
2277 sel->pad != CCDC_PAD_SOURCE_OF)
2280 /* The crop rectangle can't be changed while streaming. */
2281 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2284 /* Modifying the crop rectangle always changes the format on the source
2285 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2288 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2289 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2293 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2294 ccdc_try_crop(ccdc, format, &sel->r);
2295 *__ccdc_get_crop(ccdc, cfg, sel->which) = sel->r;
2297 /* Update the source format. */
2298 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, sel->which);
2299 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format, sel->which);
2305 * ccdc_get_format - Retrieve the video format on a pad
2306 * @sd : ISP CCDC V4L2 subdevice
2307 * @cfg: V4L2 subdev pad configuration
2310 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2311 * to the format type.
2313 static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2314 struct v4l2_subdev_format *fmt)
2316 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2317 struct v4l2_mbus_framefmt *format;
2319 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2323 fmt->format = *format;
2328 * ccdc_set_format - Set the video format on a pad
2329 * @sd : ISP CCDC V4L2 subdevice
2330 * @cfg: V4L2 subdev pad configuration
2333 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2334 * to the format type.
2336 static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2337 struct v4l2_subdev_format *fmt)
2339 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2340 struct v4l2_mbus_framefmt *format;
2341 struct v4l2_rect *crop;
2343 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2347 ccdc_try_format(ccdc, cfg, fmt->pad, &fmt->format, fmt->which);
2348 *format = fmt->format;
2350 /* Propagate the format from sink to source */
2351 if (fmt->pad == CCDC_PAD_SINK) {
2352 /* Reset the crop rectangle. */
2353 crop = __ccdc_get_crop(ccdc, cfg, fmt->which);
2356 crop->width = fmt->format.width;
2357 crop->height = fmt->format.height;
2359 ccdc_try_crop(ccdc, &fmt->format, crop);
2361 /* Update the source formats. */
2362 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF,
2364 *format = fmt->format;
2365 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format,
2368 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_VP,
2370 *format = fmt->format;
2371 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_VP, format,
2379 * Decide whether desired output pixel code can be obtained with
2380 * the lane shifter by shifting the input pixel code.
2381 * @in: input pixelcode to shifter
2382 * @out: output pixelcode from shifter
2383 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2385 * return true if the combination is possible
2386 * return false otherwise
2388 static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift)
2390 const struct isp_format_info *in_info, *out_info;
2395 in_info = omap3isp_video_format_info(in);
2396 out_info = omap3isp_video_format_info(out);
2398 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2401 if (in_info->flavor != out_info->flavor)
2404 return in_info->width - out_info->width + additional_shift <= 6;
2407 static int ccdc_link_validate(struct v4l2_subdev *sd,
2408 struct media_link *link,
2409 struct v4l2_subdev_format *source_fmt,
2410 struct v4l2_subdev_format *sink_fmt)
2412 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2413 unsigned long parallel_shift;
2415 /* Check if the two ends match */
2416 if (source_fmt->format.width != sink_fmt->format.width ||
2417 source_fmt->format.height != sink_fmt->format.height)
2420 /* We've got a parallel sensor here. */
2421 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2422 struct v4l2_subdev *sd =
2423 media_entity_to_v4l2_subdev(link->source->entity);
2424 struct isp_bus_cfg *bus_cfg = v4l2_subdev_to_bus_cfg(sd);
2426 parallel_shift = bus_cfg->bus.parallel.data_lane_shift;
2431 /* Lane shifter may be used to drop bits on CCDC sink pad */
2432 if (!ccdc_is_shiftable(source_fmt->format.code,
2433 sink_fmt->format.code, parallel_shift))
2440 * ccdc_init_formats - Initialize formats on all pads
2441 * @sd: ISP CCDC V4L2 subdevice
2442 * @fh: V4L2 subdev file handle
2444 * Initialize all pad formats with default values. If fh is not NULL, try
2445 * formats are initialized on the file handle. Otherwise active formats are
2446 * initialized on the device.
2448 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2450 struct v4l2_subdev_format format;
2452 memset(&format, 0, sizeof(format));
2453 format.pad = CCDC_PAD_SINK;
2454 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2455 format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
2456 format.format.width = 4096;
2457 format.format.height = 4096;
2458 ccdc_set_format(sd, fh ? fh->pad : NULL, &format);
2463 /* V4L2 subdev core operations */
2464 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2465 .ioctl = ccdc_ioctl,
2466 .subscribe_event = ccdc_subscribe_event,
2467 .unsubscribe_event = ccdc_unsubscribe_event,
2470 /* V4L2 subdev video operations */
2471 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2472 .s_stream = ccdc_set_stream,
2475 /* V4L2 subdev pad operations */
2476 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2477 .enum_mbus_code = ccdc_enum_mbus_code,
2478 .enum_frame_size = ccdc_enum_frame_size,
2479 .get_fmt = ccdc_get_format,
2480 .set_fmt = ccdc_set_format,
2481 .get_selection = ccdc_get_selection,
2482 .set_selection = ccdc_set_selection,
2483 .link_validate = ccdc_link_validate,
2486 /* V4L2 subdev operations */
2487 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2488 .core = &ccdc_v4l2_core_ops,
2489 .video = &ccdc_v4l2_video_ops,
2490 .pad = &ccdc_v4l2_pad_ops,
2493 /* V4L2 subdev internal operations */
2494 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2495 .open = ccdc_init_formats,
2498 /* -----------------------------------------------------------------------------
2499 * Media entity operations
2503 * ccdc_link_setup - Setup CCDC connections
2504 * @entity: CCDC media entity
2505 * @local: Pad at the local end of the link
2506 * @remote: Pad at the remote end of the link
2507 * @flags: Link flags
2509 * return -EINVAL or zero on success
2511 static int ccdc_link_setup(struct media_entity *entity,
2512 const struct media_pad *local,
2513 const struct media_pad *remote, u32 flags)
2515 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2516 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2517 struct isp_device *isp = to_isp_device(ccdc);
2518 unsigned int index = local->index;
2520 /* FIXME: this is actually a hack! */
2521 if (is_media_entity_v4l2_subdev(remote->entity))
2525 case CCDC_PAD_SINK | 2 << 16:
2526 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2529 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2530 ccdc->input = CCDC_INPUT_NONE;
2534 if (ccdc->input != CCDC_INPUT_NONE)
2537 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2538 ccdc->input = CCDC_INPUT_CCP2B;
2539 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2540 ccdc->input = CCDC_INPUT_CSI2A;
2541 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2542 ccdc->input = CCDC_INPUT_CSI2C;
2544 ccdc->input = CCDC_INPUT_PARALLEL;
2549 * The ISP core doesn't support pipelines with multiple video outputs.
2550 * Revisit this when it will be implemented, and return -EBUSY for now.
2553 case CCDC_PAD_SOURCE_VP | 2 << 16:
2554 /* Write to preview engine, histogram and H3A. When none of
2555 * those links are active, the video port can be disabled.
2557 if (flags & MEDIA_LNK_FL_ENABLED) {
2558 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2560 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2562 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2566 case CCDC_PAD_SOURCE_OF:
2567 /* Write to memory */
2568 if (flags & MEDIA_LNK_FL_ENABLED) {
2569 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2571 ccdc->output |= CCDC_OUTPUT_MEMORY;
2573 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2577 case CCDC_PAD_SOURCE_OF | 2 << 16:
2578 /* Write to resizer */
2579 if (flags & MEDIA_LNK_FL_ENABLED) {
2580 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2582 ccdc->output |= CCDC_OUTPUT_RESIZER;
2584 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2595 /* media operations */
2596 static const struct media_entity_operations ccdc_media_ops = {
2597 .link_setup = ccdc_link_setup,
2598 .link_validate = v4l2_subdev_link_validate,
2601 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2603 v4l2_device_unregister_subdev(&ccdc->subdev);
2604 omap3isp_video_unregister(&ccdc->video_out);
2607 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2608 struct v4l2_device *vdev)
2612 /* Register the subdev and video node. */
2613 ccdc->subdev.dev = vdev->mdev->dev;
2614 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2618 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2625 omap3isp_ccdc_unregister_entities(ccdc);
2629 /* -----------------------------------------------------------------------------
2630 * ISP CCDC initialisation and cleanup
2634 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2635 * @ccdc: ISP CCDC module
2637 * Return 0 on success and a negative error code on failure.
2639 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2641 struct v4l2_subdev *sd = &ccdc->subdev;
2642 struct media_pad *pads = ccdc->pads;
2643 struct media_entity *me = &sd->entity;
2646 ccdc->input = CCDC_INPUT_NONE;
2648 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2649 sd->internal_ops = &ccdc_v4l2_internal_ops;
2650 strscpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2651 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2652 v4l2_set_subdevdata(sd, ccdc);
2653 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2655 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2656 | MEDIA_PAD_FL_MUST_CONNECT;
2657 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2658 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2660 me->ops = &ccdc_media_ops;
2661 ret = media_entity_pads_init(me, CCDC_PADS_NUM, pads);
2665 ccdc_init_formats(sd, NULL);
2667 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2668 ccdc->video_out.ops = &ccdc_video_ops;
2669 ccdc->video_out.isp = to_isp_device(ccdc);
2670 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2671 ccdc->video_out.bpl_alignment = 32;
2673 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2680 media_entity_cleanup(me);
2685 * omap3isp_ccdc_init - CCDC module initialization.
2686 * @isp: Device pointer specific to the OMAP3 ISP.
2688 * TODO: Get the initialisation values from platform data.
2690 * Return 0 on success or a negative error code otherwise.
2692 int omap3isp_ccdc_init(struct isp_device *isp)
2694 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2697 spin_lock_init(&ccdc->lock);
2698 init_waitqueue_head(&ccdc->wait);
2699 mutex_init(&ccdc->ioctl_lock);
2701 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2703 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2704 ccdc->lsc.state = LSC_STATE_STOPPED;
2705 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2706 spin_lock_init(&ccdc->lsc.req_lock);
2708 ccdc->clamp.oblen = 0;
2709 ccdc->clamp.dcsubval = 0;
2711 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2712 ccdc_apply_controls(ccdc);
2714 ret = ccdc_init_entities(ccdc);
2716 mutex_destroy(&ccdc->ioctl_lock);
2724 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2725 * @isp: Device pointer specific to the OMAP3 ISP.
2727 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2729 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2731 omap3isp_video_cleanup(&ccdc->video_out);
2732 media_entity_cleanup(&ccdc->subdev.entity);
2734 /* Free LSC requests. As the CCDC is stopped there's no active request,
2735 * so only the pending request and the free queue need to be handled.
2737 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2738 cancel_work_sync(&ccdc->lsc.table_work);
2739 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2741 if (ccdc->fpc.addr != NULL)
2742 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2745 mutex_destroy(&ccdc->ioctl_lock);