drivers/media/pci/dm1105/dm1105.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
   4  *
   5  * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
   6  */
   7
   8 #include <linux/i2c.h>
   9 #include <linux/i2c-algo-bit.h>
  10 #include <linux/init.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/proc_fs.h>
  15 #include <linux/pci.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/slab.h>
  18 #include <media/rc-core.h>
  19
  20 #include <media/demux.h>
  21 #include <media/dmxdev.h>
  22 #include <media/dvb_demux.h>
  23 #include <media/dvb_frontend.h>
  24 #include <media/dvb_net.h>
  25 #include <media/dvbdev.h>
  26 #include "dvb-pll.h"
  27
  28 #include "stv0299.h"
  29 #include "stv0288.h"
  30 #include "stb6000.h"
  31 #include "si21xx.h"
  32 #include "cx24116.h"
  33 #include "z0194a.h"
  34 #include "ts2020.h"
  35 #include "ds3000.h"
  36
  37 #define MODULE_NAME "dm1105"
  38
  39 #define UNSET (-1U)
  40
  41 #define DM1105_BOARD_NOAUTO                     UNSET
  42 #define DM1105_BOARD_UNKNOWN                    0
  43 #define DM1105_BOARD_DVBWORLD_2002              1
  44 #define DM1105_BOARD_DVBWORLD_2004              2
  45 #define DM1105_BOARD_AXESS_DM05                 3
  46 #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO      4
  47
  48 /* ----------------------------------------------- */
  49 /*
  50  * PCI ID's
  51  */
  52 #ifndef PCI_VENDOR_ID_TRIGEM
  53 #define PCI_VENDOR_ID_TRIGEM    0x109f
  54 #endif
  55 #ifndef PCI_VENDOR_ID_AXESS
  56 #define PCI_VENDOR_ID_AXESS     0x195d
  57 #endif
  58 #ifndef PCI_DEVICE_ID_DM1105
  59 #define PCI_DEVICE_ID_DM1105    0x036f
  60 #endif
  61 #ifndef PCI_DEVICE_ID_DW2002
  62 #define PCI_DEVICE_ID_DW2002    0x2002
  63 #endif
  64 #ifndef PCI_DEVICE_ID_DW2004
  65 #define PCI_DEVICE_ID_DW2004    0x2004
  66 #endif
  67 #ifndef PCI_DEVICE_ID_DM05
  68 #define PCI_DEVICE_ID_DM05      0x1105
  69 #endif
  70 /* ----------------------------------------------- */
  71 /* sdmc dm1105 registers */
  72
  73 /* TS Control */
  74 #define DM1105_TSCTR                            0x00
  75 #define DM1105_DTALENTH                         0x04
  76
  77 /* GPIO Interface */
  78 #define DM1105_GPIOVAL                          0x08
  79 #define DM1105_GPIOCTR                          0x0c
  80
  81 /* PID serial number */
  82 #define DM1105_PIDN                             0x10
  83
  84 /* Odd-even secret key select */
  85 #define DM1105_CWSEL                            0x14
  86
  87 /* Host Command Interface */
  88 #define DM1105_HOST_CTR                         0x18
  89 #define DM1105_HOST_AD                          0x1c
  90
  91 /* PCI Interface */
  92 #define DM1105_CR                               0x30
  93 #define DM1105_RST                              0x34
  94 #define DM1105_STADR                            0x38
  95 #define DM1105_RLEN                             0x3c
  96 #define DM1105_WRP                              0x40
  97 #define DM1105_INTCNT                           0x44
  98 #define DM1105_INTMAK                           0x48
  99 #define DM1105_INTSTS                           0x4c
 100
 101 /* CW Value */
 102 #define DM1105_ODD                              0x50
 103 #define DM1105_EVEN                             0x58
 104
 105 /* PID Value */
 106 #define DM1105_PID                              0x60
 107
 108 /* IR Control */
 109 #define DM1105_IRCTR                            0x64
 110 #define DM1105_IRMODE                           0x68
 111 #define DM1105_SYSTEMCODE                       0x6c
 112 #define DM1105_IRCODE                           0x70
 113
 114 /* Unknown Values */
 115 #define DM1105_ENCRYPT                          0x74
 116 #define DM1105_VER                              0x7c
 117
 118 /* I2C Interface */
 119 #define DM1105_I2CCTR                           0x80
 120 #define DM1105_I2CSTS                           0x81
 121 #define DM1105_I2CDAT                           0x82
 122 #define DM1105_I2C_RA                           0x83
 123 /* ----------------------------------------------- */
 124 /* Interrupt Mask Bits */
 125
 126 #define INTMAK_TSIRQM                           0x01
 127 #define INTMAK_HIRQM                            0x04
 128 #define INTMAK_IRM                              0x08
 129 #define INTMAK_ALLMASK                          (INTMAK_TSIRQM | \
 130                                                 INTMAK_HIRQM | \
 131                                                 INTMAK_IRM)
 132 #define INTMAK_NONEMASK                         0x00
 133
 134 /* Interrupt Status Bits */
 135 #define INTSTS_TSIRQ                            0x01
 136 #define INTSTS_HIRQ                             0x04
 137 #define INTSTS_IR                               0x08
 138
 139 /* IR Control Bits */
 140 #define DM1105_IR_EN                            0x01
 141 #define DM1105_SYS_CHK                          0x02
 142 #define DM1105_REP_FLG                          0x08
 143
 144 /* EEPROM addr */
 145 #define IIC_24C01_addr                          0xa0
 146 /* Max board count */
 147 #define DM1105_MAX                              0x04
 148
 149 #define DRIVER_NAME                             "dm1105"
 150 #define DM1105_I2C_GPIO_NAME                    "dm1105-gpio"
 151
 152 #define DM1105_DMA_PACKETS                      47
 153 #define DM1105_DMA_PACKET_LENGTH                (128*4)
 154 #define DM1105_DMA_BYTES                        (128 * 4 * DM1105_DMA_PACKETS)
 155
 156 /*  */
 157 #define GPIO08                                  (1 << 8)
 158 #define GPIO13                                  (1 << 13)
 159 #define GPIO14                                  (1 << 14)
 160 #define GPIO15                                  (1 << 15)
 161 #define GPIO16                                  (1 << 16)
 162 #define GPIO17                                  (1 << 17)
 163 #define GPIO_ALL                                0x03ffff
 164
 165 /* GPIO's for LNB power control */
 166 #define DM1105_LNB_MASK                         (GPIO_ALL & ~(GPIO14 | GPIO13))
 167 #define DM1105_LNB_OFF                          GPIO17
 168 #define DM1105_LNB_13V                          (GPIO16 | GPIO08)
 169 #define DM1105_LNB_18V                          GPIO08
 170
 171 /* GPIO's for LNB power control for Axess DM05 */
 172 #define DM05_LNB_MASK                           (GPIO_ALL & ~(GPIO14 | GPIO13))
 173 #define DM05_LNB_OFF                            GPIO17/* actually 13v */
 174 #define DM05_LNB_13V                            GPIO17
 175 #define DM05_LNB_18V                            (GPIO17 | GPIO16)
 176
 177 /* GPIO's for LNB power control for unbranded with I2C on GPIO */
 178 #define UNBR_LNB_MASK                           (GPIO17 | GPIO16)
 179 #define UNBR_LNB_OFF                            0
 180 #define UNBR_LNB_13V                            GPIO17
 181 #define UNBR_LNB_18V                            (GPIO17 | GPIO16)
 182
 183 static unsigned int card[]  = {[0 ... 3] = UNSET };
 184 module_param_array(card,  int, NULL, 0444);
 185 MODULE_PARM_DESC(card, "card type");
 186
 187 static int ir_debug;
 188 module_param(ir_debug, int, 0644);
 189 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
 190
 191 static unsigned int dm1105_devcount;
 192
 193 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 194
 195 struct dm1105_board {
 196         char    *name;
 197         struct  {
 198                 u32     mask, off, v13, v18;
 199         } lnb;
 200         u32     gpio_scl, gpio_sda;
 201 };
 202
 203 struct dm1105_subid {
 204         u16     subvendor;
 205         u16     subdevice;
 206         u32     card;
 207 };
 208
 209 static const struct dm1105_board dm1105_boards[] = {
 210         [DM1105_BOARD_UNKNOWN] = {
 211                 .name           = "UNKNOWN/GENERIC",
 212                 .lnb = {
 213                         .mask = DM1105_LNB_MASK,
 214                         .off = DM1105_LNB_OFF,
 215                         .v13 = DM1105_LNB_13V,
 216                         .v18 = DM1105_LNB_18V,
 217                 },
 218         },
 219         [DM1105_BOARD_DVBWORLD_2002] = {
 220                 .name           = "DVBWorld PCI 2002",
 221                 .lnb = {
 222                         .mask = DM1105_LNB_MASK,
 223                         .off = DM1105_LNB_OFF,
 224                         .v13 = DM1105_LNB_13V,
 225                         .v18 = DM1105_LNB_18V,
 226                 },
 227         },
 228         [DM1105_BOARD_DVBWORLD_2004] = {
 229                 .name           = "DVBWorld PCI 2004",
 230                 .lnb = {
 231                         .mask = DM1105_LNB_MASK,
 232                         .off = DM1105_LNB_OFF,
 233                         .v13 = DM1105_LNB_13V,
 234                         .v18 = DM1105_LNB_18V,
 235                 },
 236         },
 237         [DM1105_BOARD_AXESS_DM05] = {
 238                 .name           = "Axess/EasyTv DM05",
 239                 .lnb = {
 240                         .mask = DM05_LNB_MASK,
 241                         .off = DM05_LNB_OFF,
 242                         .v13 = DM05_LNB_13V,
 243                         .v18 = DM05_LNB_18V,
 244                 },
 245         },
 246         [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
 247                 .name           = "Unbranded DM1105 with i2c on GPIOs",
 248                 .lnb = {
 249                         .mask = UNBR_LNB_MASK,
 250                         .off = UNBR_LNB_OFF,
 251                         .v13 = UNBR_LNB_13V,
 252                         .v18 = UNBR_LNB_18V,
 253                 },
 254                 .gpio_scl       = GPIO14,
 255                 .gpio_sda       = GPIO13,
 256         },
 257 };
 258
 259 static const struct dm1105_subid dm1105_subids[] = {
 260         {
 261                 .subvendor = 0x0000,
 262                 .subdevice = 0x2002,
 263                 .card      = DM1105_BOARD_DVBWORLD_2002,
 264         }, {
 265                 .subvendor = 0x0001,
 266                 .subdevice = 0x2002,
 267                 .card      = DM1105_BOARD_DVBWORLD_2002,
 268         }, {
 269                 .subvendor = 0x0000,
 270                 .subdevice = 0x2004,
 271                 .card      = DM1105_BOARD_DVBWORLD_2004,
 272         }, {
 273                 .subvendor = 0x0001,
 274                 .subdevice = 0x2004,
 275                 .card      = DM1105_BOARD_DVBWORLD_2004,
 276         }, {
 277                 .subvendor = 0x195d,
 278                 .subdevice = 0x1105,
 279                 .card      = DM1105_BOARD_AXESS_DM05,
 280         },
 281 };
 282
 283 static void dm1105_card_list(struct pci_dev *pci)
 284 {
 285         int i;
 286
 287         if (0 == pci->subsystem_vendor &&
 288                         0 == pci->subsystem_device) {
 289                 printk(KERN_ERR
 290                         "dm1105: Your board has no valid PCI Subsystem ID\n"
 291                         "dm1105: and thus can't be autodetected\n"
 292                         "dm1105: Please pass card=<n> insmod option to\n"
 293                         "dm1105: workaround that.  Redirect complaints to\n"
 294                         "dm1105: the vendor of the TV card.  Best regards,\n"
 295                         "dm1105: -- tux\n");
 296         } else {
 297                 printk(KERN_ERR
 298                         "dm1105: Your board isn't known (yet) to the driver.\n"
 299                         "dm1105: You can try to pick one of the existing\n"
 300                         "dm1105: card configs via card=<n> insmod option.\n"
 301                         "dm1105: Updating to the latest version might help\n"
 302                         "dm1105: as well.\n");
 303         }
 304         printk(KERN_ERR "Here is a list of valid choices for the card=<n> insmod option:\n");
 305         for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
 306                 printk(KERN_ERR "dm1105:    card=%d -> %s\n",
 307                                 i, dm1105_boards[i].name);
 308 }
 309
 310 /* infrared remote control */
 311 struct infrared {
 312         struct rc_dev           *dev;
 313         char                    input_phys[32];
 314         struct work_struct      work;
 315         u32                     ir_command;
 316 };
 317
 318 struct dm1105_dev {
 319         /* pci */
 320         struct pci_dev *pdev;
 321         u8 __iomem *io_mem;
 322
 323         /* ir */
 324         struct infrared ir;
 325
 326         /* dvb */
 327         struct dmx_frontend hw_frontend;
 328         struct dmx_frontend mem_frontend;
 329         struct dmxdev dmxdev;
 330         struct dvb_adapter dvb_adapter;
 331         struct dvb_demux demux;
 332         struct dvb_frontend *fe;
 333         struct dvb_net dvbnet;
 334         unsigned int full_ts_users;
 335         unsigned int boardnr;
 336         int nr;
 337
 338         /* i2c */
 339         struct i2c_adapter i2c_adap;
 340         struct i2c_adapter i2c_bb_adap;
 341         struct i2c_algo_bit_data i2c_bit;
 342
 343         /* irq */
 344         struct work_struct work;
 345         struct workqueue_struct *wq;
 346         char wqn[16];
 347
 348         /* dma */
 349         dma_addr_t dma_addr;
 350         unsigned char *ts_buf;
 351         u32 wrp;
 352         u32 nextwrp;
 353         u32 buffer_size;
 354         unsigned int    PacketErrorCount;
 355         unsigned int dmarst;
 356         spinlock_t lock;
 357 };
 358
 359 #define dm_io_mem(reg)  ((unsigned long)(&dev->io_mem[reg]))
 360
 361 #define dm_readb(reg)           inb(dm_io_mem(reg))
 362 #define dm_writeb(reg, value)   outb((value), (dm_io_mem(reg)))
 363
 364 #define dm_readw(reg)           inw(dm_io_mem(reg))
 365 #define dm_writew(reg, value)   outw((value), (dm_io_mem(reg)))
 366
 367 #define dm_readl(reg)           inl(dm_io_mem(reg))
 368 #define dm_writel(reg, value)   outl((value), (dm_io_mem(reg)))
 369
 370 #define dm_andorl(reg, mask, value) \
 371         outl((inl(dm_io_mem(reg)) & ~(mask)) |\
 372                 ((value) & (mask)), (dm_io_mem(reg)))
 373
 374 #define dm_setl(reg, bit)       dm_andorl((reg), (bit), (bit))
 375 #define dm_clearl(reg, bit)     dm_andorl((reg), (bit), 0)
 376
 377 /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
 378  so we can use only 3 GPIO's from GPIO15 to GPIO17.
 379  Here I don't check whether HOST is enebled as it is not implemented yet.
 380  */
 381 static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
 382 {
 383         if (mask & 0xfffc0000)
 384                 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
 385
 386         if (mask & 0x0003ffff)
 387                 dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
 388
 389 }
 390
 391 static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
 392 {
 393         if (mask & 0xfffc0000)
 394                 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
 395
 396         if (mask & 0x0003ffff)
 397                 dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
 398
 399 }
 400
 401 static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
 402 {
 403         if (mask & 0xfffc0000)
 404                 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
 405
 406         if (mask & 0x0003ffff)
 407                 dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
 408
 409 }
 410
 411 static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
 412 {
 413         if (mask & 0xfffc0000)
 414                 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
 415
 416         if (mask & 0x0003ffff)
 417                 return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
 418
 419         return 0;
 420 }
 421
 422 static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
 423 {
 424         if (mask & 0xfffc0000)
 425                 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
 426
 427         if ((mask & 0x0003ffff) && asoutput)
 428                 dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
 429         else if ((mask & 0x0003ffff) && !asoutput)
 430                 dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
 431
 432 }
 433
 434 static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
 435 {
 436         if (state)
 437                 dm1105_gpio_enable(dev, line, 0);
 438         else {
 439                 dm1105_gpio_enable(dev, line, 1);
 440                 dm1105_gpio_clear(dev, line);
 441         }
 442 }
 443
 444 static void dm1105_setsda(void *data, int state)
 445 {
 446         struct dm1105_dev *dev = data;
 447
 448         dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
 449 }
 450
 451 static void dm1105_setscl(void *data, int state)
 452 {
 453         struct dm1105_dev *dev = data;
 454
 455         dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
 456 }
 457
 458 static int dm1105_getsda(void *data)
 459 {
 460         struct dm1105_dev *dev = data;
 461
 462         return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
 463                                                                         ? 1 : 0;
 464 }
 465
 466 static int dm1105_getscl(void *data)
 467 {
 468         struct dm1105_dev *dev = data;
 469
 470         return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
 471                                                                         ? 1 : 0;
 472 }
 473
 474 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
 475                             struct i2c_msg *msgs, int num)
 476 {
 477         struct dm1105_dev *dev ;
 478
 479         int addr, rc, i, j, k, len, byte, data;
 480         u8 status;
 481
 482         dev = i2c_adap->algo_data;
 483         for (i = 0; i < num; i++) {
 484                 dm_writeb(DM1105_I2CCTR, 0x00);
 485                 if (msgs[i].flags & I2C_M_RD) {
 486                         /* read bytes */
 487                         addr  = msgs[i].addr << 1;
 488                         addr |= 1;
 489                         dm_writeb(DM1105_I2CDAT, addr);
 490                         for (byte = 0; byte < msgs[i].len; byte++)
 491                                 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
 492
 493                         dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
 494                         for (j = 0; j < 55; j++) {
 495                                 mdelay(10);
 496                                 status = dm_readb(DM1105_I2CSTS);
 497                                 if ((status & 0xc0) == 0x40)
 498                                         break;
 499                         }
 500                         if (j >= 55)
 501                                 return -1;
 502
 503                         for (byte = 0; byte < msgs[i].len; byte++) {
 504                                 rc = dm_readb(DM1105_I2CDAT + byte + 1);
 505                                 if (rc < 0)
 506                                         goto err;
 507                                 msgs[i].buf[byte] = rc;
 508                         }
 509                 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
 510                         /* prepared for cx24116 firmware */
 511                         /* Write in small blocks */
 512                         len = msgs[i].len - 1;
 513                         k = 1;
 514                         do {
 515                                 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
 516                                 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
 517                                 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
 518                                         data = msgs[i].buf[k + byte];
 519                                         dm_writeb(DM1105_I2CDAT + byte + 2, data);
 520                                 }
 521                                 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
 522                                 for (j = 0; j < 25; j++) {
 523                                         mdelay(10);
 524                                         status = dm_readb(DM1105_I2CSTS);
 525                                         if ((status & 0xc0) == 0x40)
 526                                                 break;
 527                                 }
 528
 529                                 if (j >= 25)
 530                                         return -1;
 531
 532                                 k += 48;
 533                                 len -= 48;
 534                         } while (len > 0);
 535                 } else {
 536                         /* write bytes */
 537                         dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
 538                         for (byte = 0; byte < msgs[i].len; byte++) {
 539                                 data = msgs[i].buf[byte];
 540                                 dm_writeb(DM1105_I2CDAT + byte + 1, data);
 541                         }
 542                         dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
 543                         for (j = 0; j < 25; j++) {
 544                                 mdelay(10);
 545                                 status = dm_readb(DM1105_I2CSTS);
 546                                 if ((status & 0xc0) == 0x40)
 547                                         break;
 548                         }
 549
 550                         if (j >= 25)
 551                                 return -1;
 552                 }
 553         }
 554         return num;
 555  err:
 556         return rc;
 557 }
 558
 559 static u32 functionality(struct i2c_adapter *adap)
 560 {
 561         return I2C_FUNC_I2C;
 562 }
 563
 564 static const struct i2c_algorithm dm1105_algo = {
 565         .master_xfer   = dm1105_i2c_xfer,
 566         .functionality = functionality,
 567 };
 568
 569 static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
 570 {
 571         return container_of(feed->demux, struct dm1105_dev, demux);
 572 }
 573
 574 static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
 575 {
 576         return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
 577 }
 578
 579 static int dm1105_set_voltage(struct dvb_frontend *fe,
 580                               enum fe_sec_voltage voltage)
 581 {
 582         struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
 583
 584         dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
 585         if (voltage == SEC_VOLTAGE_18)
 586                 dm1105_gpio_andor(dev,
 587                                 dm1105_boards[dev->boardnr].lnb.mask,
 588                                 dm1105_boards[dev->boardnr].lnb.v18);
 589         else if (voltage == SEC_VOLTAGE_13)
 590                 dm1105_gpio_andor(dev,
 591                                 dm1105_boards[dev->boardnr].lnb.mask,
 592                                 dm1105_boards[dev->boardnr].lnb.v13);
 593         else
 594                 dm1105_gpio_andor(dev,
 595                                 dm1105_boards[dev->boardnr].lnb.mask,
 596                                 dm1105_boards[dev->boardnr].lnb.off);
 597
 598         return 0;
 599 }
 600
 601 static void dm1105_set_dma_addr(struct dm1105_dev *dev)
 602 {
 603         dm_writel(DM1105_STADR, (__force u32)cpu_to_le32(dev->dma_addr));
 604 }
 605
 606 static int dm1105_dma_map(struct dm1105_dev *dev)
 607 {
 608         dev->ts_buf = pci_alloc_consistent(dev->pdev,
 609                                         6 * DM1105_DMA_BYTES,
 610                                         &dev->dma_addr);
 611
 612         return !dev->ts_buf;
 613 }
 614
 615 static void dm1105_dma_unmap(struct dm1105_dev *dev)
 616 {
 617         pci_free_consistent(dev->pdev,
 618                         6 * DM1105_DMA_BYTES,
 619                         dev->ts_buf,
 620                         dev->dma_addr);
 621 }
 622
 623 static void dm1105_enable_irqs(struct dm1105_dev *dev)
 624 {
 625         dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
 626         dm_writeb(DM1105_CR, 1);
 627 }
 628
 629 static void dm1105_disable_irqs(struct dm1105_dev *dev)
 630 {
 631         dm_writeb(DM1105_INTMAK, INTMAK_IRM);
 632         dm_writeb(DM1105_CR, 0);
 633 }
 634
 635 static int dm1105_start_feed(struct dvb_demux_feed *f)
 636 {
 637         struct dm1105_dev *dev = feed_to_dm1105_dev(f);
 638
 639         if (dev->full_ts_users++ == 0)
 640                 dm1105_enable_irqs(dev);
 641
 642         return 0;
 643 }
 644
 645 static int dm1105_stop_feed(struct dvb_demux_feed *f)
 646 {
 647         struct dm1105_dev *dev = feed_to_dm1105_dev(f);
 648
 649         if (--dev->full_ts_users == 0)
 650                 dm1105_disable_irqs(dev);
 651
 652         return 0;
 653 }
 654
 655 /* ir work handler */
 656 static void dm1105_emit_key(struct work_struct *work)
 657 {
 658         struct infrared *ir = container_of(work, struct infrared, work);
 659         u32 ircom = ir->ir_command;
 660         u8 data;
 661
 662         if (ir_debug)
 663                 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
 664
 665         data = (ircom >> 8) & 0x7f;
 666
 667         /* FIXME: UNKNOWN because we don't generate a full NEC scancode (yet?) */
 668         rc_keydown(ir->dev, RC_PROTO_UNKNOWN, data, 0);
 669 }
 670
 671 /* work handler */
 672 static void dm1105_dmx_buffer(struct work_struct *work)
 673 {
 674         struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
 675         unsigned int nbpackets;
 676         u32 oldwrp = dev->wrp;
 677         u32 nextwrp = dev->nextwrp;
 678
 679         if (!((dev->ts_buf[oldwrp] == 0x47) &&
 680                         (dev->ts_buf[oldwrp + 188] == 0x47) &&
 681                         (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
 682                 dev->PacketErrorCount++;
 683                 /* bad packet found */
 684                 if ((dev->PacketErrorCount >= 2) &&
 685                                 (dev->dmarst == 0)) {
 686                         dm_writeb(DM1105_RST, 1);
 687                         dev->wrp = 0;
 688                         dev->PacketErrorCount = 0;
 689                         dev->dmarst = 0;
 690                         return;
 691                 }
 692         }
 693
 694         if (nextwrp < oldwrp) {
 695                 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
 696                 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
 697         } else
 698                 nbpackets = (nextwrp - oldwrp) / 188;
 699
 700         dev->wrp = nextwrp;
 701         dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
 702 }
 703
 704 static irqreturn_t dm1105_irq(int irq, void *dev_id)
 705 {
 706         struct dm1105_dev *dev = dev_id;
 707
 708         /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
 709         unsigned int intsts = dm_readb(DM1105_INTSTS);
 710         dm_writeb(DM1105_INTSTS, intsts);
 711
 712         switch (intsts) {
 713         case INTSTS_TSIRQ:
 714         case (INTSTS_TSIRQ | INTSTS_IR):
 715                 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
 716                 queue_work(dev->wq, &dev->work);
 717                 break;
 718         case INTSTS_IR:
 719                 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
 720                 schedule_work(&dev->ir.work);
 721                 break;
 722         }
 723
 724         return IRQ_HANDLED;
 725 }
 726
 727 static int dm1105_ir_init(struct dm1105_dev *dm1105)
 728 {
 729         struct rc_dev *dev;
 730         int err = -ENOMEM;
 731
 732         dev = rc_allocate_device(RC_DRIVER_SCANCODE);
 733         if (!dev)
 734                 return -ENOMEM;
 735
 736         snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
 737                 "pci-%s/ir0", pci_name(dm1105->pdev));
 738
 739         dev->driver_name = MODULE_NAME;
 740         dev->map_name = RC_MAP_DM1105_NEC;
 741         dev->device_name = "DVB on-card IR receiver";
 742         dev->input_phys = dm1105->ir.input_phys;
 743         dev->input_id.bustype = BUS_PCI;
 744         dev->input_id.version = 1;
 745         if (dm1105->pdev->subsystem_vendor) {
 746                 dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
 747                 dev->input_id.product = dm1105->pdev->subsystem_device;
 748         } else {
 749                 dev->input_id.vendor = dm1105->pdev->vendor;
 750                 dev->input_id.product = dm1105->pdev->device;
 751         }
 752         dev->dev.parent = &dm1105->pdev->dev;
 753
 754         INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
 755
 756         err = rc_register_device(dev);
 757         if (err < 0) {
 758                 rc_free_device(dev);
 759                 return err;
 760         }
 761
 762         dm1105->ir.dev = dev;
 763         return 0;
 764 }
 765
 766 static void dm1105_ir_exit(struct dm1105_dev *dm1105)
 767 {
 768         rc_unregister_device(dm1105->ir.dev);
 769 }
 770
 771 static int dm1105_hw_init(struct dm1105_dev *dev)
 772 {
 773         dm1105_disable_irqs(dev);
 774
 775         dm_writeb(DM1105_HOST_CTR, 0);
 776
 777         /*DATALEN 188,*/
 778         dm_writeb(DM1105_DTALENTH, 188);
 779         /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
 780         dm_writew(DM1105_TSCTR, 0xc10a);
 781
 782         /* map DMA and set address */
 783         dm1105_dma_map(dev);
 784         dm1105_set_dma_addr(dev);
 785         /* big buffer */
 786         dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
 787         dm_writeb(DM1105_INTCNT, 47);
 788
 789         /* IR NEC mode enable */
 790         dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
 791         dm_writeb(DM1105_IRMODE, 0);
 792         dm_writew(DM1105_SYSTEMCODE, 0);
 793
 794         return 0;
 795 }
 796
 797 static void dm1105_hw_exit(struct dm1105_dev *dev)
 798 {
 799         dm1105_disable_irqs(dev);
 800
 801         /* IR disable */
 802         dm_writeb(DM1105_IRCTR, 0);
 803         dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
 804
 805         dm1105_dma_unmap(dev);
 806 }
 807
 808 static const struct stv0299_config sharp_z0194a_config = {
 809         .demod_address = 0x68,
 810         .inittab = sharp_z0194a_inittab,
 811         .mclk = 88000000UL,
 812         .invert = 1,
 813         .skip_reinit = 0,
 814         .lock_output = STV0299_LOCKOUTPUT_1,
 815         .volt13_op0_op1 = STV0299_VOLT13_OP1,
 816         .min_delay_ms = 100,
 817         .set_symbol_rate = sharp_z0194a_set_symbol_rate,
 818 };
 819
 820 static struct stv0288_config earda_config = {
 821         .demod_address = 0x68,
 822         .min_delay_ms = 100,
 823 };
 824
 825 static struct si21xx_config serit_config = {
 826         .demod_address = 0x68,
 827         .min_delay_ms = 100,
 828
 829 };
 830
 831 static struct cx24116_config serit_sp2633_config = {
 832         .demod_address = 0x55,
 833 };
 834
 835 static struct ds3000_config dvbworld_ds3000_config = {
 836         .demod_address = 0x68,
 837 };
 838
 839 static struct ts2020_config dvbworld_ts2020_config  = {
 840         .tuner_address = 0x60,
 841         .clk_out_div = 1,
 842 };
 843
 844 static int frontend_init(struct dm1105_dev *dev)
 845 {
 846         int ret;
 847
 848         switch (dev->boardnr) {
 849         case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
 850                 dm1105_gpio_enable(dev, GPIO15, 1);
 851                 dm1105_gpio_clear(dev, GPIO15);
 852                 msleep(100);
 853                 dm1105_gpio_set(dev, GPIO15);
 854                 msleep(200);
 855                 dev->fe = dvb_attach(
 856                         stv0299_attach, &sharp_z0194a_config,
 857                         &dev->i2c_bb_adap);
 858                 if (dev->fe) {
 859                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 860                         dvb_attach(dvb_pll_attach, dev->fe, 0x60,
 861                                         &dev->i2c_bb_adap, DVB_PLL_OPERA1);
 862                         break;
 863                 }
 864
 865                 dev->fe = dvb_attach(
 866                         stv0288_attach, &earda_config,
 867                         &dev->i2c_bb_adap);
 868                 if (dev->fe) {
 869                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 870                         dvb_attach(stb6000_attach, dev->fe, 0x61,
 871                                         &dev->i2c_bb_adap);
 872                         break;
 873                 }
 874
 875                 dev->fe = dvb_attach(
 876                         si21xx_attach, &serit_config,
 877                         &dev->i2c_bb_adap);
 878                 if (dev->fe)
 879                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 880                 break;
 881         case DM1105_BOARD_DVBWORLD_2004:
 882                 dev->fe = dvb_attach(
 883                         cx24116_attach, &serit_sp2633_config,
 884                         &dev->i2c_adap);
 885                 if (dev->fe) {
 886                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 887                         break;
 888                 }
 889
 890                 dev->fe = dvb_attach(
 891                         ds3000_attach, &dvbworld_ds3000_config,
 892                         &dev->i2c_adap);
 893                 if (dev->fe) {
 894                         dvb_attach(ts2020_attach, dev->fe,
 895                                 &dvbworld_ts2020_config, &dev->i2c_adap);
 896                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 897                 }
 898
 899                 break;
 900         case DM1105_BOARD_DVBWORLD_2002:
 901         case DM1105_BOARD_AXESS_DM05:
 902         default:
 903                 dev->fe = dvb_attach(
 904                         stv0299_attach, &sharp_z0194a_config,
 905                         &dev->i2c_adap);
 906                 if (dev->fe) {
 907                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 908                         dvb_attach(dvb_pll_attach, dev->fe, 0x60,
 909                                         &dev->i2c_adap, DVB_PLL_OPERA1);
 910                         break;
 911                 }
 912
 913                 dev->fe = dvb_attach(
 914                         stv0288_attach, &earda_config,
 915                         &dev->i2c_adap);
 916                 if (dev->fe) {
 917                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 918                         dvb_attach(stb6000_attach, dev->fe, 0x61,
 919                                         &dev->i2c_adap);
 920                         break;
 921                 }
 922
 923                 dev->fe = dvb_attach(
 924                         si21xx_attach, &serit_config,
 925                         &dev->i2c_adap);
 926                 if (dev->fe)
 927                         dev->fe->ops.set_voltage = dm1105_set_voltage;
 928
 929         }
 930
 931         if (!dev->fe) {
 932                 dev_err(&dev->pdev->dev, "could not attach frontend\n");
 933                 return -ENODEV;
 934         }
 935
 936         ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
 937         if (ret < 0) {
 938                 if (dev->fe->ops.release)
 939                         dev->fe->ops.release(dev->fe);
 940                 dev->fe = NULL;
 941                 return ret;
 942         }
 943
 944         return 0;
 945 }
 946
 947 static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
 948 {
 949         static u8 command[1] = { 0x28 };
 950
 951         struct i2c_msg msg[] = {
 952                 {
 953                         .addr = IIC_24C01_addr >> 1,
 954                         .flags = 0,
 955                         .buf = command,
 956                         .len = 1
 957                 }, {
 958                         .addr = IIC_24C01_addr >> 1,
 959                         .flags = I2C_M_RD,
 960                         .buf = mac,
 961                         .len = 6
 962                 },
 963         };
 964
 965         dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
 966         dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
 967 }
 968
 969 static int dm1105_probe(struct pci_dev *pdev,
 970                                   const struct pci_device_id *ent)
 971 {
 972         struct dm1105_dev *dev;
 973         struct dvb_adapter *dvb_adapter;
 974         struct dvb_demux *dvbdemux;
 975         struct dmx_demux *dmx;
 976         int ret = -ENOMEM;
 977         int i;
 978
 979         if (dm1105_devcount >= ARRAY_SIZE(card))
 980                 return -ENODEV;
 981
 982         dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
 983         if (!dev)
 984                 return -ENOMEM;
 985
 986         /* board config */
 987         dev->nr = dm1105_devcount;
 988         dev->boardnr = UNSET;
 989         if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
 990                 dev->boardnr = card[dev->nr];
 991         for (i = 0; UNSET == dev->boardnr &&
 992                                 i < ARRAY_SIZE(dm1105_subids); i++)
 993                 if (pdev->subsystem_vendor ==
 994                         dm1105_subids[i].subvendor &&
 995                                 pdev->subsystem_device ==
 996                                         dm1105_subids[i].subdevice)
 997                         dev->boardnr = dm1105_subids[i].card;
 998
 999         if (UNSET == dev->boardnr) {
1000                 dev->boardnr = DM1105_BOARD_UNKNOWN;
1001                 dm1105_card_list(pdev);
1002         }
1003
1004         dm1105_devcount++;
1005         dev->pdev = pdev;
1006         dev->buffer_size = 5 * DM1105_DMA_BYTES;
1007         dev->PacketErrorCount = 0;
1008         dev->dmarst = 0;
1009
1010         ret = pci_enable_device(pdev);
1011         if (ret < 0)
1012                 goto err_kfree;
1013
1014         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1015         if (ret < 0)
1016                 goto err_pci_disable_device;
1017
1018         pci_set_master(pdev);
1019
1020         ret = pci_request_regions(pdev, DRIVER_NAME);
1021         if (ret < 0)
1022                 goto err_pci_disable_device;
1023
1024         dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
1025         if (!dev->io_mem) {
1026                 ret = -EIO;
1027                 goto err_pci_release_regions;
1028         }
1029
1030         spin_lock_init(&dev->lock);
1031         pci_set_drvdata(pdev, dev);
1032
1033         ret = dm1105_hw_init(dev);
1034         if (ret < 0)
1035                 goto err_pci_iounmap;
1036
1037         /* i2c */
1038         i2c_set_adapdata(&dev->i2c_adap, dev);
1039         strscpy(dev->i2c_adap.name, DRIVER_NAME, sizeof(dev->i2c_adap.name));
1040         dev->i2c_adap.owner = THIS_MODULE;
1041         dev->i2c_adap.dev.parent = &pdev->dev;
1042         dev->i2c_adap.algo = &dm1105_algo;
1043         dev->i2c_adap.algo_data = dev;
1044         ret = i2c_add_adapter(&dev->i2c_adap);
1045
1046         if (ret < 0)
1047                 goto err_dm1105_hw_exit;
1048
1049         i2c_set_adapdata(&dev->i2c_bb_adap, dev);
1050         strscpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME,
1051                 sizeof(dev->i2c_bb_adap.name));
1052         dev->i2c_bb_adap.owner = THIS_MODULE;
1053         dev->i2c_bb_adap.dev.parent = &pdev->dev;
1054         dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
1055         dev->i2c_bit.data = dev;
1056         dev->i2c_bit.setsda = dm1105_setsda;
1057         dev->i2c_bit.setscl = dm1105_setscl;
1058         dev->i2c_bit.getsda = dm1105_getsda;
1059         dev->i2c_bit.getscl = dm1105_getscl;
1060         dev->i2c_bit.udelay = 10;
1061         dev->i2c_bit.timeout = 10;
1062
1063         /* Raise SCL and SDA */
1064         dm1105_setsda(dev, 1);
1065         dm1105_setscl(dev, 1);
1066
1067         ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
1068         if (ret < 0)
1069                 goto err_i2c_del_adapter;
1070
1071         /* dvb */
1072         ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
1073                                         THIS_MODULE, &pdev->dev, adapter_nr);
1074         if (ret < 0)
1075                 goto err_i2c_del_adapters;
1076
1077         dvb_adapter = &dev->dvb_adapter;
1078
1079         dm1105_read_mac(dev, dvb_adapter->proposed_mac);
1080
1081         dvbdemux = &dev->demux;
1082         dvbdemux->filternum = 256;
1083         dvbdemux->feednum = 256;
1084         dvbdemux->start_feed = dm1105_start_feed;
1085         dvbdemux->stop_feed = dm1105_stop_feed;
1086         dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1087                         DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
1088         ret = dvb_dmx_init(dvbdemux);
1089         if (ret < 0)
1090                 goto err_dvb_unregister_adapter;
1091
1092         dmx = &dvbdemux->dmx;
1093         dev->dmxdev.filternum = 256;
1094         dev->dmxdev.demux = dmx;
1095         dev->dmxdev.capabilities = 0;
1096
1097         ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
1098         if (ret < 0)
1099                 goto err_dvb_dmx_release;
1100
1101         dev->hw_frontend.source = DMX_FRONTEND_0;
1102
1103         ret = dmx->add_frontend(dmx, &dev->hw_frontend);
1104         if (ret < 0)
1105                 goto err_dvb_dmxdev_release;
1106
1107         dev->mem_frontend.source = DMX_MEMORY_FE;
1108
1109         ret = dmx->add_frontend(dmx, &dev->mem_frontend);
1110         if (ret < 0)
1111                 goto err_remove_hw_frontend;
1112
1113         ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
1114         if (ret < 0)
1115                 goto err_remove_mem_frontend;
1116
1117         ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1118         if (ret < 0)
1119                 goto err_disconnect_frontend;
1120
1121         ret = frontend_init(dev);
1122         if (ret < 0)
1123                 goto err_dvb_net;
1124
1125         dm1105_ir_init(dev);
1126
1127         INIT_WORK(&dev->work, dm1105_dmx_buffer);
1128         sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
1129         dev->wq = create_singlethread_workqueue(dev->wqn);
1130         if (!dev->wq) {
1131                 ret = -ENOMEM;
1132                 goto err_dvb_net;
1133         }
1134
1135         ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
1136                                                 DRIVER_NAME, dev);
1137         if (ret < 0)
1138                 goto err_workqueue;
1139
1140         return 0;
1141
1142 err_workqueue:
1143         destroy_workqueue(dev->wq);
1144 err_dvb_net:
1145         dvb_net_release(&dev->dvbnet);
1146 err_disconnect_frontend:
1147         dmx->disconnect_frontend(dmx);
1148 err_remove_mem_frontend:
1149         dmx->remove_frontend(dmx, &dev->mem_frontend);
1150 err_remove_hw_frontend:
1151         dmx->remove_frontend(dmx, &dev->hw_frontend);
1152 err_dvb_dmxdev_release:
1153         dvb_dmxdev_release(&dev->dmxdev);
1154 err_dvb_dmx_release:
1155         dvb_dmx_release(dvbdemux);
1156 err_dvb_unregister_adapter:
1157         dvb_unregister_adapter(dvb_adapter);
1158 err_i2c_del_adapters:
1159         i2c_del_adapter(&dev->i2c_bb_adap);
1160 err_i2c_del_adapter:
1161         i2c_del_adapter(&dev->i2c_adap);
1162 err_dm1105_hw_exit:
1163         dm1105_hw_exit(dev);
1164 err_pci_iounmap:
1165         pci_iounmap(pdev, dev->io_mem);
1166 err_pci_release_regions:
1167         pci_release_regions(pdev);
1168 err_pci_disable_device:
1169         pci_disable_device(pdev);
1170 err_kfree:
1171         kfree(dev);
1172         return ret;
1173 }
1174
1175 static void dm1105_remove(struct pci_dev *pdev)
1176 {
1177         struct dm1105_dev *dev = pci_get_drvdata(pdev);
1178         struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
1179         struct dvb_demux *dvbdemux = &dev->demux;
1180         struct dmx_demux *dmx = &dvbdemux->dmx;
1181
1182         dm1105_ir_exit(dev);
1183         dmx->close(dmx);
1184         dvb_net_release(&dev->dvbnet);
1185         if (dev->fe)
1186                 dvb_unregister_frontend(dev->fe);
1187
1188         dmx->disconnect_frontend(dmx);
1189         dmx->remove_frontend(dmx, &dev->mem_frontend);
1190         dmx->remove_frontend(dmx, &dev->hw_frontend);
1191         dvb_dmxdev_release(&dev->dmxdev);
1192         dvb_dmx_release(dvbdemux);
1193         dvb_unregister_adapter(dvb_adapter);
1194         i2c_del_adapter(&dev->i2c_adap);
1195
1196         dm1105_hw_exit(dev);
1197         free_irq(pdev->irq, dev);
1198         pci_iounmap(pdev, dev->io_mem);
1199         pci_release_regions(pdev);
1200         pci_disable_device(pdev);
1201         dm1105_devcount--;
1202         kfree(dev);
1203 }
1204
1205 static const struct pci_device_id dm1105_id_table[] = {
1206         {
1207                 .vendor = PCI_VENDOR_ID_TRIGEM,
1208                 .device = PCI_DEVICE_ID_DM1105,
1209                 .subvendor = PCI_ANY_ID,
1210                 .subdevice = PCI_ANY_ID,
1211         }, {
1212                 .vendor = PCI_VENDOR_ID_AXESS,
1213                 .device = PCI_DEVICE_ID_DM05,
1214                 .subvendor = PCI_ANY_ID,
1215                 .subdevice = PCI_ANY_ID,
1216         }, {
1217                 /* empty */
1218         },
1219 };
1220
1221 MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1222
1223 static struct pci_driver dm1105_driver = {
1224         .name = DRIVER_NAME,
1225         .id_table = dm1105_id_table,
1226         .probe = dm1105_probe,
1227         .remove = dm1105_remove,
1228 };
1229
1230 module_pci_driver(dm1105_driver);
1231
1232 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1233 MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1234 MODULE_LICENSE("GPL");