drivers/media/i2c/rj54n1cb0c.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp
   4  *
   5  * Copyright (C) 2018, Jacopo Mondi <jacopo@jmondi.org>
   6  *
   7  * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/delay.h>
  12 #include <linux/gpio/consumer.h>
  13 #include <linux/i2c.h>
  14 #include <linux/module.h>
  15 #include <linux/slab.h>
  16 #include <linux/v4l2-mediabus.h>
  17 #include <linux/videodev2.h>
  18
  19 #include <media/i2c/rj54n1cb0c.h>
  20 #include <media/v4l2-device.h>
  21 #include <media/v4l2-ctrls.h>
  22 #include <media/v4l2-subdev.h>
  23
  24 #define RJ54N1_DEV_CODE                 0x0400
  25 #define RJ54N1_DEV_CODE2                0x0401
  26 #define RJ54N1_OUT_SEL                  0x0403
  27 #define RJ54N1_XY_OUTPUT_SIZE_S_H       0x0404
  28 #define RJ54N1_X_OUTPUT_SIZE_S_L        0x0405
  29 #define RJ54N1_Y_OUTPUT_SIZE_S_L        0x0406
  30 #define RJ54N1_XY_OUTPUT_SIZE_P_H       0x0407
  31 #define RJ54N1_X_OUTPUT_SIZE_P_L        0x0408
  32 #define RJ54N1_Y_OUTPUT_SIZE_P_L        0x0409
  33 #define RJ54N1_LINE_LENGTH_PCK_S_H      0x040a
  34 #define RJ54N1_LINE_LENGTH_PCK_S_L      0x040b
  35 #define RJ54N1_LINE_LENGTH_PCK_P_H      0x040c
  36 #define RJ54N1_LINE_LENGTH_PCK_P_L      0x040d
  37 #define RJ54N1_RESIZE_N                 0x040e
  38 #define RJ54N1_RESIZE_N_STEP            0x040f
  39 #define RJ54N1_RESIZE_STEP              0x0410
  40 #define RJ54N1_RESIZE_HOLD_H            0x0411
  41 #define RJ54N1_RESIZE_HOLD_L            0x0412
  42 #define RJ54N1_H_OBEN_OFS               0x0413
  43 #define RJ54N1_V_OBEN_OFS               0x0414
  44 #define RJ54N1_RESIZE_CONTROL           0x0415
  45 #define RJ54N1_STILL_CONTROL            0x0417
  46 #define RJ54N1_INC_USE_SEL_H            0x0425
  47 #define RJ54N1_INC_USE_SEL_L            0x0426
  48 #define RJ54N1_MIRROR_STILL_MODE        0x0427
  49 #define RJ54N1_INIT_START               0x0428
  50 #define RJ54N1_SCALE_1_2_LEV            0x0429
  51 #define RJ54N1_SCALE_4_LEV              0x042a
  52 #define RJ54N1_Y_GAIN                   0x04d8
  53 #define RJ54N1_APT_GAIN_UP              0x04fa
  54 #define RJ54N1_RA_SEL_UL                0x0530
  55 #define RJ54N1_BYTE_SWAP                0x0531
  56 #define RJ54N1_OUT_SIGPO                0x053b
  57 #define RJ54N1_WB_SEL_WEIGHT_I          0x054e
  58 #define RJ54N1_BIT8_WB                  0x0569
  59 #define RJ54N1_HCAPS_WB                 0x056a
  60 #define RJ54N1_VCAPS_WB                 0x056b
  61 #define RJ54N1_HCAPE_WB                 0x056c
  62 #define RJ54N1_VCAPE_WB                 0x056d
  63 #define RJ54N1_EXPOSURE_CONTROL         0x058c
  64 #define RJ54N1_FRAME_LENGTH_S_H         0x0595
  65 #define RJ54N1_FRAME_LENGTH_S_L         0x0596
  66 #define RJ54N1_FRAME_LENGTH_P_H         0x0597
  67 #define RJ54N1_FRAME_LENGTH_P_L         0x0598
  68 #define RJ54N1_PEAK_H                   0x05b7
  69 #define RJ54N1_PEAK_50                  0x05b8
  70 #define RJ54N1_PEAK_60                  0x05b9
  71 #define RJ54N1_PEAK_DIFF                0x05ba
  72 #define RJ54N1_IOC                      0x05ef
  73 #define RJ54N1_TG_BYPASS                0x0700
  74 #define RJ54N1_PLL_L                    0x0701
  75 #define RJ54N1_PLL_N                    0x0702
  76 #define RJ54N1_PLL_EN                   0x0704
  77 #define RJ54N1_RATIO_TG                 0x0706
  78 #define RJ54N1_RATIO_T                  0x0707
  79 #define RJ54N1_RATIO_R                  0x0708
  80 #define RJ54N1_RAMP_TGCLK_EN            0x0709
  81 #define RJ54N1_OCLK_DSP                 0x0710
  82 #define RJ54N1_RATIO_OP                 0x0711
  83 #define RJ54N1_RATIO_O                  0x0712
  84 #define RJ54N1_OCLK_SEL_EN              0x0713
  85 #define RJ54N1_CLK_RST                  0x0717
  86 #define RJ54N1_RESET_STANDBY            0x0718
  87 #define RJ54N1_FWFLG                    0x07fe
  88
  89 #define E_EXCLK                         (1 << 7)
  90 #define SOFT_STDBY                      (1 << 4)
  91 #define SEN_RSTX                        (1 << 2)
  92 #define TG_RSTX                         (1 << 1)
  93 #define DSP_RSTX                        (1 << 0)
  94
  95 #define RESIZE_HOLD_SEL                 (1 << 2)
  96 #define RESIZE_GO                       (1 << 1)
  97
  98 /*
  99  * When cropping, the camera automatically centers the cropped region, there
 100  * doesn't seem to be a way to specify an explicit location of the rectangle.
 101  */
 102 #define RJ54N1_COLUMN_SKIP              0
 103 #define RJ54N1_ROW_SKIP                 0
 104 #define RJ54N1_MAX_WIDTH                1600
 105 #define RJ54N1_MAX_HEIGHT               1200
 106
 107 #define PLL_L                           2
 108 #define PLL_N                           0x31
 109
 110 /* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
 111
 112 /* RJ54N1CB0C has only one fixed colorspace per pixelcode */
 113 struct rj54n1_datafmt {
 114         u32     code;
 115         enum v4l2_colorspace            colorspace;
 116 };
 117
 118 /* Find a data format by a pixel code in an array */
 119 static const struct rj54n1_datafmt *rj54n1_find_datafmt(
 120         u32 code, const struct rj54n1_datafmt *fmt,
 121         int n)
 122 {
 123         int i;
 124         for (i = 0; i < n; i++)
 125                 if (fmt[i].code == code)
 126                         return fmt + i;
 127
 128         return NULL;
 129 }
 130
 131 static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
 132         {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
 133         {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
 134         {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
 135         {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
 136         {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
 137         {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
 138         {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
 139         {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
 140         {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
 141 };
 142
 143 struct rj54n1_clock_div {
 144         u8 ratio_tg;    /* can be 0 or an odd number */
 145         u8 ratio_t;
 146         u8 ratio_r;
 147         u8 ratio_op;
 148         u8 ratio_o;
 149 };
 150
 151 struct rj54n1 {
 152         struct v4l2_subdev subdev;
 153         struct v4l2_ctrl_handler hdl;
 154         struct clk *clk;
 155         struct gpio_desc *pwup_gpio;
 156         struct gpio_desc *enable_gpio;
 157         struct rj54n1_clock_div clk_div;
 158         const struct rj54n1_datafmt *fmt;
 159         struct v4l2_rect rect;  /* Sensor window */
 160         unsigned int tgclk_mhz;
 161         bool auto_wb;
 162         unsigned short width;   /* Output window */
 163         unsigned short height;
 164         unsigned short resize;  /* Sensor * 1024 / resize = Output */
 165         unsigned short scale;
 166         u8 bank;
 167 };
 168
 169 struct rj54n1_reg_val {
 170         u16 reg;
 171         u8 val;
 172 };
 173
 174 static const struct rj54n1_reg_val bank_4[] = {
 175         {0x417, 0},
 176         {0x42c, 0},
 177         {0x42d, 0xf0},
 178         {0x42e, 0},
 179         {0x42f, 0x50},
 180         {0x430, 0xf5},
 181         {0x431, 0x16},
 182         {0x432, 0x20},
 183         {0x433, 0},
 184         {0x434, 0xc8},
 185         {0x43c, 8},
 186         {0x43e, 0x90},
 187         {0x445, 0x83},
 188         {0x4ba, 0x58},
 189         {0x4bb, 4},
 190         {0x4bc, 0x20},
 191         {0x4db, 4},
 192         {0x4fe, 2},
 193 };
 194
 195 static const struct rj54n1_reg_val bank_5[] = {
 196         {0x514, 0},
 197         {0x516, 0},
 198         {0x518, 0},
 199         {0x51a, 0},
 200         {0x51d, 0xff},
 201         {0x56f, 0x28},
 202         {0x575, 0x40},
 203         {0x5bc, 0x48},
 204         {0x5c1, 6},
 205         {0x5e5, 0x11},
 206         {0x5e6, 0x43},
 207         {0x5e7, 0x33},
 208         {0x5e8, 0x21},
 209         {0x5e9, 0x30},
 210         {0x5ea, 0x0},
 211         {0x5eb, 0xa5},
 212         {0x5ec, 0xff},
 213         {0x5fe, 2},
 214 };
 215
 216 static const struct rj54n1_reg_val bank_7[] = {
 217         {0x70a, 0},
 218         {0x714, 0xff},
 219         {0x715, 0xff},
 220         {0x716, 0x1f},
 221         {0x7FE, 2},
 222 };
 223
 224 static const struct rj54n1_reg_val bank_8[] = {
 225         {0x800, 0x00},
 226         {0x801, 0x01},
 227         {0x802, 0x61},
 228         {0x805, 0x00},
 229         {0x806, 0x00},
 230         {0x807, 0x00},
 231         {0x808, 0x00},
 232         {0x809, 0x01},
 233         {0x80A, 0x61},
 234         {0x80B, 0x00},
 235         {0x80C, 0x01},
 236         {0x80D, 0x00},
 237         {0x80E, 0x00},
 238         {0x80F, 0x00},
 239         {0x810, 0x00},
 240         {0x811, 0x01},
 241         {0x812, 0x61},
 242         {0x813, 0x00},
 243         {0x814, 0x11},
 244         {0x815, 0x00},
 245         {0x816, 0x41},
 246         {0x817, 0x00},
 247         {0x818, 0x51},
 248         {0x819, 0x01},
 249         {0x81A, 0x1F},
 250         {0x81B, 0x00},
 251         {0x81C, 0x01},
 252         {0x81D, 0x00},
 253         {0x81E, 0x11},
 254         {0x81F, 0x00},
 255         {0x820, 0x41},
 256         {0x821, 0x00},
 257         {0x822, 0x51},
 258         {0x823, 0x00},
 259         {0x824, 0x00},
 260         {0x825, 0x00},
 261         {0x826, 0x47},
 262         {0x827, 0x01},
 263         {0x828, 0x4F},
 264         {0x829, 0x00},
 265         {0x82A, 0x00},
 266         {0x82B, 0x00},
 267         {0x82C, 0x30},
 268         {0x82D, 0x00},
 269         {0x82E, 0x40},
 270         {0x82F, 0x00},
 271         {0x830, 0xB3},
 272         {0x831, 0x00},
 273         {0x832, 0xE3},
 274         {0x833, 0x00},
 275         {0x834, 0x00},
 276         {0x835, 0x00},
 277         {0x836, 0x00},
 278         {0x837, 0x00},
 279         {0x838, 0x00},
 280         {0x839, 0x01},
 281         {0x83A, 0x61},
 282         {0x83B, 0x00},
 283         {0x83C, 0x01},
 284         {0x83D, 0x00},
 285         {0x83E, 0x00},
 286         {0x83F, 0x00},
 287         {0x840, 0x00},
 288         {0x841, 0x01},
 289         {0x842, 0x61},
 290         {0x843, 0x00},
 291         {0x844, 0x1D},
 292         {0x845, 0x00},
 293         {0x846, 0x00},
 294         {0x847, 0x00},
 295         {0x848, 0x00},
 296         {0x849, 0x01},
 297         {0x84A, 0x1F},
 298         {0x84B, 0x00},
 299         {0x84C, 0x05},
 300         {0x84D, 0x00},
 301         {0x84E, 0x19},
 302         {0x84F, 0x01},
 303         {0x850, 0x21},
 304         {0x851, 0x01},
 305         {0x852, 0x5D},
 306         {0x853, 0x00},
 307         {0x854, 0x00},
 308         {0x855, 0x00},
 309         {0x856, 0x19},
 310         {0x857, 0x01},
 311         {0x858, 0x21},
 312         {0x859, 0x00},
 313         {0x85A, 0x00},
 314         {0x85B, 0x00},
 315         {0x85C, 0x00},
 316         {0x85D, 0x00},
 317         {0x85E, 0x00},
 318         {0x85F, 0x00},
 319         {0x860, 0xB3},
 320         {0x861, 0x00},
 321         {0x862, 0xE3},
 322         {0x863, 0x00},
 323         {0x864, 0x00},
 324         {0x865, 0x00},
 325         {0x866, 0x00},
 326         {0x867, 0x00},
 327         {0x868, 0x00},
 328         {0x869, 0xE2},
 329         {0x86A, 0x00},
 330         {0x86B, 0x01},
 331         {0x86C, 0x06},
 332         {0x86D, 0x00},
 333         {0x86E, 0x00},
 334         {0x86F, 0x00},
 335         {0x870, 0x60},
 336         {0x871, 0x8C},
 337         {0x872, 0x10},
 338         {0x873, 0x00},
 339         {0x874, 0xE0},
 340         {0x875, 0x00},
 341         {0x876, 0x27},
 342         {0x877, 0x01},
 343         {0x878, 0x00},
 344         {0x879, 0x00},
 345         {0x87A, 0x00},
 346         {0x87B, 0x03},
 347         {0x87C, 0x00},
 348         {0x87D, 0x00},
 349         {0x87E, 0x00},
 350         {0x87F, 0x00},
 351         {0x880, 0x00},
 352         {0x881, 0x00},
 353         {0x882, 0x00},
 354         {0x883, 0x00},
 355         {0x884, 0x00},
 356         {0x885, 0x00},
 357         {0x886, 0xF8},
 358         {0x887, 0x00},
 359         {0x888, 0x03},
 360         {0x889, 0x00},
 361         {0x88A, 0x64},
 362         {0x88B, 0x00},
 363         {0x88C, 0x03},
 364         {0x88D, 0x00},
 365         {0x88E, 0xB1},
 366         {0x88F, 0x00},
 367         {0x890, 0x03},
 368         {0x891, 0x01},
 369         {0x892, 0x1D},
 370         {0x893, 0x00},
 371         {0x894, 0x03},
 372         {0x895, 0x01},
 373         {0x896, 0x4B},
 374         {0x897, 0x00},
 375         {0x898, 0xE5},
 376         {0x899, 0x00},
 377         {0x89A, 0x01},
 378         {0x89B, 0x00},
 379         {0x89C, 0x01},
 380         {0x89D, 0x04},
 381         {0x89E, 0xC8},
 382         {0x89F, 0x00},
 383         {0x8A0, 0x01},
 384         {0x8A1, 0x01},
 385         {0x8A2, 0x61},
 386         {0x8A3, 0x00},
 387         {0x8A4, 0x01},
 388         {0x8A5, 0x00},
 389         {0x8A6, 0x00},
 390         {0x8A7, 0x00},
 391         {0x8A8, 0x00},
 392         {0x8A9, 0x00},
 393         {0x8AA, 0x7F},
 394         {0x8AB, 0x03},
 395         {0x8AC, 0x00},
 396         {0x8AD, 0x00},
 397         {0x8AE, 0x00},
 398         {0x8AF, 0x00},
 399         {0x8B0, 0x00},
 400         {0x8B1, 0x00},
 401         {0x8B6, 0x00},
 402         {0x8B7, 0x01},
 403         {0x8B8, 0x00},
 404         {0x8B9, 0x00},
 405         {0x8BA, 0x02},
 406         {0x8BB, 0x00},
 407         {0x8BC, 0xFF},
 408         {0x8BD, 0x00},
 409         {0x8FE, 2},
 410 };
 411
 412 static const struct rj54n1_reg_val bank_10[] = {
 413         {0x10bf, 0x69}
 414 };
 415
 416 /* Clock dividers - these are default register values, divider = register + 1 */
 417 static const struct rj54n1_clock_div clk_div = {
 418         .ratio_tg       = 3 /* default: 5 */,
 419         .ratio_t        = 4 /* default: 1 */,
 420         .ratio_r        = 4 /* default: 0 */,
 421         .ratio_op       = 1 /* default: 5 */,
 422         .ratio_o        = 9 /* default: 0 */,
 423 };
 424
 425 static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
 426 {
 427         return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
 428 }
 429
 430 static int reg_read(struct i2c_client *client, const u16 reg)
 431 {
 432         struct rj54n1 *rj54n1 = to_rj54n1(client);
 433         int ret;
 434
 435         /* set bank */
 436         if (rj54n1->bank != reg >> 8) {
 437                 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
 438                 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
 439                 if (ret < 0)
 440                         return ret;
 441                 rj54n1->bank = reg >> 8;
 442         }
 443         return i2c_smbus_read_byte_data(client, reg & 0xff);
 444 }
 445
 446 static int reg_write(struct i2c_client *client, const u16 reg,
 447                      const u8 data)
 448 {
 449         struct rj54n1 *rj54n1 = to_rj54n1(client);
 450         int ret;
 451
 452         /* set bank */
 453         if (rj54n1->bank != reg >> 8) {
 454                 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
 455                 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
 456                 if (ret < 0)
 457                         return ret;
 458                 rj54n1->bank = reg >> 8;
 459         }
 460         dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
 461         return i2c_smbus_write_byte_data(client, reg & 0xff, data);
 462 }
 463
 464 static int reg_set(struct i2c_client *client, const u16 reg,
 465                    const u8 data, const u8 mask)
 466 {
 467         int ret;
 468
 469         ret = reg_read(client, reg);
 470         if (ret < 0)
 471                 return ret;
 472         return reg_write(client, reg, (ret & ~mask) | (data & mask));
 473 }
 474
 475 static int reg_write_multiple(struct i2c_client *client,
 476                               const struct rj54n1_reg_val *rv, const int n)
 477 {
 478         int i, ret;
 479
 480         for (i = 0; i < n; i++) {
 481                 ret = reg_write(client, rv->reg, rv->val);
 482                 if (ret < 0)
 483                         return ret;
 484                 rv++;
 485         }
 486
 487         return 0;
 488 }
 489
 490 static int rj54n1_enum_mbus_code(struct v4l2_subdev *sd,
 491                 struct v4l2_subdev_pad_config *cfg,
 492                 struct v4l2_subdev_mbus_code_enum *code)
 493 {
 494         if (code->pad || code->index >= ARRAY_SIZE(rj54n1_colour_fmts))
 495                 return -EINVAL;
 496
 497         code->code = rj54n1_colour_fmts[code->index].code;
 498         return 0;
 499 }
 500
 501 static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
 502 {
 503         struct i2c_client *client = v4l2_get_subdevdata(sd);
 504
 505         /* Switch between preview and still shot modes */
 506         return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
 507 }
 508
 509 static int rj54n1_set_rect(struct i2c_client *client,
 510                            u16 reg_x, u16 reg_y, u16 reg_xy,
 511                            u32 width, u32 height)
 512 {
 513         int ret;
 514
 515         ret = reg_write(client, reg_xy,
 516                         ((width >> 4) & 0x70) |
 517                         ((height >> 8) & 7));
 518
 519         if (!ret)
 520                 ret = reg_write(client, reg_x, width & 0xff);
 521         if (!ret)
 522                 ret = reg_write(client, reg_y, height & 0xff);
 523
 524         return ret;
 525 }
 526
 527 /*
 528  * Some commands, specifically certain initialisation sequences, require
 529  * a commit operation.
 530  */
 531 static int rj54n1_commit(struct i2c_client *client)
 532 {
 533         int ret = reg_write(client, RJ54N1_INIT_START, 1);
 534         msleep(10);
 535         if (!ret)
 536                 ret = reg_write(client, RJ54N1_INIT_START, 0);
 537         return ret;
 538 }
 539
 540 static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
 541                                s32 *out_w, s32 *out_h);
 542
 543 static int rj54n1_set_selection(struct v4l2_subdev *sd,
 544                                 struct v4l2_subdev_pad_config *cfg,
 545                                 struct v4l2_subdev_selection *sel)
 546 {
 547         struct i2c_client *client = v4l2_get_subdevdata(sd);
 548         struct rj54n1 *rj54n1 = to_rj54n1(client);
 549         const struct v4l2_rect *rect = &sel->r;
 550         int output_w, output_h, input_w = rect->width, input_h = rect->height;
 551         int ret;
 552
 553         if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
 554             sel->target != V4L2_SEL_TGT_CROP)
 555                 return -EINVAL;
 556
 557         /* arbitrary minimum width and height, edges unimportant */
 558         v4l_bound_align_image(&input_w, 8, RJ54N1_MAX_WIDTH, 0,
 559                               &input_h, 8, RJ54N1_MAX_HEIGHT, 0, 0);
 560
 561         output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
 562         output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
 563
 564         dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n",
 565                 input_w, input_h, rj54n1->resize, output_w, output_h);
 566
 567         ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
 568         if (ret < 0)
 569                 return ret;
 570
 571         rj54n1->width           = output_w;
 572         rj54n1->height          = output_h;
 573         rj54n1->resize          = ret;
 574         rj54n1->rect.width      = input_w;
 575         rj54n1->rect.height     = input_h;
 576
 577         return 0;
 578 }
 579
 580 static int rj54n1_get_selection(struct v4l2_subdev *sd,
 581                                 struct v4l2_subdev_pad_config *cfg,
 582                                 struct v4l2_subdev_selection *sel)
 583 {
 584         struct i2c_client *client = v4l2_get_subdevdata(sd);
 585         struct rj54n1 *rj54n1 = to_rj54n1(client);
 586
 587         if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
 588                 return -EINVAL;
 589
 590         switch (sel->target) {
 591         case V4L2_SEL_TGT_CROP_BOUNDS:
 592                 sel->r.left = RJ54N1_COLUMN_SKIP;
 593                 sel->r.top = RJ54N1_ROW_SKIP;
 594                 sel->r.width = RJ54N1_MAX_WIDTH;
 595                 sel->r.height = RJ54N1_MAX_HEIGHT;
 596                 return 0;
 597         case V4L2_SEL_TGT_CROP:
 598                 sel->r = rj54n1->rect;
 599                 return 0;
 600         default:
 601                 return -EINVAL;
 602         }
 603 }
 604
 605 static int rj54n1_get_fmt(struct v4l2_subdev *sd,
 606                 struct v4l2_subdev_pad_config *cfg,
 607                 struct v4l2_subdev_format *format)
 608 {
 609         struct v4l2_mbus_framefmt *mf = &format->format;
 610         struct i2c_client *client = v4l2_get_subdevdata(sd);
 611         struct rj54n1 *rj54n1 = to_rj54n1(client);
 612
 613         if (format->pad)
 614                 return -EINVAL;
 615
 616         mf->code        = rj54n1->fmt->code;
 617         mf->colorspace  = rj54n1->fmt->colorspace;
 618         mf->ycbcr_enc   = V4L2_YCBCR_ENC_601;
 619         mf->xfer_func   = V4L2_XFER_FUNC_SRGB;
 620         mf->quantization = V4L2_QUANTIZATION_DEFAULT;
 621         mf->field       = V4L2_FIELD_NONE;
 622         mf->width       = rj54n1->width;
 623         mf->height      = rj54n1->height;
 624
 625         return 0;
 626 }
 627
 628 /*
 629  * The actual geometry configuration routine. It scales the input window into
 630  * the output one, updates the window sizes and returns an error or the resize
 631  * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
 632  */
 633 static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
 634                                s32 *out_w, s32 *out_h)
 635 {
 636         struct i2c_client *client = v4l2_get_subdevdata(sd);
 637         struct rj54n1 *rj54n1 = to_rj54n1(client);
 638         unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
 639                 output_w = *out_w, output_h = *out_h;
 640         u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
 641         unsigned int peak, peak_50, peak_60;
 642         int ret;
 643
 644         /*
 645          * We have a problem with crops, where the window is larger than 512x384
 646          * and output window is larger than a half of the input one. In this
 647          * case we have to either reduce the input window to equal or below
 648          * 512x384 or the output window to equal or below 1/2 of the input.
 649          */
 650         if (output_w > max(512U, input_w / 2)) {
 651                 if (2 * output_w > RJ54N1_MAX_WIDTH) {
 652                         input_w = RJ54N1_MAX_WIDTH;
 653                         output_w = RJ54N1_MAX_WIDTH / 2;
 654                 } else {
 655                         input_w = output_w * 2;
 656                 }
 657
 658                 dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
 659                         input_w, output_w);
 660         }
 661
 662         if (output_h > max(384U, input_h / 2)) {
 663                 if (2 * output_h > RJ54N1_MAX_HEIGHT) {
 664                         input_h = RJ54N1_MAX_HEIGHT;
 665                         output_h = RJ54N1_MAX_HEIGHT / 2;
 666                 } else {
 667                         input_h = output_h * 2;
 668                 }
 669
 670                 dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
 671                         input_h, output_h);
 672         }
 673
 674         /* Idea: use the read mode for snapshots, handle separate geometries */
 675         ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
 676                               RJ54N1_Y_OUTPUT_SIZE_S_L,
 677                               RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
 678         if (!ret)
 679                 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
 680                               RJ54N1_Y_OUTPUT_SIZE_P_L,
 681                               RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
 682
 683         if (ret < 0)
 684                 return ret;
 685
 686         if (output_w > input_w && output_h > input_h) {
 687                 input_w = output_w;
 688                 input_h = output_h;
 689
 690                 resize = 1024;
 691         } else {
 692                 unsigned int resize_x, resize_y;
 693                 resize_x = (input_w * 1024 + output_w / 2) / output_w;
 694                 resize_y = (input_h * 1024 + output_h / 2) / output_h;
 695
 696                 /* We want max(resize_x, resize_y), check if it still fits */
 697                 if (resize_x > resize_y &&
 698                     (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
 699                         resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
 700                                 output_h;
 701                 else if (resize_y > resize_x &&
 702                          (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
 703                         resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
 704                                 output_w;
 705                 else
 706                         resize = max(resize_x, resize_y);
 707
 708                 /* Prohibited value ranges */
 709                 switch (resize) {
 710                 case 2040 ... 2047:
 711                         resize = 2039;
 712                         break;
 713                 case 4080 ... 4095:
 714                         resize = 4079;
 715                         break;
 716                 case 8160 ... 8191:
 717                         resize = 8159;
 718                         break;
 719                 case 16320 ... 16384:
 720                         resize = 16319;
 721                 }
 722         }
 723
 724         /* Set scaling */
 725         ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
 726         if (!ret)
 727                 ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
 728
 729         if (ret < 0)
 730                 return ret;
 731
 732         /*
 733          * Configure a skipping bitmask. The sensor will select a skipping value
 734          * among set bits automatically. This is very unclear in the datasheet
 735          * too. I was told, in this register one enables all skipping values,
 736          * that are required for a specific resize, and the camera selects
 737          * automatically, which ones to use. But it is unclear how to identify,
 738          * which cropping values are needed. Secondly, why don't we just set all
 739          * bits and let the camera choose? Would it increase processing time and
 740          * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
 741          * improve the image quality or stability for larger frames (see comment
 742          * above), but I didn't check the framerate.
 743          */
 744         skip = min(resize / 1024, 15U);
 745
 746         inc_sel = 1 << skip;
 747
 748         if (inc_sel <= 2)
 749                 inc_sel = 0xc;
 750         else if (resize & 1023 && skip < 15)
 751                 inc_sel |= 1 << (skip + 1);
 752
 753         ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
 754         if (!ret)
 755                 ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
 756
 757         if (!rj54n1->auto_wb) {
 758                 /* Auto white balance window */
 759                 wb_left   = output_w / 16;
 760                 wb_right  = (3 * output_w / 4 - 3) / 4;
 761                 wb_top    = output_h / 16;
 762                 wb_bottom = (3 * output_h / 4 - 3) / 4;
 763                 wb_bit8   = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
 764                         ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
 765
 766                 if (!ret)
 767                         ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
 768                 if (!ret)
 769                         ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
 770                 if (!ret)
 771                         ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
 772                 if (!ret)
 773                         ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
 774                 if (!ret)
 775                         ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
 776         }
 777
 778         /* Antiflicker */
 779         peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
 780                 10000;
 781         peak_50 = peak / 6;
 782         peak_60 = peak / 5;
 783
 784         if (!ret)
 785                 ret = reg_write(client, RJ54N1_PEAK_H,
 786                                 ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
 787         if (!ret)
 788                 ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
 789         if (!ret)
 790                 ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
 791         if (!ret)
 792                 ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
 793
 794         /* Start resizing */
 795         if (!ret)
 796                 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
 797                                 RESIZE_HOLD_SEL | RESIZE_GO | 1);
 798
 799         if (ret < 0)
 800                 return ret;
 801
 802         /* Constant taken from manufacturer's example */
 803         msleep(230);
 804
 805         ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
 806         if (ret < 0)
 807                 return ret;
 808
 809         *in_w = (output_w * resize + 512) / 1024;
 810         *in_h = (output_h * resize + 512) / 1024;
 811         *out_w = output_w;
 812         *out_h = output_h;
 813
 814         dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n",
 815                 *in_w, *in_h, resize, output_w, output_h, skip);
 816
 817         return resize;
 818 }
 819
 820 static int rj54n1_set_clock(struct i2c_client *client)
 821 {
 822         struct rj54n1 *rj54n1 = to_rj54n1(client);
 823         int ret;
 824
 825         /* Enable external clock */
 826         ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
 827         /* Leave stand-by. Note: use this when implementing suspend / resume */
 828         if (!ret)
 829                 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
 830
 831         if (!ret)
 832                 ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
 833         if (!ret)
 834                 ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
 835
 836         /* TGCLK dividers */
 837         if (!ret)
 838                 ret = reg_write(client, RJ54N1_RATIO_TG,
 839                                 rj54n1->clk_div.ratio_tg);
 840         if (!ret)
 841                 ret = reg_write(client, RJ54N1_RATIO_T,
 842                                 rj54n1->clk_div.ratio_t);
 843         if (!ret)
 844                 ret = reg_write(client, RJ54N1_RATIO_R,
 845                                 rj54n1->clk_div.ratio_r);
 846
 847         /* Enable TGCLK & RAMP */
 848         if (!ret)
 849                 ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
 850
 851         /* Disable clock output */
 852         if (!ret)
 853                 ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
 854
 855         /* Set divisors */
 856         if (!ret)
 857                 ret = reg_write(client, RJ54N1_RATIO_OP,
 858                                 rj54n1->clk_div.ratio_op);
 859         if (!ret)
 860                 ret = reg_write(client, RJ54N1_RATIO_O,
 861                                 rj54n1->clk_div.ratio_o);
 862
 863         /* Enable OCLK */
 864         if (!ret)
 865                 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
 866
 867         /* Use PLL for Timing Generator, write 2 to reserved bits */
 868         if (!ret)
 869                 ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
 870
 871         /* Take sensor out of reset */
 872         if (!ret)
 873                 ret = reg_write(client, RJ54N1_RESET_STANDBY,
 874                                 E_EXCLK | SEN_RSTX);
 875         /* Enable PLL */
 876         if (!ret)
 877                 ret = reg_write(client, RJ54N1_PLL_EN, 1);
 878
 879         /* Wait for PLL to stabilise */
 880         msleep(10);
 881
 882         /* Enable clock to frequency divider */
 883         if (!ret)
 884                 ret = reg_write(client, RJ54N1_CLK_RST, 1);
 885
 886         if (!ret)
 887                 ret = reg_read(client, RJ54N1_CLK_RST);
 888         if (ret != 1) {
 889                 dev_err(&client->dev,
 890                         "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
 891                 return -EIO;
 892         }
 893
 894         /* Start the PLL */
 895         ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
 896
 897         /* Enable OCLK */
 898         if (!ret)
 899                 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
 900
 901         return ret;
 902 }
 903
 904 static int rj54n1_reg_init(struct i2c_client *client)
 905 {
 906         struct rj54n1 *rj54n1 = to_rj54n1(client);
 907         int ret = rj54n1_set_clock(client);
 908
 909         if (!ret)
 910                 ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
 911         if (!ret)
 912                 ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
 913
 914         /* Set binning divisors */
 915         if (!ret)
 916                 ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
 917         if (!ret)
 918                 ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
 919
 920         /* Switch to fixed resize mode */
 921         if (!ret)
 922                 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
 923                                 RESIZE_HOLD_SEL | 1);
 924
 925         /* Set gain */
 926         if (!ret)
 927                 ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
 928
 929         /*
 930          * Mirror the image back: default is upside down and left-to-right...
 931          * Set manual preview / still shot switching
 932          */
 933         if (!ret)
 934                 ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
 935
 936         if (!ret)
 937                 ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
 938
 939         /* Auto exposure area */
 940         if (!ret)
 941                 ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
 942         /* Check current auto WB config */
 943         if (!ret)
 944                 ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
 945         if (ret >= 0) {
 946                 rj54n1->auto_wb = ret & 0x80;
 947                 ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
 948         }
 949         if (!ret)
 950                 ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
 951
 952         if (!ret)
 953                 ret = reg_write(client, RJ54N1_RESET_STANDBY,
 954                                 E_EXCLK | DSP_RSTX | SEN_RSTX);
 955
 956         /* Commit init */
 957         if (!ret)
 958                 ret = rj54n1_commit(client);
 959
 960         /* Take DSP, TG, sensor out of reset */
 961         if (!ret)
 962                 ret = reg_write(client, RJ54N1_RESET_STANDBY,
 963                                 E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
 964
 965         /* Start register update? Same register as 0x?FE in many bank_* sets */
 966         if (!ret)
 967                 ret = reg_write(client, RJ54N1_FWFLG, 2);
 968
 969         /* Constant taken from manufacturer's example */
 970         msleep(700);
 971
 972         return ret;
 973 }
 974
 975 static int rj54n1_set_fmt(struct v4l2_subdev *sd,
 976                 struct v4l2_subdev_pad_config *cfg,
 977                 struct v4l2_subdev_format *format)
 978 {
 979         struct v4l2_mbus_framefmt *mf = &format->format;
 980         struct i2c_client *client = v4l2_get_subdevdata(sd);
 981         struct rj54n1 *rj54n1 = to_rj54n1(client);
 982         const struct rj54n1_datafmt *fmt;
 983         int output_w, output_h, max_w, max_h,
 984                 input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
 985         int align = mf->code == MEDIA_BUS_FMT_SBGGR10_1X10 ||
 986                 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE ||
 987                 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE ||
 988                 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE ||
 989                 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE;
 990         int ret;
 991
 992         if (format->pad)
 993                 return -EINVAL;
 994
 995         dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
 996                 __func__, mf->code, mf->width, mf->height);
 997
 998         fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
 999                                   ARRAY_SIZE(rj54n1_colour_fmts));
1000         if (!fmt) {
1001                 fmt = rj54n1->fmt;
1002                 mf->code = fmt->code;
1003         }
1004
1005         mf->field       = V4L2_FIELD_NONE;
1006         mf->colorspace  = fmt->colorspace;
1007
1008         v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
1009                               &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
1010
1011         if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1012                 cfg->try_fmt = *mf;
1013                 return 0;
1014         }
1015
1016         /*
1017          * Verify if the sensor has just been powered on. TODO: replace this
1018          * with proper PM, when a suitable API is available.
1019          */
1020         ret = reg_read(client, RJ54N1_RESET_STANDBY);
1021         if (ret < 0)
1022                 return ret;
1023
1024         if (!(ret & E_EXCLK)) {
1025                 ret = rj54n1_reg_init(client);
1026                 if (ret < 0)
1027                         return ret;
1028         }
1029
1030         /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
1031         switch (mf->code) {
1032         case MEDIA_BUS_FMT_YUYV8_2X8:
1033                 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1034                 if (!ret)
1035                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1036                 break;
1037         case MEDIA_BUS_FMT_YVYU8_2X8:
1038                 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1039                 if (!ret)
1040                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1041                 break;
1042         case MEDIA_BUS_FMT_RGB565_2X8_LE:
1043                 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1044                 if (!ret)
1045                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1046                 break;
1047         case MEDIA_BUS_FMT_RGB565_2X8_BE:
1048                 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1049                 if (!ret)
1050                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1051                 break;
1052         case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE:
1053                 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1054                 if (!ret)
1055                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1056                 if (!ret)
1057                         ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1058                 break;
1059         case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE:
1060                 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1061                 if (!ret)
1062                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1063                 if (!ret)
1064                         ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1065                 break;
1066         case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE:
1067                 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1068                 if (!ret)
1069                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1070                 if (!ret)
1071                         ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1072                 break;
1073         case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
1074                 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1075                 if (!ret)
1076                         ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1077                 if (!ret)
1078                         ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1079                 break;
1080         case MEDIA_BUS_FMT_SBGGR10_1X10:
1081                 ret = reg_write(client, RJ54N1_OUT_SEL, 5);
1082                 break;
1083         default:
1084                 ret = -EINVAL;
1085         }
1086
1087         /* Special case: a raw mode with 10 bits of data per clock tick */
1088         if (!ret)
1089                 ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
1090                               (mf->code == MEDIA_BUS_FMT_SBGGR10_1X10) << 1, 2);
1091
1092         if (ret < 0)
1093                 return ret;
1094
1095         /* Supported scales 1:1 >= scale > 1:16 */
1096         max_w = mf->width * (16 * 1024 - 1) / 1024;
1097         if (input_w > max_w)
1098                 input_w = max_w;
1099         max_h = mf->height * (16 * 1024 - 1) / 1024;
1100         if (input_h > max_h)
1101                 input_h = max_h;
1102
1103         output_w = mf->width;
1104         output_h = mf->height;
1105
1106         ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
1107         if (ret < 0)
1108                 return ret;
1109
1110         fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
1111                                   ARRAY_SIZE(rj54n1_colour_fmts));
1112
1113         rj54n1->fmt             = fmt;
1114         rj54n1->resize          = ret;
1115         rj54n1->rect.width      = input_w;
1116         rj54n1->rect.height     = input_h;
1117         rj54n1->width           = output_w;
1118         rj54n1->height          = output_h;
1119
1120         mf->width               = output_w;
1121         mf->height              = output_h;
1122         mf->field               = V4L2_FIELD_NONE;
1123         mf->colorspace          = fmt->colorspace;
1124
1125         return 0;
1126 }
1127
1128 #ifdef CONFIG_VIDEO_ADV_DEBUG
1129 static int rj54n1_g_register(struct v4l2_subdev *sd,
1130                              struct v4l2_dbg_register *reg)
1131 {
1132         struct i2c_client *client = v4l2_get_subdevdata(sd);
1133
1134         if (reg->reg < 0x400 || reg->reg > 0x1fff)
1135                 /* Registers > 0x0800 are only available from Sharp support */
1136                 return -EINVAL;
1137
1138         reg->size = 1;
1139         reg->val = reg_read(client, reg->reg);
1140
1141         if (reg->val > 0xff)
1142                 return -EIO;
1143
1144         return 0;
1145 }
1146
1147 static int rj54n1_s_register(struct v4l2_subdev *sd,
1148                              const struct v4l2_dbg_register *reg)
1149 {
1150         struct i2c_client *client = v4l2_get_subdevdata(sd);
1151
1152         if (reg->reg < 0x400 || reg->reg > 0x1fff)
1153                 /* Registers >= 0x0800 are only available from Sharp support */
1154                 return -EINVAL;
1155
1156         if (reg_write(client, reg->reg, reg->val) < 0)
1157                 return -EIO;
1158
1159         return 0;
1160 }
1161 #endif
1162
1163 static int rj54n1_s_power(struct v4l2_subdev *sd, int on)
1164 {
1165         struct i2c_client *client = v4l2_get_subdevdata(sd);
1166         struct rj54n1 *rj54n1 = to_rj54n1(client);
1167
1168         if (on) {
1169                 if (rj54n1->pwup_gpio)
1170                         gpiod_set_value(rj54n1->pwup_gpio, 1);
1171                 if (rj54n1->enable_gpio)
1172                         gpiod_set_value(rj54n1->enable_gpio, 1);
1173
1174                 msleep(1);
1175
1176                 return clk_prepare_enable(rj54n1->clk);
1177         }
1178
1179         clk_disable_unprepare(rj54n1->clk);
1180
1181         if (rj54n1->enable_gpio)
1182                 gpiod_set_value(rj54n1->enable_gpio, 0);
1183         if (rj54n1->pwup_gpio)
1184                 gpiod_set_value(rj54n1->pwup_gpio, 0);
1185
1186         return 0;
1187 }
1188
1189 static int rj54n1_s_ctrl(struct v4l2_ctrl *ctrl)
1190 {
1191         struct rj54n1 *rj54n1 = container_of(ctrl->handler, struct rj54n1, hdl);
1192         struct v4l2_subdev *sd = &rj54n1->subdev;
1193         struct i2c_client *client = v4l2_get_subdevdata(sd);
1194         int data;
1195
1196         switch (ctrl->id) {
1197         case V4L2_CID_VFLIP:
1198                 if (ctrl->val)
1199                         data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
1200                 else
1201                         data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
1202                 if (data < 0)
1203                         return -EIO;
1204                 return 0;
1205         case V4L2_CID_HFLIP:
1206                 if (ctrl->val)
1207                         data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
1208                 else
1209                         data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
1210                 if (data < 0)
1211                         return -EIO;
1212                 return 0;
1213         case V4L2_CID_GAIN:
1214                 if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0)
1215                         return -EIO;
1216                 return 0;
1217         case V4L2_CID_AUTO_WHITE_BALANCE:
1218                 /* Auto WB area - whole image */
1219                 if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->val << 7,
1220                             0x80) < 0)
1221                         return -EIO;
1222                 rj54n1->auto_wb = ctrl->val;
1223                 return 0;
1224         }
1225
1226         return -EINVAL;
1227 }
1228
1229 static const struct v4l2_ctrl_ops rj54n1_ctrl_ops = {
1230         .s_ctrl = rj54n1_s_ctrl,
1231 };
1232
1233 static const struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
1234 #ifdef CONFIG_VIDEO_ADV_DEBUG
1235         .g_register     = rj54n1_g_register,
1236         .s_register     = rj54n1_s_register,
1237 #endif
1238         .s_power        = rj54n1_s_power,
1239 };
1240
1241 static const struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
1242         .s_stream       = rj54n1_s_stream,
1243 };
1244
1245 static const struct v4l2_subdev_pad_ops rj54n1_subdev_pad_ops = {
1246         .enum_mbus_code = rj54n1_enum_mbus_code,
1247         .get_selection  = rj54n1_get_selection,
1248         .set_selection  = rj54n1_set_selection,
1249         .get_fmt        = rj54n1_get_fmt,
1250         .set_fmt        = rj54n1_set_fmt,
1251 };
1252
1253 static const struct v4l2_subdev_ops rj54n1_subdev_ops = {
1254         .core   = &rj54n1_subdev_core_ops,
1255         .video  = &rj54n1_subdev_video_ops,
1256         .pad    = &rj54n1_subdev_pad_ops,
1257 };
1258
1259 /*
1260  * Interface active, can use i2c. If it fails, it can indeed mean, that
1261  * this wasn't our capture interface, so, we wait for the right one
1262  */
1263 static int rj54n1_video_probe(struct i2c_client *client,
1264                               struct rj54n1_pdata *priv)
1265 {
1266         struct rj54n1 *rj54n1 = to_rj54n1(client);
1267         int data1, data2;
1268         int ret;
1269
1270         ret = rj54n1_s_power(&rj54n1->subdev, 1);
1271         if (ret < 0)
1272                 return ret;
1273
1274         /* Read out the chip version register */
1275         data1 = reg_read(client, RJ54N1_DEV_CODE);
1276         data2 = reg_read(client, RJ54N1_DEV_CODE2);
1277
1278         if (data1 != 0x51 || data2 != 0x10) {
1279                 ret = -ENODEV;
1280                 dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
1281                          data1, data2);
1282                 goto done;
1283         }
1284
1285         /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
1286         ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
1287         if (ret < 0)
1288                 goto done;
1289
1290         dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
1291                  data1, data2);
1292
1293         ret = v4l2_ctrl_handler_setup(&rj54n1->hdl);
1294
1295 done:
1296         rj54n1_s_power(&rj54n1->subdev, 0);
1297         return ret;
1298 }
1299
1300 static int rj54n1_probe(struct i2c_client *client,
1301                         const struct i2c_device_id *did)
1302 {
1303         struct rj54n1 *rj54n1;
1304         struct i2c_adapter *adapter = client->adapter;
1305         struct rj54n1_pdata *rj54n1_priv;
1306         int ret;
1307
1308         if (!client->dev.platform_data) {
1309                 dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
1310                 return -EINVAL;
1311         }
1312
1313         rj54n1_priv = client->dev.platform_data;
1314
1315         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1316                 dev_warn(&adapter->dev,
1317                          "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1318                 return -EIO;
1319         }
1320
1321         rj54n1 = devm_kzalloc(&client->dev, sizeof(struct rj54n1), GFP_KERNEL);
1322         if (!rj54n1)
1323                 return -ENOMEM;
1324
1325         v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
1326         v4l2_ctrl_handler_init(&rj54n1->hdl, 4);
1327         v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1328                         V4L2_CID_VFLIP, 0, 1, 1, 0);
1329         v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1330                         V4L2_CID_HFLIP, 0, 1, 1, 0);
1331         v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1332                         V4L2_CID_GAIN, 0, 127, 1, 66);
1333         v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1334                         V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1335         rj54n1->subdev.ctrl_handler = &rj54n1->hdl;
1336         if (rj54n1->hdl.error)
1337                 return rj54n1->hdl.error;
1338
1339         rj54n1->clk_div         = clk_div;
1340         rj54n1->rect.left       = RJ54N1_COLUMN_SKIP;
1341         rj54n1->rect.top        = RJ54N1_ROW_SKIP;
1342         rj54n1->rect.width      = RJ54N1_MAX_WIDTH;
1343         rj54n1->rect.height     = RJ54N1_MAX_HEIGHT;
1344         rj54n1->width           = RJ54N1_MAX_WIDTH;
1345         rj54n1->height          = RJ54N1_MAX_HEIGHT;
1346         rj54n1->fmt             = &rj54n1_colour_fmts[0];
1347         rj54n1->resize          = 1024;
1348         rj54n1->tgclk_mhz       = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
1349                 (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
1350
1351         rj54n1->clk = clk_get(&client->dev, NULL);
1352         if (IS_ERR(rj54n1->clk)) {
1353                 ret = PTR_ERR(rj54n1->clk);
1354                 goto err_free_ctrl;
1355         }
1356
1357         rj54n1->pwup_gpio = gpiod_get_optional(&client->dev, "powerup",
1358                                                GPIOD_OUT_LOW);
1359         if (IS_ERR(rj54n1->pwup_gpio)) {
1360                 dev_info(&client->dev, "Unable to get GPIO \"powerup\": %ld\n",
1361                          PTR_ERR(rj54n1->pwup_gpio));
1362                 ret = PTR_ERR(rj54n1->pwup_gpio);
1363                 goto err_clk_put;
1364         }
1365
1366         rj54n1->enable_gpio = gpiod_get_optional(&client->dev, "enable",
1367                                                  GPIOD_OUT_LOW);
1368         if (IS_ERR(rj54n1->enable_gpio)) {
1369                 dev_info(&client->dev, "Unable to get GPIO \"enable\": %ld\n",
1370                          PTR_ERR(rj54n1->enable_gpio));
1371                 ret = PTR_ERR(rj54n1->enable_gpio);
1372                 goto err_gpio_put;
1373         }
1374
1375         ret = rj54n1_video_probe(client, rj54n1_priv);
1376         if (ret < 0)
1377                 goto err_gpio_put;
1378
1379         ret = v4l2_async_register_subdev(&rj54n1->subdev);
1380         if (ret)
1381                 goto err_gpio_put;
1382
1383         return 0;
1384
1385 err_gpio_put:
1386         if (rj54n1->enable_gpio)
1387                 gpiod_put(rj54n1->enable_gpio);
1388
1389         if (rj54n1->pwup_gpio)
1390                 gpiod_put(rj54n1->pwup_gpio);
1391
1392 err_clk_put:
1393         clk_put(rj54n1->clk);
1394
1395 err_free_ctrl:
1396         v4l2_ctrl_handler_free(&rj54n1->hdl);
1397
1398         return ret;
1399 }
1400
1401 static int rj54n1_remove(struct i2c_client *client)
1402 {
1403         struct rj54n1 *rj54n1 = to_rj54n1(client);
1404
1405         if (rj54n1->enable_gpio)
1406                 gpiod_put(rj54n1->enable_gpio);
1407         if (rj54n1->pwup_gpio)
1408                 gpiod_put(rj54n1->pwup_gpio);
1409
1410         clk_put(rj54n1->clk);
1411         v4l2_ctrl_handler_free(&rj54n1->hdl);
1412         v4l2_async_unregister_subdev(&rj54n1->subdev);
1413
1414         return 0;
1415 }
1416
1417 static const struct i2c_device_id rj54n1_id[] = {
1418         { "rj54n1cb0c", 0 },
1419         { }
1420 };
1421 MODULE_DEVICE_TABLE(i2c, rj54n1_id);
1422
1423 static struct i2c_driver rj54n1_i2c_driver = {
1424         .driver = {
1425                 .name = "rj54n1cb0c",
1426         },
1427         .probe          = rj54n1_probe,
1428         .remove         = rj54n1_remove,
1429         .id_table       = rj54n1_id,
1430 };
1431
1432 module_i2c_driver(rj54n1_i2c_driver);
1433
1434 MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
1435 MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
1436 MODULE_LICENSE("GPL v2");