drivers/media/dvb/frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
   5  *    Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net>
   6  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   7  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19  *    You should have received a copy of the GNU General Public License
  20  *    along with this program; if not, write to the Free Software
  21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23 */
  24
  25 /*(DEBLOBBED)*/
  26 #define CRC_CCIT_MASK 0x1021
  27
  28 #include <linux/kernel.h>
  29 #include <linux/init.h>
  30 #include <linux/module.h>
  31 #include <linux/slab.h>
  32 #include <linux/string.h>
  33
  34 #include "dvb_frontend.h"
  35 #include "nxt200x.h"
  36
  37 struct nxt200x_state {
  38
  39         struct i2c_adapter* i2c;
  40         const struct nxt200x_config* config;
  41         struct dvb_frontend frontend;
  42
  43         /* demodulator private data */
  44         nxt_chip_type demod_chip;
  45         u8 initialised:1;
  46 };
  47
  48 static int debug;
  49 #define dprintk(args...) \
  50         do { \
  51                 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
  52         } while (0)
  53
  54 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  55 {
  56         int err;
  57         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  58
  59         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  60                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
  61                         __func__, addr, err);
  62                 return -EREMOTEIO;
  63         }
  64         return 0;
  65 }
  66
  67 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
  68 {
  69         int err;
  70         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  71
  72         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  73                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
  74                         __func__, addr, err);
  75                 return -EREMOTEIO;
  76         }
  77         return 0;
  78 }
  79
  80 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
  81                                const u8 *buf, u8 len)
  82 {
  83         u8 buf2 [len+1];
  84         int err;
  85         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
  86
  87         buf2[0] = reg;
  88         memcpy(&buf2[1], buf, len);
  89
  90         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  91                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
  92                         __func__, state->config->demod_address, err);
  93                 return -EREMOTEIO;
  94         }
  95         return 0;
  96 }
  97
  98 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
  99 {
 100         u8 reg2 [] = { reg };
 101
 102         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 103                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 104
 105         int err;
 106
 107         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 108                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
 109                         __func__, state->config->demod_address, err);
 110                 return -EREMOTEIO;
 111         }
 112         return 0;
 113 }
 114
 115 static u16 nxt200x_crc(u16 crc, u8 c)
 116 {
 117         u8 i;
 118         u16 input = (u16) c & 0xFF;
 119
 120         input<<=8;
 121         for(i=0; i<8; i++) {
 122                 if((crc^input) & 0x8000)
 123                         crc=(crc<<1)^CRC_CCIT_MASK;
 124                 else
 125                         crc<<=1;
 126                 input<<=1;
 127         }
 128         return crc;
 129 }
 130
 131 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 132 {
 133         u8 attr, len2, buf;
 134         dprintk("%s\n", __func__);
 135
 136         /* set mutli register register */
 137         nxt200x_writebytes(state, 0x35, &reg, 1);
 138
 139         /* send the actual data */
 140         nxt200x_writebytes(state, 0x36, data, len);
 141
 142         switch (state->demod_chip) {
 143                 case NXT2002:
 144                         len2 = len;
 145                         buf = 0x02;
 146                         break;
 147                 case NXT2004:
 148                         /* probably not right, but gives correct values */
 149                         attr = 0x02;
 150                         if (reg & 0x80) {
 151                                 attr = attr << 1;
 152                                 if (reg & 0x04)
 153                                         attr = attr >> 1;
 154                         }
 155                         /* set write bit */
 156                         len2 = ((attr << 4) | 0x10) | len;
 157                         buf = 0x80;
 158                         break;
 159                 default:
 160                         return -EINVAL;
 161                         break;
 162         }
 163
 164         /* set multi register length */
 165         nxt200x_writebytes(state, 0x34, &len2, 1);
 166
 167         /* toggle the multireg write bit */
 168         nxt200x_writebytes(state, 0x21, &buf, 1);
 169
 170         nxt200x_readbytes(state, 0x21, &buf, 1);
 171
 172         switch (state->demod_chip) {
 173                 case NXT2002:
 174                         if ((buf & 0x02) == 0)
 175                                 return 0;
 176                         break;
 177                 case NXT2004:
 178                         if (buf == 0)
 179                                 return 0;
 180                         break;
 181                 default:
 182                         return -EINVAL;
 183                         break;
 184         }
 185
 186         printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
 187
 188         return 0;
 189 }
 190
 191 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 192 {
 193         int i;
 194         u8 buf, len2, attr;
 195         dprintk("%s\n", __func__);
 196
 197         /* set mutli register register */
 198         nxt200x_writebytes(state, 0x35, &reg, 1);
 199
 200         switch (state->demod_chip) {
 201                 case NXT2002:
 202                         /* set multi register length */
 203                         len2 = len & 0x80;
 204                         nxt200x_writebytes(state, 0x34, &len2, 1);
 205
 206                         /* read the actual data */
 207                         nxt200x_readbytes(state, reg, data, len);
 208                         return 0;
 209                         break;
 210                 case NXT2004:
 211                         /* probably not right, but gives correct values */
 212                         attr = 0x02;
 213                         if (reg & 0x80) {
 214                                 attr = attr << 1;
 215                                 if (reg & 0x04)
 216                                         attr = attr >> 1;
 217                         }
 218
 219                         /* set multi register length */
 220                         len2 = (attr << 4) | len;
 221                         nxt200x_writebytes(state, 0x34, &len2, 1);
 222
 223                         /* toggle the multireg bit*/
 224                         buf = 0x80;
 225                         nxt200x_writebytes(state, 0x21, &buf, 1);
 226
 227                         /* read the actual data */
 228                         for(i = 0; i < len; i++) {
 229                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 230                         }
 231                         return 0;
 232                         break;
 233                 default:
 234                         return -EINVAL;
 235                         break;
 236         }
 237 }
 238
 239 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 240 {
 241         u8 buf, stopval, counter = 0;
 242         dprintk("%s\n", __func__);
 243
 244         /* set correct stop value */
 245         switch (state->demod_chip) {
 246                 case NXT2002:
 247                         stopval = 0x40;
 248                         break;
 249                 case NXT2004:
 250                         stopval = 0x10;
 251                         break;
 252                 default:
 253                         stopval = 0;
 254                         break;
 255         }
 256
 257         buf = 0x80;
 258         nxt200x_writebytes(state, 0x22, &buf, 1);
 259
 260         while (counter < 20) {
 261                 nxt200x_readbytes(state, 0x31, &buf, 1);
 262                 if (buf & stopval)
 263                         return;
 264                 msleep(10);
 265                 counter++;
 266         }
 267
 268         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 269         return;
 270 }
 271
 272 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 273 {
 274         u8 buf;
 275         dprintk("%s\n", __func__);
 276
 277         buf = 0x00;
 278         nxt200x_writebytes(state, 0x22, &buf, 1);
 279 }
 280
 281 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 282 {
 283         u8 buf[9];
 284         u8 counter = 0;
 285         dprintk("%s\n", __func__);
 286
 287         buf[0] = 0x00;
 288         nxt200x_writebytes(state, 0x2b, buf, 1);
 289         buf[0] = 0x70;
 290         nxt200x_writebytes(state, 0x34, buf, 1);
 291         buf[0] = 0x04;
 292         nxt200x_writebytes(state, 0x35, buf, 1);
 293         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 294         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 295         nxt200x_writebytes(state, 0x36, buf, 9);
 296         buf[0] = 0x80;
 297         nxt200x_writebytes(state, 0x21, buf, 1);
 298
 299         while (counter < 20) {
 300                 nxt200x_readbytes(state, 0x21, buf, 1);
 301                 if (buf[0] == 0)
 302                         return;
 303                 msleep(10);
 304                 counter++;
 305         }
 306
 307         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
 308
 309         return;
 310 }
 311
 312 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 313 {
 314         u8 buf, count = 0;
 315
 316         dprintk("%s\n", __func__);
 317
 318         dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[1], data[2], data[3], data[4]);
 319
 320         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 321          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 322         switch (state->demod_chip) {
 323                 case NXT2004:
 324                         if (i2c_writebytes(state, data[0], data+1, 4))
 325                                 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
 326                         /* wait until we have a lock */
 327                         while (count < 20) {
 328                                 i2c_readbytes(state, data[0], &buf, 1);
 329                                 if (buf & 0x40)
 330                                         return 0;
 331                                 msleep(100);
 332                                 count++;
 333                         }
 334                         printk("nxt2004: timeout waiting for tuner lock\n");
 335                         break;
 336                 case NXT2002:
 337                         /* set the i2c transfer speed to the tuner */
 338                         buf = 0x03;
 339                         nxt200x_writebytes(state, 0x20, &buf, 1);
 340
 341                         /* setup to transfer 4 bytes via i2c */
 342                         buf = 0x04;
 343                         nxt200x_writebytes(state, 0x34, &buf, 1);
 344
 345                         /* write actual tuner bytes */
 346                         nxt200x_writebytes(state, 0x36, data+1, 4);
 347
 348                         /* set tuner i2c address */
 349                         buf = data[0] << 1;
 350                         nxt200x_writebytes(state, 0x35, &buf, 1);
 351
 352                         /* write UC Opmode to begin transfer */
 353                         buf = 0x80;
 354                         nxt200x_writebytes(state, 0x21, &buf, 1);
 355
 356                         while (count < 20) {
 357                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 358                                 if ((buf & 0x80)== 0x00)
 359                                         return 0;
 360                                 msleep(100);
 361                                 count++;
 362                         }
 363                         printk("nxt2002: timeout error writing tuner\n");
 364                         break;
 365                 default:
 366                         return -EINVAL;
 367                         break;
 368         }
 369         return 0;
 370 }
 371
 372 static void nxt200x_agc_reset(struct nxt200x_state* state)
 373 {
 374         u8 buf;
 375         dprintk("%s\n", __func__);
 376
 377         switch (state->demod_chip) {
 378                 case NXT2002:
 379                         buf = 0x08;
 380                         nxt200x_writebytes(state, 0x08, &buf, 1);
 381                         buf = 0x00;
 382                         nxt200x_writebytes(state, 0x08, &buf, 1);
 383                         break;
 384                 case NXT2004:
 385                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 386                         buf = 0x08;
 387                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 388                         buf = 0x00;
 389                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 390                         break;
 391                 default:
 392                         break;
 393         }
 394         return;
 395 }
 396
 397 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 398 {
 399
 400         struct nxt200x_state* state = fe->demodulator_priv;
 401         u8 buf[3], written = 0, chunkpos = 0;
 402         u16 rambase, position, crc = 0;
 403
 404         dprintk("%s\n", __func__);
 405         dprintk("Firmware is %zu bytes\n", fw->size);
 406
 407         /* Get the RAM base for this nxt2002 */
 408         nxt200x_readbytes(state, 0x10, buf, 1);
 409
 410         if (buf[0] & 0x10)
 411                 rambase = 0x1000;
 412         else
 413                 rambase = 0x0000;
 414
 415         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 416
 417         /* Hold the micro in reset while loading firmware */
 418         buf[0] = 0x80;
 419         nxt200x_writebytes(state, 0x2B, buf, 1);
 420
 421         for (position = 0; position < fw->size; position++) {
 422                 if (written == 0) {
 423                         crc = 0;
 424                         chunkpos = 0x28;
 425                         buf[0] = ((rambase + position) >> 8);
 426                         buf[1] = (rambase + position) & 0xFF;
 427                         buf[2] = 0x81;
 428                         /* write starting address */
 429                         nxt200x_writebytes(state, 0x29, buf, 3);
 430                 }
 431                 written++;
 432                 chunkpos++;
 433
 434                 if ((written % 4) == 0)
 435                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 436
 437                 crc = nxt200x_crc(crc, fw->data[position]);
 438
 439                 if ((written == 255) || (position+1 == fw->size)) {
 440                         /* write remaining bytes of firmware */
 441                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 442                                 &fw->data[position-(written %4) + 1],
 443                                 written %4);
 444                         buf[0] = crc << 8;
 445                         buf[1] = crc & 0xFF;
 446
 447                         /* write crc */
 448                         nxt200x_writebytes(state, 0x2C, buf, 2);
 449
 450                         /* do a read to stop things */
 451                         nxt200x_readbytes(state, 0x2A, buf, 1);
 452
 453                         /* set transfer mode to complete */
 454                         buf[0] = 0x80;
 455                         nxt200x_writebytes(state, 0x2B, buf, 1);
 456
 457                         written = 0;
 458                 }
 459         }
 460
 461         return 0;
 462 };
 463
 464 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 465 {
 466
 467         struct nxt200x_state* state = fe->demodulator_priv;
 468         u8 buf[3];
 469         u16 rambase, position, crc=0;
 470
 471         dprintk("%s\n", __func__);
 472         dprintk("Firmware is %zu bytes\n", fw->size);
 473
 474         /* set rambase */
 475         rambase = 0x1000;
 476
 477         /* hold the micro in reset while loading firmware */
 478         buf[0] = 0x80;
 479         nxt200x_writebytes(state, 0x2B, buf,1);
 480
 481         /* calculate firmware CRC */
 482         for (position = 0; position < fw->size; position++) {
 483                 crc = nxt200x_crc(crc, fw->data[position]);
 484         }
 485
 486         buf[0] = rambase >> 8;
 487         buf[1] = rambase & 0xFF;
 488         buf[2] = 0x81;
 489         /* write starting address */
 490         nxt200x_writebytes(state,0x29,buf,3);
 491
 492         for (position = 0; position < fw->size;) {
 493                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 494                         fw->size-position > 255 ? 255 : fw->size-position);
 495                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 496         }
 497         buf[0] = crc >> 8;
 498         buf[1] = crc & 0xFF;
 499
 500         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 501
 502         /* write crc */
 503         nxt200x_writebytes(state, 0x2C, buf,2);
 504
 505         /* do a read to stop things */
 506         nxt200x_readbytes(state, 0x2C, buf, 1);
 507
 508         /* set transfer mode to complete */
 509         buf[0] = 0x80;
 510         nxt200x_writebytes(state, 0x2B, buf,1);
 511
 512         return 0;
 513 };
 514
 515 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
 516 {
 517         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 518         struct nxt200x_state* state = fe->demodulator_priv;
 519         u8 buf[5];
 520
 521         /* stop the micro first */
 522         nxt200x_microcontroller_stop(state);
 523
 524         if (state->demod_chip == NXT2004) {
 525                 /* make sure demod is set to digital */
 526                 buf[0] = 0x04;
 527                 nxt200x_writebytes(state, 0x14, buf, 1);
 528                 buf[0] = 0x00;
 529                 nxt200x_writebytes(state, 0x17, buf, 1);
 530         }
 531
 532         /* set additional params */
 533         switch (p->modulation) {
 534                 case QAM_64:
 535                 case QAM_256:
 536                         /* Set punctured clock for QAM */
 537                         /* This is just a guess since I am unable to test it */
 538                         if (state->config->set_ts_params)
 539                                 state->config->set_ts_params(fe, 1);
 540                         break;
 541                 case VSB_8:
 542                         /* Set non-punctured clock for VSB */
 543                         if (state->config->set_ts_params)
 544                                 state->config->set_ts_params(fe, 0);
 545                         break;
 546                 default:
 547                         return -EINVAL;
 548                         break;
 549         }
 550
 551         if (fe->ops.tuner_ops.calc_regs) {
 552                 /* get tuning information */
 553                 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
 554
 555                 /* write frequency information */
 556                 nxt200x_writetuner(state, buf);
 557         }
 558
 559         /* reset the agc now that tuning has been completed */
 560         nxt200x_agc_reset(state);
 561
 562         /* set target power level */
 563         switch (p->modulation) {
 564                 case QAM_64:
 565                 case QAM_256:
 566                         buf[0] = 0x74;
 567                         break;
 568                 case VSB_8:
 569                         buf[0] = 0x70;
 570                         break;
 571                 default:
 572                         return -EINVAL;
 573                         break;
 574         }
 575         nxt200x_writebytes(state, 0x42, buf, 1);
 576
 577         /* configure sdm */
 578         switch (state->demod_chip) {
 579                 case NXT2002:
 580                         buf[0] = 0x87;
 581                         break;
 582                 case NXT2004:
 583                         buf[0] = 0x07;
 584                         break;
 585                 default:
 586                         return -EINVAL;
 587                         break;
 588         }
 589         nxt200x_writebytes(state, 0x57, buf, 1);
 590
 591         /* write sdm1 input */
 592         buf[0] = 0x10;
 593         buf[1] = 0x00;
 594         switch (state->demod_chip) {
 595                 case NXT2002:
 596                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
 597                         break;
 598                 case NXT2004:
 599                         nxt200x_writebytes(state, 0x58, buf, 2);
 600                         break;
 601                 default:
 602                         return -EINVAL;
 603                         break;
 604         }
 605
 606         /* write sdmx input */
 607         switch (p->modulation) {
 608                 case QAM_64:
 609                                 buf[0] = 0x68;
 610                                 break;
 611                 case QAM_256:
 612                                 buf[0] = 0x64;
 613                                 break;
 614                 case VSB_8:
 615                                 buf[0] = 0x60;
 616                                 break;
 617                 default:
 618                                 return -EINVAL;
 619                                 break;
 620         }
 621         buf[1] = 0x00;
 622         switch (state->demod_chip) {
 623                 case NXT2002:
 624                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
 625                         break;
 626                 case NXT2004:
 627                         nxt200x_writebytes(state, 0x5C, buf, 2);
 628                         break;
 629                 default:
 630                         return -EINVAL;
 631                         break;
 632         }
 633
 634         /* write adc power lpf fc */
 635         buf[0] = 0x05;
 636         nxt200x_writebytes(state, 0x43, buf, 1);
 637
 638         if (state->demod_chip == NXT2004) {
 639                 /* write ??? */
 640                 buf[0] = 0x00;
 641                 buf[1] = 0x00;
 642                 nxt200x_writebytes(state, 0x46, buf, 2);
 643         }
 644
 645         /* write accumulator2 input */
 646         buf[0] = 0x80;
 647         buf[1] = 0x00;
 648         switch (state->demod_chip) {
 649                 case NXT2002:
 650                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 651                         break;
 652                 case NXT2004:
 653                         nxt200x_writebytes(state, 0x4B, buf, 2);
 654                         break;
 655                 default:
 656                         return -EINVAL;
 657                         break;
 658         }
 659
 660         /* write kg1 */
 661         buf[0] = 0x00;
 662         nxt200x_writebytes(state, 0x4D, buf, 1);
 663
 664         /* write sdm12 lpf fc */
 665         buf[0] = 0x44;
 666         nxt200x_writebytes(state, 0x55, buf, 1);
 667
 668         /* write agc control reg */
 669         buf[0] = 0x04;
 670         nxt200x_writebytes(state, 0x41, buf, 1);
 671
 672         if (state->demod_chip == NXT2004) {
 673                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 674                 buf[0] = 0x24;
 675                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 676
 677                 /* soft reset? */
 678                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 679                 buf[0] = 0x10;
 680                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 681                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 682                 buf[0] = 0x00;
 683                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 684
 685                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 686                 buf[0] = 0x04;
 687                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 688                 buf[0] = 0x00;
 689                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 690                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 691                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 692                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 693                 buf[0] = 0x11;
 694                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 695                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 696                 buf[0] = 0x44;
 697                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 698         }
 699
 700         /* write agc ucgp0 */
 701         switch (p->modulation) {
 702                 case QAM_64:
 703                                 buf[0] = 0x02;
 704                                 break;
 705                 case QAM_256:
 706                                 buf[0] = 0x03;
 707                                 break;
 708                 case VSB_8:
 709                                 buf[0] = 0x00;
 710                                 break;
 711                 default:
 712                                 return -EINVAL;
 713                                 break;
 714         }
 715         nxt200x_writebytes(state, 0x30, buf, 1);
 716
 717         /* write agc control reg */
 718         buf[0] = 0x00;
 719         nxt200x_writebytes(state, 0x41, buf, 1);
 720
 721         /* write accumulator2 input */
 722         buf[0] = 0x80;
 723         buf[1] = 0x00;
 724         switch (state->demod_chip) {
 725                 case NXT2002:
 726                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
 727                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 728                         break;
 729                 case NXT2004:
 730                         nxt200x_writebytes(state, 0x49, buf, 2);
 731                         nxt200x_writebytes(state, 0x4B, buf, 2);
 732                         break;
 733                 default:
 734                         return -EINVAL;
 735                         break;
 736         }
 737
 738         /* write agc control reg */
 739         buf[0] = 0x04;
 740         nxt200x_writebytes(state, 0x41, buf, 1);
 741
 742         nxt200x_microcontroller_start(state);
 743
 744         if (state->demod_chip == NXT2004) {
 745                 nxt2004_microcontroller_init(state);
 746
 747                 /* ???? */
 748                 buf[0] = 0xF0;
 749                 buf[1] = 0x00;
 750                 nxt200x_writebytes(state, 0x5C, buf, 2);
 751         }
 752
 753         /* adjacent channel detection should be done here, but I don't
 754         have any stations with this need so I cannot test it */
 755
 756         return 0;
 757 }
 758
 759 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 760 {
 761         struct nxt200x_state* state = fe->demodulator_priv;
 762         u8 lock;
 763         nxt200x_readbytes(state, 0x31, &lock, 1);
 764
 765         *status = 0;
 766         if (lock & 0x20) {
 767                 *status |= FE_HAS_SIGNAL;
 768                 *status |= FE_HAS_CARRIER;
 769                 *status |= FE_HAS_VITERBI;
 770                 *status |= FE_HAS_SYNC;
 771                 *status |= FE_HAS_LOCK;
 772         }
 773         return 0;
 774 }
 775
 776 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 777 {
 778         struct nxt200x_state* state = fe->demodulator_priv;
 779         u8 b[3];
 780
 781         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 782
 783         *ber = ((b[0] << 8) + b[1]) * 8;
 784
 785         return 0;
 786 }
 787
 788 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 789 {
 790         struct nxt200x_state* state = fe->demodulator_priv;
 791         u8 b[2];
 792         u16 temp = 0;
 793
 794         /* setup to read cluster variance */
 795         b[0] = 0x00;
 796         nxt200x_writebytes(state, 0xA1, b, 1);
 797
 798         /* get multreg val */
 799         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 800
 801         temp = (b[0] << 8) | b[1];
 802         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 803
 804         return 0;
 805 }
 806
 807 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 808 {
 809
 810         struct nxt200x_state* state = fe->demodulator_priv;
 811         u8 b[2];
 812         u16 temp = 0, temp2;
 813         u32 snrdb = 0;
 814
 815         /* setup to read cluster variance */
 816         b[0] = 0x00;
 817         nxt200x_writebytes(state, 0xA1, b, 1);
 818
 819         /* get multreg val from 0xA6 */
 820         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 821
 822         temp = (b[0] << 8) | b[1];
 823         temp2 = 0x7FFF - temp;
 824
 825         /* snr will be in db */
 826         if (temp2 > 0x7F00)
 827                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 828         else if (temp2 > 0x7EC0)
 829                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 830         else if (temp2 > 0x7C00)
 831                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 832         else
 833                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 834
 835         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 836         *snr = snrdb * (0xFFFF/32000);
 837
 838         return 0;
 839 }
 840
 841 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 842 {
 843         struct nxt200x_state* state = fe->demodulator_priv;
 844         u8 b[3];
 845
 846         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 847         *ucblocks = b[2];
 848
 849         return 0;
 850 }
 851
 852 static int nxt200x_sleep(struct dvb_frontend* fe)
 853 {
 854         return 0;
 855 }
 856
 857 static int nxt2002_init(struct dvb_frontend* fe)
 858 {
 859         struct nxt200x_state* state = fe->demodulator_priv;
 860         const struct firmware *fw;
 861         int ret;
 862         u8 buf[2];
 863
 864         /* request the firmware, this will block until someone uploads it */
 865         printk("nxt2002: Waiting for firmware upload (%s)...\n", "/*(DEBLOBBED)*/");
 866         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 867                                state->i2c->dev.parent);
 868         printk("nxt2002: Waiting for firmware upload(2)...\n");
 869         if (ret) {
 870                 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
 871                 return ret;
 872         }
 873
 874         ret = nxt2002_load_firmware(fe, fw);
 875         release_firmware(fw);
 876         if (ret) {
 877                 printk("nxt2002: Writing firmware to device failed\n");
 878                 return ret;
 879         }
 880         printk("nxt2002: Firmware upload complete\n");
 881
 882         /* Put the micro into reset */
 883         nxt200x_microcontroller_stop(state);
 884
 885         /* ensure transfer is complete */
 886         buf[0]=0x00;
 887         nxt200x_writebytes(state, 0x2B, buf, 1);
 888
 889         /* Put the micro into reset for real this time */
 890         nxt200x_microcontroller_stop(state);
 891
 892         /* soft reset everything (agc,frontend,eq,fec)*/
 893         buf[0] = 0x0F;
 894         nxt200x_writebytes(state, 0x08, buf, 1);
 895         buf[0] = 0x00;
 896         nxt200x_writebytes(state, 0x08, buf, 1);
 897
 898         /* write agc sdm configure */
 899         buf[0] = 0xF1;
 900         nxt200x_writebytes(state, 0x57, buf, 1);
 901
 902         /* write mod output format */
 903         buf[0] = 0x20;
 904         nxt200x_writebytes(state, 0x09, buf, 1);
 905
 906         /* write fec mpeg mode */
 907         buf[0] = 0x7E;
 908         buf[1] = 0x00;
 909         nxt200x_writebytes(state, 0xE9, buf, 2);
 910
 911         /* write mux selection */
 912         buf[0] = 0x00;
 913         nxt200x_writebytes(state, 0xCC, buf, 1);
 914
 915         return 0;
 916 }
 917
 918 static int nxt2004_init(struct dvb_frontend* fe)
 919 {
 920         struct nxt200x_state* state = fe->demodulator_priv;
 921         const struct firmware *fw;
 922         int ret;
 923         u8 buf[3];
 924
 925         /* ??? */
 926         buf[0]=0x00;
 927         nxt200x_writebytes(state, 0x1E, buf, 1);
 928
 929         /* request the firmware, this will block until someone uploads it */
 930         printk("nxt2004: Waiting for firmware upload (%s)...\n", "/*(DEBLOBBED)*/");
 931         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 932                                state->i2c->dev.parent);
 933         printk("nxt2004: Waiting for firmware upload(2)...\n");
 934         if (ret) {
 935                 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
 936                 return ret;
 937         }
 938
 939         ret = nxt2004_load_firmware(fe, fw);
 940         release_firmware(fw);
 941         if (ret) {
 942                 printk("nxt2004: Writing firmware to device failed\n");
 943                 return ret;
 944         }
 945         printk("nxt2004: Firmware upload complete\n");
 946
 947         /* ensure transfer is complete */
 948         buf[0] = 0x01;
 949         nxt200x_writebytes(state, 0x19, buf, 1);
 950
 951         nxt2004_microcontroller_init(state);
 952         nxt200x_microcontroller_stop(state);
 953         nxt200x_microcontroller_stop(state);
 954         nxt2004_microcontroller_init(state);
 955         nxt200x_microcontroller_stop(state);
 956
 957         /* soft reset everything (agc,frontend,eq,fec)*/
 958         buf[0] = 0xFF;
 959         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 960         buf[0] = 0x00;
 961         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 962
 963         /* write agc sdm configure */
 964         buf[0] = 0xD7;
 965         nxt200x_writebytes(state, 0x57, buf, 1);
 966
 967         /* ???*/
 968         buf[0] = 0x07;
 969         buf[1] = 0xfe;
 970         nxt200x_writebytes(state, 0x35, buf, 2);
 971         buf[0] = 0x12;
 972         nxt200x_writebytes(state, 0x34, buf, 1);
 973         buf[0] = 0x80;
 974         nxt200x_writebytes(state, 0x21, buf, 1);
 975
 976         /* ???*/
 977         buf[0] = 0x21;
 978         nxt200x_writebytes(state, 0x0A, buf, 1);
 979
 980         /* ???*/
 981         buf[0] = 0x01;
 982         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 983
 984         /* write fec mpeg mode */
 985         buf[0] = 0x7E;
 986         buf[1] = 0x00;
 987         nxt200x_writebytes(state, 0xE9, buf, 2);
 988
 989         /* write mux selection */
 990         buf[0] = 0x00;
 991         nxt200x_writebytes(state, 0xCC, buf, 1);
 992
 993         /* ???*/
 994         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 995         buf[0] = 0x00;
 996         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 997
 998         /* soft reset? */
 999         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1000         buf[0] = 0x10;
1001         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1002         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1003         buf[0] = 0x00;
1004         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1005
1006         /* ???*/
1007         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1008         buf[0] = 0x01;
1009         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1010         buf[0] = 0x70;
1011         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1012         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1013         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1014
1015         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1016         buf[0] = 0x11;
1017         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1018         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1019         buf[0] = 0x40;
1020         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1021
1022         nxt200x_readbytes(state, 0x10, buf, 1);
1023         buf[0] = 0x10;
1024         nxt200x_writebytes(state, 0x10, buf, 1);
1025         nxt200x_readbytes(state, 0x0A, buf, 1);
1026         buf[0] = 0x21;
1027         nxt200x_writebytes(state, 0x0A, buf, 1);
1028
1029         nxt2004_microcontroller_init(state);
1030
1031         buf[0] = 0x21;
1032         nxt200x_writebytes(state, 0x0A, buf, 1);
1033         buf[0] = 0x7E;
1034         nxt200x_writebytes(state, 0xE9, buf, 1);
1035         buf[0] = 0x00;
1036         nxt200x_writebytes(state, 0xEA, buf, 1);
1037
1038         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1039         buf[0] = 0x00;
1040         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1041         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1042         buf[0] = 0x00;
1043         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1044
1045         /* soft reset? */
1046         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1047         buf[0] = 0x10;
1048         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1049         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1050         buf[0] = 0x00;
1051         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1052
1053         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1054         buf[0] = 0x04;
1055         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1056         buf[0] = 0x00;
1057         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1058         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1059         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1060
1061         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1062         buf[0] = 0x11;
1063         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1064
1065         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1066         buf[0] = 0x44;
1067         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1068
1069         /* initialize tuner */
1070         nxt200x_readbytes(state, 0x10, buf, 1);
1071         buf[0] = 0x12;
1072         nxt200x_writebytes(state, 0x10, buf, 1);
1073         buf[0] = 0x04;
1074         nxt200x_writebytes(state, 0x13, buf, 1);
1075         buf[0] = 0x00;
1076         nxt200x_writebytes(state, 0x16, buf, 1);
1077         buf[0] = 0x04;
1078         nxt200x_writebytes(state, 0x14, buf, 1);
1079         buf[0] = 0x00;
1080         nxt200x_writebytes(state, 0x14, buf, 1);
1081         nxt200x_writebytes(state, 0x17, buf, 1);
1082         nxt200x_writebytes(state, 0x14, buf, 1);
1083         nxt200x_writebytes(state, 0x17, buf, 1);
1084
1085         return 0;
1086 }
1087
1088 static int nxt200x_init(struct dvb_frontend* fe)
1089 {
1090         struct nxt200x_state* state = fe->demodulator_priv;
1091         int ret = 0;
1092
1093         if (!state->initialised) {
1094                 switch (state->demod_chip) {
1095                         case NXT2002:
1096                                 ret = nxt2002_init(fe);
1097                                 break;
1098                         case NXT2004:
1099                                 ret = nxt2004_init(fe);
1100                                 break;
1101                         default:
1102                                 return -EINVAL;
1103                                 break;
1104                 }
1105                 state->initialised = 1;
1106         }
1107         return ret;
1108 }
1109
1110 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1111 {
1112         fesettings->min_delay_ms = 500;
1113         fesettings->step_size = 0;
1114         fesettings->max_drift = 0;
1115         return 0;
1116 }
1117
1118 static void nxt200x_release(struct dvb_frontend* fe)
1119 {
1120         struct nxt200x_state* state = fe->demodulator_priv;
1121         kfree(state);
1122 }
1123
1124 static struct dvb_frontend_ops nxt200x_ops;
1125
1126 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1127                                    struct i2c_adapter* i2c)
1128 {
1129         struct nxt200x_state* state = NULL;
1130         u8 buf [] = {0,0,0,0,0};
1131
1132         /* allocate memory for the internal state */
1133         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1134         if (state == NULL)
1135                 goto error;
1136
1137         /* setup the state */
1138         state->config = config;
1139         state->i2c = i2c;
1140         state->initialised = 0;
1141
1142         /* read card id */
1143         nxt200x_readbytes(state, 0x00, buf, 5);
1144         dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1145                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1146
1147         /* set demod chip */
1148         switch (buf[0]) {
1149                 case 0x04:
1150                         state->demod_chip = NXT2002;
1151                         printk("nxt200x: NXT2002 Detected\n");
1152                         break;
1153                 case 0x05:
1154                         state->demod_chip = NXT2004;
1155                         printk("nxt200x: NXT2004 Detected\n");
1156                         break;
1157                 default:
1158                         goto error;
1159         }
1160
1161         /* make sure demod chip is supported */
1162         switch (state->demod_chip) {
1163                 case NXT2002:
1164                         if (buf[0] != 0x04) goto error;         /* device id */
1165                         if (buf[1] != 0x02) goto error;         /* fab id */
1166                         if (buf[2] != 0x11) goto error;         /* month */
1167                         if (buf[3] != 0x20) goto error;         /* year msb */
1168                         if (buf[4] != 0x00) goto error;         /* year lsb */
1169                         break;
1170                 case NXT2004:
1171                         if (buf[0] != 0x05) goto error;         /* device id */
1172                         break;
1173                 default:
1174                         goto error;
1175         }
1176
1177         /* create dvb_frontend */
1178         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1179         state->frontend.demodulator_priv = state;
1180         return &state->frontend;
1181
1182 error:
1183         kfree(state);
1184         printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1185                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1186         return NULL;
1187 }
1188
1189 static struct dvb_frontend_ops nxt200x_ops = {
1190         .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1191         .info = {
1192                 .name = "Nextwave NXT200X VSB/QAM frontend",
1193                 .frequency_min =  54000000,
1194                 .frequency_max = 860000000,
1195                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1196                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1197                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1198                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1199         },
1200
1201         .release = nxt200x_release,
1202
1203         .init = nxt200x_init,
1204         .sleep = nxt200x_sleep,
1205
1206         .set_frontend = nxt200x_setup_frontend_parameters,
1207         .get_tune_settings = nxt200x_get_tune_settings,
1208
1209         .read_status = nxt200x_read_status,
1210         .read_ber = nxt200x_read_ber,
1211         .read_signal_strength = nxt200x_read_signal_strength,
1212         .read_snr = nxt200x_read_snr,
1213         .read_ucblocks = nxt200x_read_ucblocks,
1214 };
1215
1216 module_param(debug, int, 0644);
1217 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1218
1219 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1220 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1221 MODULE_LICENSE("GPL");
1222
1223 EXPORT_SYMBOL(nxt200x_attach);
1224