drivers/media/dvb-frontends/sp887x.c

   1 /*
   2    Driver for the Spase sp887x demodulator
   3 */
   4
   5 /*(DEBLOBBED)*/
   6
   7 #include <linux/init.h>
   8 #include <linux/module.h>
   9 #include <linux/device.h>
  10 #include <linux/firmware.h>
  11 #include <linux/string.h>
  12 #include <linux/slab.h>
  13
  14 #include "dvb_frontend.h"
  15 #include "sp887x.h"
  16
  17
  18 struct sp887x_state {
  19         struct i2c_adapter* i2c;
  20         const struct sp887x_config* config;
  21         struct dvb_frontend frontend;
  22
  23         /* demodulator private data */
  24         u8 initialised:1;
  25 };
  26
  27 static int debug;
  28 #define dprintk(args...) \
  29         do { \
  30                 if (debug) printk(KERN_DEBUG "sp887x: " args); \
  31         } while (0)
  32
  33 static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
  34 {
  35         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
  36         int err;
  37
  38         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  39                 printk ("%s: i2c write error (addr %02x, err == %i)\n",
  40                         __func__, state->config->demod_address, err);
  41                 return -EREMOTEIO;
  42         }
  43
  44         return 0;
  45 }
  46
  47 static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
  48 {
  49         u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
  50         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
  51         int ret;
  52
  53         if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  54                 /**
  55                  *  in case of soft reset we ignore ACK errors...
  56                  */
  57                 if (!(reg == 0xf1a && data == 0x000 &&
  58                         (ret == -EREMOTEIO || ret == -EFAULT)))
  59                 {
  60                         printk("%s: writereg error "
  61                                "(reg %03x, data %03x, ret == %i)\n",
  62                                __func__, reg & 0xffff, data & 0xffff, ret);
  63                         return ret;
  64                 }
  65         }
  66
  67         return 0;
  68 }
  69
  70 static int sp887x_readreg (struct sp887x_state* state, u16 reg)
  71 {
  72         u8 b0 [] = { reg >> 8 , reg & 0xff };
  73         u8 b1 [2];
  74         int ret;
  75         struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
  76                          { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
  77
  78         if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
  79                 printk("%s: readreg error (ret == %i)\n", __func__, ret);
  80                 return -1;
  81         }
  82
  83         return (((b1[0] << 8) | b1[1]) & 0xfff);
  84 }
  85
  86 static void sp887x_microcontroller_stop (struct sp887x_state* state)
  87 {
  88         dprintk("%s\n", __func__);
  89         sp887x_writereg(state, 0xf08, 0x000);
  90         sp887x_writereg(state, 0xf09, 0x000);
  91
  92         /* microcontroller STOP */
  93         sp887x_writereg(state, 0xf00, 0x000);
  94 }
  95
  96 static void sp887x_microcontroller_start (struct sp887x_state* state)
  97 {
  98         dprintk("%s\n", __func__);
  99         sp887x_writereg(state, 0xf08, 0x000);
 100         sp887x_writereg(state, 0xf09, 0x000);
 101
 102         /* microcontroller START */
 103         sp887x_writereg(state, 0xf00, 0x001);
 104 }
 105
 106 static void sp887x_setup_agc (struct sp887x_state* state)
 107 {
 108         /* setup AGC parameters */
 109         dprintk("%s\n", __func__);
 110         sp887x_writereg(state, 0x33c, 0x054);
 111         sp887x_writereg(state, 0x33b, 0x04c);
 112         sp887x_writereg(state, 0x328, 0x000);
 113         sp887x_writereg(state, 0x327, 0x005);
 114         sp887x_writereg(state, 0x326, 0x001);
 115         sp887x_writereg(state, 0x325, 0x001);
 116         sp887x_writereg(state, 0x324, 0x001);
 117         sp887x_writereg(state, 0x318, 0x050);
 118         sp887x_writereg(state, 0x317, 0x3fe);
 119         sp887x_writereg(state, 0x316, 0x001);
 120         sp887x_writereg(state, 0x313, 0x005);
 121         sp887x_writereg(state, 0x312, 0x002);
 122         sp887x_writereg(state, 0x306, 0x000);
 123         sp887x_writereg(state, 0x303, 0x000);
 124 }
 125
 126 #define BLOCKSIZE 30
 127 #define FW_SIZE 0x4000
 128 /**
 129  *  load firmware and setup MPEG interface...
 130  */
 131 static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
 132 {
 133         struct sp887x_state* state = fe->demodulator_priv;
 134         u8 buf [BLOCKSIZE+2];
 135         int i;
 136         int fw_size = fw->size;
 137         const unsigned char *mem = fw->data;
 138
 139         dprintk("%s\n", __func__);
 140
 141         /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
 142         if (fw_size < FW_SIZE+10)
 143                 return -ENODEV;
 144
 145         mem = fw->data + 10;
 146
 147         /* soft reset */
 148         sp887x_writereg(state, 0xf1a, 0x000);
 149
 150         sp887x_microcontroller_stop (state);
 151
 152         printk ("%s: firmware upload... ", __func__);
 153
 154         /* setup write pointer to -1 (end of memory) */
 155         /* bit 0x8000 in address is set to enable 13bit mode */
 156         sp887x_writereg(state, 0x8f08, 0x1fff);
 157
 158         /* dummy write (wrap around to start of memory) */
 159         sp887x_writereg(state, 0x8f0a, 0x0000);
 160
 161         for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
 162                 int c = BLOCKSIZE;
 163                 int err;
 164
 165                 if (i+c > FW_SIZE)
 166                         c = FW_SIZE - i;
 167
 168                 /* bit 0x8000 in address is set to enable 13bit mode */
 169                 /* bit 0x4000 enables multibyte read/write transfers */
 170                 /* write register is 0xf0a */
 171                 buf[0] = 0xcf;
 172                 buf[1] = 0x0a;
 173
 174                 memcpy(&buf[2], mem + i, c);
 175
 176                 if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
 177                         printk ("failed.\n");
 178                         printk ("%s: i2c error (err == %i)\n", __func__, err);
 179                         return err;
 180                 }
 181         }
 182
 183         /* don't write RS bytes between packets */
 184         sp887x_writereg(state, 0xc13, 0x001);
 185
 186         /* suppress clock if (!data_valid) */
 187         sp887x_writereg(state, 0xc14, 0x000);
 188
 189         /* setup MPEG interface... */
 190         sp887x_writereg(state, 0xc1a, 0x872);
 191         sp887x_writereg(state, 0xc1b, 0x001);
 192         sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
 193         sp887x_writereg(state, 0xc1a, 0x871);
 194
 195         /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
 196         sp887x_writereg(state, 0x301, 0x002);
 197
 198         sp887x_setup_agc(state);
 199
 200         /* bit 0x010: enable data valid signal */
 201         sp887x_writereg(state, 0xd00, 0x010);
 202         sp887x_writereg(state, 0x0d1, 0x000);
 203         return 0;
 204 };
 205
 206 static int configure_reg0xc05(struct dtv_frontend_properties *p, u16 *reg0xc05)
 207 {
 208         int known_parameters = 1;
 209
 210         *reg0xc05 = 0x000;
 211
 212         switch (p->modulation) {
 213         case QPSK:
 214                 break;
 215         case QAM_16:
 216                 *reg0xc05 |= (1 << 10);
 217                 break;
 218         case QAM_64:
 219                 *reg0xc05 |= (2 << 10);
 220                 break;
 221         case QAM_AUTO:
 222                 known_parameters = 0;
 223                 break;
 224         default:
 225                 return -EINVAL;
 226         }
 227
 228         switch (p->hierarchy) {
 229         case HIERARCHY_NONE:
 230                 break;
 231         case HIERARCHY_1:
 232                 *reg0xc05 |= (1 << 7);
 233                 break;
 234         case HIERARCHY_2:
 235                 *reg0xc05 |= (2 << 7);
 236                 break;
 237         case HIERARCHY_4:
 238                 *reg0xc05 |= (3 << 7);
 239                 break;
 240         case HIERARCHY_AUTO:
 241                 known_parameters = 0;
 242                 break;
 243         default:
 244                 return -EINVAL;
 245         }
 246
 247         switch (p->code_rate_HP) {
 248         case FEC_1_2:
 249                 break;
 250         case FEC_2_3:
 251                 *reg0xc05 |= (1 << 3);
 252                 break;
 253         case FEC_3_4:
 254                 *reg0xc05 |= (2 << 3);
 255                 break;
 256         case FEC_5_6:
 257                 *reg0xc05 |= (3 << 3);
 258                 break;
 259         case FEC_7_8:
 260                 *reg0xc05 |= (4 << 3);
 261                 break;
 262         case FEC_AUTO:
 263                 known_parameters = 0;
 264                 break;
 265         default:
 266                 return -EINVAL;
 267         }
 268
 269         if (known_parameters)
 270                 *reg0xc05 |= (2 << 1);  /* use specified parameters */
 271         else
 272                 *reg0xc05 |= (1 << 1);  /* enable autoprobing */
 273
 274         return 0;
 275 }
 276
 277 /**
 278  *  estimates division of two 24bit numbers,
 279  *  derived from the ves1820/stv0299 driver code
 280  */
 281 static void divide (int n, int d, int *quotient_i, int *quotient_f)
 282 {
 283         unsigned int q, r;
 284
 285         r = (n % d) << 8;
 286         q = (r / d);
 287
 288         if (quotient_i)
 289                 *quotient_i = q;
 290
 291         if (quotient_f) {
 292                 r = (r % d) << 8;
 293                 q = (q << 8) | (r / d);
 294                 r = (r % d) << 8;
 295                 *quotient_f = (q << 8) | (r / d);
 296         }
 297 }
 298
 299 static void sp887x_correct_offsets (struct sp887x_state* state,
 300                                     struct dtv_frontend_properties *p,
 301                                     int actual_freq)
 302 {
 303         static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
 304         int bw_index;
 305         int freq_offset = actual_freq - p->frequency;
 306         int sysclock = 61003; //[kHz]
 307         int ifreq = 36000000;
 308         int freq;
 309         int frequency_shift;
 310
 311         switch (p->bandwidth_hz) {
 312         default:
 313         case 8000000:
 314                 bw_index = 0;
 315                 break;
 316         case 7000000:
 317                 bw_index = 1;
 318                 break;
 319         case 6000000:
 320                 bw_index = 2;
 321                 break;
 322         }
 323
 324         if (p->inversion == INVERSION_ON)
 325                 freq = ifreq - freq_offset;
 326         else
 327                 freq = ifreq + freq_offset;
 328
 329         divide(freq / 333, sysclock, NULL, &frequency_shift);
 330
 331         if (p->inversion == INVERSION_ON)
 332                 frequency_shift = -frequency_shift;
 333
 334         /* sample rate correction */
 335         sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
 336         sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
 337
 338         /* carrier offset correction */
 339         sp887x_writereg(state, 0x309, frequency_shift >> 12);
 340         sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
 341 }
 342
 343 static int sp887x_setup_frontend_parameters(struct dvb_frontend *fe)
 344 {
 345         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 346         struct sp887x_state* state = fe->demodulator_priv;
 347         unsigned actual_freq;
 348         int err;
 349         u16 val, reg0xc05;
 350
 351         if (p->bandwidth_hz != 8000000 &&
 352             p->bandwidth_hz != 7000000 &&
 353             p->bandwidth_hz != 6000000)
 354                 return -EINVAL;
 355
 356         if ((err = configure_reg0xc05(p, &reg0xc05)))
 357                 return err;
 358
 359         sp887x_microcontroller_stop(state);
 360
 361         /* setup the PLL */
 362         if (fe->ops.tuner_ops.set_params) {
 363                 fe->ops.tuner_ops.set_params(fe);
 364                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 365         }
 366         if (fe->ops.tuner_ops.get_frequency) {
 367                 fe->ops.tuner_ops.get_frequency(fe, &actual_freq);
 368                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 369         } else {
 370                 actual_freq = p->frequency;
 371         }
 372
 373         /* read status reg in order to clear <pending irqs */
 374         sp887x_readreg(state, 0x200);
 375
 376         sp887x_correct_offsets(state, p, actual_freq);
 377
 378         /* filter for 6/7/8 Mhz channel */
 379         if (p->bandwidth_hz == 6000000)
 380                 val = 2;
 381         else if (p->bandwidth_hz == 7000000)
 382                 val = 1;
 383         else
 384                 val = 0;
 385
 386         sp887x_writereg(state, 0x311, val);
 387
 388         /* scan order: 2k first = 0, 8k first = 1 */
 389         if (p->transmission_mode == TRANSMISSION_MODE_2K)
 390                 sp887x_writereg(state, 0x338, 0x000);
 391         else
 392                 sp887x_writereg(state, 0x338, 0x001);
 393
 394         sp887x_writereg(state, 0xc05, reg0xc05);
 395
 396         if (p->bandwidth_hz == 6000000)
 397                 val = 2 << 3;
 398         else if (p->bandwidth_hz == 7000000)
 399                 val = 3 << 3;
 400         else
 401                 val = 0 << 3;
 402
 403         /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
 404          * optimize algorithm for given bandwidth...
 405          */
 406         sp887x_writereg(state, 0xf14, 0x160 | val);
 407         sp887x_writereg(state, 0xf15, 0x000);
 408
 409         sp887x_microcontroller_start(state);
 410         return 0;
 411 }
 412
 413 static int sp887x_read_status(struct dvb_frontend *fe, enum fe_status *status)
 414 {
 415         struct sp887x_state* state = fe->demodulator_priv;
 416         u16 snr12 = sp887x_readreg(state, 0xf16);
 417         u16 sync0x200 = sp887x_readreg(state, 0x200);
 418         u16 sync0xf17 = sp887x_readreg(state, 0xf17);
 419
 420         *status = 0;
 421
 422         if (snr12 > 0x00f)
 423                 *status |= FE_HAS_SIGNAL;
 424
 425         //if (sync0x200 & 0x004)
 426         //      *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
 427
 428         //if (sync0x200 & 0x008)
 429         //      *status |= FE_HAS_VITERBI;
 430
 431         if ((sync0xf17 & 0x00f) == 0x002) {
 432                 *status |= FE_HAS_LOCK;
 433                 *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
 434         }
 435
 436         if (sync0x200 & 0x001) {        /* tuner adjustment requested...*/
 437                 int steps = (sync0x200 >> 4) & 0x00f;
 438                 if (steps & 0x008)
 439                         steps = -steps;
 440                 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
 441                        steps);
 442         }
 443
 444         return 0;
 445 }
 446
 447 static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
 448 {
 449         struct sp887x_state* state = fe->demodulator_priv;
 450
 451         *ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
 452                (sp887x_readreg(state, 0xc07) << 6);
 453         sp887x_writereg(state, 0xc08, 0x000);
 454         sp887x_writereg(state, 0xc07, 0x000);
 455         if (*ber >= 0x3fff0)
 456                 *ber = ~0;
 457
 458         return 0;
 459 }
 460
 461 static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 462 {
 463         struct sp887x_state* state = fe->demodulator_priv;
 464
 465         u16 snr12 = sp887x_readreg(state, 0xf16);
 466         u32 signal = 3 * (snr12 << 4);
 467         *strength = (signal < 0xffff) ? signal : 0xffff;
 468
 469         return 0;
 470 }
 471
 472 static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
 473 {
 474         struct sp887x_state* state = fe->demodulator_priv;
 475
 476         u16 snr12 = sp887x_readreg(state, 0xf16);
 477         *snr = (snr12 << 4) | (snr12 >> 8);
 478
 479         return 0;
 480 }
 481
 482 static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 483 {
 484         struct sp887x_state* state = fe->demodulator_priv;
 485
 486         *ucblocks = sp887x_readreg(state, 0xc0c);
 487         if (*ucblocks == 0xfff)
 488                 *ucblocks = ~0;
 489
 490         return 0;
 491 }
 492
 493 static int sp887x_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 494 {
 495         struct sp887x_state* state = fe->demodulator_priv;
 496
 497         if (enable) {
 498                 return sp887x_writereg(state, 0x206, 0x001);
 499         } else {
 500                 return sp887x_writereg(state, 0x206, 0x000);
 501         }
 502 }
 503
 504 static int sp887x_sleep(struct dvb_frontend* fe)
 505 {
 506         struct sp887x_state* state = fe->demodulator_priv;
 507
 508         /* tristate TS output and disable interface pins */
 509         sp887x_writereg(state, 0xc18, 0x000);
 510
 511         return 0;
 512 }
 513
 514 static int sp887x_init(struct dvb_frontend* fe)
 515 {
 516         struct sp887x_state* state = fe->demodulator_priv;
 517         const struct firmware *fw = NULL;
 518         int ret;
 519
 520         if (!state->initialised) {
 521                 /* request the firmware, this will block until someone uploads it */
 522                 printk("sp887x: waiting for firmware upload (%s)...\n", "/*(DEBLOBBED)*/");
 523                 ret = state->config->request_firmware(fe, &fw, "/*(DEBLOBBED)*/");
 524                 if (ret) {
 525                         printk("sp887x: no firmware upload (timeout or file not found?)\n");
 526                         return ret;
 527                 }
 528
 529                 ret = sp887x_initial_setup(fe, fw);
 530                 release_firmware(fw);
 531                 if (ret) {
 532                         printk("sp887x: writing firmware to device failed\n");
 533                         return ret;
 534                 }
 535                 printk("sp887x: firmware upload complete\n");
 536                 state->initialised = 1;
 537         }
 538
 539         /* enable TS output and interface pins */
 540         sp887x_writereg(state, 0xc18, 0x00d);
 541
 542         return 0;
 543 }
 544
 545 static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
 546 {
 547         fesettings->min_delay_ms = 350;
 548         fesettings->step_size = 166666*2;
 549         fesettings->max_drift = (166666*2)+1;
 550         return 0;
 551 }
 552
 553 static void sp887x_release(struct dvb_frontend* fe)
 554 {
 555         struct sp887x_state* state = fe->demodulator_priv;
 556         kfree(state);
 557 }
 558
 559 static struct dvb_frontend_ops sp887x_ops;
 560
 561 struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
 562                                    struct i2c_adapter* i2c)
 563 {
 564         struct sp887x_state* state = NULL;
 565
 566         /* allocate memory for the internal state */
 567         state = kzalloc(sizeof(struct sp887x_state), GFP_KERNEL);
 568         if (state == NULL) goto error;
 569
 570         /* setup the state */
 571         state->config = config;
 572         state->i2c = i2c;
 573         state->initialised = 0;
 574
 575         /* check if the demod is there */
 576         if (sp887x_readreg(state, 0x0200) < 0) goto error;
 577
 578         /* create dvb_frontend */
 579         memcpy(&state->frontend.ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
 580         state->frontend.demodulator_priv = state;
 581         return &state->frontend;
 582
 583 error:
 584         kfree(state);
 585         return NULL;
 586 }
 587
 588 static struct dvb_frontend_ops sp887x_ops = {
 589         .delsys = { SYS_DVBT },
 590         .info = {
 591                 .name = "Spase SP887x DVB-T",
 592                 .frequency_min =  50500000,
 593                 .frequency_max = 858000000,
 594                 .frequency_stepsize = 166666,
 595                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 596                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 597                         FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
 598                         FE_CAN_RECOVER
 599         },
 600
 601         .release = sp887x_release,
 602
 603         .init = sp887x_init,
 604         .sleep = sp887x_sleep,
 605         .i2c_gate_ctrl = sp887x_i2c_gate_ctrl,
 606
 607         .set_frontend = sp887x_setup_frontend_parameters,
 608         .get_tune_settings = sp887x_get_tune_settings,
 609
 610         .read_status = sp887x_read_status,
 611         .read_ber = sp887x_read_ber,
 612         .read_signal_strength = sp887x_read_signal_strength,
 613         .read_snr = sp887x_read_snr,
 614         .read_ucblocks = sp887x_read_ucblocks,
 615 };
 616
 617 module_param(debug, int, 0644);
 618 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 619
 620 MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
 621 MODULE_LICENSE("GPL");
 622
 623 EXPORT_SYMBOL(sp887x_attach);