2 * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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24 * GK20A does not have dedicated video memory, and to accurately represent this
25 * fact Nouveau will not create a RAM device for it. Therefore its instmem
26 * implementation must be done directly on top of system memory, while
27 * preserving coherency for read and write operations.
29 * Instmem can be allocated through two means:
30 * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
31 * pages contiguous to the GPU. This is the preferred way.
32 * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
35 * In both cases CPU read and writes are performed by creating a write-combined
36 * mapping. The GPU L2 cache must thus be flushed/invalidated when required. To
37 * be conservative we do this every time we acquire or release an instobj, but
38 * ideally L2 management should be handled at a higher level.
40 * To improve performance, CPU mappings are not removed upon instobj release.
41 * Instead they are placed into a LRU list to be recycled when the mapped space
42 * goes beyond a certain threshold. At the moment this limit is 1MB.
46 #include <core/memory.h>
48 #include <core/tegra.h>
49 #include <subdev/fb.h>
50 #include <subdev/ltc.h>
52 struct gk20a_instobj {
53 struct nvkm_memory memory;
55 struct gk20a_instmem *imem;
60 #define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory)
63 * Used for objects allocated using the DMA API
65 struct gk20a_instobj_dma {
66 struct gk20a_instobj base;
69 struct nvkm_mm_node r;
71 #define gk20a_instobj_dma(p) \
72 container_of(gk20a_instobj(p), struct gk20a_instobj_dma, base)
75 * Used for objects flattened using the IOMMU API
77 struct gk20a_instobj_iommu {
78 struct gk20a_instobj base;
80 /* to link into gk20a_instmem::vaddr_lru */
81 struct list_head vaddr_node;
82 /* how many clients are using vaddr? */
85 /* will point to the higher half of pages */
86 dma_addr_t *dma_addrs;
87 /* array of base.mem->size pages (+ dma_addr_ts) */
90 #define gk20a_instobj_iommu(p) \
91 container_of(gk20a_instobj(p), struct gk20a_instobj_iommu, base)
93 struct gk20a_instmem {
94 struct nvkm_instmem base;
96 /* protects vaddr_* and gk20a_instobj::vaddr* */
99 /* CPU mappings LRU */
100 unsigned int vaddr_use;
101 unsigned int vaddr_max;
102 struct list_head vaddr_lru;
104 /* Only used if IOMMU if present */
105 struct mutex *mm_mutex;
107 struct iommu_domain *domain;
108 unsigned long iommu_pgshift;
111 /* Only used by DMA API */
114 #define gk20a_instmem(p) container_of((p), struct gk20a_instmem, base)
116 static enum nvkm_memory_target
117 gk20a_instobj_target(struct nvkm_memory *memory)
119 return NVKM_MEM_TARGET_NCOH;
123 gk20a_instobj_addr(struct nvkm_memory *memory)
125 return gk20a_instobj(memory)->mem.offset;
129 gk20a_instobj_size(struct nvkm_memory *memory)
131 return (u64)gk20a_instobj(memory)->mem.size << 12;
135 * Recycle the vaddr of obj. Must be called with gk20a_instmem::lock held.
138 gk20a_instobj_iommu_recycle_vaddr(struct gk20a_instobj_iommu *obj)
140 struct gk20a_instmem *imem = obj->base.imem;
141 /* there should not be any user left... */
142 WARN_ON(obj->use_cpt);
143 list_del(&obj->vaddr_node);
144 vunmap(obj->base.vaddr);
145 obj->base.vaddr = NULL;
146 imem->vaddr_use -= nvkm_memory_size(&obj->base.memory);
147 nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n", imem->vaddr_use,
152 * Must be called while holding gk20a_instmem::lock
155 gk20a_instmem_vaddr_gc(struct gk20a_instmem *imem, const u64 size)
157 while (imem->vaddr_use + size > imem->vaddr_max) {
158 /* no candidate that can be unmapped, abort... */
159 if (list_empty(&imem->vaddr_lru))
162 gk20a_instobj_iommu_recycle_vaddr(
163 list_first_entry(&imem->vaddr_lru,
164 struct gk20a_instobj_iommu, vaddr_node));
168 static void __iomem *
169 gk20a_instobj_acquire_dma(struct nvkm_memory *memory)
171 struct gk20a_instobj *node = gk20a_instobj(memory);
172 struct gk20a_instmem *imem = node->imem;
173 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
180 static void __iomem *
181 gk20a_instobj_acquire_iommu(struct nvkm_memory *memory)
183 struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
184 struct gk20a_instmem *imem = node->base.imem;
185 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
186 const u64 size = nvkm_memory_size(memory);
190 mutex_lock(&imem->lock);
192 if (node->base.vaddr) {
193 if (!node->use_cpt) {
194 /* remove from LRU list since mapping in use again */
195 list_del(&node->vaddr_node);
200 /* try to free some address space if we reached the limit */
201 gk20a_instmem_vaddr_gc(imem, size);
204 node->base.vaddr = vmap(node->pages, size >> PAGE_SHIFT, VM_MAP,
205 pgprot_writecombine(PAGE_KERNEL));
206 if (!node->base.vaddr) {
207 nvkm_error(&imem->base.subdev, "cannot map instobj - "
208 "this is not going to end well...\n");
212 imem->vaddr_use += size;
213 nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n",
214 imem->vaddr_use, imem->vaddr_max);
218 mutex_unlock(&imem->lock);
220 return node->base.vaddr;
224 gk20a_instobj_release_dma(struct nvkm_memory *memory)
226 struct gk20a_instobj *node = gk20a_instobj(memory);
227 struct gk20a_instmem *imem = node->imem;
228 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
230 /* in case we got a write-combined mapping */
232 nvkm_ltc_invalidate(ltc);
236 gk20a_instobj_release_iommu(struct nvkm_memory *memory)
238 struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
239 struct gk20a_instmem *imem = node->base.imem;
240 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
242 mutex_lock(&imem->lock);
244 /* we should at least have one user to release... */
245 if (WARN_ON(node->use_cpt == 0))
248 /* add unused objs to the LRU list to recycle their mapping */
249 if (--node->use_cpt == 0)
250 list_add_tail(&node->vaddr_node, &imem->vaddr_lru);
253 mutex_unlock(&imem->lock);
256 nvkm_ltc_invalidate(ltc);
260 gk20a_instobj_rd32(struct nvkm_memory *memory, u64 offset)
262 struct gk20a_instobj *node = gk20a_instobj(memory);
264 return node->vaddr[offset / 4];
268 gk20a_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data)
270 struct gk20a_instobj *node = gk20a_instobj(memory);
272 node->vaddr[offset / 4] = data;
276 gk20a_instobj_map(struct nvkm_memory *memory, struct nvkm_vma *vma, u64 offset)
278 struct gk20a_instobj *node = gk20a_instobj(memory);
280 nvkm_vm_map_at(vma, offset, &node->mem);
284 gk20a_instobj_dtor_dma(struct nvkm_memory *memory)
286 struct gk20a_instobj_dma *node = gk20a_instobj_dma(memory);
287 struct gk20a_instmem *imem = node->base.imem;
288 struct device *dev = imem->base.subdev.device->dev;
290 if (unlikely(!node->base.vaddr))
293 dma_free_attrs(dev, node->base.mem.size << PAGE_SHIFT, node->base.vaddr,
294 node->handle, imem->attrs);
301 gk20a_instobj_dtor_iommu(struct nvkm_memory *memory)
303 struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
304 struct gk20a_instmem *imem = node->base.imem;
305 struct device *dev = imem->base.subdev.device->dev;
306 struct nvkm_mm_node *r = node->base.mem.mem;
312 mutex_lock(&imem->lock);
314 /* vaddr has already been recycled */
315 if (node->base.vaddr)
316 gk20a_instobj_iommu_recycle_vaddr(node);
318 mutex_unlock(&imem->lock);
320 /* clear IOMMU bit to unmap pages */
321 r->offset &= ~BIT(imem->iommu_bit - imem->iommu_pgshift);
323 /* Unmap pages from GPU address space and free them */
324 for (i = 0; i < node->base.mem.size; i++) {
325 iommu_unmap(imem->domain,
326 (r->offset + i) << imem->iommu_pgshift, PAGE_SIZE);
327 dma_unmap_page(dev, node->dma_addrs[i], PAGE_SIZE,
329 __free_page(node->pages[i]);
332 /* Release area from GPU address space */
333 mutex_lock(imem->mm_mutex);
334 nvkm_mm_free(imem->mm, &r);
335 mutex_unlock(imem->mm_mutex);
341 static const struct nvkm_memory_func
342 gk20a_instobj_func_dma = {
343 .dtor = gk20a_instobj_dtor_dma,
344 .target = gk20a_instobj_target,
345 .addr = gk20a_instobj_addr,
346 .size = gk20a_instobj_size,
347 .acquire = gk20a_instobj_acquire_dma,
348 .release = gk20a_instobj_release_dma,
349 .rd32 = gk20a_instobj_rd32,
350 .wr32 = gk20a_instobj_wr32,
351 .map = gk20a_instobj_map,
354 static const struct nvkm_memory_func
355 gk20a_instobj_func_iommu = {
356 .dtor = gk20a_instobj_dtor_iommu,
357 .target = gk20a_instobj_target,
358 .addr = gk20a_instobj_addr,
359 .size = gk20a_instobj_size,
360 .acquire = gk20a_instobj_acquire_iommu,
361 .release = gk20a_instobj_release_iommu,
362 .rd32 = gk20a_instobj_rd32,
363 .wr32 = gk20a_instobj_wr32,
364 .map = gk20a_instobj_map,
368 gk20a_instobj_ctor_dma(struct gk20a_instmem *imem, u32 npages, u32 align,
369 struct gk20a_instobj **_node)
371 struct gk20a_instobj_dma *node;
372 struct nvkm_subdev *subdev = &imem->base.subdev;
373 struct device *dev = subdev->device->dev;
375 if (!(node = kzalloc(sizeof(*node), GFP_KERNEL)))
377 *_node = &node->base;
379 nvkm_memory_ctor(&gk20a_instobj_func_dma, &node->base.memory);
381 node->base.vaddr = dma_alloc_attrs(dev, npages << PAGE_SHIFT,
382 &node->handle, GFP_KERNEL,
384 if (!node->base.vaddr) {
385 nvkm_error(subdev, "cannot allocate DMA memory\n");
389 /* alignment check */
390 if (unlikely(node->handle & (align - 1)))
392 "memory not aligned as requested: %pad (0x%x)\n",
393 &node->handle, align);
395 /* present memory for being mapped using small pages */
397 node->r.offset = node->handle >> 12;
398 node->r.length = (npages << PAGE_SHIFT) >> 12;
400 node->base.mem.offset = node->handle;
401 node->base.mem.mem = &node->r;
406 gk20a_instobj_ctor_iommu(struct gk20a_instmem *imem, u32 npages, u32 align,
407 struct gk20a_instobj **_node)
409 struct gk20a_instobj_iommu *node;
410 struct nvkm_subdev *subdev = &imem->base.subdev;
411 struct device *dev = subdev->device->dev;
412 struct nvkm_mm_node *r;
417 * despite their variable size, instmem allocations are small enough
418 * (< 1 page) to be handled by kzalloc
420 if (!(node = kzalloc(sizeof(*node) + ((sizeof(node->pages[0]) +
421 sizeof(*node->dma_addrs)) * npages), GFP_KERNEL)))
423 *_node = &node->base;
424 node->dma_addrs = (void *)(node->pages + npages);
426 nvkm_memory_ctor(&gk20a_instobj_func_iommu, &node->base.memory);
428 /* Allocate backing memory */
429 for (i = 0; i < npages; i++) {
430 struct page *p = alloc_page(GFP_KERNEL);
438 dma_adr = dma_map_page(dev, p, 0, PAGE_SIZE, DMA_BIDIRECTIONAL);
439 if (dma_mapping_error(dev, dma_adr)) {
440 nvkm_error(subdev, "DMA mapping error!\n");
444 node->dma_addrs[i] = dma_adr;
447 mutex_lock(imem->mm_mutex);
448 /* Reserve area from GPU address space */
449 ret = nvkm_mm_head(imem->mm, 0, 1, npages, npages,
450 align >> imem->iommu_pgshift, &r);
451 mutex_unlock(imem->mm_mutex);
453 nvkm_error(subdev, "IOMMU space is full!\n");
457 /* Map into GPU address space */
458 for (i = 0; i < npages; i++) {
459 u32 offset = (r->offset + i) << imem->iommu_pgshift;
461 ret = iommu_map(imem->domain, offset, node->dma_addrs[i],
462 PAGE_SIZE, IOMMU_READ | IOMMU_WRITE);
464 nvkm_error(subdev, "IOMMU mapping failure: %d\n", ret);
468 iommu_unmap(imem->domain, offset, PAGE_SIZE);
474 /* IOMMU bit tells that an address is to be resolved through the IOMMU */
475 r->offset |= BIT(imem->iommu_bit - imem->iommu_pgshift);
477 node->base.mem.offset = ((u64)r->offset) << imem->iommu_pgshift;
478 node->base.mem.mem = r;
482 mutex_lock(imem->mm_mutex);
483 nvkm_mm_free(imem->mm, &r);
484 mutex_unlock(imem->mm_mutex);
487 for (i = 0; i < npages && node->pages[i] != NULL; i++) {
488 dma_addr_t dma_addr = node->dma_addrs[i];
490 dma_unmap_page(dev, dma_addr, PAGE_SIZE,
492 __free_page(node->pages[i]);
499 gk20a_instobj_new(struct nvkm_instmem *base, u32 size, u32 align, bool zero,
500 struct nvkm_memory **pmemory)
502 struct gk20a_instmem *imem = gk20a_instmem(base);
503 struct nvkm_subdev *subdev = &imem->base.subdev;
504 struct gk20a_instobj *node = NULL;
507 nvkm_debug(subdev, "%s (%s): size: %x align: %x\n", __func__,
508 imem->domain ? "IOMMU" : "DMA", size, align);
510 /* Round size and align to page bounds */
511 size = max(roundup(size, PAGE_SIZE), PAGE_SIZE);
512 align = max(roundup(align, PAGE_SIZE), PAGE_SIZE);
515 ret = gk20a_instobj_ctor_iommu(imem, size >> PAGE_SHIFT,
518 ret = gk20a_instobj_ctor_dma(imem, size >> PAGE_SHIFT,
520 *pmemory = node ? &node->memory : NULL;
526 /* present memory for being mapped using small pages */
527 node->mem.size = size >> 12;
528 node->mem.memtype = 0;
529 node->mem.page_shift = 12;
531 nvkm_debug(subdev, "alloc size: 0x%x, align: 0x%x, gaddr: 0x%llx\n",
532 size, align, node->mem.offset);
538 gk20a_instmem_dtor(struct nvkm_instmem *base)
540 struct gk20a_instmem *imem = gk20a_instmem(base);
542 /* perform some sanity checks... */
543 if (!list_empty(&imem->vaddr_lru))
544 nvkm_warn(&base->subdev, "instobj LRU not empty!\n");
546 if (imem->vaddr_use != 0)
547 nvkm_warn(&base->subdev, "instobj vmap area not empty! "
548 "0x%x bytes still mapped\n", imem->vaddr_use);
553 static const struct nvkm_instmem_func
555 .dtor = gk20a_instmem_dtor,
556 .memory_new = gk20a_instobj_new,
562 gk20a_instmem_new(struct nvkm_device *device, int index,
563 struct nvkm_instmem **pimem)
565 struct nvkm_device_tegra *tdev = device->func->tegra(device);
566 struct gk20a_instmem *imem;
568 if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
570 nvkm_instmem_ctor(&gk20a_instmem, device, index, &imem->base);
571 mutex_init(&imem->lock);
572 *pimem = &imem->base;
574 /* do not allow more than 1MB of CPU-mapped instmem */
576 imem->vaddr_max = 0x100000;
577 INIT_LIST_HEAD(&imem->vaddr_lru);
579 if (tdev->iommu.domain) {
580 imem->mm_mutex = &tdev->iommu.mutex;
581 imem->mm = &tdev->iommu.mm;
582 imem->domain = tdev->iommu.domain;
583 imem->iommu_pgshift = tdev->iommu.pgshift;
584 imem->iommu_bit = tdev->func->iommu_bit;
586 nvkm_info(&imem->base.subdev, "using IOMMU\n");
588 imem->attrs = DMA_ATTR_NON_CONSISTENT |
589 DMA_ATTR_WEAK_ORDERING |
590 DMA_ATTR_WRITE_COMBINE;
592 nvkm_info(&imem->base.subdev, "using DMA API\n");