Linux-libre 5.4.48-gnu
[librecmc/linux-libre.git] / drivers / gpu / drm / i915 / gt / uc / intel_uc_fw.c
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2016-2019 Intel Corporation
4  */
5
6 #include <linux/bitfield.h>
7 #include <linux/firmware.h>
8 #include <drm/drm_print.h>
9
10 #include "intel_uc_fw.h"
11 #include "intel_uc_fw_abi.h"
12 #include "i915_drv.h"
13
14 #ifdef CONFIG_DRM_I915_DEBUG_GUC
15 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw)
16 {
17         GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED);
18         if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
19                 return container_of(uc_fw, struct intel_gt, uc.guc.fw);
20
21         GEM_BUG_ON(uc_fw->type != INTEL_UC_FW_TYPE_HUC);
22         return container_of(uc_fw, struct intel_gt, uc.huc.fw);
23 }
24
25 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
26                                enum intel_uc_fw_status status)
27 {
28         uc_fw->__status =  status;
29         DRM_DEV_DEBUG_DRIVER(__uc_fw_to_gt(uc_fw)->i915->drm.dev,
30                              "%s firmware -> %s\n",
31                              intel_uc_fw_type_repr(uc_fw->type),
32                              status == INTEL_UC_FIRMWARE_SELECTED ?
33                              uc_fw->path : intel_uc_fw_status_repr(status));
34 }
35 #endif
36
37 /*
38  * List of required GuC and HuC binaries per-platform.
39  * Must be ordered based on platform + revid, from newer to older.
40  */
41 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
42         fw_def(ICELAKE,    0, guc_def(icl, 33, 0, 0), huc_def(icl,  8,  4, 3238)) \
43         fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
44         fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 03, 01, 2893)) \
45         fw_def(KABYLAKE,   0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
46         fw_def(BROXTON,    0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 01,  8, 2893)) \
47         fw_def(SKYLAKE,    0, guc_def(skl, 33, 0, 0), huc_def(skl, 01, 07, 1398))
48
49 #define __MAKE_UC_FW_PATH(prefix_, name_, separator_, major_, minor_, patch_) \
50         "/*(DEBLOBBED)*/"
51
52 #define MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_) \
53         __MAKE_UC_FW_PATH(prefix_, "_guc_", ".", major_, minor_, patch_)
54
55 #define MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_) \
56         __MAKE_UC_FW_PATH(prefix_, "_huc_ver", "_", major_, minor_, bld_num_)
57
58 /* All blobs need to be declared via MODULE_FIRMWARE() */
59 #define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \
60         /*(DEBLOBBED)*/ \
61         /*(DEBLOBBED)*/
62
63 INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH)
64
65 /* The below structs and macros are used to iterate across the list of blobs */
66 struct __packed uc_fw_blob {
67         u8 major;
68         u8 minor;
69         const char *path;
70 };
71
72 #define UC_FW_BLOB(major_, minor_, path_) \
73         { .major = major_, .minor = minor_, .path = path_ }
74
75 #define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \
76         UC_FW_BLOB(major_, minor_, \
77                    MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_))
78
79 #define HUC_FW_BLOB(prefix_, major_, minor_, bld_num_) \
80         UC_FW_BLOB(major_, minor_, \
81                    MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_))
82
83 struct __packed uc_fw_platform_requirement {
84         enum intel_platform p;
85         u8 rev; /* first platform rev using this FW */
86         const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES];
87 };
88
89 #define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \
90 { \
91         .p = INTEL_##platform_, \
92         .rev = revid_, \
93         .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \
94         .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \
95 },
96
97 static void
98 __uc_fw_auto_select(struct intel_uc_fw *uc_fw, enum intel_platform p, u8 rev)
99 {
100         static const struct uc_fw_platform_requirement fw_blobs[] = {
101                 INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB)
102         };
103         int i;
104
105         for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) {
106                 if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) {
107                         const struct uc_fw_blob *blob =
108                                         &fw_blobs[i].blobs[uc_fw->type];
109                         uc_fw->path = blob->path;
110                         uc_fw->major_ver_wanted = blob->major;
111                         uc_fw->minor_ver_wanted = blob->minor;
112                         break;
113                 }
114         }
115
116         /* make sure the list is ordered as expected */
117         if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) {
118                 for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) {
119                         if (fw_blobs[i].p < fw_blobs[i - 1].p)
120                                 continue;
121
122                         if (fw_blobs[i].p == fw_blobs[i - 1].p &&
123                             fw_blobs[i].rev < fw_blobs[i - 1].rev)
124                                 continue;
125
126                         pr_err("invalid FW blob order: %s r%u comes before %s r%u\n",
127                                intel_platform_name(fw_blobs[i - 1].p),
128                                fw_blobs[i - 1].rev,
129                                intel_platform_name(fw_blobs[i].p),
130                                fw_blobs[i].rev);
131
132                         uc_fw->path = NULL;
133                 }
134         }
135
136         /* We don't want to enable GuC/HuC on pre-Gen11 by default */
137         if (i915_modparams.enable_guc == -1 && p < INTEL_ICELAKE)
138                 uc_fw->path = NULL;
139 }
140
141 static const char *__override_guc_firmware_path(void)
142 {
143         if (i915_modparams.enable_guc & (ENABLE_GUC_SUBMISSION |
144                                          ENABLE_GUC_LOAD_HUC))
145                 return i915_modparams.guc_firmware_path;
146         return "";
147 }
148
149 static const char *__override_huc_firmware_path(void)
150 {
151         if (i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC)
152                 return i915_modparams.huc_firmware_path;
153         return "";
154 }
155
156 static void __uc_fw_user_override(struct intel_uc_fw *uc_fw)
157 {
158         const char *path = NULL;
159
160         switch (uc_fw->type) {
161         case INTEL_UC_FW_TYPE_GUC:
162                 path = __override_guc_firmware_path();
163                 break;
164         case INTEL_UC_FW_TYPE_HUC:
165                 path = __override_huc_firmware_path();
166                 break;
167         }
168
169         if (unlikely(path)) {
170                 uc_fw->path = path;
171                 uc_fw->user_overridden = true;
172         }
173 }
174
175 /**
176  * intel_uc_fw_init_early - initialize the uC object and select the firmware
177  * @uc_fw: uC firmware
178  * @type: type of uC
179  * @supported: is uC support possible
180  * @platform: platform identifier
181  * @rev: hardware revision
182  *
183  * Initialize the state of our uC object and relevant tracking and select the
184  * firmware to fetch and load.
185  */
186 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
187                             enum intel_uc_fw_type type, bool supported,
188                             enum intel_platform platform, u8 rev)
189 {
190         /*
191          * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status
192          * before we're looked at the HW caps to see if we have uc support
193          */
194         BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED);
195         GEM_BUG_ON(uc_fw->status);
196         GEM_BUG_ON(uc_fw->path);
197
198         uc_fw->type = type;
199
200         if (supported) {
201                 __uc_fw_auto_select(uc_fw, platform, rev);
202                 __uc_fw_user_override(uc_fw);
203         }
204
205         intel_uc_fw_change_status(uc_fw, uc_fw->path ? *uc_fw->path ?
206                                   INTEL_UC_FIRMWARE_SELECTED :
207                                   INTEL_UC_FIRMWARE_DISABLED :
208                                   INTEL_UC_FIRMWARE_NOT_SUPPORTED);
209 }
210
211 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw,
212                                       struct drm_i915_private *i915,
213                                       int e)
214 {
215         bool user = e == -EINVAL;
216
217         if (i915_inject_load_error(i915, e)) {
218                 /* non-existing blob */
219                 uc_fw->path = "<invalid>";
220                 uc_fw->user_overridden = user;
221         } else if (i915_inject_load_error(i915, e)) {
222                 /* require next major version */
223                 uc_fw->major_ver_wanted += 1;
224                 uc_fw->minor_ver_wanted = 0;
225                 uc_fw->user_overridden = user;
226         } else if (i915_inject_load_error(i915, e)) {
227                 /* require next minor version */
228                 uc_fw->minor_ver_wanted += 1;
229                 uc_fw->user_overridden = user;
230         } else if (uc_fw->major_ver_wanted && i915_inject_load_error(i915, e)) {
231                 /* require prev major version */
232                 uc_fw->major_ver_wanted -= 1;
233                 uc_fw->minor_ver_wanted = 0;
234                 uc_fw->user_overridden = user;
235         } else if (uc_fw->minor_ver_wanted && i915_inject_load_error(i915, e)) {
236                 /* require prev minor version - hey, this should work! */
237                 uc_fw->minor_ver_wanted -= 1;
238                 uc_fw->user_overridden = user;
239         } else if (user && i915_inject_load_error(i915, e)) {
240                 /* officially unsupported platform */
241                 uc_fw->major_ver_wanted = 0;
242                 uc_fw->minor_ver_wanted = 0;
243                 uc_fw->user_overridden = true;
244         }
245 }
246
247 /**
248  * intel_uc_fw_fetch - fetch uC firmware
249  * @uc_fw: uC firmware
250  * @i915: device private
251  *
252  * Fetch uC firmware into GEM obj.
253  *
254  * Return: 0 on success, a negative errno code on failure.
255  */
256 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
257 {
258         struct device *dev = i915->drm.dev;
259         struct drm_i915_gem_object *obj;
260         const struct firmware *fw = NULL;
261         struct uc_css_header *css;
262         size_t size;
263         int err;
264
265         GEM_BUG_ON(!i915->wopcm.size);
266         GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw));
267
268         err = i915_inject_load_error(i915, -ENXIO);
269         if (err)
270                 return err;
271
272         __force_fw_fetch_failures(uc_fw, i915, -EINVAL);
273         __force_fw_fetch_failures(uc_fw, i915, -ESTALE);
274
275         err = reject_firmware(&fw, uc_fw->path, dev);
276         if (err)
277                 goto fail;
278
279         /* Check the size of the blob before examining buffer contents */
280         if (unlikely(fw->size < sizeof(struct uc_css_header))) {
281                 dev_warn(dev, "%s firmware %s: invalid size: %zu < %zu\n",
282                          intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
283                          fw->size, sizeof(struct uc_css_header));
284                 err = -ENODATA;
285                 goto fail;
286         }
287
288         css = (struct uc_css_header *)fw->data;
289
290         /* Check integrity of size values inside CSS header */
291         size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw -
292                 css->exponent_size_dw) * sizeof(u32);
293         if (unlikely(size != sizeof(struct uc_css_header))) {
294                 dev_warn(dev,
295                          "%s firmware %s: unexpected header size: %zu != %zu\n",
296                          intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
297                          fw->size, sizeof(struct uc_css_header));
298                 err = -EPROTO;
299                 goto fail;
300         }
301
302         /* uCode size must calculated from other sizes */
303         uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
304
305         /* now RSA */
306         if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) {
307                 dev_warn(dev, "%s firmware %s: unexpected key size: %u != %u\n",
308                          intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
309                          css->key_size_dw, UOS_RSA_SCRATCH_COUNT);
310                 err = -EPROTO;
311                 goto fail;
312         }
313         uc_fw->rsa_size = css->key_size_dw * sizeof(u32);
314
315         /* At least, it should have header, uCode and RSA. Size of all three. */
316         size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size;
317         if (unlikely(fw->size < size)) {
318                 dev_warn(dev, "%s firmware %s: invalid size: %zu < %zu\n",
319                          intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
320                          fw->size, size);
321                 err = -ENOEXEC;
322                 goto fail;
323         }
324
325         /* Sanity check whether this fw is not larger than whole WOPCM memory */
326         size = __intel_uc_fw_get_upload_size(uc_fw);
327         if (unlikely(size >= i915->wopcm.size)) {
328                 dev_warn(dev, "%s firmware %s: invalid size: %zu > %zu\n",
329                          intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
330                          size, (size_t)i915->wopcm.size);
331                 err = -E2BIG;
332                 goto fail;
333         }
334
335         /* Get version numbers from the CSS header */
336         switch (uc_fw->type) {
337         case INTEL_UC_FW_TYPE_GUC:
338                 uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_GUC_MAJOR,
339                                                    css->sw_version);
340                 uc_fw->minor_ver_found = FIELD_GET(CSS_SW_VERSION_GUC_MINOR,
341                                                    css->sw_version);
342                 break;
343
344         case INTEL_UC_FW_TYPE_HUC:
345                 uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_HUC_MAJOR,
346                                                    css->sw_version);
347                 uc_fw->minor_ver_found = FIELD_GET(CSS_SW_VERSION_HUC_MINOR,
348                                                    css->sw_version);
349                 break;
350
351         default:
352                 MISSING_CASE(uc_fw->type);
353                 break;
354         }
355
356         if (uc_fw->major_ver_found != uc_fw->major_ver_wanted ||
357             uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) {
358                 dev_notice(dev, "%s firmware %s: unexpected version: %u.%u != %u.%u\n",
359                            intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
360                            uc_fw->major_ver_found, uc_fw->minor_ver_found,
361                            uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted);
362                 if (!intel_uc_fw_is_overridden(uc_fw)) {
363                         err = -ENOEXEC;
364                         goto fail;
365                 }
366         }
367
368         obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
369         if (IS_ERR(obj)) {
370                 err = PTR_ERR(obj);
371                 goto fail;
372         }
373
374         uc_fw->obj = obj;
375         uc_fw->size = fw->size;
376         intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE);
377
378         release_firmware(fw);
379         return 0;
380
381 fail:
382         intel_uc_fw_change_status(uc_fw, err == -ENOENT ?
383                                   INTEL_UC_FIRMWARE_MISSING :
384                                   INTEL_UC_FIRMWARE_ERROR);
385
386         dev_notice(dev, "%s firmware %s: fetch failed with error %d\n",
387                    intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err);
388         dev_info(dev, "%s firmware(s) can be downloaded from %s\n",
389                  intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL);
390
391         release_firmware(fw);           /* OK even if fw is NULL */
392         return err;
393 }
394
395 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw, struct i915_ggtt *ggtt)
396 {
397         struct drm_mm_node *node = &ggtt->uc_fw;
398
399         GEM_BUG_ON(!node->allocated);
400         GEM_BUG_ON(upper_32_bits(node->start));
401         GEM_BUG_ON(upper_32_bits(node->start + node->size - 1));
402
403         return lower_32_bits(node->start);
404 }
405
406 static void intel_uc_fw_ggtt_bind(struct intel_uc_fw *uc_fw,
407                                   struct intel_gt *gt)
408 {
409         struct drm_i915_gem_object *obj = uc_fw->obj;
410         struct i915_ggtt *ggtt = gt->ggtt;
411         struct i915_vma dummy = {
412                 .node.start = uc_fw_ggtt_offset(uc_fw, ggtt),
413                 .node.size = obj->base.size,
414                 .pages = obj->mm.pages,
415                 .vm = &ggtt->vm,
416         };
417
418         GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
419         GEM_BUG_ON(dummy.node.size > ggtt->uc_fw.size);
420
421         /* uc_fw->obj cache domains were not controlled across suspend */
422         drm_clflush_sg(dummy.pages);
423
424         ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0);
425 }
426
427 static void intel_uc_fw_ggtt_unbind(struct intel_uc_fw *uc_fw,
428                                     struct intel_gt *gt)
429 {
430         struct drm_i915_gem_object *obj = uc_fw->obj;
431         struct i915_ggtt *ggtt = gt->ggtt;
432         u64 start = uc_fw_ggtt_offset(uc_fw, ggtt);
433
434         ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size);
435 }
436
437 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
438                       u32 wopcm_offset, u32 dma_flags)
439 {
440         struct intel_uncore *uncore = gt->uncore;
441         u64 offset;
442         int ret;
443
444         ret = i915_inject_load_error(gt->i915, -ETIMEDOUT);
445         if (ret)
446                 return ret;
447
448         intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
449
450         /* Set the source address for the uCode */
451         offset = uc_fw_ggtt_offset(uc_fw, gt->ggtt);
452         GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000);
453         intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset));
454         intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset));
455
456         /* Set the DMA destination */
457         intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, wopcm_offset);
458         intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);
459
460         /*
461          * Set the transfer size. The header plus uCode will be copied to WOPCM
462          * via DMA, excluding any other components
463          */
464         intel_uncore_write_fw(uncore, DMA_COPY_SIZE,
465                               sizeof(struct uc_css_header) + uc_fw->ucode_size);
466
467         /* Start the DMA */
468         intel_uncore_write_fw(uncore, DMA_CTRL,
469                               _MASKED_BIT_ENABLE(dma_flags | START_DMA));
470
471         /* Wait for DMA to finish */
472         ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100);
473         if (ret)
474                 dev_err(gt->i915->drm.dev, "DMA for %s fw failed, DMA_CTRL=%u\n",
475                         intel_uc_fw_type_repr(uc_fw->type),
476                         intel_uncore_read_fw(uncore, DMA_CTRL));
477
478         /* Disable the bits once DMA is over */
479         intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags));
480
481         intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
482
483         return ret;
484 }
485
486 /**
487  * intel_uc_fw_upload - load uC firmware using custom loader
488  * @uc_fw: uC firmware
489  * @gt: the intel_gt structure
490  * @wopcm_offset: destination offset in wopcm
491  * @dma_flags: flags for flags for dma ctrl
492  *
493  * Loads uC firmware and updates internal flags.
494  *
495  * Return: 0 on success, non-zero on failure.
496  */
497 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
498                        u32 wopcm_offset, u32 dma_flags)
499 {
500         int err;
501
502         /* make sure the status was cleared the last time we reset the uc */
503         GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw));
504
505         err = i915_inject_load_error(gt->i915, -ENOEXEC);
506         if (err)
507                 return err;
508
509         if (!intel_uc_fw_is_available(uc_fw))
510                 return -ENOEXEC;
511
512         /* Call custom loader */
513         intel_uc_fw_ggtt_bind(uc_fw, gt);
514         err = uc_fw_xfer(uc_fw, gt, wopcm_offset, dma_flags);
515         intel_uc_fw_ggtt_unbind(uc_fw, gt);
516         if (err)
517                 goto fail;
518
519         intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED);
520         return 0;
521
522 fail:
523         i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n",
524                          intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
525                          err);
526         intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL);
527         return err;
528 }
529
530 int intel_uc_fw_init(struct intel_uc_fw *uc_fw)
531 {
532         int err;
533
534         /* this should happen before the load! */
535         GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw));
536
537         if (!intel_uc_fw_is_available(uc_fw))
538                 return -ENOEXEC;
539
540         err = i915_gem_object_pin_pages(uc_fw->obj);
541         if (err) {
542                 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n",
543                                  intel_uc_fw_type_repr(uc_fw->type), err);
544                 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL);
545         }
546
547         return err;
548 }
549
550 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw)
551 {
552         if (!intel_uc_fw_is_available(uc_fw))
553                 return;
554
555         i915_gem_object_unpin_pages(uc_fw->obj);
556 }
557
558 /**
559  * intel_uc_fw_cleanup_fetch - cleanup uC firmware
560  * @uc_fw: uC firmware
561  *
562  * Cleans up uC firmware by releasing the firmware GEM obj.
563  */
564 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw)
565 {
566         if (!intel_uc_fw_is_available(uc_fw))
567                 return;
568
569         i915_gem_object_put(fetch_and_zero(&uc_fw->obj));
570
571         intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED);
572 }
573
574 /**
575  * intel_uc_fw_copy_rsa - copy fw RSA to buffer
576  *
577  * @uc_fw: uC firmware
578  * @dst: dst buffer
579  * @max_len: max number of bytes to copy
580  *
581  * Return: number of copied bytes.
582  */
583 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len)
584 {
585         struct sg_table *pages = uc_fw->obj->mm.pages;
586         u32 size = min_t(u32, uc_fw->rsa_size, max_len);
587         u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size;
588
589         GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw));
590
591         return sg_pcopy_to_buffer(pages->sgl, pages->nents, dst, size, offset);
592 }
593
594 /**
595  * intel_uc_fw_dump - dump information about uC firmware
596  * @uc_fw: uC firmware
597  * @p: the &drm_printer
598  *
599  * Pretty printer for uC firmware.
600  */
601 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p)
602 {
603         drm_printf(p, "%s firmware: %s\n",
604                    intel_uc_fw_type_repr(uc_fw->type), uc_fw->path);
605         drm_printf(p, "\tstatus: %s\n",
606                    intel_uc_fw_status_repr(uc_fw->status));
607         drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n",
608                    uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted,
609                    uc_fw->major_ver_found, uc_fw->minor_ver_found);
610         drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size);
611         drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size);
612 }