2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
37 #include <drm/drm_displayid.h>
39 #define version_greater(edid, maj, min) \
40 (((edid)->version > (maj)) || \
41 ((edid)->version == (maj) && (edid)->revision > (min)))
43 #define EDID_EST_TIMINGS 16
44 #define EDID_STD_TIMINGS 8
45 #define EDID_DETAILED_TIMINGS 4
48 * EDID blocks out in the wild have a variety of bugs, try to collect
49 * them here (note that userspace may work around broken monitors first,
50 * but fixes should make their way here so that the kernel "just works"
51 * on as many displays as possible).
54 /* First detailed mode wrong, use largest 60Hz mode */
55 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
56 /* Reported 135MHz pixel clock is too high, needs adjustment */
57 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
58 /* Prefer the largest mode at 75 Hz */
59 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
60 /* Detail timing is in cm not mm */
61 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
62 /* Detailed timing descriptors have bogus size values, so just take the
63 * maximum size and use that.
65 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
66 /* Monitor forgot to set the first detailed is preferred bit. */
67 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
68 /* use +hsync +vsync for detailed mode */
69 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
70 /* Force reduced-blanking timings for detailed modes */
71 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
73 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
75 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
77 #define EDID_QUIRK_FORCE_6BPC (1 << 10)
79 #define EDID_QUIRK_FORCE_10BPC (1 << 11)
81 struct detailed_mode_closure {
82 struct drm_connector *connector;
94 static struct edid_quirk {
98 } edid_quirk_list[] = {
100 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
102 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
104 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
106 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
107 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
109 /* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */
110 { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
112 /* Belinea 10 15 55 */
113 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
114 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
116 /* Envision Peripherals, Inc. EN-7100e */
117 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
118 /* Envision EN2028 */
119 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
121 /* Funai Electronics PM36B */
122 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
123 EDID_QUIRK_DETAILED_IN_CM },
125 /* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
126 { "LGD", 764, EDID_QUIRK_FORCE_10BPC },
128 /* LG Philips LCD LP154W01-A5 */
129 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
130 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
132 /* Philips 107p5 CRT */
133 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
136 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
138 /* Samsung SyncMaster 205BW. Note: irony */
139 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
140 /* Samsung SyncMaster 22[5-6]BW */
141 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
142 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
144 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
145 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
147 /* ViewSonic VA2026w */
148 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
150 /* Medion MD 30217 PG */
151 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
154 { "SDC", 18514, EDID_QUIRK_FORCE_6BPC },
156 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
157 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
159 /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
160 { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
164 * Autogenerated from the DMT spec.
165 * This table is copied from xfree86/modes/xf86EdidModes.c.
167 static const struct drm_display_mode drm_dmt_modes[] = {
168 /* 0x01 - 640x350@85Hz */
169 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
170 736, 832, 0, 350, 382, 385, 445, 0,
171 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
172 /* 0x02 - 640x400@85Hz */
173 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
174 736, 832, 0, 400, 401, 404, 445, 0,
175 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
176 /* 0x03 - 720x400@85Hz */
177 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
178 828, 936, 0, 400, 401, 404, 446, 0,
179 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
180 /* 0x04 - 640x480@60Hz */
181 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
182 752, 800, 0, 480, 490, 492, 525, 0,
183 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
184 /* 0x05 - 640x480@72Hz */
185 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
186 704, 832, 0, 480, 489, 492, 520, 0,
187 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
188 /* 0x06 - 640x480@75Hz */
189 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
190 720, 840, 0, 480, 481, 484, 500, 0,
191 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
192 /* 0x07 - 640x480@85Hz */
193 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
194 752, 832, 0, 480, 481, 484, 509, 0,
195 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
196 /* 0x08 - 800x600@56Hz */
197 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
198 896, 1024, 0, 600, 601, 603, 625, 0,
199 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
200 /* 0x09 - 800x600@60Hz */
201 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
202 968, 1056, 0, 600, 601, 605, 628, 0,
203 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
204 /* 0x0a - 800x600@72Hz */
205 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
206 976, 1040, 0, 600, 637, 643, 666, 0,
207 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
208 /* 0x0b - 800x600@75Hz */
209 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
210 896, 1056, 0, 600, 601, 604, 625, 0,
211 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
212 /* 0x0c - 800x600@85Hz */
213 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
214 896, 1048, 0, 600, 601, 604, 631, 0,
215 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
216 /* 0x0d - 800x600@120Hz RB */
217 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
218 880, 960, 0, 600, 603, 607, 636, 0,
219 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
220 /* 0x0e - 848x480@60Hz */
221 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
222 976, 1088, 0, 480, 486, 494, 517, 0,
223 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
224 /* 0x0f - 1024x768@43Hz, interlace */
225 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
226 1208, 1264, 0, 768, 768, 772, 817, 0,
227 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
228 DRM_MODE_FLAG_INTERLACE) },
229 /* 0x10 - 1024x768@60Hz */
230 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
231 1184, 1344, 0, 768, 771, 777, 806, 0,
232 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
233 /* 0x11 - 1024x768@70Hz */
234 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
235 1184, 1328, 0, 768, 771, 777, 806, 0,
236 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
237 /* 0x12 - 1024x768@75Hz */
238 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
239 1136, 1312, 0, 768, 769, 772, 800, 0,
240 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
241 /* 0x13 - 1024x768@85Hz */
242 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
243 1168, 1376, 0, 768, 769, 772, 808, 0,
244 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
245 /* 0x14 - 1024x768@120Hz RB */
246 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
247 1104, 1184, 0, 768, 771, 775, 813, 0,
248 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
249 /* 0x15 - 1152x864@75Hz */
250 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
251 1344, 1600, 0, 864, 865, 868, 900, 0,
252 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
253 /* 0x55 - 1280x720@60Hz */
254 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
255 1430, 1650, 0, 720, 725, 730, 750, 0,
256 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
257 /* 0x16 - 1280x768@60Hz RB */
258 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
259 1360, 1440, 0, 768, 771, 778, 790, 0,
260 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
261 /* 0x17 - 1280x768@60Hz */
262 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
263 1472, 1664, 0, 768, 771, 778, 798, 0,
264 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
265 /* 0x18 - 1280x768@75Hz */
266 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
267 1488, 1696, 0, 768, 771, 778, 805, 0,
268 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
269 /* 0x19 - 1280x768@85Hz */
270 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
271 1496, 1712, 0, 768, 771, 778, 809, 0,
272 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
273 /* 0x1a - 1280x768@120Hz RB */
274 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
275 1360, 1440, 0, 768, 771, 778, 813, 0,
276 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
277 /* 0x1b - 1280x800@60Hz RB */
278 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
279 1360, 1440, 0, 800, 803, 809, 823, 0,
280 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
281 /* 0x1c - 1280x800@60Hz */
282 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
283 1480, 1680, 0, 800, 803, 809, 831, 0,
284 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
285 /* 0x1d - 1280x800@75Hz */
286 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
287 1488, 1696, 0, 800, 803, 809, 838, 0,
288 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
289 /* 0x1e - 1280x800@85Hz */
290 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
291 1496, 1712, 0, 800, 803, 809, 843, 0,
292 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
293 /* 0x1f - 1280x800@120Hz RB */
294 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
295 1360, 1440, 0, 800, 803, 809, 847, 0,
296 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
297 /* 0x20 - 1280x960@60Hz */
298 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
299 1488, 1800, 0, 960, 961, 964, 1000, 0,
300 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
301 /* 0x21 - 1280x960@85Hz */
302 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
303 1504, 1728, 0, 960, 961, 964, 1011, 0,
304 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
305 /* 0x22 - 1280x960@120Hz RB */
306 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
307 1360, 1440, 0, 960, 963, 967, 1017, 0,
308 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
309 /* 0x23 - 1280x1024@60Hz */
310 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
311 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
312 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
313 /* 0x24 - 1280x1024@75Hz */
314 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
315 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
316 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
317 /* 0x25 - 1280x1024@85Hz */
318 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
319 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
320 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
321 /* 0x26 - 1280x1024@120Hz RB */
322 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
323 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
324 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
325 /* 0x27 - 1360x768@60Hz */
326 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
327 1536, 1792, 0, 768, 771, 777, 795, 0,
328 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
329 /* 0x28 - 1360x768@120Hz RB */
330 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
331 1440, 1520, 0, 768, 771, 776, 813, 0,
332 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
333 /* 0x51 - 1366x768@60Hz */
334 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
335 1579, 1792, 0, 768, 771, 774, 798, 0,
336 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
337 /* 0x56 - 1366x768@60Hz */
338 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
339 1436, 1500, 0, 768, 769, 772, 800, 0,
340 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
341 /* 0x29 - 1400x1050@60Hz RB */
342 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
343 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
344 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
345 /* 0x2a - 1400x1050@60Hz */
346 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
347 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
348 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
349 /* 0x2b - 1400x1050@75Hz */
350 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
351 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
352 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
353 /* 0x2c - 1400x1050@85Hz */
354 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
355 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
356 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
357 /* 0x2d - 1400x1050@120Hz RB */
358 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
359 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
360 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
361 /* 0x2e - 1440x900@60Hz RB */
362 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
363 1520, 1600, 0, 900, 903, 909, 926, 0,
364 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
365 /* 0x2f - 1440x900@60Hz */
366 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
367 1672, 1904, 0, 900, 903, 909, 934, 0,
368 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
369 /* 0x30 - 1440x900@75Hz */
370 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
371 1688, 1936, 0, 900, 903, 909, 942, 0,
372 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
373 /* 0x31 - 1440x900@85Hz */
374 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
375 1696, 1952, 0, 900, 903, 909, 948, 0,
376 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
377 /* 0x32 - 1440x900@120Hz RB */
378 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
379 1520, 1600, 0, 900, 903, 909, 953, 0,
380 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
381 /* 0x53 - 1600x900@60Hz */
382 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
383 1704, 1800, 0, 900, 901, 904, 1000, 0,
384 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
385 /* 0x33 - 1600x1200@60Hz */
386 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
387 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
388 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
389 /* 0x34 - 1600x1200@65Hz */
390 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
391 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
392 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
393 /* 0x35 - 1600x1200@70Hz */
394 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
395 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
396 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
397 /* 0x36 - 1600x1200@75Hz */
398 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
399 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
400 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
401 /* 0x37 - 1600x1200@85Hz */
402 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
403 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
404 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
405 /* 0x38 - 1600x1200@120Hz RB */
406 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
407 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
408 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
409 /* 0x39 - 1680x1050@60Hz RB */
410 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
411 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
412 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
413 /* 0x3a - 1680x1050@60Hz */
414 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
415 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
416 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
417 /* 0x3b - 1680x1050@75Hz */
418 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
419 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
420 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
421 /* 0x3c - 1680x1050@85Hz */
422 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
423 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
424 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
425 /* 0x3d - 1680x1050@120Hz RB */
426 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
427 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
428 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
429 /* 0x3e - 1792x1344@60Hz */
430 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
431 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
432 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
433 /* 0x3f - 1792x1344@75Hz */
434 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
435 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
436 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437 /* 0x40 - 1792x1344@120Hz RB */
438 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
439 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
441 /* 0x41 - 1856x1392@60Hz */
442 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
443 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
444 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
445 /* 0x42 - 1856x1392@75Hz */
446 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
447 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
448 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449 /* 0x43 - 1856x1392@120Hz RB */
450 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
451 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
453 /* 0x52 - 1920x1080@60Hz */
454 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
455 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
456 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
457 /* 0x44 - 1920x1200@60Hz RB */
458 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
459 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
461 /* 0x45 - 1920x1200@60Hz */
462 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
463 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
464 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
465 /* 0x46 - 1920x1200@75Hz */
466 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
467 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
468 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
469 /* 0x47 - 1920x1200@85Hz */
470 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
471 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
472 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
473 /* 0x48 - 1920x1200@120Hz RB */
474 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
475 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
477 /* 0x49 - 1920x1440@60Hz */
478 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
479 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
480 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
481 /* 0x4a - 1920x1440@75Hz */
482 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
483 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
484 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
485 /* 0x4b - 1920x1440@120Hz RB */
486 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
487 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
489 /* 0x54 - 2048x1152@60Hz */
490 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
491 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
493 /* 0x4c - 2560x1600@60Hz RB */
494 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
495 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
497 /* 0x4d - 2560x1600@60Hz */
498 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
499 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
500 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
501 /* 0x4e - 2560x1600@75Hz */
502 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
503 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
504 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
505 /* 0x4f - 2560x1600@85Hz */
506 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
507 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
508 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
509 /* 0x50 - 2560x1600@120Hz RB */
510 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
511 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
513 /* 0x57 - 4096x2160@60Hz RB */
514 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
515 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
516 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
517 /* 0x58 - 4096x2160@59.94Hz RB */
518 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
519 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
524 * These more or less come from the DMT spec. The 720x400 modes are
525 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
526 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
527 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
530 * The DMT modes have been fact-checked; the rest are mild guesses.
532 static const struct drm_display_mode edid_est_modes[] = {
533 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
534 968, 1056, 0, 600, 601, 605, 628, 0,
535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
536 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
537 896, 1024, 0, 600, 601, 603, 625, 0,
538 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
539 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
540 720, 840, 0, 480, 481, 484, 500, 0,
541 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
542 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
543 704, 832, 0, 480, 489, 491, 520, 0,
544 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
545 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
546 768, 864, 0, 480, 483, 486, 525, 0,
547 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
548 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
549 752, 800, 0, 480, 490, 492, 525, 0,
550 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
551 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
552 846, 900, 0, 400, 421, 423, 449, 0,
553 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
554 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
555 846, 900, 0, 400, 412, 414, 449, 0,
556 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
557 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
558 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
559 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
560 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
561 1136, 1312, 0, 768, 769, 772, 800, 0,
562 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
563 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
564 1184, 1328, 0, 768, 771, 777, 806, 0,
565 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
566 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
567 1184, 1344, 0, 768, 771, 777, 806, 0,
568 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
569 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
570 1208, 1264, 0, 768, 768, 776, 817, 0,
571 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
572 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
573 928, 1152, 0, 624, 625, 628, 667, 0,
574 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
575 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
576 896, 1056, 0, 600, 601, 604, 625, 0,
577 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
578 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
579 976, 1040, 0, 600, 637, 643, 666, 0,
580 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
581 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
582 1344, 1600, 0, 864, 865, 868, 900, 0,
583 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
593 static const struct minimode est3_modes[] = {
601 { 1024, 768, 85, 0 },
602 { 1152, 864, 75, 0 },
604 { 1280, 768, 60, 1 },
605 { 1280, 768, 60, 0 },
606 { 1280, 768, 75, 0 },
607 { 1280, 768, 85, 0 },
608 { 1280, 960, 60, 0 },
609 { 1280, 960, 85, 0 },
610 { 1280, 1024, 60, 0 },
611 { 1280, 1024, 85, 0 },
613 { 1360, 768, 60, 0 },
614 { 1440, 900, 60, 1 },
615 { 1440, 900, 60, 0 },
616 { 1440, 900, 75, 0 },
617 { 1440, 900, 85, 0 },
618 { 1400, 1050, 60, 1 },
619 { 1400, 1050, 60, 0 },
620 { 1400, 1050, 75, 0 },
622 { 1400, 1050, 85, 0 },
623 { 1680, 1050, 60, 1 },
624 { 1680, 1050, 60, 0 },
625 { 1680, 1050, 75, 0 },
626 { 1680, 1050, 85, 0 },
627 { 1600, 1200, 60, 0 },
628 { 1600, 1200, 65, 0 },
629 { 1600, 1200, 70, 0 },
631 { 1600, 1200, 75, 0 },
632 { 1600, 1200, 85, 0 },
633 { 1792, 1344, 60, 0 },
634 { 1792, 1344, 75, 0 },
635 { 1856, 1392, 60, 0 },
636 { 1856, 1392, 75, 0 },
637 { 1920, 1200, 60, 1 },
638 { 1920, 1200, 60, 0 },
640 { 1920, 1200, 75, 0 },
641 { 1920, 1200, 85, 0 },
642 { 1920, 1440, 60, 0 },
643 { 1920, 1440, 75, 0 },
646 static const struct minimode extra_modes[] = {
647 { 1024, 576, 60, 0 },
648 { 1366, 768, 60, 0 },
649 { 1600, 900, 60, 0 },
650 { 1680, 945, 60, 0 },
651 { 1920, 1080, 60, 0 },
652 { 2048, 1152, 60, 0 },
653 { 2048, 1536, 60, 0 },
657 * Probably taken from CEA-861 spec.
658 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
660 static const struct drm_display_mode edid_cea_modes[] = {
661 /* 1 - 640x480@60Hz */
662 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
663 752, 800, 0, 480, 490, 492, 525, 0,
664 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
665 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
666 /* 2 - 720x480@60Hz */
667 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
668 798, 858, 0, 480, 489, 495, 525, 0,
669 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
670 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
671 /* 3 - 720x480@60Hz */
672 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
673 798, 858, 0, 480, 489, 495, 525, 0,
674 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
675 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
676 /* 4 - 1280x720@60Hz */
677 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
678 1430, 1650, 0, 720, 725, 730, 750, 0,
679 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
680 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
681 /* 5 - 1920x1080i@60Hz */
682 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
683 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
684 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
685 DRM_MODE_FLAG_INTERLACE),
686 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
687 /* 6 - 720(1440)x480i@60Hz */
688 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
689 801, 858, 0, 480, 488, 494, 525, 0,
690 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
691 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
692 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
693 /* 7 - 720(1440)x480i@60Hz */
694 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
695 801, 858, 0, 480, 488, 494, 525, 0,
696 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
697 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
698 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
699 /* 8 - 720(1440)x240@60Hz */
700 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
701 801, 858, 0, 240, 244, 247, 262, 0,
702 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
703 DRM_MODE_FLAG_DBLCLK),
704 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
705 /* 9 - 720(1440)x240@60Hz */
706 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
707 801, 858, 0, 240, 244, 247, 262, 0,
708 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
709 DRM_MODE_FLAG_DBLCLK),
710 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
711 /* 10 - 2880x480i@60Hz */
712 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
713 3204, 3432, 0, 480, 488, 494, 525, 0,
714 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
715 DRM_MODE_FLAG_INTERLACE),
716 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
717 /* 11 - 2880x480i@60Hz */
718 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
719 3204, 3432, 0, 480, 488, 494, 525, 0,
720 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
721 DRM_MODE_FLAG_INTERLACE),
722 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
723 /* 12 - 2880x240@60Hz */
724 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
725 3204, 3432, 0, 240, 244, 247, 262, 0,
726 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
727 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
728 /* 13 - 2880x240@60Hz */
729 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
730 3204, 3432, 0, 240, 244, 247, 262, 0,
731 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
732 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
733 /* 14 - 1440x480@60Hz */
734 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
735 1596, 1716, 0, 480, 489, 495, 525, 0,
736 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
737 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
738 /* 15 - 1440x480@60Hz */
739 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
740 1596, 1716, 0, 480, 489, 495, 525, 0,
741 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
742 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
743 /* 16 - 1920x1080@60Hz */
744 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
745 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
746 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
747 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
748 /* 17 - 720x576@50Hz */
749 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
750 796, 864, 0, 576, 581, 586, 625, 0,
751 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
752 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
753 /* 18 - 720x576@50Hz */
754 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
755 796, 864, 0, 576, 581, 586, 625, 0,
756 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
757 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
758 /* 19 - 1280x720@50Hz */
759 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
760 1760, 1980, 0, 720, 725, 730, 750, 0,
761 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
762 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
763 /* 20 - 1920x1080i@50Hz */
764 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
765 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
766 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
767 DRM_MODE_FLAG_INTERLACE),
768 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
769 /* 21 - 720(1440)x576i@50Hz */
770 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
771 795, 864, 0, 576, 580, 586, 625, 0,
772 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
773 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
774 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
775 /* 22 - 720(1440)x576i@50Hz */
776 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
777 795, 864, 0, 576, 580, 586, 625, 0,
778 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
779 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
780 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
781 /* 23 - 720(1440)x288@50Hz */
782 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
783 795, 864, 0, 288, 290, 293, 312, 0,
784 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
785 DRM_MODE_FLAG_DBLCLK),
786 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
787 /* 24 - 720(1440)x288@50Hz */
788 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
789 795, 864, 0, 288, 290, 293, 312, 0,
790 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
791 DRM_MODE_FLAG_DBLCLK),
792 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
793 /* 25 - 2880x576i@50Hz */
794 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
795 3180, 3456, 0, 576, 580, 586, 625, 0,
796 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
797 DRM_MODE_FLAG_INTERLACE),
798 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
799 /* 26 - 2880x576i@50Hz */
800 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
801 3180, 3456, 0, 576, 580, 586, 625, 0,
802 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
803 DRM_MODE_FLAG_INTERLACE),
804 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
805 /* 27 - 2880x288@50Hz */
806 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
807 3180, 3456, 0, 288, 290, 293, 312, 0,
808 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
809 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
810 /* 28 - 2880x288@50Hz */
811 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
812 3180, 3456, 0, 288, 290, 293, 312, 0,
813 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
814 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
815 /* 29 - 1440x576@50Hz */
816 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
817 1592, 1728, 0, 576, 581, 586, 625, 0,
818 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
819 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
820 /* 30 - 1440x576@50Hz */
821 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
822 1592, 1728, 0, 576, 581, 586, 625, 0,
823 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
824 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
825 /* 31 - 1920x1080@50Hz */
826 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
827 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
828 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
829 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
830 /* 32 - 1920x1080@24Hz */
831 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
832 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
833 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
834 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
835 /* 33 - 1920x1080@25Hz */
836 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
837 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
838 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
839 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
840 /* 34 - 1920x1080@30Hz */
841 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
842 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
843 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
844 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
845 /* 35 - 2880x480@60Hz */
846 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
847 3192, 3432, 0, 480, 489, 495, 525, 0,
848 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
849 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
850 /* 36 - 2880x480@60Hz */
851 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
852 3192, 3432, 0, 480, 489, 495, 525, 0,
853 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
854 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
855 /* 37 - 2880x576@50Hz */
856 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
857 3184, 3456, 0, 576, 581, 586, 625, 0,
858 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
859 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
860 /* 38 - 2880x576@50Hz */
861 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
862 3184, 3456, 0, 576, 581, 586, 625, 0,
863 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
864 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
865 /* 39 - 1920x1080i@50Hz */
866 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
867 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
868 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
869 DRM_MODE_FLAG_INTERLACE),
870 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
871 /* 40 - 1920x1080i@100Hz */
872 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
873 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
874 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
875 DRM_MODE_FLAG_INTERLACE),
876 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
877 /* 41 - 1280x720@100Hz */
878 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
879 1760, 1980, 0, 720, 725, 730, 750, 0,
880 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
881 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
882 /* 42 - 720x576@100Hz */
883 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
884 796, 864, 0, 576, 581, 586, 625, 0,
885 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
886 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
887 /* 43 - 720x576@100Hz */
888 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
889 796, 864, 0, 576, 581, 586, 625, 0,
890 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
891 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
892 /* 44 - 720(1440)x576i@100Hz */
893 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
894 795, 864, 0, 576, 580, 586, 625, 0,
895 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
896 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
897 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
898 /* 45 - 720(1440)x576i@100Hz */
899 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
900 795, 864, 0, 576, 580, 586, 625, 0,
901 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
902 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
903 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
904 /* 46 - 1920x1080i@120Hz */
905 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
906 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
907 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
908 DRM_MODE_FLAG_INTERLACE),
909 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
910 /* 47 - 1280x720@120Hz */
911 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
912 1430, 1650, 0, 720, 725, 730, 750, 0,
913 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
914 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
915 /* 48 - 720x480@120Hz */
916 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
917 798, 858, 0, 480, 489, 495, 525, 0,
918 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
919 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
920 /* 49 - 720x480@120Hz */
921 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
922 798, 858, 0, 480, 489, 495, 525, 0,
923 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
924 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
925 /* 50 - 720(1440)x480i@120Hz */
926 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
927 801, 858, 0, 480, 488, 494, 525, 0,
928 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
929 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
930 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
931 /* 51 - 720(1440)x480i@120Hz */
932 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
933 801, 858, 0, 480, 488, 494, 525, 0,
934 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
935 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
936 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
937 /* 52 - 720x576@200Hz */
938 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
939 796, 864, 0, 576, 581, 586, 625, 0,
940 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
941 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
942 /* 53 - 720x576@200Hz */
943 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
944 796, 864, 0, 576, 581, 586, 625, 0,
945 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
946 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
947 /* 54 - 720(1440)x576i@200Hz */
948 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
949 795, 864, 0, 576, 580, 586, 625, 0,
950 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
951 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
952 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
953 /* 55 - 720(1440)x576i@200Hz */
954 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
955 795, 864, 0, 576, 580, 586, 625, 0,
956 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
957 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
958 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
959 /* 56 - 720x480@240Hz */
960 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
961 798, 858, 0, 480, 489, 495, 525, 0,
962 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
963 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
964 /* 57 - 720x480@240Hz */
965 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
966 798, 858, 0, 480, 489, 495, 525, 0,
967 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
968 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
969 /* 58 - 720(1440)x480i@240 */
970 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
971 801, 858, 0, 480, 488, 494, 525, 0,
972 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
973 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
974 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
975 /* 59 - 720(1440)x480i@240 */
976 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
977 801, 858, 0, 480, 488, 494, 525, 0,
978 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
979 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
980 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
981 /* 60 - 1280x720@24Hz */
982 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
983 3080, 3300, 0, 720, 725, 730, 750, 0,
984 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
985 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
986 /* 61 - 1280x720@25Hz */
987 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
988 3740, 3960, 0, 720, 725, 730, 750, 0,
989 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
990 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
991 /* 62 - 1280x720@30Hz */
992 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
993 3080, 3300, 0, 720, 725, 730, 750, 0,
994 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
995 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
996 /* 63 - 1920x1080@120Hz */
997 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
998 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
999 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1000 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1001 /* 64 - 1920x1080@100Hz */
1002 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1003 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
1004 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1005 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1009 * HDMI 1.4 4k modes.
1011 static const struct drm_display_mode edid_4k_modes[] = {
1012 /* 1 - 3840x2160@30Hz */
1013 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1014 3840, 4016, 4104, 4400, 0,
1015 2160, 2168, 2178, 2250, 0,
1016 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1018 /* 2 - 3840x2160@25Hz */
1019 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1020 3840, 4896, 4984, 5280, 0,
1021 2160, 2168, 2178, 2250, 0,
1022 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1024 /* 3 - 3840x2160@24Hz */
1025 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1026 3840, 5116, 5204, 5500, 0,
1027 2160, 2168, 2178, 2250, 0,
1028 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1030 /* 4 - 4096x2160@24Hz (SMPTE) */
1031 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1032 4096, 5116, 5204, 5500, 0,
1033 2160, 2168, 2178, 2250, 0,
1034 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1038 /*** DDC fetch and block validation ***/
1040 static const u8 edid_header[] = {
1041 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1045 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1046 * @raw_edid: pointer to raw base EDID block
1048 * Sanity check the header of the base EDID block.
1050 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1052 int drm_edid_header_is_valid(const u8 *raw_edid)
1056 for (i = 0; i < sizeof(edid_header); i++)
1057 if (raw_edid[i] == edid_header[i])
1062 EXPORT_SYMBOL(drm_edid_header_is_valid);
1064 static int edid_fixup __read_mostly = 6;
1065 module_param_named(edid_fixup, edid_fixup, int, 0400);
1066 MODULE_PARM_DESC(edid_fixup,
1067 "Minimum number of valid EDID header bytes (0-8, default 6)");
1069 static void drm_get_displayid(struct drm_connector *connector,
1072 static int drm_edid_block_checksum(const u8 *raw_edid)
1076 for (i = 0; i < EDID_LENGTH; i++)
1077 csum += raw_edid[i];
1082 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1084 if (memchr_inv(in_edid, 0, length))
1091 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1092 * @raw_edid: pointer to raw EDID block
1093 * @block: type of block to validate (0 for base, extension otherwise)
1094 * @print_bad_edid: if true, dump bad EDID blocks to the console
1095 * @edid_corrupt: if true, the header or checksum is invalid
1097 * Validate a base or extension EDID block and optionally dump bad blocks to
1100 * Return: True if the block is valid, false otherwise.
1102 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1106 struct edid *edid = (struct edid *)raw_edid;
1108 if (WARN_ON(!raw_edid))
1111 if (edid_fixup > 8 || edid_fixup < 0)
1115 int score = drm_edid_header_is_valid(raw_edid);
1118 *edid_corrupt = false;
1119 } else if (score >= edid_fixup) {
1120 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1121 * The corrupt flag needs to be set here otherwise, the
1122 * fix-up code here will correct the problem, the
1123 * checksum is correct and the test fails
1126 *edid_corrupt = true;
1127 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1128 memcpy(raw_edid, edid_header, sizeof(edid_header));
1131 *edid_corrupt = true;
1136 csum = drm_edid_block_checksum(raw_edid);
1138 if (print_bad_edid) {
1139 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1143 *edid_corrupt = true;
1145 /* allow CEA to slide through, switches mangle this */
1146 if (raw_edid[0] != 0x02)
1150 /* per-block-type checks */
1151 switch (raw_edid[0]) {
1153 if (edid->version != 1) {
1154 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1158 if (edid->revision > 4)
1159 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1169 if (print_bad_edid) {
1170 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1171 printk(KERN_ERR "EDID block is all zeroes\n");
1173 printk(KERN_ERR "Raw EDID:\n");
1174 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1175 raw_edid, EDID_LENGTH, false);
1180 EXPORT_SYMBOL(drm_edid_block_valid);
1183 * drm_edid_is_valid - sanity check EDID data
1186 * Sanity-check an entire EDID record (including extensions)
1188 * Return: True if the EDID data is valid, false otherwise.
1190 bool drm_edid_is_valid(struct edid *edid)
1193 u8 *raw = (u8 *)edid;
1198 for (i = 0; i <= edid->extensions; i++)
1199 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1204 EXPORT_SYMBOL(drm_edid_is_valid);
1206 #define DDC_SEGMENT_ADDR 0x30
1208 * drm_do_probe_ddc_edid() - get EDID information via I2C
1209 * @data: I2C device adapter
1210 * @buf: EDID data buffer to be filled
1211 * @block: 128 byte EDID block to start fetching from
1212 * @len: EDID data buffer length to fetch
1214 * Try to fetch EDID information by calling I2C driver functions.
1216 * Return: 0 on success or -1 on failure.
1219 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1221 struct i2c_adapter *adapter = data;
1222 unsigned char start = block * EDID_LENGTH;
1223 unsigned char segment = block >> 1;
1224 unsigned char xfers = segment ? 3 : 2;
1225 int ret, retries = 5;
1228 * The core I2C driver will automatically retry the transfer if the
1229 * adapter reports EAGAIN. However, we find that bit-banging transfers
1230 * are susceptible to errors under a heavily loaded machine and
1231 * generate spurious NAKs and timeouts. Retrying the transfer
1232 * of the individual block a few times seems to overcome this.
1235 struct i2c_msg msgs[] = {
1237 .addr = DDC_SEGMENT_ADDR,
1255 * Avoid sending the segment addr to not upset non-compliant
1258 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1260 if (ret == -ENXIO) {
1261 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1265 } while (ret != xfers && --retries);
1267 return ret == xfers ? 0 : -1;
1271 * drm_do_get_edid - get EDID data using a custom EDID block read function
1272 * @connector: connector we're probing
1273 * @get_edid_block: EDID block read function
1274 * @data: private data passed to the block read function
1276 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1277 * exposes a different interface to read EDID blocks this function can be used
1278 * to get EDID data using a custom block read function.
1280 * As in the general case the DDC bus is accessible by the kernel at the I2C
1281 * level, drivers must make all reasonable efforts to expose it as an I2C
1282 * adapter and use drm_get_edid() instead of abusing this function.
1284 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1286 struct edid *drm_do_get_edid(struct drm_connector *connector,
1287 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1291 int i, j = 0, valid_extensions = 0;
1293 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1295 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1298 /* base block fetch */
1299 for (i = 0; i < 4; i++) {
1300 if (get_edid_block(data, block, 0, EDID_LENGTH))
1302 if (drm_edid_block_valid(block, 0, print_bad_edid,
1303 &connector->edid_corrupt))
1305 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1306 connector->null_edid_counter++;
1313 /* if there's no extensions, we're done */
1314 if (block[0x7e] == 0)
1315 return (struct edid *)block;
1317 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1322 for (j = 1; j <= block[0x7e]; j++) {
1323 for (i = 0; i < 4; i++) {
1324 if (get_edid_block(data,
1325 block + (valid_extensions + 1) * EDID_LENGTH,
1328 if (drm_edid_block_valid(block + (valid_extensions + 1)
1337 if (i == 4 && print_bad_edid) {
1338 dev_warn(connector->dev->dev,
1339 "%s: Ignoring invalid EDID block %d.\n",
1340 connector->name, j);
1342 connector->bad_edid_counter++;
1346 if (valid_extensions != block[0x7e]) {
1347 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1348 block[0x7e] = valid_extensions;
1349 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1355 return (struct edid *)block;
1358 if (print_bad_edid) {
1359 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1360 connector->name, j);
1362 connector->bad_edid_counter++;
1368 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1371 * drm_probe_ddc() - probe DDC presence
1372 * @adapter: I2C adapter to probe
1374 * Return: True on success, false on failure.
1377 drm_probe_ddc(struct i2c_adapter *adapter)
1381 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1383 EXPORT_SYMBOL(drm_probe_ddc);
1386 * drm_get_edid - get EDID data, if available
1387 * @connector: connector we're probing
1388 * @adapter: I2C adapter to use for DDC
1390 * Poke the given I2C channel to grab EDID data if possible. If found,
1391 * attach it to the connector.
1393 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1395 struct edid *drm_get_edid(struct drm_connector *connector,
1396 struct i2c_adapter *adapter)
1400 if (!drm_probe_ddc(adapter))
1403 edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1405 drm_get_displayid(connector, edid);
1408 EXPORT_SYMBOL(drm_get_edid);
1411 * drm_edid_duplicate - duplicate an EDID and the extensions
1412 * @edid: EDID to duplicate
1414 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1416 struct edid *drm_edid_duplicate(const struct edid *edid)
1418 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1420 EXPORT_SYMBOL(drm_edid_duplicate);
1422 /*** EDID parsing ***/
1425 * edid_vendor - match a string against EDID's obfuscated vendor field
1426 * @edid: EDID to match
1427 * @vendor: vendor string
1429 * Returns true if @vendor is in @edid, false otherwise
1431 static bool edid_vendor(struct edid *edid, char *vendor)
1433 char edid_vendor[3];
1435 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1436 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1437 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1438 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1440 return !strncmp(edid_vendor, vendor, 3);
1444 * edid_get_quirks - return quirk flags for a given EDID
1445 * @edid: EDID to process
1447 * This tells subsequent routines what fixes they need to apply.
1449 static u32 edid_get_quirks(struct edid *edid)
1451 struct edid_quirk *quirk;
1454 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1455 quirk = &edid_quirk_list[i];
1457 if (edid_vendor(edid, quirk->vendor) &&
1458 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1459 return quirk->quirks;
1465 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1466 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1469 * edid_fixup_preferred - set preferred modes based on quirk list
1470 * @connector: has mode list to fix up
1471 * @quirks: quirks list
1473 * Walk the mode list for @connector, clearing the preferred status
1474 * on existing modes and setting it anew for the right mode ala @quirks.
1476 static void edid_fixup_preferred(struct drm_connector *connector,
1479 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1480 int target_refresh = 0;
1481 int cur_vrefresh, preferred_vrefresh;
1483 if (list_empty(&connector->probed_modes))
1486 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1487 target_refresh = 60;
1488 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1489 target_refresh = 75;
1491 preferred_mode = list_first_entry(&connector->probed_modes,
1492 struct drm_display_mode, head);
1494 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1495 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1497 if (cur_mode == preferred_mode)
1500 /* Largest mode is preferred */
1501 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1502 preferred_mode = cur_mode;
1504 cur_vrefresh = cur_mode->vrefresh ?
1505 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1506 preferred_vrefresh = preferred_mode->vrefresh ?
1507 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1508 /* At a given size, try to get closest to target refresh */
1509 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1510 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1511 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1512 preferred_mode = cur_mode;
1516 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1520 mode_is_rb(const struct drm_display_mode *mode)
1522 return (mode->htotal - mode->hdisplay == 160) &&
1523 (mode->hsync_end - mode->hdisplay == 80) &&
1524 (mode->hsync_end - mode->hsync_start == 32) &&
1525 (mode->vsync_start - mode->vdisplay == 3);
1529 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1530 * @dev: Device to duplicate against
1531 * @hsize: Mode width
1532 * @vsize: Mode height
1533 * @fresh: Mode refresh rate
1534 * @rb: Mode reduced-blanking-ness
1536 * Walk the DMT mode list looking for a match for the given parameters.
1538 * Return: A newly allocated copy of the mode, or NULL if not found.
1540 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1541 int hsize, int vsize, int fresh,
1546 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1547 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1548 if (hsize != ptr->hdisplay)
1550 if (vsize != ptr->vdisplay)
1552 if (fresh != drm_mode_vrefresh(ptr))
1554 if (rb != mode_is_rb(ptr))
1557 return drm_mode_duplicate(dev, ptr);
1562 EXPORT_SYMBOL(drm_mode_find_dmt);
1564 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1567 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1571 u8 *det_base = ext + d;
1574 for (i = 0; i < n; i++)
1575 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1579 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1581 unsigned int i, n = min((int)ext[0x02], 6);
1582 u8 *det_base = ext + 5;
1585 return; /* unknown version */
1587 for (i = 0; i < n; i++)
1588 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1592 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1595 struct edid *edid = (struct edid *)raw_edid;
1600 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1601 cb(&(edid->detailed_timings[i]), closure);
1603 for (i = 1; i <= raw_edid[0x7e]; i++) {
1604 u8 *ext = raw_edid + (i * EDID_LENGTH);
1607 cea_for_each_detailed_block(ext, cb, closure);
1610 vtb_for_each_detailed_block(ext, cb, closure);
1619 is_rb(struct detailed_timing *t, void *data)
1622 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1624 *(bool *)data = true;
1627 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1629 drm_monitor_supports_rb(struct edid *edid)
1631 if (edid->revision >= 4) {
1633 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1637 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1641 find_gtf2(struct detailed_timing *t, void *data)
1644 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1648 /* Secondary GTF curve kicks in above some break frequency */
1650 drm_gtf2_hbreak(struct edid *edid)
1653 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1654 return r ? (r[12] * 2) : 0;
1658 drm_gtf2_2c(struct edid *edid)
1661 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1662 return r ? r[13] : 0;
1666 drm_gtf2_m(struct edid *edid)
1669 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1670 return r ? (r[15] << 8) + r[14] : 0;
1674 drm_gtf2_k(struct edid *edid)
1677 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1678 return r ? r[16] : 0;
1682 drm_gtf2_2j(struct edid *edid)
1685 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1686 return r ? r[17] : 0;
1690 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1691 * @edid: EDID block to scan
1693 static int standard_timing_level(struct edid *edid)
1695 if (edid->revision >= 2) {
1696 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1698 if (drm_gtf2_hbreak(edid))
1706 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1707 * monitors fill with ascii space (0x20) instead.
1710 bad_std_timing(u8 a, u8 b)
1712 return (a == 0x00 && b == 0x00) ||
1713 (a == 0x01 && b == 0x01) ||
1714 (a == 0x20 && b == 0x20);
1718 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1719 * @connector: connector of for the EDID block
1720 * @edid: EDID block to scan
1721 * @t: standard timing params
1723 * Take the standard timing params (in this case width, aspect, and refresh)
1724 * and convert them into a real mode using CVT/GTF/DMT.
1726 static struct drm_display_mode *
1727 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1728 struct std_timing *t)
1730 struct drm_device *dev = connector->dev;
1731 struct drm_display_mode *m, *mode = NULL;
1734 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1735 >> EDID_TIMING_ASPECT_SHIFT;
1736 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1737 >> EDID_TIMING_VFREQ_SHIFT;
1738 int timing_level = standard_timing_level(edid);
1740 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1743 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1744 hsize = t->hsize * 8 + 248;
1745 /* vrefresh_rate = vfreq + 60 */
1746 vrefresh_rate = vfreq + 60;
1747 /* the vdisplay is calculated based on the aspect ratio */
1748 if (aspect_ratio == 0) {
1749 if (edid->revision < 3)
1752 vsize = (hsize * 10) / 16;
1753 } else if (aspect_ratio == 1)
1754 vsize = (hsize * 3) / 4;
1755 else if (aspect_ratio == 2)
1756 vsize = (hsize * 4) / 5;
1758 vsize = (hsize * 9) / 16;
1760 /* HDTV hack, part 1 */
1761 if (vrefresh_rate == 60 &&
1762 ((hsize == 1360 && vsize == 765) ||
1763 (hsize == 1368 && vsize == 769))) {
1769 * If this connector already has a mode for this size and refresh
1770 * rate (because it came from detailed or CVT info), use that
1771 * instead. This way we don't have to guess at interlace or
1774 list_for_each_entry(m, &connector->probed_modes, head)
1775 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1776 drm_mode_vrefresh(m) == vrefresh_rate)
1779 /* HDTV hack, part 2 */
1780 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1781 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1783 mode->hdisplay = 1366;
1784 mode->hsync_start = mode->hsync_start - 1;
1785 mode->hsync_end = mode->hsync_end - 1;
1789 /* check whether it can be found in default mode table */
1790 if (drm_monitor_supports_rb(edid)) {
1791 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1796 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1800 /* okay, generate it */
1801 switch (timing_level) {
1805 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1809 * This is potentially wrong if there's ever a monitor with
1810 * more than one ranges section, each claiming a different
1811 * secondary GTF curve. Please don't do that.
1813 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1816 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1817 drm_mode_destroy(dev, mode);
1818 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1819 vrefresh_rate, 0, 0,
1827 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1835 * EDID is delightfully ambiguous about how interlaced modes are to be
1836 * encoded. Our internal representation is of frame height, but some
1837 * HDTV detailed timings are encoded as field height.
1839 * The format list here is from CEA, in frame size. Technically we
1840 * should be checking refresh rate too. Whatever.
1843 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1844 struct detailed_pixel_timing *pt)
1847 static const struct {
1849 } cea_interlaced[] = {
1859 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1862 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1863 if ((mode->hdisplay == cea_interlaced[i].w) &&
1864 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1865 mode->vdisplay *= 2;
1866 mode->vsync_start *= 2;
1867 mode->vsync_end *= 2;
1873 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1877 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1878 * @dev: DRM device (needed to create new mode)
1880 * @timing: EDID detailed timing info
1881 * @quirks: quirks to apply
1883 * An EDID detailed timing block contains enough info for us to create and
1884 * return a new struct drm_display_mode.
1886 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1888 struct detailed_timing *timing,
1891 struct drm_display_mode *mode;
1892 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1893 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1894 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1895 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1896 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1897 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1898 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1899 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1900 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1902 /* ignore tiny modes */
1903 if (hactive < 64 || vactive < 64)
1906 if (pt->misc & DRM_EDID_PT_STEREO) {
1907 DRM_DEBUG_KMS("stereo mode not supported\n");
1910 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1911 DRM_DEBUG_KMS("composite sync not supported\n");
1914 /* it is incorrect if hsync/vsync width is zero */
1915 if (!hsync_pulse_width || !vsync_pulse_width) {
1916 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1917 "Wrong Hsync/Vsync pulse width\n");
1921 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1922 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1929 mode = drm_mode_create(dev);
1933 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1934 timing->pixel_clock = cpu_to_le16(1088);
1936 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1938 mode->hdisplay = hactive;
1939 mode->hsync_start = mode->hdisplay + hsync_offset;
1940 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1941 mode->htotal = mode->hdisplay + hblank;
1943 mode->vdisplay = vactive;
1944 mode->vsync_start = mode->vdisplay + vsync_offset;
1945 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1946 mode->vtotal = mode->vdisplay + vblank;
1948 /* Some EDIDs have bogus h/vtotal values */
1949 if (mode->hsync_end > mode->htotal)
1950 mode->htotal = mode->hsync_end + 1;
1951 if (mode->vsync_end > mode->vtotal)
1952 mode->vtotal = mode->vsync_end + 1;
1954 drm_mode_do_interlace_quirk(mode, pt);
1956 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1957 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1960 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1961 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1962 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1963 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1966 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1967 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1969 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1970 mode->width_mm *= 10;
1971 mode->height_mm *= 10;
1974 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1975 mode->width_mm = edid->width_cm * 10;
1976 mode->height_mm = edid->height_cm * 10;
1979 mode->type = DRM_MODE_TYPE_DRIVER;
1980 mode->vrefresh = drm_mode_vrefresh(mode);
1981 drm_mode_set_name(mode);
1987 mode_in_hsync_range(const struct drm_display_mode *mode,
1988 struct edid *edid, u8 *t)
1990 int hsync, hmin, hmax;
1993 if (edid->revision >= 4)
1994 hmin += ((t[4] & 0x04) ? 255 : 0);
1996 if (edid->revision >= 4)
1997 hmax += ((t[4] & 0x08) ? 255 : 0);
1998 hsync = drm_mode_hsync(mode);
2000 return (hsync <= hmax && hsync >= hmin);
2004 mode_in_vsync_range(const struct drm_display_mode *mode,
2005 struct edid *edid, u8 *t)
2007 int vsync, vmin, vmax;
2010 if (edid->revision >= 4)
2011 vmin += ((t[4] & 0x01) ? 255 : 0);
2013 if (edid->revision >= 4)
2014 vmax += ((t[4] & 0x02) ? 255 : 0);
2015 vsync = drm_mode_vrefresh(mode);
2017 return (vsync <= vmax && vsync >= vmin);
2021 range_pixel_clock(struct edid *edid, u8 *t)
2024 if (t[9] == 0 || t[9] == 255)
2027 /* 1.4 with CVT support gives us real precision, yay */
2028 if (edid->revision >= 4 && t[10] == 0x04)
2029 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2031 /* 1.3 is pathetic, so fuzz up a bit */
2032 return t[9] * 10000 + 5001;
2036 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2037 struct detailed_timing *timing)
2040 u8 *t = (u8 *)timing;
2042 if (!mode_in_hsync_range(mode, edid, t))
2045 if (!mode_in_vsync_range(mode, edid, t))
2048 if ((max_clock = range_pixel_clock(edid, t)))
2049 if (mode->clock > max_clock)
2052 /* 1.4 max horizontal check */
2053 if (edid->revision >= 4 && t[10] == 0x04)
2054 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2057 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2063 static bool valid_inferred_mode(const struct drm_connector *connector,
2064 const struct drm_display_mode *mode)
2066 const struct drm_display_mode *m;
2069 list_for_each_entry(m, &connector->probed_modes, head) {
2070 if (mode->hdisplay == m->hdisplay &&
2071 mode->vdisplay == m->vdisplay &&
2072 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2073 return false; /* duplicated */
2074 if (mode->hdisplay <= m->hdisplay &&
2075 mode->vdisplay <= m->vdisplay)
2082 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2083 struct detailed_timing *timing)
2086 struct drm_display_mode *newmode;
2087 struct drm_device *dev = connector->dev;
2089 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2090 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2091 valid_inferred_mode(connector, drm_dmt_modes + i)) {
2092 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2094 drm_mode_probed_add(connector, newmode);
2103 /* fix up 1366x768 mode from 1368x768;
2104 * GFT/CVT can't express 1366 width which isn't dividable by 8
2106 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2108 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2109 mode->hdisplay = 1366;
2110 mode->hsync_start--;
2112 drm_mode_set_name(mode);
2117 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2118 struct detailed_timing *timing)
2121 struct drm_display_mode *newmode;
2122 struct drm_device *dev = connector->dev;
2124 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2125 const struct minimode *m = &extra_modes[i];
2126 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2130 fixup_mode_1366x768(newmode);
2131 if (!mode_in_range(newmode, edid, timing) ||
2132 !valid_inferred_mode(connector, newmode)) {
2133 drm_mode_destroy(dev, newmode);
2137 drm_mode_probed_add(connector, newmode);
2145 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2146 struct detailed_timing *timing)
2149 struct drm_display_mode *newmode;
2150 struct drm_device *dev = connector->dev;
2151 bool rb = drm_monitor_supports_rb(edid);
2153 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2154 const struct minimode *m = &extra_modes[i];
2155 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2159 fixup_mode_1366x768(newmode);
2160 if (!mode_in_range(newmode, edid, timing) ||
2161 !valid_inferred_mode(connector, newmode)) {
2162 drm_mode_destroy(dev, newmode);
2166 drm_mode_probed_add(connector, newmode);
2174 do_inferred_modes(struct detailed_timing *timing, void *c)
2176 struct detailed_mode_closure *closure = c;
2177 struct detailed_non_pixel *data = &timing->data.other_data;
2178 struct detailed_data_monitor_range *range = &data->data.range;
2180 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2183 closure->modes += drm_dmt_modes_for_range(closure->connector,
2187 if (!version_greater(closure->edid, 1, 1))
2188 return; /* GTF not defined yet */
2190 switch (range->flags) {
2191 case 0x02: /* secondary gtf, XXX could do more */
2192 case 0x00: /* default gtf */
2193 closure->modes += drm_gtf_modes_for_range(closure->connector,
2197 case 0x04: /* cvt, only in 1.4+ */
2198 if (!version_greater(closure->edid, 1, 3))
2201 closure->modes += drm_cvt_modes_for_range(closure->connector,
2205 case 0x01: /* just the ranges, no formula */
2212 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2214 struct detailed_mode_closure closure = {
2215 .connector = connector,
2219 if (version_greater(edid, 1, 0))
2220 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2223 return closure.modes;
2227 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2229 int i, j, m, modes = 0;
2230 struct drm_display_mode *mode;
2231 u8 *est = ((u8 *)timing) + 5;
2233 for (i = 0; i < 6; i++) {
2234 for (j = 7; j >= 0; j--) {
2235 m = (i * 8) + (7 - j);
2236 if (m >= ARRAY_SIZE(est3_modes))
2238 if (est[i] & (1 << j)) {
2239 mode = drm_mode_find_dmt(connector->dev,
2245 drm_mode_probed_add(connector, mode);
2256 do_established_modes(struct detailed_timing *timing, void *c)
2258 struct detailed_mode_closure *closure = c;
2259 struct detailed_non_pixel *data = &timing->data.other_data;
2261 if (data->type == EDID_DETAIL_EST_TIMINGS)
2262 closure->modes += drm_est3_modes(closure->connector, timing);
2266 * add_established_modes - get est. modes from EDID and add them
2267 * @connector: connector to add mode(s) to
2268 * @edid: EDID block to scan
2270 * Each EDID block contains a bitmap of the supported "established modes" list
2271 * (defined above). Tease them out and add them to the global modes list.
2274 add_established_modes(struct drm_connector *connector, struct edid *edid)
2276 struct drm_device *dev = connector->dev;
2277 unsigned long est_bits = edid->established_timings.t1 |
2278 (edid->established_timings.t2 << 8) |
2279 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2281 struct detailed_mode_closure closure = {
2282 .connector = connector,
2286 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2287 if (est_bits & (1<<i)) {
2288 struct drm_display_mode *newmode;
2289 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2291 drm_mode_probed_add(connector, newmode);
2297 if (version_greater(edid, 1, 0))
2298 drm_for_each_detailed_block((u8 *)edid,
2299 do_established_modes, &closure);
2301 return modes + closure.modes;
2305 do_standard_modes(struct detailed_timing *timing, void *c)
2307 struct detailed_mode_closure *closure = c;
2308 struct detailed_non_pixel *data = &timing->data.other_data;
2309 struct drm_connector *connector = closure->connector;
2310 struct edid *edid = closure->edid;
2312 if (data->type == EDID_DETAIL_STD_MODES) {
2314 for (i = 0; i < 6; i++) {
2315 struct std_timing *std;
2316 struct drm_display_mode *newmode;
2318 std = &data->data.timings[i];
2319 newmode = drm_mode_std(connector, edid, std);
2321 drm_mode_probed_add(connector, newmode);
2329 * add_standard_modes - get std. modes from EDID and add them
2330 * @connector: connector to add mode(s) to
2331 * @edid: EDID block to scan
2333 * Standard modes can be calculated using the appropriate standard (DMT,
2334 * GTF or CVT. Grab them from @edid and add them to the list.
2337 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2340 struct detailed_mode_closure closure = {
2341 .connector = connector,
2345 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2346 struct drm_display_mode *newmode;
2348 newmode = drm_mode_std(connector, edid,
2349 &edid->standard_timings[i]);
2351 drm_mode_probed_add(connector, newmode);
2356 if (version_greater(edid, 1, 0))
2357 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2360 /* XXX should also look for standard codes in VTB blocks */
2362 return modes + closure.modes;
2365 static int drm_cvt_modes(struct drm_connector *connector,
2366 struct detailed_timing *timing)
2368 int i, j, modes = 0;
2369 struct drm_display_mode *newmode;
2370 struct drm_device *dev = connector->dev;
2371 struct cvt_timing *cvt;
2372 const int rates[] = { 60, 85, 75, 60, 50 };
2373 const u8 empty[3] = { 0, 0, 0 };
2375 for (i = 0; i < 4; i++) {
2376 int uninitialized_var(width), height;
2377 cvt = &(timing->data.other_data.data.cvt[i]);
2379 if (!memcmp(cvt->code, empty, 3))
2382 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2383 switch (cvt->code[1] & 0x0c) {
2385 width = height * 4 / 3;
2388 width = height * 16 / 9;
2391 width = height * 16 / 10;
2394 width = height * 15 / 9;
2398 for (j = 1; j < 5; j++) {
2399 if (cvt->code[2] & (1 << j)) {
2400 newmode = drm_cvt_mode(dev, width, height,
2404 drm_mode_probed_add(connector, newmode);
2415 do_cvt_mode(struct detailed_timing *timing, void *c)
2417 struct detailed_mode_closure *closure = c;
2418 struct detailed_non_pixel *data = &timing->data.other_data;
2420 if (data->type == EDID_DETAIL_CVT_3BYTE)
2421 closure->modes += drm_cvt_modes(closure->connector, timing);
2425 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2427 struct detailed_mode_closure closure = {
2428 .connector = connector,
2432 if (version_greater(edid, 1, 2))
2433 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2435 /* XXX should also look for CVT codes in VTB blocks */
2437 return closure.modes;
2440 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2443 do_detailed_mode(struct detailed_timing *timing, void *c)
2445 struct detailed_mode_closure *closure = c;
2446 struct drm_display_mode *newmode;
2448 if (timing->pixel_clock) {
2449 newmode = drm_mode_detailed(closure->connector->dev,
2450 closure->edid, timing,
2455 if (closure->preferred)
2456 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2459 * Detailed modes are limited to 10kHz pixel clock resolution,
2460 * so fix up anything that looks like CEA/HDMI mode, but the clock
2461 * is just slightly off.
2463 fixup_detailed_cea_mode_clock(newmode);
2465 drm_mode_probed_add(closure->connector, newmode);
2467 closure->preferred = 0;
2472 * add_detailed_modes - Add modes from detailed timings
2473 * @connector: attached connector
2474 * @edid: EDID block to scan
2475 * @quirks: quirks to apply
2478 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2481 struct detailed_mode_closure closure = {
2482 .connector = connector,
2488 if (closure.preferred && !version_greater(edid, 1, 3))
2490 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2492 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2494 return closure.modes;
2497 #define AUDIO_BLOCK 0x01
2498 #define VIDEO_BLOCK 0x02
2499 #define VENDOR_BLOCK 0x03
2500 #define SPEAKER_BLOCK 0x04
2501 #define VIDEO_CAPABILITY_BLOCK 0x07
2502 #define EDID_BASIC_AUDIO (1 << 6)
2503 #define EDID_CEA_YCRCB444 (1 << 5)
2504 #define EDID_CEA_YCRCB422 (1 << 4)
2505 #define EDID_CEA_VCDB_QS (1 << 6)
2508 * Search EDID for CEA extension block.
2510 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2512 u8 *edid_ext = NULL;
2515 /* No EDID or EDID extensions */
2516 if (edid == NULL || edid->extensions == 0)
2519 /* Find CEA extension */
2520 for (i = 0; i < edid->extensions; i++) {
2521 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2522 if (edid_ext[0] == ext_id)
2526 if (i == edid->extensions)
2532 static u8 *drm_find_cea_extension(struct edid *edid)
2534 return drm_find_edid_extension(edid, CEA_EXT);
2537 static u8 *drm_find_displayid_extension(struct edid *edid)
2539 return drm_find_edid_extension(edid, DISPLAYID_EXT);
2543 * Calculate the alternate clock for the CEA mode
2544 * (60Hz vs. 59.94Hz etc.)
2547 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2549 unsigned int clock = cea_mode->clock;
2551 if (cea_mode->vrefresh % 6 != 0)
2555 * edid_cea_modes contains the 59.94Hz
2556 * variant for 240 and 480 line modes,
2557 * and the 60Hz variant otherwise.
2559 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2560 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2562 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2568 * drm_match_cea_mode - look for a CEA mode matching given mode
2569 * @to_match: display mode
2571 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2574 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2578 if (!to_match->clock)
2581 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2582 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2583 unsigned int clock1, clock2;
2585 /* Check both 60Hz and 59.94Hz */
2586 clock1 = cea_mode->clock;
2587 clock2 = cea_mode_alternate_clock(cea_mode);
2589 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2590 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2591 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2596 EXPORT_SYMBOL(drm_match_cea_mode);
2599 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2600 * the input VIC from the CEA mode list
2601 * @video_code: ID given to each of the CEA modes
2603 * Returns picture aspect ratio
2605 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2607 /* return picture aspect ratio for video_code - 1 to access the
2608 * right array element
2610 return edid_cea_modes[video_code-1].picture_aspect_ratio;
2612 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2615 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2618 * It's almost like cea_mode_alternate_clock(), we just need to add an
2619 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2623 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2625 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2626 return hdmi_mode->clock;
2628 return cea_mode_alternate_clock(hdmi_mode);
2632 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2633 * @to_match: display mode
2635 * An HDMI mode is one defined in the HDMI vendor specific block.
2637 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2639 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2643 if (!to_match->clock)
2646 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2647 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2648 unsigned int clock1, clock2;
2650 /* Make sure to also match alternate clocks */
2651 clock1 = hdmi_mode->clock;
2652 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2654 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2655 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2656 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2663 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2665 struct drm_device *dev = connector->dev;
2666 struct drm_display_mode *mode, *tmp;
2670 /* Don't add CEA modes if the CEA extension block is missing */
2671 if (!drm_find_cea_extension(edid))
2675 * Go through all probed modes and create a new mode
2676 * with the alternate clock for certain CEA modes.
2678 list_for_each_entry(mode, &connector->probed_modes, head) {
2679 const struct drm_display_mode *cea_mode = NULL;
2680 struct drm_display_mode *newmode;
2681 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2682 unsigned int clock1, clock2;
2684 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2685 cea_mode = &edid_cea_modes[mode_idx];
2686 clock2 = cea_mode_alternate_clock(cea_mode);
2688 mode_idx = drm_match_hdmi_mode(mode) - 1;
2689 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2690 cea_mode = &edid_4k_modes[mode_idx];
2691 clock2 = hdmi_mode_alternate_clock(cea_mode);
2698 clock1 = cea_mode->clock;
2700 if (clock1 == clock2)
2703 if (mode->clock != clock1 && mode->clock != clock2)
2706 newmode = drm_mode_duplicate(dev, cea_mode);
2710 /* Carry over the stereo flags */
2711 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2714 * The current mode could be either variant. Make
2715 * sure to pick the "other" clock for the new mode.
2717 if (mode->clock != clock1)
2718 newmode->clock = clock1;
2720 newmode->clock = clock2;
2722 list_add_tail(&newmode->head, &list);
2725 list_for_each_entry_safe(mode, tmp, &list, head) {
2726 list_del(&mode->head);
2727 drm_mode_probed_add(connector, mode);
2734 static struct drm_display_mode *
2735 drm_display_mode_from_vic_index(struct drm_connector *connector,
2736 const u8 *video_db, u8 video_len,
2739 struct drm_device *dev = connector->dev;
2740 struct drm_display_mode *newmode;
2743 if (video_db == NULL || video_index >= video_len)
2746 /* CEA modes are numbered 1..127 */
2747 cea_mode = (video_db[video_index] & 127) - 1;
2748 if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2751 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2755 newmode->vrefresh = 0;
2761 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2765 for (i = 0; i < len; i++) {
2766 struct drm_display_mode *mode;
2767 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2769 drm_mode_probed_add(connector, mode);
2777 struct stereo_mandatory_mode {
2778 int width, height, vrefresh;
2782 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2783 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2784 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2786 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2788 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2789 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2790 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2791 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2792 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2796 stereo_match_mandatory(const struct drm_display_mode *mode,
2797 const struct stereo_mandatory_mode *stereo_mode)
2799 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2801 return mode->hdisplay == stereo_mode->width &&
2802 mode->vdisplay == stereo_mode->height &&
2803 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2804 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2807 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2809 struct drm_device *dev = connector->dev;
2810 const struct drm_display_mode *mode;
2811 struct list_head stereo_modes;
2814 INIT_LIST_HEAD(&stereo_modes);
2816 list_for_each_entry(mode, &connector->probed_modes, head) {
2817 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2818 const struct stereo_mandatory_mode *mandatory;
2819 struct drm_display_mode *new_mode;
2821 if (!stereo_match_mandatory(mode,
2822 &stereo_mandatory_modes[i]))
2825 mandatory = &stereo_mandatory_modes[i];
2826 new_mode = drm_mode_duplicate(dev, mode);
2830 new_mode->flags |= mandatory->flags;
2831 list_add_tail(&new_mode->head, &stereo_modes);
2836 list_splice_tail(&stereo_modes, &connector->probed_modes);
2841 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2843 struct drm_device *dev = connector->dev;
2844 struct drm_display_mode *newmode;
2846 vic--; /* VICs start at 1 */
2847 if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2848 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2852 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2856 drm_mode_probed_add(connector, newmode);
2861 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2862 const u8 *video_db, u8 video_len, u8 video_index)
2864 struct drm_display_mode *newmode;
2867 if (structure & (1 << 0)) {
2868 newmode = drm_display_mode_from_vic_index(connector, video_db,
2872 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2873 drm_mode_probed_add(connector, newmode);
2877 if (structure & (1 << 6)) {
2878 newmode = drm_display_mode_from_vic_index(connector, video_db,
2882 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2883 drm_mode_probed_add(connector, newmode);
2887 if (structure & (1 << 8)) {
2888 newmode = drm_display_mode_from_vic_index(connector, video_db,
2892 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2893 drm_mode_probed_add(connector, newmode);
2902 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2903 * @connector: connector corresponding to the HDMI sink
2904 * @db: start of the CEA vendor specific block
2905 * @len: length of the CEA block payload, ie. one can access up to db[len]
2907 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2908 * also adds the stereo 3d modes when applicable.
2911 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2912 const u8 *video_db, u8 video_len)
2914 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2915 u8 vic_len, hdmi_3d_len = 0;
2922 /* no HDMI_Video_Present */
2923 if (!(db[8] & (1 << 5)))
2926 /* Latency_Fields_Present */
2927 if (db[8] & (1 << 7))
2930 /* I_Latency_Fields_Present */
2931 if (db[8] & (1 << 6))
2934 /* the declared length is not long enough for the 2 first bytes
2935 * of additional video format capabilities */
2936 if (len < (8 + offset + 2))
2941 if (db[8 + offset] & (1 << 7)) {
2942 modes += add_hdmi_mandatory_stereo_modes(connector);
2944 /* 3D_Multi_present */
2945 multi_present = (db[8 + offset] & 0x60) >> 5;
2949 vic_len = db[8 + offset] >> 5;
2950 hdmi_3d_len = db[8 + offset] & 0x1f;
2952 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2955 vic = db[9 + offset + i];
2956 modes += add_hdmi_mode(connector, vic);
2958 offset += 1 + vic_len;
2960 if (multi_present == 1)
2962 else if (multi_present == 2)
2967 if (len < (8 + offset + hdmi_3d_len - 1))
2970 if (hdmi_3d_len < multi_len)
2973 if (multi_present == 1 || multi_present == 2) {
2974 /* 3D_Structure_ALL */
2975 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2977 /* check if 3D_MASK is present */
2978 if (multi_present == 2)
2979 mask = (db[10 + offset] << 8) | db[11 + offset];
2983 for (i = 0; i < 16; i++) {
2984 if (mask & (1 << i))
2985 modes += add_3d_struct_modes(connector,
2992 offset += multi_len;
2994 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2996 struct drm_display_mode *newmode = NULL;
2997 unsigned int newflag = 0;
2998 bool detail_present;
3000 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
3002 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
3005 /* 2D_VIC_order_X */
3006 vic_index = db[8 + offset + i] >> 4;
3008 /* 3D_Structure_X */
3009 switch (db[8 + offset + i] & 0x0f) {
3011 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
3014 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3018 if ((db[9 + offset + i] >> 4) == 1)
3019 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3024 newmode = drm_display_mode_from_vic_index(connector,
3030 newmode->flags |= newflag;
3031 drm_mode_probed_add(connector, newmode);
3045 cea_db_payload_len(const u8 *db)
3047 return db[0] & 0x1f;
3051 cea_db_tag(const u8 *db)
3057 cea_revision(const u8 *cea)
3063 cea_db_offsets(const u8 *cea, int *start, int *end)
3065 /* Data block offset in CEA extension block */
3070 if (*end < 4 || *end > 127)
3075 static bool cea_db_is_hdmi_vsdb(const u8 *db)
3079 if (cea_db_tag(db) != VENDOR_BLOCK)
3082 if (cea_db_payload_len(db) < 5)
3085 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3087 return hdmi_id == HDMI_IEEE_OUI;
3090 #define for_each_cea_db(cea, i, start, end) \
3091 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3094 add_cea_modes(struct drm_connector *connector, struct edid *edid)
3096 const u8 *cea = drm_find_cea_extension(edid);
3097 const u8 *db, *hdmi = NULL, *video = NULL;
3098 u8 dbl, hdmi_len, video_len = 0;
3101 if (cea && cea_revision(cea) >= 3) {
3104 if (cea_db_offsets(cea, &start, &end))
3107 for_each_cea_db(cea, i, start, end) {
3109 dbl = cea_db_payload_len(db);
3111 if (cea_db_tag(db) == VIDEO_BLOCK) {
3114 modes += do_cea_modes(connector, video, dbl);
3116 else if (cea_db_is_hdmi_vsdb(db)) {
3124 * We parse the HDMI VSDB after having added the cea modes as we will
3125 * be patching their flags when the sink supports stereo 3D.
3128 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3134 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3136 const struct drm_display_mode *cea_mode;
3137 int clock1, clock2, clock;
3141 mode_idx = drm_match_cea_mode(mode) - 1;
3142 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
3144 cea_mode = &edid_cea_modes[mode_idx];
3145 clock1 = cea_mode->clock;
3146 clock2 = cea_mode_alternate_clock(cea_mode);
3148 mode_idx = drm_match_hdmi_mode(mode) - 1;
3149 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
3151 cea_mode = &edid_4k_modes[mode_idx];
3152 clock1 = cea_mode->clock;
3153 clock2 = hdmi_mode_alternate_clock(cea_mode);
3159 /* pick whichever is closest */
3160 if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3165 if (mode->clock == clock)
3168 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3169 type, mode_idx + 1, mode->clock, clock);
3170 mode->clock = clock;
3174 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3176 u8 len = cea_db_payload_len(db);
3179 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
3180 connector->dvi_dual = db[6] & 1;
3183 connector->max_tmds_clock = db[7] * 5;
3185 connector->latency_present[0] = db[8] >> 7;
3186 connector->latency_present[1] = (db[8] >> 6) & 1;
3189 connector->video_latency[0] = db[9];
3191 connector->audio_latency[0] = db[10];
3193 connector->video_latency[1] = db[11];
3195 connector->audio_latency[1] = db[12];
3197 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3198 "max TMDS clock %d, "
3199 "latency present %d %d, "
3200 "video latency %d %d, "
3201 "audio latency %d %d\n",
3202 connector->dvi_dual,
3203 connector->max_tmds_clock,
3204 (int) connector->latency_present[0],
3205 (int) connector->latency_present[1],
3206 connector->video_latency[0],
3207 connector->video_latency[1],
3208 connector->audio_latency[0],
3209 connector->audio_latency[1]);
3213 monitor_name(struct detailed_timing *t, void *data)
3215 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3216 *(u8 **)data = t->data.other_data.data.str.str;
3220 * drm_edid_to_eld - build ELD from EDID
3221 * @connector: connector corresponding to the HDMI/DP sink
3222 * @edid: EDID to parse
3224 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3225 * HDCP and Port_ID ELD fields are left for the graphics driver to fill in.
3227 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3229 uint8_t *eld = connector->eld;
3237 memset(eld, 0, sizeof(connector->eld));
3239 cea = drm_find_cea_extension(edid);
3241 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3246 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3247 for (mnl = 0; name && mnl < 13; mnl++) {
3248 if (name[mnl] == 0x0a)
3250 eld[20 + mnl] = name[mnl];
3252 eld[4] = (cea[1] << 5) | mnl;
3253 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3255 eld[0] = 2 << 3; /* ELD version: 2 */
3257 eld[16] = edid->mfg_id[0];
3258 eld[17] = edid->mfg_id[1];
3259 eld[18] = edid->prod_code[0];
3260 eld[19] = edid->prod_code[1];
3262 if (cea_revision(cea) >= 3) {
3265 if (cea_db_offsets(cea, &start, &end)) {
3270 for_each_cea_db(cea, i, start, end) {
3272 dbl = cea_db_payload_len(db);
3274 switch (cea_db_tag(db)) {
3276 /* Audio Data Block, contains SADs */
3277 sad_count = dbl / 3;
3279 memcpy(eld + 20 + mnl, &db[1], dbl);
3282 /* Speaker Allocation Data Block */
3287 /* HDMI Vendor-Specific Data Block */
3288 if (cea_db_is_hdmi_vsdb(db))
3289 parse_hdmi_vsdb(connector, db);
3296 eld[5] |= sad_count << 4;
3298 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
3299 connector->connector_type == DRM_MODE_CONNECTOR_eDP)
3300 eld[DRM_ELD_SAD_COUNT_CONN_TYPE] |= DRM_ELD_CONN_TYPE_DP;
3302 eld[DRM_ELD_SAD_COUNT_CONN_TYPE] |= DRM_ELD_CONN_TYPE_HDMI;
3304 eld[DRM_ELD_BASELINE_ELD_LEN] =
3305 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3307 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3308 drm_eld_size(eld), sad_count);
3310 EXPORT_SYMBOL(drm_edid_to_eld);
3313 * drm_edid_to_sad - extracts SADs from EDID
3314 * @edid: EDID to parse
3315 * @sads: pointer that will be set to the extracted SADs
3317 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3319 * Note: The returned pointer needs to be freed using kfree().
3321 * Return: The number of found SADs or negative number on error.
3323 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3326 int i, start, end, dbl;
3329 cea = drm_find_cea_extension(edid);
3331 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3335 if (cea_revision(cea) < 3) {
3336 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3340 if (cea_db_offsets(cea, &start, &end)) {
3341 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3345 for_each_cea_db(cea, i, start, end) {
3348 if (cea_db_tag(db) == AUDIO_BLOCK) {
3350 dbl = cea_db_payload_len(db);
3352 count = dbl / 3; /* SAD is 3B */
3353 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3356 for (j = 0; j < count; j++) {
3357 u8 *sad = &db[1 + j * 3];
3359 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3360 (*sads)[j].channels = sad[0] & 0x7;
3361 (*sads)[j].freq = sad[1] & 0x7F;
3362 (*sads)[j].byte2 = sad[2];
3370 EXPORT_SYMBOL(drm_edid_to_sad);
3373 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3374 * @edid: EDID to parse
3375 * @sadb: pointer to the speaker block
3377 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3379 * Note: The returned pointer needs to be freed using kfree().
3381 * Return: The number of found Speaker Allocation Blocks or negative number on
3384 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3387 int i, start, end, dbl;
3390 cea = drm_find_cea_extension(edid);
3392 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3396 if (cea_revision(cea) < 3) {
3397 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3401 if (cea_db_offsets(cea, &start, &end)) {
3402 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3406 for_each_cea_db(cea, i, start, end) {
3407 const u8 *db = &cea[i];
3409 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3410 dbl = cea_db_payload_len(db);
3412 /* Speaker Allocation Data Block */
3414 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3425 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3428 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3429 * @connector: connector associated with the HDMI/DP sink
3430 * @mode: the display mode
3432 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3433 * the sink doesn't support audio or video.
3435 int drm_av_sync_delay(struct drm_connector *connector,
3436 const struct drm_display_mode *mode)
3438 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3441 if (!connector->latency_present[0])
3443 if (!connector->latency_present[1])
3446 a = connector->audio_latency[i];
3447 v = connector->video_latency[i];
3450 * HDMI/DP sink doesn't support audio or video?
3452 if (a == 255 || v == 255)
3456 * Convert raw EDID values to millisecond.
3457 * Treat unknown latency as 0ms.
3460 a = min(2 * (a - 1), 500);
3462 v = min(2 * (v - 1), 500);
3464 return max(v - a, 0);
3466 EXPORT_SYMBOL(drm_av_sync_delay);
3469 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3470 * @encoder: the encoder just changed display mode
3472 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3473 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3475 * Return: The connector associated with the first HDMI/DP sink that has ELD
3478 struct drm_connector *drm_select_eld(struct drm_encoder *encoder)
3480 struct drm_connector *connector;
3481 struct drm_device *dev = encoder->dev;
3483 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3484 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3486 drm_for_each_connector(connector, dev)
3487 if (connector->encoder == encoder && connector->eld[0])
3492 EXPORT_SYMBOL(drm_select_eld);
3495 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3496 * @edid: monitor EDID information
3498 * Parse the CEA extension according to CEA-861-B.
3500 * Return: True if the monitor is HDMI, false if not or unknown.
3502 bool drm_detect_hdmi_monitor(struct edid *edid)
3506 int start_offset, end_offset;
3508 edid_ext = drm_find_cea_extension(edid);
3512 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3516 * Because HDMI identifier is in Vendor Specific Block,
3517 * search it from all data blocks of CEA extension.
3519 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3520 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3526 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3529 * drm_detect_monitor_audio - check monitor audio capability
3530 * @edid: EDID block to scan
3532 * Monitor should have CEA extension block.
3533 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3534 * audio' only. If there is any audio extension block and supported
3535 * audio format, assume at least 'basic audio' support, even if 'basic
3536 * audio' is not defined in EDID.
3538 * Return: True if the monitor supports audio, false otherwise.
3540 bool drm_detect_monitor_audio(struct edid *edid)
3544 bool has_audio = false;
3545 int start_offset, end_offset;
3547 edid_ext = drm_find_cea_extension(edid);
3551 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3554 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3558 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3561 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3562 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3564 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3565 DRM_DEBUG_KMS("CEA audio format %d\n",
3566 (edid_ext[i + j] >> 3) & 0xf);
3573 EXPORT_SYMBOL(drm_detect_monitor_audio);
3576 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3577 * @edid: EDID block to scan
3579 * Check whether the monitor reports the RGB quantization range selection
3580 * as supported. The AVI infoframe can then be used to inform the monitor
3581 * which quantization range (full or limited) is used.
3583 * Return: True if the RGB quantization range is selectable, false otherwise.
3585 bool drm_rgb_quant_range_selectable(struct edid *edid)
3590 edid_ext = drm_find_cea_extension(edid);
3594 if (cea_db_offsets(edid_ext, &start, &end))
3597 for_each_cea_db(edid_ext, i, start, end) {
3598 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3599 cea_db_payload_len(&edid_ext[i]) == 2) {
3600 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3601 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3607 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3610 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3611 * hdmi deep color modes and update drm_display_info if so.
3612 * @edid: monitor EDID information
3613 * @info: Updated with maximum supported deep color bpc and color format
3614 * if deep color supported.
3615 * @connector: DRM connector, used only for debug output
3617 * Parse the CEA extension according to CEA-861-B.
3618 * Return true if HDMI deep color supported, false if not or unknown.
3620 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3621 struct drm_display_info *info,
3622 struct drm_connector *connector)
3624 u8 *edid_ext, *hdmi;
3626 int start_offset, end_offset;
3627 unsigned int dc_bpc = 0;
3629 edid_ext = drm_find_cea_extension(edid);
3633 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3637 * Because HDMI identifier is in Vendor Specific Block,
3638 * search it from all data blocks of CEA extension.
3640 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3641 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3642 /* HDMI supports at least 8 bpc */
3645 hdmi = &edid_ext[i];
3646 if (cea_db_payload_len(hdmi) < 6)
3649 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3651 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3652 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3656 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3658 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3659 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3663 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3665 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3666 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3671 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3672 connector->name, dc_bpc);
3676 * Deep color support mandates RGB444 support for all video
3677 * modes and forbids YCRCB422 support for all video modes per
3680 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3682 /* YCRCB444 is optional according to spec. */
3683 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3684 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3685 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3690 * Spec says that if any deep color mode is supported at all,
3691 * then deep color 36 bit must be supported.
3693 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3694 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3701 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3711 * drm_add_display_info - pull display info out if present
3713 * @info: display info (attached to connector)
3714 * @connector: connector whose edid is used to build display info
3716 * Grab any available display info and stuff it into the drm_display_info
3717 * structure that's part of the connector. Useful for tracking bpp and
3720 static void drm_add_display_info(struct edid *edid,
3721 struct drm_display_info *info,
3722 struct drm_connector *connector)
3726 info->width_mm = edid->width_cm * 10;
3727 info->height_mm = edid->height_cm * 10;
3729 /* driver figures it out in this case */
3731 info->color_formats = 0;
3733 if (edid->revision < 3)
3736 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3739 /* Get data from CEA blocks if present */
3740 edid_ext = drm_find_cea_extension(edid);
3742 info->cea_rev = edid_ext[1];
3744 /* The existence of a CEA block should imply RGB support */
3745 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3746 if (edid_ext[3] & EDID_CEA_YCRCB444)
3747 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3748 if (edid_ext[3] & EDID_CEA_YCRCB422)
3749 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3752 /* HDMI deep color modes supported? Assign to info, if so */
3753 drm_assign_hdmi_deep_color_info(edid, info, connector);
3755 /* Only defined for 1.4 with digital displays */
3756 if (edid->revision < 4)
3759 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3760 case DRM_EDID_DIGITAL_DEPTH_6:
3763 case DRM_EDID_DIGITAL_DEPTH_8:
3766 case DRM_EDID_DIGITAL_DEPTH_10:
3769 case DRM_EDID_DIGITAL_DEPTH_12:
3772 case DRM_EDID_DIGITAL_DEPTH_14:
3775 case DRM_EDID_DIGITAL_DEPTH_16:
3778 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3784 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3785 connector->name, info->bpc);
3787 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3788 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3789 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3790 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3791 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3795 * drm_add_edid_modes - add modes from EDID data, if available
3796 * @connector: connector we're probing
3799 * Add the specified modes to the connector's mode list.
3801 * Return: The number of modes added or 0 if we couldn't find any.
3803 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3811 if (!drm_edid_is_valid(edid)) {
3812 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3817 quirks = edid_get_quirks(edid);
3820 * EDID spec says modes should be preferred in this order:
3821 * - preferred detailed mode
3822 * - other detailed modes from base block
3823 * - detailed modes from extension blocks
3824 * - CVT 3-byte code modes
3825 * - standard timing codes
3826 * - established timing codes
3827 * - modes inferred from GTF or CVT range information
3829 * We get this pretty much right.
3831 * XXX order for additional mode types in extension blocks?
3833 num_modes += add_detailed_modes(connector, edid, quirks);
3834 num_modes += add_cvt_modes(connector, edid);
3835 num_modes += add_standard_modes(connector, edid);
3836 num_modes += add_established_modes(connector, edid);
3837 num_modes += add_cea_modes(connector, edid);
3838 num_modes += add_alternate_cea_modes(connector, edid);
3839 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3840 num_modes += add_inferred_modes(connector, edid);
3842 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3843 edid_fixup_preferred(connector, quirks);
3845 drm_add_display_info(edid, &connector->display_info, connector);
3847 if (quirks & EDID_QUIRK_FORCE_6BPC)
3848 connector->display_info.bpc = 6;
3850 if (quirks & EDID_QUIRK_FORCE_8BPC)
3851 connector->display_info.bpc = 8;
3853 if (quirks & EDID_QUIRK_FORCE_10BPC)
3854 connector->display_info.bpc = 10;
3856 if (quirks & EDID_QUIRK_FORCE_12BPC)
3857 connector->display_info.bpc = 12;
3861 EXPORT_SYMBOL(drm_add_edid_modes);
3864 * drm_add_modes_noedid - add modes for the connectors without EDID
3865 * @connector: connector we're probing
3866 * @hdisplay: the horizontal display limit
3867 * @vdisplay: the vertical display limit
3869 * Add the specified modes to the connector's mode list. Only when the
3870 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3872 * Return: The number of modes added or 0 if we couldn't find any.
3874 int drm_add_modes_noedid(struct drm_connector *connector,
3875 int hdisplay, int vdisplay)
3877 int i, count, num_modes = 0;
3878 struct drm_display_mode *mode;
3879 struct drm_device *dev = connector->dev;
3881 count = ARRAY_SIZE(drm_dmt_modes);
3887 for (i = 0; i < count; i++) {
3888 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3889 if (hdisplay && vdisplay) {
3891 * Only when two are valid, they will be used to check
3892 * whether the mode should be added to the mode list of
3895 if (ptr->hdisplay > hdisplay ||
3896 ptr->vdisplay > vdisplay)
3899 if (drm_mode_vrefresh(ptr) > 61)
3901 mode = drm_mode_duplicate(dev, ptr);
3903 drm_mode_probed_add(connector, mode);
3909 EXPORT_SYMBOL(drm_add_modes_noedid);
3912 * drm_set_preferred_mode - Sets the preferred mode of a connector
3913 * @connector: connector whose mode list should be processed
3914 * @hpref: horizontal resolution of preferred mode
3915 * @vpref: vertical resolution of preferred mode
3917 * Marks a mode as preferred if it matches the resolution specified by @hpref
3920 void drm_set_preferred_mode(struct drm_connector *connector,
3921 int hpref, int vpref)
3923 struct drm_display_mode *mode;
3925 list_for_each_entry(mode, &connector->probed_modes, head) {
3926 if (mode->hdisplay == hpref &&
3927 mode->vdisplay == vpref)
3928 mode->type |= DRM_MODE_TYPE_PREFERRED;
3931 EXPORT_SYMBOL(drm_set_preferred_mode);
3934 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3935 * data from a DRM display mode
3936 * @frame: HDMI AVI infoframe
3937 * @mode: DRM display mode
3939 * Return: 0 on success or a negative error code on failure.
3942 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3943 const struct drm_display_mode *mode)
3947 if (!frame || !mode)
3950 err = hdmi_avi_infoframe_init(frame);
3954 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3955 frame->pixel_repeat = 1;
3957 frame->video_code = drm_match_cea_mode(mode);
3959 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3962 * Populate picture aspect ratio from either
3963 * user input (if specified) or from the CEA mode list.
3965 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3966 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3967 frame->picture_aspect = mode->picture_aspect_ratio;
3968 else if (frame->video_code > 0)
3969 frame->picture_aspect = drm_get_cea_aspect_ratio(
3972 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3973 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3977 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3979 static enum hdmi_3d_structure
3980 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3982 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3985 case DRM_MODE_FLAG_3D_FRAME_PACKING:
3986 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3987 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3988 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3989 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3990 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3991 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3992 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3993 case DRM_MODE_FLAG_3D_L_DEPTH:
3994 return HDMI_3D_STRUCTURE_L_DEPTH;
3995 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3996 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3997 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3998 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3999 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
4000 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
4002 return HDMI_3D_STRUCTURE_INVALID;
4007 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
4008 * data from a DRM display mode
4009 * @frame: HDMI vendor infoframe
4010 * @mode: DRM display mode
4012 * Note that there's is a need to send HDMI vendor infoframes only when using a
4013 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
4014 * function will return -EINVAL, error that can be safely ignored.
4016 * Return: 0 on success or a negative error code on failure.
4019 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
4020 const struct drm_display_mode *mode)
4026 if (!frame || !mode)
4029 vic = drm_match_hdmi_mode(mode);
4030 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4032 if (!vic && !s3d_flags)
4035 if (vic && s3d_flags)
4038 err = hdmi_vendor_infoframe_init(frame);
4045 frame->s3d_struct = s3d_structure_from_display_mode(mode);
4049 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
4051 static int drm_parse_display_id(struct drm_connector *connector,
4052 u8 *displayid, int length,
4053 bool is_edid_extension)
4055 /* if this is an EDID extension the first byte will be 0x70 */
4057 struct displayid_hdr *base;
4058 struct displayid_block *block;
4062 if (is_edid_extension)
4065 base = (struct displayid_hdr *)&displayid[idx];
4067 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
4068 base->rev, base->bytes, base->prod_id, base->ext_count);
4070 if (base->bytes + 5 > length - idx)
4073 for (i = idx; i <= base->bytes + 5; i++) {
4074 csum += displayid[i];
4077 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
4081 block = (struct displayid_block *)&displayid[idx + 4];
4082 DRM_DEBUG_KMS("block id %d, rev %d, len %d\n",
4083 block->tag, block->rev, block->num_bytes);
4085 switch (block->tag) {
4086 case DATA_BLOCK_TILED_DISPLAY: {
4087 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4090 u8 tile_v_loc, tile_h_loc;
4091 u8 num_v_tile, num_h_tile;
4092 struct drm_tile_group *tg;
4094 w = tile->tile_size[0] | tile->tile_size[1] << 8;
4095 h = tile->tile_size[2] | tile->tile_size[3] << 8;
4097 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4098 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4099 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4100 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4102 connector->has_tile = true;
4103 if (tile->tile_cap & 0x80)
4104 connector->tile_is_single_monitor = true;
4106 connector->num_h_tile = num_h_tile + 1;
4107 connector->num_v_tile = num_v_tile + 1;
4108 connector->tile_h_loc = tile_h_loc;
4109 connector->tile_v_loc = tile_v_loc;
4110 connector->tile_h_size = w + 1;
4111 connector->tile_v_size = h + 1;
4113 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4114 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4115 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4116 num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4117 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4119 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4121 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4126 if (connector->tile_group != tg) {
4127 /* if we haven't got a pointer,
4128 take the reference, drop ref to old tile group */
4129 if (connector->tile_group) {
4130 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4132 connector->tile_group = tg;
4134 /* if same tile group, then release the ref we just took. */
4135 drm_mode_put_tile_group(connector->dev, tg);
4139 printk("unknown displayid tag %d\n", block->tag);
4145 static void drm_get_displayid(struct drm_connector *connector,
4148 void *displayid = NULL;
4150 connector->has_tile = false;
4151 displayid = drm_find_displayid_extension(edid);
4153 /* drop reference to any tile group we had */
4157 ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4160 if (!connector->has_tile)
4164 if (connector->tile_group) {
4165 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4166 connector->tile_group = NULL;
projects / librecmc / linux-libre.git / blob