drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

   1 /*
   2  * Copyright 2017 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 /*
  24  * stream_encoder.h
  25  *
  26  */
  27
  28 #ifndef STREAM_ENCODER_H_
  29 #define STREAM_ENCODER_H_
  30
  31 #include "audio_types.h"
  32 #include "hw_shared.h"
  33
  34 struct dc_bios;
  35 struct dc_context;
  36 struct dc_crtc_timing;
  37
  38 enum dp_pixel_encoding_type {
  39         DP_PIXEL_ENCODING_TYPE_RGB444           = 0x00000000,
  40         DP_PIXEL_ENCODING_TYPE_YCBCR422         = 0x00000001,
  41         DP_PIXEL_ENCODING_TYPE_YCBCR444         = 0x00000002,
  42         DP_PIXEL_ENCODING_TYPE_RGB_WIDE_GAMUT   = 0x00000003,
  43         DP_PIXEL_ENCODING_TYPE_Y_ONLY           = 0x00000004,
  44         DP_PIXEL_ENCODING_TYPE_YCBCR420         = 0x00000005
  45 };
  46
  47 enum dp_component_depth {
  48         DP_COMPONENT_PIXEL_DEPTH_6BPC           = 0x00000000,
  49         DP_COMPONENT_PIXEL_DEPTH_8BPC           = 0x00000001,
  50         DP_COMPONENT_PIXEL_DEPTH_10BPC          = 0x00000002,
  51         DP_COMPONENT_PIXEL_DEPTH_12BPC          = 0x00000003,
  52         DP_COMPONENT_PIXEL_DEPTH_16BPC          = 0x00000004
  53 };
  54
  55 struct audio_clock_info {
  56         /* pixel clock frequency*/
  57         uint32_t pixel_clock_in_10khz;
  58         /* N - 32KHz audio */
  59         uint32_t n_32khz;
  60         /* CTS - 32KHz audio*/
  61         uint32_t cts_32khz;
  62         uint32_t n_44khz;
  63         uint32_t cts_44khz;
  64         uint32_t n_48khz;
  65         uint32_t cts_48khz;
  66 };
  67
  68 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
  69 enum dynamic_metadata_mode {
  70         dmdata_dp,
  71         dmdata_hdmi,
  72         dmdata_dolby_vision
  73 };
  74 #endif
  75
  76 struct encoder_info_frame {
  77         /* auxiliary video information */
  78         struct dc_info_packet avi;
  79         struct dc_info_packet gamut;
  80         struct dc_info_packet vendor;
  81         struct dc_info_packet hfvsif;
  82         /* source product description */
  83         struct dc_info_packet spd;
  84         /* video stream configuration */
  85         struct dc_info_packet vsc;
  86         /* HDR Static MetaData */
  87         struct dc_info_packet hdrsmd;
  88 };
  89
  90 struct encoder_unblank_param {
  91         struct dc_link_settings link_settings;
  92         struct dc_crtc_timing timing;
  93 #ifdef CONFIG_DRM_AMD_DC_DCN2_0
  94         int opp_cnt;
  95 #endif
  96 };
  97
  98 struct encoder_set_dp_phy_pattern_param {
  99         enum dp_test_pattern dp_phy_pattern;
 100         const uint8_t *custom_pattern;
 101         uint32_t custom_pattern_size;
 102         enum dp_panel_mode dp_panel_mode;
 103 };
 104
 105 struct stream_encoder {
 106         const struct stream_encoder_funcs *funcs;
 107         struct dc_context *ctx;
 108         struct dc_bios *bp;
 109         enum engine_id id;
 110 };
 111
 112 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
 113 struct enc_state {
 114         uint32_t dsc_mode;  // DISABLED  0; 1 or 2 indicate enabled state.
 115         uint32_t dsc_slice_width;
 116         uint32_t sec_gsp_pps_line_num;
 117         uint32_t vbid6_line_reference;
 118         uint32_t vbid6_line_num;
 119         uint32_t sec_gsp_pps_enable;
 120         uint32_t sec_stream_enable;
 121 };
 122 #endif
 123
 124 struct stream_encoder_funcs {
 125         void (*dp_set_stream_attribute)(
 126                 struct stream_encoder *enc,
 127                 struct dc_crtc_timing *crtc_timing,
 128                 enum dc_color_space output_color_space,
 129                 uint32_t enable_sdp_splitting);
 130
 131         void (*hdmi_set_stream_attribute)(
 132                 struct stream_encoder *enc,
 133                 struct dc_crtc_timing *crtc_timing,
 134                 int actual_pix_clk_khz,
 135                 bool enable_audio);
 136
 137         void (*dvi_set_stream_attribute)(
 138                 struct stream_encoder *enc,
 139                 struct dc_crtc_timing *crtc_timing,
 140                 bool is_dual_link);
 141
 142         void (*lvds_set_stream_attribute)(
 143                 struct stream_encoder *enc,
 144                 struct dc_crtc_timing *crtc_timing);
 145
 146         void (*set_mst_bandwidth)(
 147                 struct stream_encoder *enc,
 148                 struct fixed31_32 avg_time_slots_per_mtp);
 149
 150         void (*update_hdmi_info_packets)(
 151                 struct stream_encoder *enc,
 152                 const struct encoder_info_frame *info_frame);
 153
 154         void (*stop_hdmi_info_packets)(
 155                 struct stream_encoder *enc);
 156
 157         void (*update_dp_info_packets)(
 158                 struct stream_encoder *enc,
 159                 const struct encoder_info_frame *info_frame);
 160
 161         void (*send_immediate_sdp_message)(
 162                                 struct stream_encoder *enc,
 163                                 const uint8_t *custom_sdp_message,
 164                                 unsigned int sdp_message_size);
 165
 166         void (*stop_dp_info_packets)(
 167                 struct stream_encoder *enc);
 168
 169         void (*dp_blank)(
 170                 struct stream_encoder *enc);
 171
 172         void (*dp_unblank)(
 173                 struct stream_encoder *enc,
 174                 const struct encoder_unblank_param *param);
 175
 176         void (*audio_mute_control)(
 177                 struct stream_encoder *enc, bool mute);
 178
 179         void (*dp_audio_setup)(
 180                 struct stream_encoder *enc,
 181                 unsigned int az_inst,
 182                 struct audio_info *info);
 183
 184         void (*dp_audio_enable) (
 185                         struct stream_encoder *enc);
 186
 187         void (*dp_audio_disable) (
 188                         struct stream_encoder *enc);
 189
 190         void (*hdmi_audio_setup)(
 191                 struct stream_encoder *enc,
 192                 unsigned int az_inst,
 193                 struct audio_info *info,
 194                 struct audio_crtc_info *audio_crtc_info);
 195
 196         void (*hdmi_audio_disable) (
 197                         struct stream_encoder *enc);
 198
 199         void (*setup_stereo_sync) (
 200                         struct stream_encoder *enc,
 201                         int tg_inst,
 202                         bool enable);
 203
 204         void (*set_avmute)(
 205                 struct stream_encoder *enc, bool enable);
 206
 207         void (*dig_connect_to_otg)(
 208                 struct stream_encoder *enc,
 209                 int tg_inst);
 210
 211         void (*hdmi_reset_stream_attribute)(
 212                 struct stream_encoder *enc);
 213
 214         unsigned int (*dig_source_otg)(
 215                 struct stream_encoder *enc);
 216
 217 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
 218 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
 219         void (*enc_read_state)(struct stream_encoder *enc, struct enc_state *s);
 220
 221         void (*dp_set_dsc_config)(
 222                         struct stream_encoder *enc,
 223                         enum optc_dsc_mode dsc_mode,
 224                         uint32_t dsc_bytes_per_pixel,
 225                         uint32_t dsc_slice_width);
 226
 227         void (*dp_set_dsc_pps_info_packet)(struct stream_encoder *enc,
 228                                 bool enable,
 229                                 uint8_t *dsc_packed_pps);
 230 #endif
 231
 232         void (*set_dynamic_metadata)(struct stream_encoder *enc,
 233                         bool enable,
 234                         uint32_t hubp_requestor_id,
 235                         enum dynamic_metadata_mode dmdata_mode);
 236
 237         void (*dp_set_odm_combine)(
 238                 struct stream_encoder *enc,
 239                 bool odm_combine);
 240 #endif
 241 };
 242
 243 #endif /* STREAM_ENCODER_H_ */