2 * Copyright 2013-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include "dm_services.h"
27 #include "include/gpio_types.h"
28 #include "../hw_factory.h"
31 #include "../hw_gpio.h"
32 #include "../hw_ddc.h"
33 #include "../hw_hpd.h"
35 #include "hw_factory_dcn10.h"
37 #include "raven1/DCN/dcn_1_0_offset.h"
38 #include "raven1/DCN/dcn_1_0_sh_mask.h"
39 #include "vega10/soc15ip.h"
45 #define SF_HPD(reg_name, field_name, post_fix)\
46 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
48 #define BASE_INNER(seg) \
49 DCE_BASE__INST0_SEG ## seg
51 /* compile time expand base address. */
55 #define REG(reg_name)\
56 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
58 #define REGI(reg_name, block, id)\
59 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
60 mm ## block ## id ## _ ## reg_name
62 #include "reg_helper.h"
63 #include "../hpd_regs.h"
65 #define hpd_regs(id) \
70 static const struct hpd_registers hpd_regs[] = {
79 static const struct hpd_sh_mask hpd_shift = {
80 HPD_MASK_SH_LIST(__SHIFT)
83 static const struct hpd_sh_mask hpd_mask = {
84 HPD_MASK_SH_LIST(_MASK)
87 #include "../ddc_regs.h"
90 #define SF_DDC(reg_name, field_name, post_fix)\
91 .field_name = reg_name ## __ ## field_name ## post_fix
93 static const struct ddc_registers ddc_data_regs[] = {
104 static const struct ddc_registers ddc_clk_regs[] = {
115 static const struct ddc_sh_mask ddc_shift = {
116 DDC_MASK_SH_LIST(__SHIFT)
119 static const struct ddc_sh_mask ddc_mask = {
120 DDC_MASK_SH_LIST(_MASK)
123 static void define_ddc_registers(
124 struct hw_gpio_pin *pin,
127 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
130 case GPIO_ID_DDC_DATA:
131 ddc->regs = &ddc_data_regs[en];
132 ddc->base.regs = &ddc_data_regs[en].gpio;
134 case GPIO_ID_DDC_CLOCK:
135 ddc->regs = &ddc_clk_regs[en];
136 ddc->base.regs = &ddc_clk_regs[en].gpio;
139 ASSERT_CRITICAL(false);
143 ddc->shifts = &ddc_shift;
144 ddc->masks = &ddc_mask;
148 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en)
150 struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin);
152 hpd->regs = &hpd_regs[en];
153 hpd->shifts = &hpd_shift;
154 hpd->masks = &hpd_mask;
155 hpd->base.regs = &hpd_regs[en].gpio;
160 static const struct hw_factory_funcs funcs = {
161 .create_ddc_data = dal_hw_ddc_create,
162 .create_ddc_clock = dal_hw_ddc_create,
163 .create_generic = NULL,
164 .create_hpd = dal_hw_hpd_create,
167 .define_hpd_registers = define_hpd_registers,
168 .define_ddc_registers = define_ddc_registers
171 * dal_hw_factory_dcn10_init
174 * Initialize HW factory function pointers and pin info
177 * struct hw_factory *factory - [out] struct of function pointers
179 void dal_hw_factory_dcn10_init(struct hw_factory *factory)
181 /*TODO check ASIC CAPs*/
182 factory->number_of_pins[GPIO_ID_DDC_DATA] = 8;
183 factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8;
184 factory->number_of_pins[GPIO_ID_GENERIC] = 7;
185 factory->number_of_pins[GPIO_ID_HPD] = 6;
186 factory->number_of_pins[GPIO_ID_GPIO_PAD] = 31;
187 factory->number_of_pins[GPIO_ID_VIP_PAD] = 0;
188 factory->number_of_pins[GPIO_ID_SYNC] = 2;
189 factory->number_of_pins[GPIO_ID_GSL] = 4;
191 factory->funcs = &funcs;