2 * Copyright 2012-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include "dm_services.h"
29 * Pre-requisites: headers required by header of this unit
31 #include "include/gpio_types.h"
32 #include "../hw_translate.h"
34 #include "hw_translate_dce80.h"
36 #include "dce/dce_8_0_d.h"
37 #include "dce/dce_8_0_sh_mask.h"
38 #include "smu/smu_7_0_1_d.h"
42 * Returns index of first bit (starting with LSB) which is set
44 static uint32_t index_from_vector(
60 return GPIO_ENUM_UNKNOWN;
63 static bool offset_to_id(
71 case mmDC_GPIO_GENERIC_A:
72 *id = GPIO_ID_GENERIC;
74 case DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK:
77 case DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK:
80 case DC_GPIO_GENERIC_A__DC_GPIO_GENERICC_A_MASK:
83 case DC_GPIO_GENERIC_A__DC_GPIO_GENERICD_A_MASK:
86 case DC_GPIO_GENERIC_A__DC_GPIO_GENERICE_A_MASK:
89 case DC_GPIO_GENERIC_A__DC_GPIO_GENERICF_A_MASK:
92 case DC_GPIO_GENERIC_A__DC_GPIO_GENERICG_A_MASK:
101 case mmDC_GPIO_HPD_A:
104 case DC_GPIO_HPD_A__DC_GPIO_HPD1_A_MASK:
107 case DC_GPIO_HPD_A__DC_GPIO_HPD2_A_MASK:
110 case DC_GPIO_HPD_A__DC_GPIO_HPD3_A_MASK:
113 case DC_GPIO_HPD_A__DC_GPIO_HPD4_A_MASK:
116 case DC_GPIO_HPD_A__DC_GPIO_HPD5_A_MASK:
119 case DC_GPIO_HPD_A__DC_GPIO_HPD6_A_MASK:
128 case mmDC_GPIO_SYNCA_A:
131 case DC_GPIO_SYNCA_A__DC_GPIO_HSYNCA_A_MASK:
132 *en = GPIO_SYNC_HSYNC_A;
134 case DC_GPIO_SYNCA_A__DC_GPIO_VSYNCA_A_MASK:
135 *en = GPIO_SYNC_VSYNC_A;
142 /* mmDC_GPIO_GENLK_MASK */
143 case mmDC_GPIO_GENLK_A:
146 case DC_GPIO_GENLK_A__DC_GPIO_GENLK_CLK_A_MASK:
147 *en = GPIO_GSL_GENLOCK_CLOCK;
149 case DC_GPIO_GENLK_A__DC_GPIO_GENLK_VSYNC_A_MASK:
150 *en = GPIO_GSL_GENLOCK_VSYNC;
152 case DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_A_A_MASK:
153 *en = GPIO_GSL_SWAPLOCK_A;
155 case DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_B_A_MASK:
156 *en = GPIO_GSL_SWAPLOCK_B;
165 *id = GPIO_ID_GPIO_PAD;
166 *en = index_from_vector(mask);
167 return (*en <= GPIO_GPIO_PAD_MAX);
169 /* we don't care about the GPIO_ID for DDC
170 * in DdcHandle it will use GPIO_ID_DDC_DATA/GPIO_ID_DDC_CLOCK
171 * directly in the create method */
172 case mmDC_GPIO_DDC1_A:
173 *en = GPIO_DDC_LINE_DDC1;
175 case mmDC_GPIO_DDC2_A:
176 *en = GPIO_DDC_LINE_DDC2;
178 case mmDC_GPIO_DDC3_A:
179 *en = GPIO_DDC_LINE_DDC3;
181 case mmDC_GPIO_DDC4_A:
182 *en = GPIO_DDC_LINE_DDC4;
184 case mmDC_GPIO_DDC5_A:
185 *en = GPIO_DDC_LINE_DDC5;
187 case mmDC_GPIO_DDC6_A:
188 *en = GPIO_DDC_LINE_DDC6;
190 case mmDC_GPIO_DDCVGA_A:
191 *en = GPIO_DDC_LINE_DDC_VGA;
194 case mmDC_GPIO_I2CPAD_A:
195 *en = GPIO_DDC_LINE_I2C_PAD;
197 /* Not implemented */
198 case mmDC_GPIO_PWRSEQ_A:
199 case mmDC_GPIO_PAD_STRENGTH_1:
200 case mmDC_GPIO_PAD_STRENGTH_2:
201 case mmDC_GPIO_DEBUG:
210 static bool id_to_offset(
213 struct gpio_pin_info *info)
218 case GPIO_ID_DDC_DATA:
219 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK;
221 case GPIO_DDC_LINE_DDC1:
222 info->offset = mmDC_GPIO_DDC1_A;
224 case GPIO_DDC_LINE_DDC2:
225 info->offset = mmDC_GPIO_DDC2_A;
227 case GPIO_DDC_LINE_DDC3:
228 info->offset = mmDC_GPIO_DDC3_A;
230 case GPIO_DDC_LINE_DDC4:
231 info->offset = mmDC_GPIO_DDC4_A;
233 case GPIO_DDC_LINE_DDC5:
234 info->offset = mmDC_GPIO_DDC5_A;
236 case GPIO_DDC_LINE_DDC6:
237 info->offset = mmDC_GPIO_DDC6_A;
239 case GPIO_DDC_LINE_DDC_VGA:
240 info->offset = mmDC_GPIO_DDCVGA_A;
242 case GPIO_DDC_LINE_I2C_PAD:
243 info->offset = mmDC_GPIO_I2CPAD_A;
250 case GPIO_ID_DDC_CLOCK:
251 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK;
253 case GPIO_DDC_LINE_DDC1:
254 info->offset = mmDC_GPIO_DDC1_A;
256 case GPIO_DDC_LINE_DDC2:
257 info->offset = mmDC_GPIO_DDC2_A;
259 case GPIO_DDC_LINE_DDC3:
260 info->offset = mmDC_GPIO_DDC3_A;
262 case GPIO_DDC_LINE_DDC4:
263 info->offset = mmDC_GPIO_DDC4_A;
265 case GPIO_DDC_LINE_DDC5:
266 info->offset = mmDC_GPIO_DDC5_A;
268 case GPIO_DDC_LINE_DDC6:
269 info->offset = mmDC_GPIO_DDC6_A;
271 case GPIO_DDC_LINE_DDC_VGA:
272 info->offset = mmDC_GPIO_DDCVGA_A;
274 case GPIO_DDC_LINE_I2C_PAD:
275 info->offset = mmDC_GPIO_I2CPAD_A;
282 case GPIO_ID_GENERIC:
283 info->offset = mmDC_GPIO_GENERIC_A;
286 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK;
289 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK;
292 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICC_A_MASK;
295 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICD_A_MASK;
298 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICE_A_MASK;
301 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICF_A_MASK;
304 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICG_A_MASK;
312 info->offset = mmDC_GPIO_HPD_A;
315 info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD1_A_MASK;
318 info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD2_A_MASK;
321 info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD3_A_MASK;
324 info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD4_A_MASK;
327 info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD5_A_MASK;
330 info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD6_A_MASK;
339 case GPIO_SYNC_HSYNC_A:
340 info->offset = mmDC_GPIO_SYNCA_A;
341 info->mask = DC_GPIO_SYNCA_A__DC_GPIO_HSYNCA_A_MASK;
343 case GPIO_SYNC_VSYNC_A:
344 info->offset = mmDC_GPIO_SYNCA_A;
345 info->mask = DC_GPIO_SYNCA_A__DC_GPIO_VSYNCA_A_MASK;
347 case GPIO_SYNC_HSYNC_B:
348 case GPIO_SYNC_VSYNC_B:
356 case GPIO_GSL_GENLOCK_CLOCK:
357 info->offset = mmDC_GPIO_GENLK_A;
358 info->mask = DC_GPIO_GENLK_A__DC_GPIO_GENLK_CLK_A_MASK;
360 case GPIO_GSL_GENLOCK_VSYNC:
361 info->offset = mmDC_GPIO_GENLK_A;
363 DC_GPIO_GENLK_A__DC_GPIO_GENLK_VSYNC_A_MASK;
365 case GPIO_GSL_SWAPLOCK_A:
366 info->offset = mmDC_GPIO_GENLK_A;
367 info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_A_A_MASK;
369 case GPIO_GSL_SWAPLOCK_B:
370 info->offset = mmDC_GPIO_GENLK_A;
371 info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_B_A_MASK;
378 case GPIO_ID_GPIO_PAD:
379 info->offset = mmGPIOPAD_A;
380 info->mask = (1 << en);
381 result = (info->mask <= GPIO_GPIO_PAD_MAX);
383 case GPIO_ID_VIP_PAD:
390 info->offset_y = info->offset + 2;
391 info->offset_en = info->offset + 1;
392 info->offset_mask = info->offset - 1;
394 info->mask_y = info->mask;
395 info->mask_en = info->mask;
396 info->mask_mask = info->mask;
402 static const struct hw_translate_funcs funcs = {
403 .offset_to_id = offset_to_id,
404 .id_to_offset = id_to_offset,
407 void dal_hw_translate_dce80_init(
408 struct hw_translate *translate)
410 translate->funcs = &funcs;