drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  *          Christian König
  28  */
  29 #include <linux/seq_file.h>
  30 #include <linux/slab.h>
  31 #include <linux/debugfs.h>
  32 #include <drm/drmP.h>
  33 #include <drm/amdgpu_drm.h>
  34 #include "amdgpu.h"
  35 #include "atom.h"
  36
  37 /*
  38  * Rings
  39  * Most engines on the GPU are fed via ring buffers.  Ring
  40  * buffers are areas of GPU accessible memory that the host
  41  * writes commands into and the GPU reads commands out of.
  42  * There is a rptr (read pointer) that determines where the
  43  * GPU is currently reading, and a wptr (write pointer)
  44  * which determines where the host has written.  When the
  45  * pointers are equal, the ring is idle.  When the host
  46  * writes commands to the ring buffer, it increments the
  47  * wptr.  The GPU then starts fetching commands and executes
  48  * them until the pointers are equal again.
  49  */
  50 static int amdgpu_debugfs_ring_init(struct amdgpu_device *adev,
  51                                     struct amdgpu_ring *ring);
  52 static void amdgpu_debugfs_ring_fini(struct amdgpu_ring *ring);
  53
  54 /**
  55  * amdgpu_ring_alloc - allocate space on the ring buffer
  56  *
  57  * @adev: amdgpu_device pointer
  58  * @ring: amdgpu_ring structure holding ring information
  59  * @ndw: number of dwords to allocate in the ring buffer
  60  *
  61  * Allocate @ndw dwords in the ring buffer (all asics).
  62  * Returns 0 on success, error on failure.
  63  */
  64 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw)
  65 {
  66         /* Align requested size with padding so unlock_commit can
  67          * pad safely */
  68         ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask;
  69
  70         /* Make sure we aren't trying to allocate more space
  71          * than the maximum for one submission
  72          */
  73         if (WARN_ON_ONCE(ndw > ring->max_dw))
  74                 return -ENOMEM;
  75
  76         ring->count_dw = ndw;
  77         ring->wptr_old = ring->wptr;
  78
  79         if (ring->funcs->begin_use)
  80                 ring->funcs->begin_use(ring);
  81
  82         return 0;
  83 }
  84
  85 /** amdgpu_ring_insert_nop - insert NOP packets
  86  *
  87  * @ring: amdgpu_ring structure holding ring information
  88  * @count: the number of NOP packets to insert
  89  *
  90  * This is the generic insert_nop function for rings except SDMA
  91  */
  92 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
  93 {
  94         int i;
  95
  96         for (i = 0; i < count; i++)
  97                 amdgpu_ring_write(ring, ring->funcs->nop);
  98 }
  99
 100 /** amdgpu_ring_generic_pad_ib - pad IB with NOP packets
 101  *
 102  * @ring: amdgpu_ring structure holding ring information
 103  * @ib: IB to add NOP packets to
 104  *
 105  * This is the generic pad_ib function for rings except SDMA
 106  */
 107 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)
 108 {
 109         while (ib->length_dw & ring->funcs->align_mask)
 110                 ib->ptr[ib->length_dw++] = ring->funcs->nop;
 111 }
 112
 113 /**
 114  * amdgpu_ring_commit - tell the GPU to execute the new
 115  * commands on the ring buffer
 116  *
 117  * @adev: amdgpu_device pointer
 118  * @ring: amdgpu_ring structure holding ring information
 119  *
 120  * Update the wptr (write pointer) to tell the GPU to
 121  * execute new commands on the ring buffer (all asics).
 122  */
 123 void amdgpu_ring_commit(struct amdgpu_ring *ring)
 124 {
 125         uint32_t count;
 126
 127         /* We pad to match fetch size */
 128         count = ring->funcs->align_mask + 1 -
 129                 (ring->wptr & ring->funcs->align_mask);
 130         count %= ring->funcs->align_mask + 1;
 131         ring->funcs->insert_nop(ring, count);
 132
 133         mb();
 134         amdgpu_ring_set_wptr(ring);
 135
 136         if (ring->funcs->end_use)
 137                 ring->funcs->end_use(ring);
 138
 139         amdgpu_ring_lru_touch(ring->adev, ring);
 140 }
 141
 142 /**
 143  * amdgpu_ring_undo - reset the wptr
 144  *
 145  * @ring: amdgpu_ring structure holding ring information
 146  *
 147  * Reset the driver's copy of the wptr (all asics).
 148  */
 149 void amdgpu_ring_undo(struct amdgpu_ring *ring)
 150 {
 151         ring->wptr = ring->wptr_old;
 152
 153         if (ring->funcs->end_use)
 154                 ring->funcs->end_use(ring);
 155 }
 156
 157 /**
 158  * amdgpu_ring_init - init driver ring struct.
 159  *
 160  * @adev: amdgpu_device pointer
 161  * @ring: amdgpu_ring structure holding ring information
 162  * @max_ndw: maximum number of dw for ring alloc
 163  * @nop: nop packet for this ring
 164  *
 165  * Initialize the driver information for the selected ring (all asics).
 166  * Returns 0 on success, error on failure.
 167  */
 168 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
 169                      unsigned max_dw, struct amdgpu_irq_src *irq_src,
 170                      unsigned irq_type)
 171 {
 172         int r;
 173
 174         if (ring->adev == NULL) {
 175                 if (adev->num_rings >= AMDGPU_MAX_RINGS)
 176                         return -EINVAL;
 177
 178                 ring->adev = adev;
 179                 ring->idx = adev->num_rings++;
 180                 adev->rings[ring->idx] = ring;
 181                 r = amdgpu_fence_driver_init_ring(ring,
 182                         amdgpu_sched_hw_submission);
 183                 if (r)
 184                         return r;
 185         }
 186
 187         if (ring->funcs->support_64bit_ptrs) {
 188                 r = amdgpu_wb_get_64bit(adev, &ring->rptr_offs);
 189                 if (r) {
 190                         dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r);
 191                         return r;
 192                 }
 193
 194                 r = amdgpu_wb_get_64bit(adev, &ring->wptr_offs);
 195                 if (r) {
 196                         dev_err(adev->dev, "(%d) ring wptr_offs wb alloc failed\n", r);
 197                         return r;
 198                 }
 199
 200         } else {
 201                 r = amdgpu_wb_get(adev, &ring->rptr_offs);
 202                 if (r) {
 203                         dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r);
 204                         return r;
 205                 }
 206
 207                 r = amdgpu_wb_get(adev, &ring->wptr_offs);
 208                 if (r) {
 209                         dev_err(adev->dev, "(%d) ring wptr_offs wb alloc failed\n", r);
 210                         return r;
 211                 }
 212
 213         }
 214
 215         r = amdgpu_wb_get(adev, &ring->fence_offs);
 216         if (r) {
 217                 dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r);
 218                 return r;
 219         }
 220
 221         r = amdgpu_wb_get(adev, &ring->cond_exe_offs);
 222         if (r) {
 223                 dev_err(adev->dev, "(%d) ring cond_exec_polling wb alloc failed\n", r);
 224                 return r;
 225         }
 226         ring->cond_exe_gpu_addr = adev->wb.gpu_addr + (ring->cond_exe_offs * 4);
 227         ring->cond_exe_cpu_addr = &adev->wb.wb[ring->cond_exe_offs];
 228         /* always set cond_exec_polling to CONTINUE */
 229         *ring->cond_exe_cpu_addr = 1;
 230
 231         r = amdgpu_fence_driver_start_ring(ring, irq_src, irq_type);
 232         if (r) {
 233                 dev_err(adev->dev, "failed initializing fences (%d).\n", r);
 234                 return r;
 235         }
 236
 237         ring->ring_size = roundup_pow_of_two(max_dw * 4 *
 238                                              amdgpu_sched_hw_submission);
 239
 240         ring->buf_mask = (ring->ring_size / 4) - 1;
 241         ring->ptr_mask = ring->funcs->support_64bit_ptrs ?
 242                 0xffffffffffffffff : ring->buf_mask;
 243         /* Allocate ring buffer */
 244         if (ring->ring_obj == NULL) {
 245                 r = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE,
 246                                             AMDGPU_GEM_DOMAIN_GTT,
 247                                             &ring->ring_obj,
 248                                             &ring->gpu_addr,
 249                                             (void **)&ring->ring);
 250                 if (r) {
 251                         dev_err(adev->dev, "(%d) ring create failed\n", r);
 252                         return r;
 253                 }
 254                 amdgpu_ring_clear_ring(ring);
 255         }
 256
 257         ring->max_dw = max_dw;
 258         INIT_LIST_HEAD(&ring->lru_list);
 259         amdgpu_ring_lru_touch(adev, ring);
 260
 261         if (amdgpu_debugfs_ring_init(adev, ring)) {
 262                 DRM_ERROR("Failed to register debugfs file for rings !\n");
 263         }
 264
 265         return 0;
 266 }
 267
 268 /**
 269  * amdgpu_ring_fini - tear down the driver ring struct.
 270  *
 271  * @adev: amdgpu_device pointer
 272  * @ring: amdgpu_ring structure holding ring information
 273  *
 274  * Tear down the driver information for the selected ring (all asics).
 275  */
 276 void amdgpu_ring_fini(struct amdgpu_ring *ring)
 277 {
 278         ring->ready = false;
 279
 280         if (ring->funcs->support_64bit_ptrs) {
 281                 amdgpu_wb_free_64bit(ring->adev, ring->cond_exe_offs);
 282                 amdgpu_wb_free_64bit(ring->adev, ring->fence_offs);
 283                 amdgpu_wb_free_64bit(ring->adev, ring->rptr_offs);
 284                 amdgpu_wb_free_64bit(ring->adev, ring->wptr_offs);
 285         } else {
 286                 amdgpu_wb_free(ring->adev, ring->cond_exe_offs);
 287                 amdgpu_wb_free(ring->adev, ring->fence_offs);
 288                 amdgpu_wb_free(ring->adev, ring->rptr_offs);
 289                 amdgpu_wb_free(ring->adev, ring->wptr_offs);
 290         }
 291
 292
 293         amdgpu_bo_free_kernel(&ring->ring_obj,
 294                               &ring->gpu_addr,
 295                               (void **)&ring->ring);
 296
 297         amdgpu_debugfs_ring_fini(ring);
 298
 299         ring->adev->rings[ring->idx] = NULL;
 300 }
 301
 302 static void amdgpu_ring_lru_touch_locked(struct amdgpu_device *adev,
 303                                          struct amdgpu_ring *ring)
 304 {
 305         /* list_move_tail handles the case where ring isn't part of the list */
 306         list_move_tail(&ring->lru_list, &adev->ring_lru_list);
 307 }
 308
 309 static bool amdgpu_ring_is_blacklisted(struct amdgpu_ring *ring,
 310                                        int *blacklist, int num_blacklist)
 311 {
 312         int i;
 313
 314         for (i = 0; i < num_blacklist; i++) {
 315                 if (ring->idx == blacklist[i])
 316                         return true;
 317         }
 318
 319         return false;
 320 }
 321
 322 /**
 323  * amdgpu_ring_lru_get - get the least recently used ring for a HW IP block
 324  *
 325  * @adev: amdgpu_device pointer
 326  * @type: amdgpu_ring_type enum
 327  * @blacklist: blacklisted ring ids array
 328  * @num_blacklist: number of entries in @blacklist
 329  * @ring: output ring
 330  *
 331  * Retrieve the amdgpu_ring structure for the least recently used ring of
 332  * a specific IP block (all asics).
 333  * Returns 0 on success, error on failure.
 334  */
 335 int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist,
 336                         int num_blacklist, struct amdgpu_ring **ring)
 337 {
 338         struct amdgpu_ring *entry;
 339
 340         /* List is sorted in LRU order, find first entry corresponding
 341          * to the desired HW IP */
 342         *ring = NULL;
 343         spin_lock(&adev->ring_lru_list_lock);
 344         list_for_each_entry(entry, &adev->ring_lru_list, lru_list) {
 345                 if (entry->funcs->type != type)
 346                         continue;
 347
 348                 if (amdgpu_ring_is_blacklisted(entry, blacklist, num_blacklist))
 349                         continue;
 350
 351                 *ring = entry;
 352                 amdgpu_ring_lru_touch_locked(adev, *ring);
 353                 break;
 354         }
 355         spin_unlock(&adev->ring_lru_list_lock);
 356
 357         if (!*ring) {
 358                 DRM_ERROR("Ring LRU contains no entries for ring type:%d\n", type);
 359                 return -EINVAL;
 360         }
 361
 362         return 0;
 363 }
 364
 365 /**
 366  * amdgpu_ring_lru_touch - mark a ring as recently being used
 367  *
 368  * @adev: amdgpu_device pointer
 369  * @ring: ring to touch
 370  *
 371  * Move @ring to the tail of the lru list
 372  */
 373 void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring)
 374 {
 375         spin_lock(&adev->ring_lru_list_lock);
 376         amdgpu_ring_lru_touch_locked(adev, ring);
 377         spin_unlock(&adev->ring_lru_list_lock);
 378 }
 379
 380 /*
 381  * Debugfs info
 382  */
 383 #if defined(CONFIG_DEBUG_FS)
 384
 385 /* Layout of file is 12 bytes consisting of
 386  * - rptr
 387  * - wptr
 388  * - driver's copy of wptr
 389  *
 390  * followed by n-words of ring data
 391  */
 392 static ssize_t amdgpu_debugfs_ring_read(struct file *f, char __user *buf,
 393                                         size_t size, loff_t *pos)
 394 {
 395         struct amdgpu_ring *ring = file_inode(f)->i_private;
 396         int r, i;
 397         uint32_t value, result, early[3];
 398
 399         if (*pos & 3 || size & 3)
 400                 return -EINVAL;
 401
 402         result = 0;
 403
 404         if (*pos < 12) {
 405                 early[0] = amdgpu_ring_get_rptr(ring);
 406                 early[1] = amdgpu_ring_get_wptr(ring) & ring->buf_mask;
 407                 early[2] = ring->wptr & ring->buf_mask;
 408                 for (i = *pos / 4; i < 3 && size; i++) {
 409                         r = put_user(early[i], (uint32_t *)buf);
 410                         if (r)
 411                                 return r;
 412                         buf += 4;
 413                         result += 4;
 414                         size -= 4;
 415                         *pos += 4;
 416                 }
 417         }
 418
 419         while (size) {
 420                 if (*pos >= (ring->ring_size + 12))
 421                         return result;
 422
 423                 value = ring->ring[(*pos - 12)/4];
 424                 r = put_user(value, (uint32_t*)buf);
 425                 if (r)
 426                         return r;
 427                 buf += 4;
 428                 result += 4;
 429                 size -= 4;
 430                 *pos += 4;
 431         }
 432
 433         return result;
 434 }
 435
 436 static const struct file_operations amdgpu_debugfs_ring_fops = {
 437         .owner = THIS_MODULE,
 438         .read = amdgpu_debugfs_ring_read,
 439         .llseek = default_llseek
 440 };
 441
 442 #endif
 443
 444 static int amdgpu_debugfs_ring_init(struct amdgpu_device *adev,
 445                                     struct amdgpu_ring *ring)
 446 {
 447 #if defined(CONFIG_DEBUG_FS)
 448         struct drm_minor *minor = adev->ddev->primary;
 449         struct dentry *ent, *root = minor->debugfs_root;
 450         char name[32];
 451
 452         sprintf(name, "amdgpu_ring_%s", ring->name);
 453
 454         ent = debugfs_create_file(name,
 455                                   S_IFREG | S_IRUGO, root,
 456                                   ring, &amdgpu_debugfs_ring_fops);
 457         if (!ent)
 458                 return -ENOMEM;
 459
 460         i_size_write(ent->d_inode, ring->ring_size + 12);
 461         ring->ent = ent;
 462 #endif
 463         return 0;
 464 }
 465
 466 static void amdgpu_debugfs_ring_fini(struct amdgpu_ring *ring)
 467 {
 468 #if defined(CONFIG_DEBUG_FS)
 469         debugfs_remove(ring->ent);
 470 #endif
 471 }