1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2016 Broadcom
7 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/errno.h>
10 #include <linux/kernel.h>
11 #include <linux/interrupt.h>
12 #include <linux/platform_device.h>
13 #include <linux/scatterlist.h>
14 #include <linux/crypto.h>
15 #include <linux/kthread.h>
16 #include <linux/rtnetlink.h>
17 #include <linux/sched.h>
18 #include <linux/of_address.h>
19 #include <linux/of_device.h>
21 #include <linux/bitops.h>
23 #include <crypto/algapi.h>
24 #include <crypto/aead.h>
25 #include <crypto/internal/aead.h>
26 #include <crypto/aes.h>
27 #include <crypto/internal/des.h>
28 #include <crypto/hmac.h>
29 #include <crypto/sha.h>
30 #include <crypto/md5.h>
31 #include <crypto/authenc.h>
32 #include <crypto/skcipher.h>
33 #include <crypto/hash.h>
34 #include <crypto/sha3.h>
42 /* ================= Device Structure ================== */
44 struct device_private iproc_priv;
46 /* ==================== Parameters ===================== */
48 int flow_debug_logging;
49 module_param(flow_debug_logging, int, 0644);
50 MODULE_PARM_DESC(flow_debug_logging, "Enable Flow Debug Logging");
52 int packet_debug_logging;
53 module_param(packet_debug_logging, int, 0644);
54 MODULE_PARM_DESC(packet_debug_logging, "Enable Packet Debug Logging");
56 int debug_logging_sleep;
57 module_param(debug_logging_sleep, int, 0644);
58 MODULE_PARM_DESC(debug_logging_sleep, "Packet Debug Logging Sleep");
61 * The value of these module parameters is used to set the priority for each
62 * algo type when this driver registers algos with the kernel crypto API.
63 * To use a priority other than the default, set the priority in the insmod or
64 * modprobe. Changing the module priority after init time has no effect.
66 * The default priorities are chosen to be lower (less preferred) than ARMv8 CE
67 * algos, but more preferred than generic software algos.
69 static int cipher_pri = 150;
70 module_param(cipher_pri, int, 0644);
71 MODULE_PARM_DESC(cipher_pri, "Priority for cipher algos");
73 static int hash_pri = 100;
74 module_param(hash_pri, int, 0644);
75 MODULE_PARM_DESC(hash_pri, "Priority for hash algos");
77 static int aead_pri = 150;
78 module_param(aead_pri, int, 0644);
79 MODULE_PARM_DESC(aead_pri, "Priority for AEAD algos");
81 /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
82 * Bits 3 and 4 in the first byte encode the channel number (the dma ringset).
88 static char BCMHEADER[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28 };
90 * Some SPU hw does not use BCM header on SPU messages. So BCM_HDR_LEN
91 * is set dynamically after reading SPU type from device tree.
93 #define BCM_HDR_LEN iproc_priv.bcm_hdr_len
95 /* min and max time to sleep before retrying when mbox queue is full. usec */
96 #define MBOX_SLEEP_MIN 800
97 #define MBOX_SLEEP_MAX 1000
100 * select_channel() - Select a SPU channel to handle a crypto request. Selects
101 * channel in round robin order.
103 * Return: channel index
105 static u8 select_channel(void)
107 u8 chan_idx = atomic_inc_return(&iproc_priv.next_chan);
109 return chan_idx % iproc_priv.spu.num_chan;
113 * spu_ablkcipher_rx_sg_create() - Build up the scatterlist of buffers used to
114 * receive a SPU response message for an ablkcipher request. Includes buffers to
115 * catch SPU message headers and the response data.
116 * @mssg: mailbox message containing the receive sg
117 * @rctx: crypto request context
118 * @rx_frag_num: number of scatterlist elements required to hold the
119 * SPU response message
120 * @chunksize: Number of bytes of response data expected
121 * @stat_pad_len: Number of bytes required to pad the STAT field to
124 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
125 * when the request completes, whether the request is handled successfully or
133 spu_ablkcipher_rx_sg_create(struct brcm_message *mssg,
134 struct iproc_reqctx_s *rctx,
136 unsigned int chunksize, u32 stat_pad_len)
138 struct spu_hw *spu = &iproc_priv.spu;
139 struct scatterlist *sg; /* used to build sgs in mbox message */
140 struct iproc_ctx_s *ctx = rctx->ctx;
141 u32 datalen; /* Number of bytes of response data expected */
143 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
149 sg_init_table(sg, rx_frag_num);
150 /* Space for SPU message header */
151 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
153 /* If XTS tweak in payload, add buffer to receive encrypted tweak */
154 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
155 spu->spu_xts_tweak_in_payload())
156 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak,
159 /* Copy in each dst sg entry from request, up to chunksize */
160 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
161 rctx->dst_nents, chunksize);
162 if (datalen < chunksize) {
163 pr_err("%s(): failed to copy dst sg to mbox msg. chunksize %u, datalen %u",
164 __func__, chunksize, datalen);
168 if (ctx->cipher.alg == CIPHER_ALG_RC4)
169 /* Add buffer to catch 260-byte SUPDT field for RC4 */
170 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, SPU_SUPDT_LEN);
173 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
175 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
176 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
182 * spu_ablkcipher_tx_sg_create() - Build up the scatterlist of buffers used to
183 * send a SPU request message for an ablkcipher request. Includes SPU message
184 * headers and the request data.
185 * @mssg: mailbox message containing the transmit sg
186 * @rctx: crypto request context
187 * @tx_frag_num: number of scatterlist elements required to construct the
188 * SPU request message
189 * @chunksize: Number of bytes of request data
190 * @pad_len: Number of pad bytes
192 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
193 * when the request completes, whether the request is handled successfully or
201 spu_ablkcipher_tx_sg_create(struct brcm_message *mssg,
202 struct iproc_reqctx_s *rctx,
203 u8 tx_frag_num, unsigned int chunksize, u32 pad_len)
205 struct spu_hw *spu = &iproc_priv.spu;
206 struct scatterlist *sg; /* used to build sgs in mbox message */
207 struct iproc_ctx_s *ctx = rctx->ctx;
208 u32 datalen; /* Number of bytes of response data expected */
211 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
213 if (unlikely(!mssg->spu.src))
217 sg_init_table(sg, tx_frag_num);
219 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
220 BCM_HDR_LEN + ctx->spu_req_hdr_len);
222 /* if XTS tweak in payload, copy from IV (where crypto API puts it) */
223 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
224 spu->spu_xts_tweak_in_payload())
225 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, SPU_XTS_TWEAK_SIZE);
227 /* Copy in each src sg entry from request, up to chunksize */
228 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
229 rctx->src_nents, chunksize);
230 if (unlikely(datalen < chunksize)) {
231 pr_err("%s(): failed to copy src sg to mbox msg",
237 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
239 stat_len = spu->spu_tx_status_len();
241 memset(rctx->msg_buf.tx_stat, 0, stat_len);
242 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
247 static int mailbox_send_message(struct brcm_message *mssg, u32 flags,
252 struct device *dev = &(iproc_priv.pdev->dev);
254 err = mbox_send_message(iproc_priv.mbox[chan_idx], mssg);
255 if (flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
256 while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
258 * Mailbox queue is full. Since MAY_SLEEP is set, assume
259 * not in atomic context and we can wait and try again.
262 usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
263 err = mbox_send_message(iproc_priv.mbox[chan_idx],
265 atomic_inc(&iproc_priv.mb_no_spc);
269 atomic_inc(&iproc_priv.mb_send_fail);
273 /* Check error returned by mailbox controller */
275 if (unlikely(err < 0)) {
276 dev_err(dev, "message error %d", err);
277 /* Signal txdone for mailbox channel */
280 /* Signal txdone for mailbox channel */
281 mbox_client_txdone(iproc_priv.mbox[chan_idx], err);
286 * handle_ablkcipher_req() - Submit as much of a block cipher request as fits in
287 * a single SPU request message, starting at the current position in the request
289 * @rctx: Crypto request context
291 * This may be called on the crypto API thread, or, when a request is so large
292 * it must be broken into multiple SPU messages, on the thread used to invoke
293 * the response callback. When requests are broken into multiple SPU
294 * messages, we assume subsequent messages depend on previous results, and
295 * thus always wait for previous results before submitting the next message.
296 * Because requests are submitted in lock step like this, there is no need
297 * to synchronize access to request data structures.
299 * Return: -EINPROGRESS: request has been accepted and result will be returned
301 * Any other value indicates an error
303 static int handle_ablkcipher_req(struct iproc_reqctx_s *rctx)
305 struct spu_hw *spu = &iproc_priv.spu;
306 struct crypto_async_request *areq = rctx->parent;
307 struct ablkcipher_request *req =
308 container_of(areq, struct ablkcipher_request, base);
309 struct iproc_ctx_s *ctx = rctx->ctx;
310 struct spu_cipher_parms cipher_parms;
312 unsigned int chunksize = 0; /* Num bytes of request to submit */
313 int remaining = 0; /* Bytes of request still to process */
314 int chunk_start; /* Beginning of data for current SPU msg */
316 /* IV or ctr value to use in this SPU msg */
317 u8 local_iv_ctr[MAX_IV_SIZE];
318 u32 stat_pad_len; /* num bytes to align status field */
319 u32 pad_len; /* total length of all padding */
320 bool update_key = false;
321 struct brcm_message *mssg; /* mailbox message */
323 /* number of entries in src and dst sg in mailbox message. */
324 u8 rx_frag_num = 2; /* response header and STATUS */
325 u8 tx_frag_num = 1; /* request header */
327 flow_log("%s\n", __func__);
329 cipher_parms.alg = ctx->cipher.alg;
330 cipher_parms.mode = ctx->cipher.mode;
331 cipher_parms.type = ctx->cipher_type;
332 cipher_parms.key_len = ctx->enckeylen;
333 cipher_parms.key_buf = ctx->enckey;
334 cipher_parms.iv_buf = local_iv_ctr;
335 cipher_parms.iv_len = rctx->iv_ctr_len;
337 mssg = &rctx->mb_mssg;
338 chunk_start = rctx->src_sent;
339 remaining = rctx->total_todo - chunk_start;
341 /* determine the chunk we are breaking off and update the indexes */
342 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
343 (remaining > ctx->max_payload))
344 chunksize = ctx->max_payload;
346 chunksize = remaining;
348 rctx->src_sent += chunksize;
349 rctx->total_sent = rctx->src_sent;
351 /* Count number of sg entries to be included in this request */
352 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
353 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
355 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
356 rctx->is_encrypt && chunk_start)
358 * Encrypting non-first first chunk. Copy last block of
359 * previous result to IV for this chunk.
361 sg_copy_part_to_buf(req->dst, rctx->msg_buf.iv_ctr,
363 chunk_start - rctx->iv_ctr_len);
365 if (rctx->iv_ctr_len) {
366 /* get our local copy of the iv */
367 __builtin_memcpy(local_iv_ctr, rctx->msg_buf.iv_ctr,
370 /* generate the next IV if possible */
371 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
374 * CBC Decrypt: next IV is the last ciphertext block in
377 sg_copy_part_to_buf(req->src, rctx->msg_buf.iv_ctr,
379 rctx->src_sent - rctx->iv_ctr_len);
380 } else if (ctx->cipher.mode == CIPHER_MODE_CTR) {
382 * The SPU hardware increments the counter once for
383 * each AES block of 16 bytes. So update the counter
384 * for the next chunk, if there is one. Note that for
385 * this chunk, the counter has already been copied to
386 * local_iv_ctr. We can assume a block size of 16,
387 * because we only support CTR mode for AES, not for
388 * any other cipher alg.
390 add_to_ctr(rctx->msg_buf.iv_ctr, chunksize >> 4);
394 if (ctx->cipher.alg == CIPHER_ALG_RC4) {
398 * for non-first RC4 chunks, use SUPDT from previous
399 * response as key for this chunk.
401 cipher_parms.key_buf = rctx->msg_buf.c.supdt_tweak;
403 cipher_parms.type = CIPHER_TYPE_UPDT;
404 } else if (!rctx->is_encrypt) {
406 * First RC4 chunk. For decrypt, key in pre-built msg
407 * header may have been changed if encrypt required
408 * multiple chunks. So revert the key to the
412 cipher_parms.type = CIPHER_TYPE_INIT;
416 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
417 flow_log("max_payload infinite\n");
419 flow_log("max_payload %u\n", ctx->max_payload);
421 flow_log("sent:%u start:%u remains:%u size:%u\n",
422 rctx->src_sent, chunk_start, remaining, chunksize);
424 /* Copy SPU header template created at setkey time */
425 memcpy(rctx->msg_buf.bcm_spu_req_hdr, ctx->bcm_spu_req_hdr,
426 sizeof(rctx->msg_buf.bcm_spu_req_hdr));
429 * Pass SUPDT field as key. Key field in finish() call is only used
430 * when update_key has been set above for RC4. Will be ignored in
433 spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
434 ctx->spu_req_hdr_len, !(rctx->is_encrypt),
435 &cipher_parms, update_key, chunksize);
437 atomic64_add(chunksize, &iproc_priv.bytes_out);
439 stat_pad_len = spu->spu_wordalign_padlen(chunksize);
442 pad_len = stat_pad_len;
445 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0,
446 0, ctx->auth.alg, ctx->auth.mode,
447 rctx->total_sent, stat_pad_len);
450 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
451 ctx->spu_req_hdr_len);
452 packet_log("payload:\n");
453 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
454 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
457 * Build mailbox message containing SPU request msg and rx buffers
458 * to catch response message
460 memset(mssg, 0, sizeof(*mssg));
461 mssg->type = BRCM_MESSAGE_SPU;
462 mssg->ctx = rctx; /* Will be returned in response */
464 /* Create rx scatterlist to catch result */
465 rx_frag_num += rctx->dst_nents;
467 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
468 spu->spu_xts_tweak_in_payload())
469 rx_frag_num++; /* extra sg to insert tweak */
471 err = spu_ablkcipher_rx_sg_create(mssg, rctx, rx_frag_num, chunksize,
476 /* Create tx scatterlist containing SPU request message */
477 tx_frag_num += rctx->src_nents;
478 if (spu->spu_tx_status_len())
481 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
482 spu->spu_xts_tweak_in_payload())
483 tx_frag_num++; /* extra sg to insert tweak */
485 err = spu_ablkcipher_tx_sg_create(mssg, rctx, tx_frag_num, chunksize,
490 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
491 if (unlikely(err < 0))
498 * handle_ablkcipher_resp() - Process a block cipher SPU response. Updates the
499 * total received count for the request and updates global stats.
500 * @rctx: Crypto request context
502 static void handle_ablkcipher_resp(struct iproc_reqctx_s *rctx)
504 struct spu_hw *spu = &iproc_priv.spu;
506 struct crypto_async_request *areq = rctx->parent;
507 struct ablkcipher_request *req = ablkcipher_request_cast(areq);
509 struct iproc_ctx_s *ctx = rctx->ctx;
512 /* See how much data was returned */
513 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
516 * In XTS mode, the first SPU_XTS_TWEAK_SIZE bytes may be the
517 * encrypted tweak ("i") value; we don't count those.
519 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
520 spu->spu_xts_tweak_in_payload() &&
521 (payload_len >= SPU_XTS_TWEAK_SIZE))
522 payload_len -= SPU_XTS_TWEAK_SIZE;
524 atomic64_add(payload_len, &iproc_priv.bytes_in);
526 flow_log("%s() offset: %u, bd_len: %u BD:\n",
527 __func__, rctx->total_received, payload_len);
529 dump_sg(req->dst, rctx->total_received, payload_len);
530 if (ctx->cipher.alg == CIPHER_ALG_RC4)
531 packet_dump(" supdt ", rctx->msg_buf.c.supdt_tweak,
534 rctx->total_received += payload_len;
535 if (rctx->total_received == rctx->total_todo) {
536 atomic_inc(&iproc_priv.op_counts[SPU_OP_CIPHER]);
538 &iproc_priv.cipher_cnt[ctx->cipher.alg][ctx->cipher.mode]);
543 * spu_ahash_rx_sg_create() - Build up the scatterlist of buffers used to
544 * receive a SPU response message for an ahash request.
545 * @mssg: mailbox message containing the receive sg
546 * @rctx: crypto request context
547 * @rx_frag_num: number of scatterlist elements required to hold the
548 * SPU response message
549 * @digestsize: length of hash digest, in bytes
550 * @stat_pad_len: Number of bytes required to pad the STAT field to
553 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
554 * when the request completes, whether the request is handled successfully or
562 spu_ahash_rx_sg_create(struct brcm_message *mssg,
563 struct iproc_reqctx_s *rctx,
564 u8 rx_frag_num, unsigned int digestsize,
567 struct spu_hw *spu = &iproc_priv.spu;
568 struct scatterlist *sg; /* used to build sgs in mbox message */
569 struct iproc_ctx_s *ctx = rctx->ctx;
571 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
577 sg_init_table(sg, rx_frag_num);
578 /* Space for SPU message header */
579 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
581 /* Space for digest */
582 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
585 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
587 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
588 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
593 * spu_ahash_tx_sg_create() - Build up the scatterlist of buffers used to send
594 * a SPU request message for an ahash request. Includes SPU message headers and
596 * @mssg: mailbox message containing the transmit sg
597 * @rctx: crypto request context
598 * @tx_frag_num: number of scatterlist elements required to construct the
599 * SPU request message
600 * @spu_hdr_len: length in bytes of SPU message header
601 * @hash_carry_len: Number of bytes of data carried over from previous req
602 * @new_data_len: Number of bytes of new request data
603 * @pad_len: Number of pad bytes
605 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
606 * when the request completes, whether the request is handled successfully or
614 spu_ahash_tx_sg_create(struct brcm_message *mssg,
615 struct iproc_reqctx_s *rctx,
618 unsigned int hash_carry_len,
619 unsigned int new_data_len, u32 pad_len)
621 struct spu_hw *spu = &iproc_priv.spu;
622 struct scatterlist *sg; /* used to build sgs in mbox message */
623 u32 datalen; /* Number of bytes of response data expected */
626 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
632 sg_init_table(sg, tx_frag_num);
634 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
635 BCM_HDR_LEN + spu_hdr_len);
638 sg_set_buf(sg++, rctx->hash_carry, hash_carry_len);
641 /* Copy in each src sg entry from request, up to chunksize */
642 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
643 rctx->src_nents, new_data_len);
644 if (datalen < new_data_len) {
645 pr_err("%s(): failed to copy src sg to mbox msg",
652 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
654 stat_len = spu->spu_tx_status_len();
656 memset(rctx->msg_buf.tx_stat, 0, stat_len);
657 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
664 * handle_ahash_req() - Process an asynchronous hash request from the crypto
666 * @rctx: Crypto request context
668 * Builds a SPU request message embedded in a mailbox message and submits the
669 * mailbox message on a selected mailbox channel. The SPU request message is
670 * constructed as a scatterlist, including entries from the crypto API's
671 * src scatterlist to avoid copying the data to be hashed. This function is
672 * called either on the thread from the crypto API, or, in the case that the
673 * crypto API request is too large to fit in a single SPU request message,
674 * on the thread that invokes the receive callback with a response message.
675 * Because some operations require the response from one chunk before the next
676 * chunk can be submitted, we always wait for the response for the previous
677 * chunk before submitting the next chunk. Because requests are submitted in
678 * lock step like this, there is no need to synchronize access to request data
682 * -EINPROGRESS: request has been submitted to SPU and response will be
683 * returned asynchronously
684 * -EAGAIN: non-final request included a small amount of data, which for
685 * efficiency we did not submit to the SPU, but instead stored
686 * to be submitted to the SPU with the next part of the request
687 * other: an error code
689 static int handle_ahash_req(struct iproc_reqctx_s *rctx)
691 struct spu_hw *spu = &iproc_priv.spu;
692 struct crypto_async_request *areq = rctx->parent;
693 struct ahash_request *req = ahash_request_cast(areq);
694 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
695 struct crypto_tfm *tfm = crypto_ahash_tfm(ahash);
696 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
697 struct iproc_ctx_s *ctx = rctx->ctx;
699 /* number of bytes still to be hashed in this req */
700 unsigned int nbytes_to_hash = 0;
702 unsigned int chunksize = 0; /* length of hash carry + new data */
704 * length of new data, not from hash carry, to be submitted in
707 unsigned int new_data_len;
709 unsigned int __maybe_unused chunk_start = 0;
710 u32 db_size; /* Length of data field, incl gcm and hash padding */
711 int pad_len = 0; /* total pad len, including gcm, hash, stat padding */
712 u32 data_pad_len = 0; /* length of GCM/CCM padding */
713 u32 stat_pad_len = 0; /* length of padding to align STATUS word */
714 struct brcm_message *mssg; /* mailbox message */
715 struct spu_request_opts req_opts;
716 struct spu_cipher_parms cipher_parms;
717 struct spu_hash_parms hash_parms;
718 struct spu_aead_parms aead_parms;
719 unsigned int local_nbuf;
721 unsigned int digestsize;
725 * number of entries in src and dst sg. Always includes SPU msg header.
726 * rx always includes a buffer to catch digest and STATUS.
731 flow_log("total_todo %u, total_sent %u\n",
732 rctx->total_todo, rctx->total_sent);
734 memset(&req_opts, 0, sizeof(req_opts));
735 memset(&cipher_parms, 0, sizeof(cipher_parms));
736 memset(&hash_parms, 0, sizeof(hash_parms));
737 memset(&aead_parms, 0, sizeof(aead_parms));
739 req_opts.bd_suppress = true;
740 hash_parms.alg = ctx->auth.alg;
741 hash_parms.mode = ctx->auth.mode;
742 hash_parms.type = HASH_TYPE_NONE;
743 hash_parms.key_buf = (u8 *)ctx->authkey;
744 hash_parms.key_len = ctx->authkeylen;
747 * For hash algorithms below assignment looks bit odd but
748 * it's needed for AES-XCBC and AES-CMAC hash algorithms
749 * to differentiate between 128, 192, 256 bit key values.
750 * Based on the key values, hash algorithm is selected.
751 * For example for 128 bit key, hash algorithm is AES-128.
753 cipher_parms.type = ctx->cipher_type;
755 mssg = &rctx->mb_mssg;
756 chunk_start = rctx->src_sent;
759 * Compute the amount remaining to hash. This may include data
760 * carried over from previous requests.
762 nbytes_to_hash = rctx->total_todo - rctx->total_sent;
763 chunksize = nbytes_to_hash;
764 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
765 (chunksize > ctx->max_payload))
766 chunksize = ctx->max_payload;
769 * If this is not a final request and the request data is not a multiple
770 * of a full block, then simply park the extra data and prefix it to the
771 * data for the next request.
773 if (!rctx->is_final) {
774 u8 *dest = rctx->hash_carry + rctx->hash_carry_len;
775 u16 new_len; /* len of data to add to hash carry */
777 rem = chunksize % blocksize; /* remainder */
779 /* chunksize not a multiple of blocksize */
781 if (chunksize == 0) {
782 /* Don't have a full block to submit to hw */
783 new_len = rem - rctx->hash_carry_len;
784 sg_copy_part_to_buf(req->src, dest, new_len,
786 rctx->hash_carry_len = rem;
787 flow_log("Exiting with hash carry len: %u\n",
788 rctx->hash_carry_len);
789 packet_dump(" buf: ",
791 rctx->hash_carry_len);
797 /* if we have hash carry, then prefix it to the data in this request */
798 local_nbuf = rctx->hash_carry_len;
799 rctx->hash_carry_len = 0;
802 new_data_len = chunksize - local_nbuf;
804 /* Count number of sg entries to be used in this request */
805 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip,
808 /* AES hashing keeps key size in type field, so need to copy it here */
809 if (hash_parms.alg == HASH_ALG_AES)
810 hash_parms.type = (enum hash_type)cipher_parms.type;
812 hash_parms.type = spu->spu_hash_type(rctx->total_sent);
814 digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg,
816 hash_parms.digestsize = digestsize;
818 /* update the indexes */
819 rctx->total_sent += chunksize;
820 /* if you sent a prebuf then that wasn't from this req->src */
821 rctx->src_sent += new_data_len;
823 if ((rctx->total_sent == rctx->total_todo) && rctx->is_final)
824 hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg,
830 * If a non-first chunk, then include the digest returned from the
831 * previous chunk so that hw can add to it (except for AES types).
833 if ((hash_parms.type == HASH_TYPE_UPDT) &&
834 (hash_parms.alg != HASH_ALG_AES)) {
835 hash_parms.key_buf = rctx->incr_hash;
836 hash_parms.key_len = digestsize;
839 atomic64_add(chunksize, &iproc_priv.bytes_out);
841 flow_log("%s() final: %u nbuf: %u ",
842 __func__, rctx->is_final, local_nbuf);
844 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
845 flow_log("max_payload infinite\n");
847 flow_log("max_payload %u\n", ctx->max_payload);
849 flow_log("chunk_start: %u chunk_size: %u\n", chunk_start, chunksize);
851 /* Prepend SPU header with type 3 BCM header */
852 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
854 hash_parms.prebuf_len = local_nbuf;
855 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
857 &req_opts, &cipher_parms,
858 &hash_parms, &aead_parms,
861 if (spu_hdr_len == 0) {
862 pr_err("Failed to create SPU request header\n");
867 * Determine total length of padding required. Put all padding in one
870 data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize);
871 db_size = spu_real_db_size(0, 0, local_nbuf, new_data_len,
872 0, 0, hash_parms.pad_len);
873 if (spu->spu_tx_status_len())
874 stat_pad_len = spu->spu_wordalign_padlen(db_size);
877 pad_len = hash_parms.pad_len + data_pad_len + stat_pad_len;
880 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len,
881 hash_parms.pad_len, ctx->auth.alg,
882 ctx->auth.mode, rctx->total_sent,
886 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
888 packet_dump(" prebuf: ", rctx->hash_carry, local_nbuf);
890 dump_sg(rctx->src_sg, rctx->src_skip, new_data_len);
891 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
894 * Build mailbox message containing SPU request msg and rx buffers
895 * to catch response message
897 memset(mssg, 0, sizeof(*mssg));
898 mssg->type = BRCM_MESSAGE_SPU;
899 mssg->ctx = rctx; /* Will be returned in response */
901 /* Create rx scatterlist to catch result */
902 err = spu_ahash_rx_sg_create(mssg, rctx, rx_frag_num, digestsize,
907 /* Create tx scatterlist containing SPU request message */
908 tx_frag_num += rctx->src_nents;
909 if (spu->spu_tx_status_len())
911 err = spu_ahash_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
912 local_nbuf, new_data_len, pad_len);
916 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
917 if (unlikely(err < 0))
924 * spu_hmac_outer_hash() - Request synchonous software compute of the outer hash
925 * for an HMAC request.
926 * @req: The HMAC request from the crypto API
927 * @ctx: The session context
929 * Return: 0 if synchronous hash operation successful
930 * -EINVAL if the hash algo is unrecognized
931 * any other value indicates an error
933 static int spu_hmac_outer_hash(struct ahash_request *req,
934 struct iproc_ctx_s *ctx)
936 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
937 unsigned int blocksize =
938 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
941 switch (ctx->auth.alg) {
943 rc = do_shash("md5", req->result, ctx->opad, blocksize,
944 req->result, ctx->digestsize, NULL, 0);
947 rc = do_shash("sha1", req->result, ctx->opad, blocksize,
948 req->result, ctx->digestsize, NULL, 0);
950 case HASH_ALG_SHA224:
951 rc = do_shash("sha224", req->result, ctx->opad, blocksize,
952 req->result, ctx->digestsize, NULL, 0);
954 case HASH_ALG_SHA256:
955 rc = do_shash("sha256", req->result, ctx->opad, blocksize,
956 req->result, ctx->digestsize, NULL, 0);
958 case HASH_ALG_SHA384:
959 rc = do_shash("sha384", req->result, ctx->opad, blocksize,
960 req->result, ctx->digestsize, NULL, 0);
962 case HASH_ALG_SHA512:
963 rc = do_shash("sha512", req->result, ctx->opad, blocksize,
964 req->result, ctx->digestsize, NULL, 0);
967 pr_err("%s() Error : unknown hmac type\n", __func__);
974 * ahash_req_done() - Process a hash result from the SPU hardware.
975 * @rctx: Crypto request context
977 * Return: 0 if successful
980 static int ahash_req_done(struct iproc_reqctx_s *rctx)
982 struct spu_hw *spu = &iproc_priv.spu;
983 struct crypto_async_request *areq = rctx->parent;
984 struct ahash_request *req = ahash_request_cast(areq);
985 struct iproc_ctx_s *ctx = rctx->ctx;
988 memcpy(req->result, rctx->msg_buf.digest, ctx->digestsize);
990 if (spu->spu_type == SPU_TYPE_SPUM) {
991 /* byte swap the output from the UPDT function to network byte
994 if (ctx->auth.alg == HASH_ALG_MD5) {
995 __swab32s((u32 *)req->result);
996 __swab32s(((u32 *)req->result) + 1);
997 __swab32s(((u32 *)req->result) + 2);
998 __swab32s(((u32 *)req->result) + 3);
999 __swab32s(((u32 *)req->result) + 4);
1003 flow_dump(" digest ", req->result, ctx->digestsize);
1005 /* if this an HMAC then do the outer hash */
1006 if (rctx->is_sw_hmac) {
1007 err = spu_hmac_outer_hash(req, ctx);
1010 flow_dump(" hmac: ", req->result, ctx->digestsize);
1013 if (rctx->is_sw_hmac || ctx->auth.mode == HASH_MODE_HMAC) {
1014 atomic_inc(&iproc_priv.op_counts[SPU_OP_HMAC]);
1015 atomic_inc(&iproc_priv.hmac_cnt[ctx->auth.alg]);
1017 atomic_inc(&iproc_priv.op_counts[SPU_OP_HASH]);
1018 atomic_inc(&iproc_priv.hash_cnt[ctx->auth.alg]);
1025 * handle_ahash_resp() - Process a SPU response message for a hash request.
1026 * Checks if the entire crypto API request has been processed, and if so,
1027 * invokes post processing on the result.
1028 * @rctx: Crypto request context
1030 static void handle_ahash_resp(struct iproc_reqctx_s *rctx)
1032 struct iproc_ctx_s *ctx = rctx->ctx;
1034 struct crypto_async_request *areq = rctx->parent;
1035 struct ahash_request *req = ahash_request_cast(areq);
1036 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
1037 unsigned int blocksize =
1038 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
1041 * Save hash to use as input to next op if incremental. Might be copying
1042 * too much, but that's easier than figuring out actual digest size here
1044 memcpy(rctx->incr_hash, rctx->msg_buf.digest, MAX_DIGEST_SIZE);
1046 flow_log("%s() blocksize:%u digestsize:%u\n",
1047 __func__, blocksize, ctx->digestsize);
1049 atomic64_add(ctx->digestsize, &iproc_priv.bytes_in);
1051 if (rctx->is_final && (rctx->total_sent == rctx->total_todo))
1052 ahash_req_done(rctx);
1056 * spu_aead_rx_sg_create() - Build up the scatterlist of buffers used to receive
1057 * a SPU response message for an AEAD request. Includes buffers to catch SPU
1058 * message headers and the response data.
1059 * @mssg: mailbox message containing the receive sg
1060 * @rctx: crypto request context
1061 * @rx_frag_num: number of scatterlist elements required to hold the
1062 * SPU response message
1063 * @assoc_len: Length of associated data included in the crypto request
1064 * @ret_iv_len: Length of IV returned in response
1065 * @resp_len: Number of bytes of response data expected to be written to
1066 * dst buffer from crypto API
1067 * @digestsize: Length of hash digest, in bytes
1068 * @stat_pad_len: Number of bytes required to pad the STAT field to
1071 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1072 * when the request completes, whether the request is handled successfully or
1073 * there is an error.
1079 static int spu_aead_rx_sg_create(struct brcm_message *mssg,
1080 struct aead_request *req,
1081 struct iproc_reqctx_s *rctx,
1083 unsigned int assoc_len,
1084 u32 ret_iv_len, unsigned int resp_len,
1085 unsigned int digestsize, u32 stat_pad_len)
1087 struct spu_hw *spu = &iproc_priv.spu;
1088 struct scatterlist *sg; /* used to build sgs in mbox message */
1089 struct iproc_ctx_s *ctx = rctx->ctx;
1090 u32 datalen; /* Number of bytes of response data expected */
1094 if (ctx->is_rfc4543) {
1095 /* RFC4543: only pad after data, not after AAD */
1096 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1097 assoc_len + resp_len);
1098 assoc_buf_len = assoc_len;
1100 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1102 assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode,
1103 assoc_len, ret_iv_len,
1107 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1108 /* ICV (after data) must be in the next 32-bit word for CCM */
1109 data_padlen += spu->spu_wordalign_padlen(assoc_buf_len +
1114 /* have to catch gcm pad in separate buffer */
1117 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
1123 sg_init_table(sg, rx_frag_num);
1125 /* Space for SPU message header */
1126 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
1128 if (assoc_buf_len) {
1130 * Don't write directly to req->dst, because SPU may pad the
1131 * assoc data in the response
1133 memset(rctx->msg_buf.a.resp_aad, 0, assoc_buf_len);
1134 sg_set_buf(sg++, rctx->msg_buf.a.resp_aad, assoc_buf_len);
1139 * Copy in each dst sg entry from request, up to chunksize.
1140 * dst sg catches just the data. digest caught in separate buf.
1142 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
1143 rctx->dst_nents, resp_len);
1144 if (datalen < (resp_len)) {
1145 pr_err("%s(): failed to copy dst sg to mbox msg. expected len %u, datalen %u",
1146 __func__, resp_len, datalen);
1151 /* If GCM/CCM data is padded, catch padding in separate buffer */
1153 memset(rctx->msg_buf.a.gcmpad, 0, data_padlen);
1154 sg_set_buf(sg++, rctx->msg_buf.a.gcmpad, data_padlen);
1157 /* Always catch ICV in separate buffer */
1158 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
1160 flow_log("stat_pad_len %u\n", stat_pad_len);
1162 memset(rctx->msg_buf.rx_stat_pad, 0, stat_pad_len);
1163 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
1166 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
1167 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
1173 * spu_aead_tx_sg_create() - Build up the scatterlist of buffers used to send a
1174 * SPU request message for an AEAD request. Includes SPU message headers and the
1176 * @mssg: mailbox message containing the transmit sg
1177 * @rctx: crypto request context
1178 * @tx_frag_num: number of scatterlist elements required to construct the
1179 * SPU request message
1180 * @spu_hdr_len: length of SPU message header in bytes
1181 * @assoc: crypto API associated data scatterlist
1182 * @assoc_len: length of associated data
1183 * @assoc_nents: number of scatterlist entries containing assoc data
1184 * @aead_iv_len: length of AEAD IV, if included
1185 * @chunksize: Number of bytes of request data
1186 * @aad_pad_len: Number of bytes of padding at end of AAD. For GCM/CCM.
1187 * @pad_len: Number of pad bytes
1188 * @incl_icv: If true, write separate ICV buffer after data and
1191 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1192 * when the request completes, whether the request is handled successfully or
1193 * there is an error.
1199 static int spu_aead_tx_sg_create(struct brcm_message *mssg,
1200 struct iproc_reqctx_s *rctx,
1203 struct scatterlist *assoc,
1204 unsigned int assoc_len,
1206 unsigned int aead_iv_len,
1207 unsigned int chunksize,
1208 u32 aad_pad_len, u32 pad_len, bool incl_icv)
1210 struct spu_hw *spu = &iproc_priv.spu;
1211 struct scatterlist *sg; /* used to build sgs in mbox message */
1212 struct scatterlist *assoc_sg = assoc;
1213 struct iproc_ctx_s *ctx = rctx->ctx;
1214 u32 datalen; /* Number of bytes of data to write */
1215 u32 written; /* Number of bytes of data written */
1216 u32 assoc_offset = 0;
1219 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
1225 sg_init_table(sg, tx_frag_num);
1227 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
1228 BCM_HDR_LEN + spu_hdr_len);
1231 /* Copy in each associated data sg entry from request */
1232 written = spu_msg_sg_add(&sg, &assoc_sg, &assoc_offset,
1233 assoc_nents, assoc_len);
1234 if (written < assoc_len) {
1235 pr_err("%s(): failed to copy assoc sg to mbox msg",
1242 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, aead_iv_len);
1245 memset(rctx->msg_buf.a.req_aad_pad, 0, aad_pad_len);
1246 sg_set_buf(sg++, rctx->msg_buf.a.req_aad_pad, aad_pad_len);
1249 datalen = chunksize;
1250 if ((chunksize > ctx->digestsize) && incl_icv)
1251 datalen -= ctx->digestsize;
1253 /* For aead, a single msg should consume the entire src sg */
1254 written = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
1255 rctx->src_nents, datalen);
1256 if (written < datalen) {
1257 pr_err("%s(): failed to copy src sg to mbox msg",
1264 memset(rctx->msg_buf.spu_req_pad, 0, pad_len);
1265 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
1269 sg_set_buf(sg++, rctx->msg_buf.digest, ctx->digestsize);
1271 stat_len = spu->spu_tx_status_len();
1273 memset(rctx->msg_buf.tx_stat, 0, stat_len);
1274 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
1280 * handle_aead_req() - Submit a SPU request message for the next chunk of the
1281 * current AEAD request.
1282 * @rctx: Crypto request context
1284 * Unlike other operation types, we assume the length of the request fits in
1285 * a single SPU request message. aead_enqueue() makes sure this is true.
1286 * Comments for other op types regarding threads applies here as well.
1288 * Unlike incremental hash ops, where the spu returns the entire hash for
1289 * truncated algs like sha-224, the SPU returns just the truncated hash in
1290 * response to aead requests. So digestsize is always ctx->digestsize here.
1292 * Return: -EINPROGRESS: crypto request has been accepted and result will be
1293 * returned asynchronously
1294 * Any other value indicates an error
1296 static int handle_aead_req(struct iproc_reqctx_s *rctx)
1298 struct spu_hw *spu = &iproc_priv.spu;
1299 struct crypto_async_request *areq = rctx->parent;
1300 struct aead_request *req = container_of(areq,
1301 struct aead_request, base);
1302 struct iproc_ctx_s *ctx = rctx->ctx;
1304 unsigned int chunksize;
1305 unsigned int resp_len;
1310 struct brcm_message *mssg; /* mailbox message */
1311 struct spu_request_opts req_opts;
1312 struct spu_cipher_parms cipher_parms;
1313 struct spu_hash_parms hash_parms;
1314 struct spu_aead_parms aead_parms;
1315 int assoc_nents = 0;
1316 bool incl_icv = false;
1317 unsigned int digestsize = ctx->digestsize;
1319 /* number of entries in src and dst sg. Always includes SPU msg header.
1321 u8 rx_frag_num = 2; /* and STATUS */
1324 /* doing the whole thing at once */
1325 chunksize = rctx->total_todo;
1327 flow_log("%s: chunksize %u\n", __func__, chunksize);
1329 memset(&req_opts, 0, sizeof(req_opts));
1330 memset(&hash_parms, 0, sizeof(hash_parms));
1331 memset(&aead_parms, 0, sizeof(aead_parms));
1333 req_opts.is_inbound = !(rctx->is_encrypt);
1334 req_opts.auth_first = ctx->auth_first;
1335 req_opts.is_aead = true;
1336 req_opts.is_esp = ctx->is_esp;
1338 cipher_parms.alg = ctx->cipher.alg;
1339 cipher_parms.mode = ctx->cipher.mode;
1340 cipher_parms.type = ctx->cipher_type;
1341 cipher_parms.key_buf = ctx->enckey;
1342 cipher_parms.key_len = ctx->enckeylen;
1343 cipher_parms.iv_buf = rctx->msg_buf.iv_ctr;
1344 cipher_parms.iv_len = rctx->iv_ctr_len;
1346 hash_parms.alg = ctx->auth.alg;
1347 hash_parms.mode = ctx->auth.mode;
1348 hash_parms.type = HASH_TYPE_NONE;
1349 hash_parms.key_buf = (u8 *)ctx->authkey;
1350 hash_parms.key_len = ctx->authkeylen;
1351 hash_parms.digestsize = digestsize;
1353 if ((ctx->auth.alg == HASH_ALG_SHA224) &&
1354 (ctx->authkeylen < SHA224_DIGEST_SIZE))
1355 hash_parms.key_len = SHA224_DIGEST_SIZE;
1357 aead_parms.assoc_size = req->assoclen;
1358 if (ctx->is_esp && !ctx->is_rfc4543) {
1360 * 8-byte IV is included assoc data in request. SPU2
1361 * expects AAD to include just SPI and seqno. So
1362 * subtract off the IV len.
1364 aead_parms.assoc_size -= GCM_RFC4106_IV_SIZE;
1366 if (rctx->is_encrypt) {
1367 aead_parms.return_iv = true;
1368 aead_parms.ret_iv_len = GCM_RFC4106_IV_SIZE;
1369 aead_parms.ret_iv_off = GCM_ESP_SALT_SIZE;
1372 aead_parms.ret_iv_len = 0;
1376 * Count number of sg entries from the crypto API request that are to
1377 * be included in this mailbox message. For dst sg, don't count space
1378 * for digest. Digest gets caught in a separate buffer and copied back
1379 * to dst sg when processing response.
1381 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
1382 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
1383 if (aead_parms.assoc_size)
1384 assoc_nents = spu_sg_count(rctx->assoc, 0,
1385 aead_parms.assoc_size);
1387 mssg = &rctx->mb_mssg;
1389 rctx->total_sent = chunksize;
1390 rctx->src_sent = chunksize;
1391 if (spu->spu_assoc_resp_len(ctx->cipher.mode,
1392 aead_parms.assoc_size,
1393 aead_parms.ret_iv_len,
1397 aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode,
1400 if (ctx->auth.alg == HASH_ALG_AES)
1401 hash_parms.type = (enum hash_type)ctx->cipher_type;
1403 /* General case AAD padding (CCM and RFC4543 special cases below) */
1404 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1405 aead_parms.assoc_size);
1407 /* General case data padding (CCM decrypt special case below) */
1408 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1411 if (ctx->cipher.mode == CIPHER_MODE_CCM) {
1413 * for CCM, AAD len + 2 (rather than AAD len) needs to be
1416 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(
1418 aead_parms.assoc_size + 2);
1421 * And when decrypting CCM, need to pad without including
1422 * size of ICV which is tacked on to end of chunk
1424 if (!rctx->is_encrypt)
1425 aead_parms.data_pad_len =
1426 spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1427 chunksize - digestsize);
1429 /* CCM also requires software to rewrite portions of IV: */
1430 spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen,
1431 chunksize, rctx->is_encrypt,
1435 if (ctx->is_rfc4543) {
1437 * RFC4543: data is included in AAD, so don't pad after AAD
1438 * and pad data based on both AAD + data size
1440 aead_parms.aad_pad_len = 0;
1441 if (!rctx->is_encrypt)
1442 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1444 aead_parms.assoc_size + chunksize -
1447 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1449 aead_parms.assoc_size + chunksize);
1451 req_opts.is_rfc4543 = true;
1454 if (spu_req_incl_icv(ctx->cipher.mode, rctx->is_encrypt)) {
1457 /* Copy ICV from end of src scatterlist to digest buf */
1458 sg_copy_part_to_buf(req->src, rctx->msg_buf.digest, digestsize,
1459 req->assoclen + rctx->total_sent -
1463 atomic64_add(chunksize, &iproc_priv.bytes_out);
1465 flow_log("%s()-sent chunksize:%u\n", __func__, chunksize);
1467 /* Prepend SPU header with type 3 BCM header */
1468 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1470 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
1471 BCM_HDR_LEN, &req_opts,
1472 &cipher_parms, &hash_parms,
1473 &aead_parms, chunksize);
1475 /* Determine total length of padding. Put all padding in one buffer. */
1476 db_size = spu_real_db_size(aead_parms.assoc_size, aead_parms.iv_len, 0,
1477 chunksize, aead_parms.aad_pad_len,
1478 aead_parms.data_pad_len, 0);
1480 stat_pad_len = spu->spu_wordalign_padlen(db_size);
1484 pad_len = aead_parms.data_pad_len + stat_pad_len;
1487 spu->spu_request_pad(rctx->msg_buf.spu_req_pad,
1488 aead_parms.data_pad_len, 0,
1489 ctx->auth.alg, ctx->auth.mode,
1490 rctx->total_sent, stat_pad_len);
1493 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
1495 dump_sg(rctx->assoc, 0, aead_parms.assoc_size);
1496 packet_dump(" aead iv: ", rctx->msg_buf.iv_ctr, aead_parms.iv_len);
1497 packet_log("BD:\n");
1498 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
1499 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
1502 * Build mailbox message containing SPU request msg and rx buffers
1503 * to catch response message
1505 memset(mssg, 0, sizeof(*mssg));
1506 mssg->type = BRCM_MESSAGE_SPU;
1507 mssg->ctx = rctx; /* Will be returned in response */
1509 /* Create rx scatterlist to catch result */
1510 rx_frag_num += rctx->dst_nents;
1511 resp_len = chunksize;
1514 * Always catch ICV in separate buffer. Have to for GCM/CCM because of
1515 * padding. Have to for SHA-224 and other truncated SHAs because SPU
1516 * sends entire digest back.
1520 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
1521 (ctx->cipher.mode == CIPHER_MODE_CCM)) && !rctx->is_encrypt) {
1523 * Input is ciphertxt plus ICV, but ICV not incl
1526 resp_len -= ctx->digestsize;
1528 /* no rx frags to catch output data */
1529 rx_frag_num -= rctx->dst_nents;
1532 err = spu_aead_rx_sg_create(mssg, req, rctx, rx_frag_num,
1533 aead_parms.assoc_size,
1534 aead_parms.ret_iv_len, resp_len, digestsize,
1539 /* Create tx scatterlist containing SPU request message */
1540 tx_frag_num += rctx->src_nents;
1541 tx_frag_num += assoc_nents;
1542 if (aead_parms.aad_pad_len)
1544 if (aead_parms.iv_len)
1546 if (spu->spu_tx_status_len())
1548 err = spu_aead_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
1549 rctx->assoc, aead_parms.assoc_size,
1550 assoc_nents, aead_parms.iv_len, chunksize,
1551 aead_parms.aad_pad_len, pad_len, incl_icv);
1555 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
1556 if (unlikely(err < 0))
1559 return -EINPROGRESS;
1563 * handle_aead_resp() - Process a SPU response message for an AEAD request.
1564 * @rctx: Crypto request context
1566 static void handle_aead_resp(struct iproc_reqctx_s *rctx)
1568 struct spu_hw *spu = &iproc_priv.spu;
1569 struct crypto_async_request *areq = rctx->parent;
1570 struct aead_request *req = container_of(areq,
1571 struct aead_request, base);
1572 struct iproc_ctx_s *ctx = rctx->ctx;
1574 unsigned int icv_offset;
1577 /* See how much data was returned */
1578 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
1579 flow_log("payload_len %u\n", payload_len);
1581 /* only count payload */
1582 atomic64_add(payload_len, &iproc_priv.bytes_in);
1585 packet_dump(" assoc_data ", rctx->msg_buf.a.resp_aad,
1589 * Copy the ICV back to the destination
1590 * buffer. In decrypt case, SPU gives us back the digest, but crypto
1591 * API doesn't expect ICV in dst buffer.
1593 result_len = req->cryptlen;
1594 if (rctx->is_encrypt) {
1595 icv_offset = req->assoclen + rctx->total_sent;
1596 packet_dump(" ICV: ", rctx->msg_buf.digest, ctx->digestsize);
1597 flow_log("copying ICV to dst sg at offset %u\n", icv_offset);
1598 sg_copy_part_from_buf(req->dst, rctx->msg_buf.digest,
1599 ctx->digestsize, icv_offset);
1600 result_len += ctx->digestsize;
1603 packet_log("response data: ");
1604 dump_sg(req->dst, req->assoclen, result_len);
1606 atomic_inc(&iproc_priv.op_counts[SPU_OP_AEAD]);
1607 if (ctx->cipher.alg == CIPHER_ALG_AES) {
1608 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1609 atomic_inc(&iproc_priv.aead_cnt[AES_CCM]);
1610 else if (ctx->cipher.mode == CIPHER_MODE_GCM)
1611 atomic_inc(&iproc_priv.aead_cnt[AES_GCM]);
1613 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1615 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1620 * spu_chunk_cleanup() - Do cleanup after processing one chunk of a request
1621 * @rctx: request context
1623 * Mailbox scatterlists are allocated for each chunk. So free them after
1624 * processing each chunk.
1626 static void spu_chunk_cleanup(struct iproc_reqctx_s *rctx)
1628 /* mailbox message used to tx request */
1629 struct brcm_message *mssg = &rctx->mb_mssg;
1631 kfree(mssg->spu.src);
1632 kfree(mssg->spu.dst);
1633 memset(mssg, 0, sizeof(struct brcm_message));
1637 * finish_req() - Used to invoke the complete callback from the requester when
1638 * a request has been handled asynchronously.
1639 * @rctx: Request context
1640 * @err: Indicates whether the request was successful or not
1642 * Ensures that cleanup has been done for request
1644 static void finish_req(struct iproc_reqctx_s *rctx, int err)
1646 struct crypto_async_request *areq = rctx->parent;
1648 flow_log("%s() err:%d\n\n", __func__, err);
1650 /* No harm done if already called */
1651 spu_chunk_cleanup(rctx);
1654 areq->complete(areq, err);
1658 * spu_rx_callback() - Callback from mailbox framework with a SPU response.
1659 * @cl: mailbox client structure for SPU driver
1660 * @msg: mailbox message containing SPU response
1662 static void spu_rx_callback(struct mbox_client *cl, void *msg)
1664 struct spu_hw *spu = &iproc_priv.spu;
1665 struct brcm_message *mssg = msg;
1666 struct iproc_reqctx_s *rctx;
1670 if (unlikely(!rctx)) {
1672 pr_err("%s(): no request context", __func__);
1677 /* process the SPU status */
1678 err = spu->spu_status_process(rctx->msg_buf.rx_stat);
1680 if (err == SPU_INVALID_ICV)
1681 atomic_inc(&iproc_priv.bad_icv);
1686 /* Process the SPU response message */
1687 switch (rctx->ctx->alg->type) {
1688 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1689 handle_ablkcipher_resp(rctx);
1691 case CRYPTO_ALG_TYPE_AHASH:
1692 handle_ahash_resp(rctx);
1694 case CRYPTO_ALG_TYPE_AEAD:
1695 handle_aead_resp(rctx);
1703 * If this response does not complete the request, then send the next
1706 if (rctx->total_sent < rctx->total_todo) {
1707 /* Deallocate anything specific to previous chunk */
1708 spu_chunk_cleanup(rctx);
1710 switch (rctx->ctx->alg->type) {
1711 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1712 err = handle_ablkcipher_req(rctx);
1714 case CRYPTO_ALG_TYPE_AHASH:
1715 err = handle_ahash_req(rctx);
1718 * we saved data in hash carry, but tell crypto
1719 * API we successfully completed request.
1723 case CRYPTO_ALG_TYPE_AEAD:
1724 err = handle_aead_req(rctx);
1730 if (err == -EINPROGRESS)
1731 /* Successfully submitted request for next chunk */
1736 finish_req(rctx, err);
1739 /* ==================== Kernel Cryptographic API ==================== */
1742 * ablkcipher_enqueue() - Handle ablkcipher encrypt or decrypt request.
1743 * @req: Crypto API request
1744 * @encrypt: true if encrypting; false if decrypting
1746 * Return: -EINPROGRESS if request accepted and result will be returned
1750 static int ablkcipher_enqueue(struct ablkcipher_request *req, bool encrypt)
1752 struct iproc_reqctx_s *rctx = ablkcipher_request_ctx(req);
1753 struct iproc_ctx_s *ctx =
1754 crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
1757 flow_log("%s() enc:%u\n", __func__, encrypt);
1759 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1760 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1761 rctx->parent = &req->base;
1762 rctx->is_encrypt = encrypt;
1763 rctx->bd_suppress = false;
1764 rctx->total_todo = req->nbytes;
1766 rctx->total_sent = 0;
1767 rctx->total_received = 0;
1770 /* Initialize current position in src and dst scatterlists */
1771 rctx->src_sg = req->src;
1772 rctx->src_nents = 0;
1774 rctx->dst_sg = req->dst;
1775 rctx->dst_nents = 0;
1778 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
1779 ctx->cipher.mode == CIPHER_MODE_CTR ||
1780 ctx->cipher.mode == CIPHER_MODE_OFB ||
1781 ctx->cipher.mode == CIPHER_MODE_XTS ||
1782 ctx->cipher.mode == CIPHER_MODE_GCM ||
1783 ctx->cipher.mode == CIPHER_MODE_CCM) {
1785 crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req));
1786 memcpy(rctx->msg_buf.iv_ctr, req->info, rctx->iv_ctr_len);
1788 rctx->iv_ctr_len = 0;
1791 /* Choose a SPU to process this request */
1792 rctx->chan_idx = select_channel();
1793 err = handle_ablkcipher_req(rctx);
1794 if (err != -EINPROGRESS)
1795 /* synchronous result */
1796 spu_chunk_cleanup(rctx);
1801 static int des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1802 unsigned int keylen)
1804 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1807 err = verify_ablkcipher_des_key(cipher, key);
1811 ctx->cipher_type = CIPHER_TYPE_DES;
1815 static int threedes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1816 unsigned int keylen)
1818 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1821 err = verify_ablkcipher_des3_key(cipher, key);
1825 ctx->cipher_type = CIPHER_TYPE_3DES;
1829 static int aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1830 unsigned int keylen)
1832 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1834 if (ctx->cipher.mode == CIPHER_MODE_XTS)
1835 /* XTS includes two keys of equal length */
1836 keylen = keylen / 2;
1839 case AES_KEYSIZE_128:
1840 ctx->cipher_type = CIPHER_TYPE_AES128;
1842 case AES_KEYSIZE_192:
1843 ctx->cipher_type = CIPHER_TYPE_AES192;
1845 case AES_KEYSIZE_256:
1846 ctx->cipher_type = CIPHER_TYPE_AES256;
1849 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
1852 WARN_ON((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
1853 ((ctx->max_payload % AES_BLOCK_SIZE) != 0));
1857 static int rc4_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1858 unsigned int keylen)
1860 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1863 ctx->enckeylen = ARC4_MAX_KEY_SIZE + ARC4_STATE_SIZE;
1865 ctx->enckey[0] = 0x00; /* 0x00 */
1866 ctx->enckey[1] = 0x00; /* i */
1867 ctx->enckey[2] = 0x00; /* 0x00 */
1868 ctx->enckey[3] = 0x00; /* j */
1869 for (i = 0; i < ARC4_MAX_KEY_SIZE; i++)
1870 ctx->enckey[i + ARC4_STATE_SIZE] = key[i % keylen];
1872 ctx->cipher_type = CIPHER_TYPE_INIT;
1877 static int ablkcipher_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1878 unsigned int keylen)
1880 struct spu_hw *spu = &iproc_priv.spu;
1881 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1882 struct spu_cipher_parms cipher_parms;
1886 flow_log("ablkcipher_setkey() keylen: %d\n", keylen);
1887 flow_dump(" key: ", key, keylen);
1889 switch (ctx->cipher.alg) {
1890 case CIPHER_ALG_DES:
1891 err = des_setkey(cipher, key, keylen);
1893 case CIPHER_ALG_3DES:
1894 err = threedes_setkey(cipher, key, keylen);
1896 case CIPHER_ALG_AES:
1897 err = aes_setkey(cipher, key, keylen);
1899 case CIPHER_ALG_RC4:
1900 err = rc4_setkey(cipher, key, keylen);
1903 pr_err("%s() Error: unknown cipher alg\n", __func__);
1909 /* RC4 already populated ctx->enkey */
1910 if (ctx->cipher.alg != CIPHER_ALG_RC4) {
1911 memcpy(ctx->enckey, key, keylen);
1912 ctx->enckeylen = keylen;
1914 /* SPU needs XTS keys in the reverse order the crypto API presents */
1915 if ((ctx->cipher.alg == CIPHER_ALG_AES) &&
1916 (ctx->cipher.mode == CIPHER_MODE_XTS)) {
1917 unsigned int xts_keylen = keylen / 2;
1919 memcpy(ctx->enckey, key + xts_keylen, xts_keylen);
1920 memcpy(ctx->enckey + xts_keylen, key, xts_keylen);
1923 if (spu->spu_type == SPU_TYPE_SPUM)
1924 alloc_len = BCM_HDR_LEN + SPU_HEADER_ALLOC_LEN;
1925 else if (spu->spu_type == SPU_TYPE_SPU2)
1926 alloc_len = BCM_HDR_LEN + SPU2_HEADER_ALLOC_LEN;
1927 memset(ctx->bcm_spu_req_hdr, 0, alloc_len);
1928 cipher_parms.iv_buf = NULL;
1929 cipher_parms.iv_len = crypto_ablkcipher_ivsize(cipher);
1930 flow_log("%s: iv_len %u\n", __func__, cipher_parms.iv_len);
1932 cipher_parms.alg = ctx->cipher.alg;
1933 cipher_parms.mode = ctx->cipher.mode;
1934 cipher_parms.type = ctx->cipher_type;
1935 cipher_parms.key_buf = ctx->enckey;
1936 cipher_parms.key_len = ctx->enckeylen;
1938 /* Prepend SPU request message with BCM header */
1939 memcpy(ctx->bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1940 ctx->spu_req_hdr_len =
1941 spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN,
1944 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
1948 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_CIPHER]);
1953 static int ablkcipher_encrypt(struct ablkcipher_request *req)
1955 flow_log("ablkcipher_encrypt() nbytes:%u\n", req->nbytes);
1957 return ablkcipher_enqueue(req, true);
1960 static int ablkcipher_decrypt(struct ablkcipher_request *req)
1962 flow_log("ablkcipher_decrypt() nbytes:%u\n", req->nbytes);
1963 return ablkcipher_enqueue(req, false);
1966 static int ahash_enqueue(struct ahash_request *req)
1968 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
1969 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
1970 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
1972 const char *alg_name;
1974 flow_log("ahash_enqueue() nbytes:%u\n", req->nbytes);
1976 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1977 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1978 rctx->parent = &req->base;
1980 rctx->bd_suppress = true;
1981 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
1983 /* Initialize position in src scatterlist */
1984 rctx->src_sg = req->src;
1986 rctx->src_nents = 0;
1987 rctx->dst_sg = NULL;
1989 rctx->dst_nents = 0;
1991 /* SPU2 hardware does not compute hash of zero length data */
1992 if ((rctx->is_final == 1) && (rctx->total_todo == 0) &&
1993 (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) {
1994 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
1995 flow_log("Doing %sfinal %s zero-len hash request in software\n",
1996 rctx->is_final ? "" : "non-", alg_name);
1997 err = do_shash((unsigned char *)alg_name, req->result,
1998 NULL, 0, NULL, 0, ctx->authkey,
2001 flow_log("Hash request failed with error %d\n", err);
2004 /* Choose a SPU to process this request */
2005 rctx->chan_idx = select_channel();
2007 err = handle_ahash_req(rctx);
2008 if (err != -EINPROGRESS)
2009 /* synchronous result */
2010 spu_chunk_cleanup(rctx);
2014 * we saved data in hash carry, but tell crypto API
2015 * we successfully completed request.
2022 static int __ahash_init(struct ahash_request *req)
2024 struct spu_hw *spu = &iproc_priv.spu;
2025 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2026 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2027 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2029 flow_log("%s()\n", __func__);
2031 /* Initialize the context */
2032 rctx->hash_carry_len = 0;
2035 rctx->total_todo = 0;
2037 rctx->total_sent = 0;
2038 rctx->total_received = 0;
2040 ctx->digestsize = crypto_ahash_digestsize(tfm);
2041 /* If we add a hash whose digest is larger, catch it here. */
2042 WARN_ON(ctx->digestsize > MAX_DIGEST_SIZE);
2044 rctx->is_sw_hmac = false;
2046 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0,
2053 * spu_no_incr_hash() - Determine whether incremental hashing is supported.
2054 * @ctx: Crypto session context
2056 * SPU-2 does not support incremental hashing (we'll have to revisit and
2057 * condition based on chip revision or device tree entry if future versions do
2058 * support incremental hash)
2060 * SPU-M also doesn't support incremental hashing of AES-XCBC
2062 * Return: true if incremental hashing is not supported
2065 static bool spu_no_incr_hash(struct iproc_ctx_s *ctx)
2067 struct spu_hw *spu = &iproc_priv.spu;
2069 if (spu->spu_type == SPU_TYPE_SPU2)
2072 if ((ctx->auth.alg == HASH_ALG_AES) &&
2073 (ctx->auth.mode == HASH_MODE_XCBC))
2076 /* Otherwise, incremental hashing is supported */
2080 static int ahash_init(struct ahash_request *req)
2082 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2083 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2084 const char *alg_name;
2085 struct crypto_shash *hash;
2089 if (spu_no_incr_hash(ctx)) {
2091 * If we get an incremental hashing request and it's not
2092 * supported by the hardware, we need to handle it in software
2093 * by calling synchronous hash functions.
2095 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
2096 hash = crypto_alloc_shash(alg_name, 0, 0);
2098 ret = PTR_ERR(hash);
2102 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2103 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2104 ctx->shash = kmalloc(sizeof(*ctx->shash) +
2105 crypto_shash_descsize(hash), gfp);
2110 ctx->shash->tfm = hash;
2112 /* Set the key using data we already have from setkey */
2113 if (ctx->authkeylen > 0) {
2114 ret = crypto_shash_setkey(hash, ctx->authkey,
2120 /* Initialize hash w/ this key and other params */
2121 ret = crypto_shash_init(ctx->shash);
2125 /* Otherwise call the internal function which uses SPU hw */
2126 ret = __ahash_init(req);
2134 crypto_free_shash(hash);
2139 static int __ahash_update(struct ahash_request *req)
2141 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2143 flow_log("ahash_update() nbytes:%u\n", req->nbytes);
2147 rctx->total_todo += req->nbytes;
2150 return ahash_enqueue(req);
2153 static int ahash_update(struct ahash_request *req)
2155 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2156 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2162 if (spu_no_incr_hash(ctx)) {
2164 * If we get an incremental hashing request and it's not
2165 * supported by the hardware, we need to handle it in software
2166 * by calling synchronous hash functions.
2169 nents = sg_nents(req->src);
2173 /* Copy data from req scatterlist to tmp buffer */
2174 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2175 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2176 tmpbuf = kmalloc(req->nbytes, gfp);
2180 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2186 /* Call synchronous update */
2187 ret = crypto_shash_update(ctx->shash, tmpbuf, req->nbytes);
2190 /* Otherwise call the internal function which uses SPU hw */
2191 ret = __ahash_update(req);
2197 static int __ahash_final(struct ahash_request *req)
2199 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2201 flow_log("ahash_final() nbytes:%u\n", req->nbytes);
2205 return ahash_enqueue(req);
2208 static int ahash_final(struct ahash_request *req)
2210 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2211 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2214 if (spu_no_incr_hash(ctx)) {
2216 * If we get an incremental hashing request and it's not
2217 * supported by the hardware, we need to handle it in software
2218 * by calling synchronous hash functions.
2220 ret = crypto_shash_final(ctx->shash, req->result);
2222 /* Done with hash, can deallocate it now */
2223 crypto_free_shash(ctx->shash->tfm);
2227 /* Otherwise call the internal function which uses SPU hw */
2228 ret = __ahash_final(req);
2234 static int __ahash_finup(struct ahash_request *req)
2236 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2238 flow_log("ahash_finup() nbytes:%u\n", req->nbytes);
2240 rctx->total_todo += req->nbytes;
2244 return ahash_enqueue(req);
2247 static int ahash_finup(struct ahash_request *req)
2249 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2250 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2256 if (spu_no_incr_hash(ctx)) {
2258 * If we get an incremental hashing request and it's not
2259 * supported by the hardware, we need to handle it in software
2260 * by calling synchronous hash functions.
2263 nents = sg_nents(req->src);
2266 goto ahash_finup_exit;
2269 /* Copy data from req scatterlist to tmp buffer */
2270 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2271 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2272 tmpbuf = kmalloc(req->nbytes, gfp);
2275 goto ahash_finup_exit;
2278 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2281 goto ahash_finup_free;
2284 /* Call synchronous update */
2285 ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes,
2288 /* Otherwise call the internal function which uses SPU hw */
2289 return __ahash_finup(req);
2295 /* Done with hash, can deallocate it now */
2296 crypto_free_shash(ctx->shash->tfm);
2301 static int ahash_digest(struct ahash_request *req)
2305 flow_log("ahash_digest() nbytes:%u\n", req->nbytes);
2307 /* whole thing at once */
2308 err = __ahash_init(req);
2310 err = __ahash_finup(req);
2315 static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key,
2316 unsigned int keylen)
2318 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2320 flow_log("%s() ahash:%p key:%p keylen:%u\n",
2321 __func__, ahash, key, keylen);
2322 flow_dump(" key: ", key, keylen);
2324 if (ctx->auth.alg == HASH_ALG_AES) {
2326 case AES_KEYSIZE_128:
2327 ctx->cipher_type = CIPHER_TYPE_AES128;
2329 case AES_KEYSIZE_192:
2330 ctx->cipher_type = CIPHER_TYPE_AES192;
2332 case AES_KEYSIZE_256:
2333 ctx->cipher_type = CIPHER_TYPE_AES256;
2336 pr_err("%s() Error: Invalid key length\n", __func__);
2340 pr_err("%s() Error: unknown hash alg\n", __func__);
2343 memcpy(ctx->authkey, key, keylen);
2344 ctx->authkeylen = keylen;
2349 static int ahash_export(struct ahash_request *req, void *out)
2351 const struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2352 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)out;
2354 spu_exp->total_todo = rctx->total_todo;
2355 spu_exp->total_sent = rctx->total_sent;
2356 spu_exp->is_sw_hmac = rctx->is_sw_hmac;
2357 memcpy(spu_exp->hash_carry, rctx->hash_carry, sizeof(rctx->hash_carry));
2358 spu_exp->hash_carry_len = rctx->hash_carry_len;
2359 memcpy(spu_exp->incr_hash, rctx->incr_hash, sizeof(rctx->incr_hash));
2364 static int ahash_import(struct ahash_request *req, const void *in)
2366 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2367 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)in;
2369 rctx->total_todo = spu_exp->total_todo;
2370 rctx->total_sent = spu_exp->total_sent;
2371 rctx->is_sw_hmac = spu_exp->is_sw_hmac;
2372 memcpy(rctx->hash_carry, spu_exp->hash_carry, sizeof(rctx->hash_carry));
2373 rctx->hash_carry_len = spu_exp->hash_carry_len;
2374 memcpy(rctx->incr_hash, spu_exp->incr_hash, sizeof(rctx->incr_hash));
2379 static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key,
2380 unsigned int keylen)
2382 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2383 unsigned int blocksize =
2384 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
2385 unsigned int digestsize = crypto_ahash_digestsize(ahash);
2389 flow_log("%s() ahash:%p key:%p keylen:%u blksz:%u digestsz:%u\n",
2390 __func__, ahash, key, keylen, blocksize, digestsize);
2391 flow_dump(" key: ", key, keylen);
2393 if (keylen > blocksize) {
2394 switch (ctx->auth.alg) {
2396 rc = do_shash("md5", ctx->authkey, key, keylen, NULL,
2400 rc = do_shash("sha1", ctx->authkey, key, keylen, NULL,
2403 case HASH_ALG_SHA224:
2404 rc = do_shash("sha224", ctx->authkey, key, keylen, NULL,
2407 case HASH_ALG_SHA256:
2408 rc = do_shash("sha256", ctx->authkey, key, keylen, NULL,
2411 case HASH_ALG_SHA384:
2412 rc = do_shash("sha384", ctx->authkey, key, keylen, NULL,
2415 case HASH_ALG_SHA512:
2416 rc = do_shash("sha512", ctx->authkey, key, keylen, NULL,
2419 case HASH_ALG_SHA3_224:
2420 rc = do_shash("sha3-224", ctx->authkey, key, keylen,
2423 case HASH_ALG_SHA3_256:
2424 rc = do_shash("sha3-256", ctx->authkey, key, keylen,
2427 case HASH_ALG_SHA3_384:
2428 rc = do_shash("sha3-384", ctx->authkey, key, keylen,
2431 case HASH_ALG_SHA3_512:
2432 rc = do_shash("sha3-512", ctx->authkey, key, keylen,
2436 pr_err("%s() Error: unknown hash alg\n", __func__);
2440 pr_err("%s() Error %d computing shash for %s\n",
2441 __func__, rc, hash_alg_name[ctx->auth.alg]);
2444 ctx->authkeylen = digestsize;
2446 flow_log(" keylen > digestsize... hashed\n");
2447 flow_dump(" newkey: ", ctx->authkey, ctx->authkeylen);
2449 memcpy(ctx->authkey, key, keylen);
2450 ctx->authkeylen = keylen;
2454 * Full HMAC operation in SPUM is not verified,
2455 * So keeping the generation of IPAD, OPAD and
2456 * outer hashing in software.
2458 if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) {
2459 memcpy(ctx->ipad, ctx->authkey, ctx->authkeylen);
2460 memset(ctx->ipad + ctx->authkeylen, 0,
2461 blocksize - ctx->authkeylen);
2462 ctx->authkeylen = 0;
2463 memcpy(ctx->opad, ctx->ipad, blocksize);
2465 for (index = 0; index < blocksize; index++) {
2466 ctx->ipad[index] ^= HMAC_IPAD_VALUE;
2467 ctx->opad[index] ^= HMAC_OPAD_VALUE;
2470 flow_dump(" ipad: ", ctx->ipad, blocksize);
2471 flow_dump(" opad: ", ctx->opad, blocksize);
2473 ctx->digestsize = digestsize;
2474 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_HMAC]);
2479 static int ahash_hmac_init(struct ahash_request *req)
2481 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2482 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2483 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2484 unsigned int blocksize =
2485 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2487 flow_log("ahash_hmac_init()\n");
2489 /* init the context as a hash */
2492 if (!spu_no_incr_hash(ctx)) {
2493 /* SPU-M can do incr hashing but needs sw for outer HMAC */
2494 rctx->is_sw_hmac = true;
2495 ctx->auth.mode = HASH_MODE_HASH;
2496 /* start with a prepended ipad */
2497 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2498 rctx->hash_carry_len = blocksize;
2499 rctx->total_todo += blocksize;
2505 static int ahash_hmac_update(struct ahash_request *req)
2507 flow_log("ahash_hmac_update() nbytes:%u\n", req->nbytes);
2512 return ahash_update(req);
2515 static int ahash_hmac_final(struct ahash_request *req)
2517 flow_log("ahash_hmac_final() nbytes:%u\n", req->nbytes);
2519 return ahash_final(req);
2522 static int ahash_hmac_finup(struct ahash_request *req)
2524 flow_log("ahash_hmac_finupl() nbytes:%u\n", req->nbytes);
2526 return ahash_finup(req);
2529 static int ahash_hmac_digest(struct ahash_request *req)
2531 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2532 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2533 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2534 unsigned int blocksize =
2535 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2537 flow_log("ahash_hmac_digest() nbytes:%u\n", req->nbytes);
2539 /* Perform initialization and then call finup */
2542 if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) {
2544 * SPU2 supports full HMAC implementation in the
2545 * hardware, need not to generate IPAD, OPAD and
2546 * outer hash in software.
2547 * Only for hash key len > hash block size, SPU2
2548 * expects to perform hashing on the key, shorten
2549 * it to digest size and feed it as hash key.
2551 rctx->is_sw_hmac = false;
2552 ctx->auth.mode = HASH_MODE_HMAC;
2554 rctx->is_sw_hmac = true;
2555 ctx->auth.mode = HASH_MODE_HASH;
2556 /* start with a prepended ipad */
2557 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2558 rctx->hash_carry_len = blocksize;
2559 rctx->total_todo += blocksize;
2562 return __ahash_finup(req);
2567 static int aead_need_fallback(struct aead_request *req)
2569 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2570 struct spu_hw *spu = &iproc_priv.spu;
2571 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2572 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2576 * SPU hardware cannot handle the AES-GCM/CCM case where plaintext
2577 * and AAD are both 0 bytes long. So use fallback in this case.
2579 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
2580 (ctx->cipher.mode == CIPHER_MODE_CCM)) &&
2581 (req->assoclen == 0)) {
2582 if ((rctx->is_encrypt && (req->cryptlen == 0)) ||
2583 (!rctx->is_encrypt && (req->cryptlen == ctx->digestsize))) {
2584 flow_log("AES GCM/CCM needs fallback for 0 len req\n");
2589 /* SPU-M hardware only supports CCM digest size of 8, 12, or 16 bytes */
2590 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2591 (spu->spu_type == SPU_TYPE_SPUM) &&
2592 (ctx->digestsize != 8) && (ctx->digestsize != 12) &&
2593 (ctx->digestsize != 16)) {
2594 flow_log("%s() AES CCM needs fallback for digest size %d\n",
2595 __func__, ctx->digestsize);
2600 * SPU-M on NSP has an issue where AES-CCM hash is not correct
2601 * when AAD size is 0
2603 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2604 (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) &&
2605 (req->assoclen == 0)) {
2606 flow_log("%s() AES_CCM needs fallback for 0 len AAD on NSP\n",
2612 * RFC4106 and RFC4543 cannot handle the case where AAD is other than
2613 * 16 or 20 bytes long. So use fallback in this case.
2615 if (ctx->cipher.mode == CIPHER_MODE_GCM &&
2616 ctx->cipher.alg == CIPHER_ALG_AES &&
2617 rctx->iv_ctr_len == GCM_RFC4106_IV_SIZE &&
2618 req->assoclen != 16 && req->assoclen != 20) {
2619 flow_log("RFC4106/RFC4543 needs fallback for assoclen"
2620 " other than 16 or 20 bytes\n");
2624 payload_len = req->cryptlen;
2625 if (spu->spu_type == SPU_TYPE_SPUM)
2626 payload_len += req->assoclen;
2628 flow_log("%s() payload len: %u\n", __func__, payload_len);
2630 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2633 return payload_len > ctx->max_payload;
2636 static void aead_complete(struct crypto_async_request *areq, int err)
2638 struct aead_request *req =
2639 container_of(areq, struct aead_request, base);
2640 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2641 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2643 flow_log("%s() err:%d\n", __func__, err);
2645 areq->tfm = crypto_aead_tfm(aead);
2647 areq->complete = rctx->old_complete;
2648 areq->data = rctx->old_data;
2650 areq->complete(areq, err);
2653 static int aead_do_fallback(struct aead_request *req, bool is_encrypt)
2655 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2656 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
2657 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2658 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
2662 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2664 if (ctx->fallback_cipher) {
2665 /* Store the cipher tfm and then use the fallback tfm */
2666 rctx->old_tfm = tfm;
2667 aead_request_set_tfm(req, ctx->fallback_cipher);
2669 * Save the callback and chain ourselves in, so we can restore
2672 rctx->old_complete = req->base.complete;
2673 rctx->old_data = req->base.data;
2674 req_flags = aead_request_flags(req);
2675 aead_request_set_callback(req, req_flags, aead_complete, req);
2676 err = is_encrypt ? crypto_aead_encrypt(req) :
2677 crypto_aead_decrypt(req);
2681 * fallback was synchronous (did not return
2682 * -EINPROGRESS). So restore request state here.
2684 aead_request_set_callback(req, req_flags,
2685 rctx->old_complete, req);
2686 req->base.data = rctx->old_data;
2687 aead_request_set_tfm(req, aead);
2688 flow_log("%s() fallback completed successfully\n\n",
2698 static int aead_enqueue(struct aead_request *req, bool is_encrypt)
2700 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2701 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2702 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2705 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2707 if (req->assoclen > MAX_ASSOC_SIZE) {
2709 ("%s() Error: associated data too long. (%u > %u bytes)\n",
2710 __func__, req->assoclen, MAX_ASSOC_SIZE);
2714 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2715 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2716 rctx->parent = &req->base;
2717 rctx->is_encrypt = is_encrypt;
2718 rctx->bd_suppress = false;
2719 rctx->total_todo = req->cryptlen;
2721 rctx->total_sent = 0;
2722 rctx->total_received = 0;
2723 rctx->is_sw_hmac = false;
2725 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
2727 /* assoc data is at start of src sg */
2728 rctx->assoc = req->src;
2731 * Init current position in src scatterlist to be after assoc data.
2732 * src_skip set to buffer offset where data begins. (Assoc data could
2733 * end in the middle of a buffer.)
2735 if (spu_sg_at_offset(req->src, req->assoclen, &rctx->src_sg,
2736 &rctx->src_skip) < 0) {
2737 pr_err("%s() Error: Unable to find start of src data\n",
2742 rctx->src_nents = 0;
2743 rctx->dst_nents = 0;
2744 if (req->dst == req->src) {
2745 rctx->dst_sg = rctx->src_sg;
2746 rctx->dst_skip = rctx->src_skip;
2749 * Expect req->dst to have room for assoc data followed by
2750 * output data and ICV, if encrypt. So initialize dst_sg
2751 * to point beyond assoc len offset.
2753 if (spu_sg_at_offset(req->dst, req->assoclen, &rctx->dst_sg,
2754 &rctx->dst_skip) < 0) {
2755 pr_err("%s() Error: Unable to find start of dst data\n",
2761 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
2762 ctx->cipher.mode == CIPHER_MODE_CTR ||
2763 ctx->cipher.mode == CIPHER_MODE_OFB ||
2764 ctx->cipher.mode == CIPHER_MODE_XTS ||
2765 ctx->cipher.mode == CIPHER_MODE_GCM) {
2768 crypto_aead_ivsize(crypto_aead_reqtfm(req));
2769 } else if (ctx->cipher.mode == CIPHER_MODE_CCM) {
2770 rctx->iv_ctr_len = CCM_AES_IV_SIZE;
2772 rctx->iv_ctr_len = 0;
2775 rctx->hash_carry_len = 0;
2777 flow_log(" src sg: %p\n", req->src);
2778 flow_log(" rctx->src_sg: %p, src_skip %u\n",
2779 rctx->src_sg, rctx->src_skip);
2780 flow_log(" assoc: %p, assoclen %u\n", rctx->assoc, req->assoclen);
2781 flow_log(" dst sg: %p\n", req->dst);
2782 flow_log(" rctx->dst_sg: %p, dst_skip %u\n",
2783 rctx->dst_sg, rctx->dst_skip);
2784 flow_log(" iv_ctr_len:%u\n", rctx->iv_ctr_len);
2785 flow_dump(" iv: ", req->iv, rctx->iv_ctr_len);
2786 flow_log(" authkeylen:%u\n", ctx->authkeylen);
2787 flow_log(" is_esp: %s\n", ctx->is_esp ? "yes" : "no");
2789 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2790 flow_log(" max_payload infinite");
2792 flow_log(" max_payload: %u\n", ctx->max_payload);
2794 if (unlikely(aead_need_fallback(req)))
2795 return aead_do_fallback(req, is_encrypt);
2798 * Do memory allocations for request after fallback check, because if we
2799 * do fallback, we won't call finish_req() to dealloc.
2801 if (rctx->iv_ctr_len) {
2803 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset,
2804 ctx->salt, ctx->salt_len);
2805 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset + ctx->salt_len,
2807 rctx->iv_ctr_len - ctx->salt_len - ctx->salt_offset);
2810 rctx->chan_idx = select_channel();
2811 err = handle_aead_req(rctx);
2812 if (err != -EINPROGRESS)
2813 /* synchronous result */
2814 spu_chunk_cleanup(rctx);
2819 static int aead_authenc_setkey(struct crypto_aead *cipher,
2820 const u8 *key, unsigned int keylen)
2822 struct spu_hw *spu = &iproc_priv.spu;
2823 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2824 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2825 struct crypto_authenc_keys keys;
2828 flow_log("%s() aead:%p key:%p keylen:%u\n", __func__, cipher, key,
2830 flow_dump(" key: ", key, keylen);
2832 ret = crypto_authenc_extractkeys(&keys, key, keylen);
2836 if (keys.enckeylen > MAX_KEY_SIZE ||
2837 keys.authkeylen > MAX_KEY_SIZE)
2840 ctx->enckeylen = keys.enckeylen;
2841 ctx->authkeylen = keys.authkeylen;
2843 memcpy(ctx->enckey, keys.enckey, keys.enckeylen);
2844 /* May end up padding auth key. So make sure it's zeroed. */
2845 memset(ctx->authkey, 0, sizeof(ctx->authkey));
2846 memcpy(ctx->authkey, keys.authkey, keys.authkeylen);
2848 switch (ctx->alg->cipher_info.alg) {
2849 case CIPHER_ALG_DES:
2850 if (verify_aead_des_key(cipher, keys.enckey, keys.enckeylen))
2853 ctx->cipher_type = CIPHER_TYPE_DES;
2855 case CIPHER_ALG_3DES:
2856 if (verify_aead_des3_key(cipher, keys.enckey, keys.enckeylen))
2859 ctx->cipher_type = CIPHER_TYPE_3DES;
2861 case CIPHER_ALG_AES:
2862 switch (ctx->enckeylen) {
2863 case AES_KEYSIZE_128:
2864 ctx->cipher_type = CIPHER_TYPE_AES128;
2866 case AES_KEYSIZE_192:
2867 ctx->cipher_type = CIPHER_TYPE_AES192;
2869 case AES_KEYSIZE_256:
2870 ctx->cipher_type = CIPHER_TYPE_AES256;
2876 case CIPHER_ALG_RC4:
2877 ctx->cipher_type = CIPHER_TYPE_INIT;
2880 pr_err("%s() Error: Unknown cipher alg\n", __func__);
2884 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2886 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
2887 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
2889 /* setkey the fallback just in case we needto use it */
2890 if (ctx->fallback_cipher) {
2891 flow_log(" running fallback setkey()\n");
2893 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
2894 ctx->fallback_cipher->base.crt_flags |=
2895 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
2896 ret = crypto_aead_setkey(ctx->fallback_cipher, key, keylen);
2898 flow_log(" fallback setkey() returned:%d\n", ret);
2899 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
2901 (ctx->fallback_cipher->base.crt_flags &
2902 CRYPTO_TFM_RES_MASK);
2906 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
2910 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
2916 ctx->authkeylen = 0;
2917 ctx->digestsize = 0;
2919 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
2923 static int aead_gcm_ccm_setkey(struct crypto_aead *cipher,
2924 const u8 *key, unsigned int keylen)
2926 struct spu_hw *spu = &iproc_priv.spu;
2927 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2928 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2932 flow_log("%s() keylen:%u\n", __func__, keylen);
2933 flow_dump(" key: ", key, keylen);
2936 ctx->digestsize = keylen;
2938 ctx->enckeylen = keylen;
2939 ctx->authkeylen = 0;
2940 memcpy(ctx->enckey, key, ctx->enckeylen);
2942 switch (ctx->enckeylen) {
2943 case AES_KEYSIZE_128:
2944 ctx->cipher_type = CIPHER_TYPE_AES128;
2946 case AES_KEYSIZE_192:
2947 ctx->cipher_type = CIPHER_TYPE_AES192;
2949 case AES_KEYSIZE_256:
2950 ctx->cipher_type = CIPHER_TYPE_AES256;
2956 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2958 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
2959 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
2961 /* setkey the fallback just in case we need to use it */
2962 if (ctx->fallback_cipher) {
2963 flow_log(" running fallback setkey()\n");
2965 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
2966 ctx->fallback_cipher->base.crt_flags |=
2967 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
2968 ret = crypto_aead_setkey(ctx->fallback_cipher, key,
2969 keylen + ctx->salt_len);
2971 flow_log(" fallback setkey() returned:%d\n", ret);
2972 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
2974 (ctx->fallback_cipher->base.crt_flags &
2975 CRYPTO_TFM_RES_MASK);
2979 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
2983 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
2985 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2992 ctx->authkeylen = 0;
2993 ctx->digestsize = 0;
2995 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
3000 * aead_gcm_esp_setkey() - setkey() operation for ESP variant of GCM AES.
3001 * @cipher: AEAD structure
3002 * @key: Key followed by 4 bytes of salt
3003 * @keylen: Length of key plus salt, in bytes
3005 * Extracts salt from key and stores it to be prepended to IV on each request.
3006 * Digest is always 16 bytes
3008 * Return: Value from generic gcm setkey.
3010 static int aead_gcm_esp_setkey(struct crypto_aead *cipher,
3011 const u8 *key, unsigned int keylen)
3013 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3015 flow_log("%s\n", __func__);
3016 ctx->salt_len = GCM_ESP_SALT_SIZE;
3017 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3018 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3019 keylen -= GCM_ESP_SALT_SIZE;
3020 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3022 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3024 return aead_gcm_ccm_setkey(cipher, key, keylen);
3028 * rfc4543_gcm_esp_setkey() - setkey operation for RFC4543 variant of GCM/GMAC.
3029 * cipher: AEAD structure
3030 * key: Key followed by 4 bytes of salt
3031 * keylen: Length of key plus salt, in bytes
3033 * Extracts salt from key and stores it to be prepended to IV on each request.
3034 * Digest is always 16 bytes
3036 * Return: Value from generic gcm setkey.
3038 static int rfc4543_gcm_esp_setkey(struct crypto_aead *cipher,
3039 const u8 *key, unsigned int keylen)
3041 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3043 flow_log("%s\n", __func__);
3044 ctx->salt_len = GCM_ESP_SALT_SIZE;
3045 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3046 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3047 keylen -= GCM_ESP_SALT_SIZE;
3048 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3050 ctx->is_rfc4543 = true;
3051 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3053 return aead_gcm_ccm_setkey(cipher, key, keylen);
3057 * aead_ccm_esp_setkey() - setkey() operation for ESP variant of CCM AES.
3058 * @cipher: AEAD structure
3059 * @key: Key followed by 4 bytes of salt
3060 * @keylen: Length of key plus salt, in bytes
3062 * Extracts salt from key and stores it to be prepended to IV on each request.
3063 * Digest is always 16 bytes
3065 * Return: Value from generic ccm setkey.
3067 static int aead_ccm_esp_setkey(struct crypto_aead *cipher,
3068 const u8 *key, unsigned int keylen)
3070 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3072 flow_log("%s\n", __func__);
3073 ctx->salt_len = CCM_ESP_SALT_SIZE;
3074 ctx->salt_offset = CCM_ESP_SALT_OFFSET;
3075 memcpy(ctx->salt, key + keylen - CCM_ESP_SALT_SIZE, CCM_ESP_SALT_SIZE);
3076 keylen -= CCM_ESP_SALT_SIZE;
3078 flow_dump("salt: ", ctx->salt, CCM_ESP_SALT_SIZE);
3080 return aead_gcm_ccm_setkey(cipher, key, keylen);
3083 static int aead_setauthsize(struct crypto_aead *cipher, unsigned int authsize)
3085 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3088 flow_log("%s() authkeylen:%u authsize:%u\n",
3089 __func__, ctx->authkeylen, authsize);
3091 ctx->digestsize = authsize;
3093 /* setkey the fallback just in case we needto use it */
3094 if (ctx->fallback_cipher) {
3095 flow_log(" running fallback setauth()\n");
3097 ret = crypto_aead_setauthsize(ctx->fallback_cipher, authsize);
3099 flow_log(" fallback setauth() returned:%d\n", ret);
3105 static int aead_encrypt(struct aead_request *req)
3107 flow_log("%s() cryptlen:%u %08x\n", __func__, req->cryptlen,
3109 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3110 flow_log(" assoc_len:%u\n", req->assoclen);
3112 return aead_enqueue(req, true);
3115 static int aead_decrypt(struct aead_request *req)
3117 flow_log("%s() cryptlen:%u\n", __func__, req->cryptlen);
3118 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3119 flow_log(" assoc_len:%u\n", req->assoclen);
3121 return aead_enqueue(req, false);
3124 /* ==================== Supported Cipher Algorithms ==================== */
3126 static struct iproc_alg_s driver_algs[] = {
3128 .type = CRYPTO_ALG_TYPE_AEAD,
3131 .cra_name = "gcm(aes)",
3132 .cra_driver_name = "gcm-aes-iproc",
3133 .cra_blocksize = AES_BLOCK_SIZE,
3134 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3136 .setkey = aead_gcm_ccm_setkey,
3137 .ivsize = GCM_AES_IV_SIZE,
3138 .maxauthsize = AES_BLOCK_SIZE,
3141 .alg = CIPHER_ALG_AES,
3142 .mode = CIPHER_MODE_GCM,
3145 .alg = HASH_ALG_AES,
3146 .mode = HASH_MODE_GCM,
3151 .type = CRYPTO_ALG_TYPE_AEAD,
3154 .cra_name = "ccm(aes)",
3155 .cra_driver_name = "ccm-aes-iproc",
3156 .cra_blocksize = AES_BLOCK_SIZE,
3157 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3159 .setkey = aead_gcm_ccm_setkey,
3160 .ivsize = CCM_AES_IV_SIZE,
3161 .maxauthsize = AES_BLOCK_SIZE,
3164 .alg = CIPHER_ALG_AES,
3165 .mode = CIPHER_MODE_CCM,
3168 .alg = HASH_ALG_AES,
3169 .mode = HASH_MODE_CCM,
3174 .type = CRYPTO_ALG_TYPE_AEAD,
3177 .cra_name = "rfc4106(gcm(aes))",
3178 .cra_driver_name = "gcm-aes-esp-iproc",
3179 .cra_blocksize = AES_BLOCK_SIZE,
3180 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3182 .setkey = aead_gcm_esp_setkey,
3183 .ivsize = GCM_RFC4106_IV_SIZE,
3184 .maxauthsize = AES_BLOCK_SIZE,
3187 .alg = CIPHER_ALG_AES,
3188 .mode = CIPHER_MODE_GCM,
3191 .alg = HASH_ALG_AES,
3192 .mode = HASH_MODE_GCM,
3197 .type = CRYPTO_ALG_TYPE_AEAD,
3200 .cra_name = "rfc4309(ccm(aes))",
3201 .cra_driver_name = "ccm-aes-esp-iproc",
3202 .cra_blocksize = AES_BLOCK_SIZE,
3203 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3205 .setkey = aead_ccm_esp_setkey,
3206 .ivsize = CCM_AES_IV_SIZE,
3207 .maxauthsize = AES_BLOCK_SIZE,
3210 .alg = CIPHER_ALG_AES,
3211 .mode = CIPHER_MODE_CCM,
3214 .alg = HASH_ALG_AES,
3215 .mode = HASH_MODE_CCM,
3220 .type = CRYPTO_ALG_TYPE_AEAD,
3223 .cra_name = "rfc4543(gcm(aes))",
3224 .cra_driver_name = "gmac-aes-esp-iproc",
3225 .cra_blocksize = AES_BLOCK_SIZE,
3226 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3228 .setkey = rfc4543_gcm_esp_setkey,
3229 .ivsize = GCM_RFC4106_IV_SIZE,
3230 .maxauthsize = AES_BLOCK_SIZE,
3233 .alg = CIPHER_ALG_AES,
3234 .mode = CIPHER_MODE_GCM,
3237 .alg = HASH_ALG_AES,
3238 .mode = HASH_MODE_GCM,
3243 .type = CRYPTO_ALG_TYPE_AEAD,
3246 .cra_name = "authenc(hmac(md5),cbc(aes))",
3247 .cra_driver_name = "authenc-hmac-md5-cbc-aes-iproc",
3248 .cra_blocksize = AES_BLOCK_SIZE,
3249 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3251 .setkey = aead_authenc_setkey,
3252 .ivsize = AES_BLOCK_SIZE,
3253 .maxauthsize = MD5_DIGEST_SIZE,
3256 .alg = CIPHER_ALG_AES,
3257 .mode = CIPHER_MODE_CBC,
3260 .alg = HASH_ALG_MD5,
3261 .mode = HASH_MODE_HMAC,
3266 .type = CRYPTO_ALG_TYPE_AEAD,
3269 .cra_name = "authenc(hmac(sha1),cbc(aes))",
3270 .cra_driver_name = "authenc-hmac-sha1-cbc-aes-iproc",
3271 .cra_blocksize = AES_BLOCK_SIZE,
3272 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3274 .setkey = aead_authenc_setkey,
3275 .ivsize = AES_BLOCK_SIZE,
3276 .maxauthsize = SHA1_DIGEST_SIZE,
3279 .alg = CIPHER_ALG_AES,
3280 .mode = CIPHER_MODE_CBC,
3283 .alg = HASH_ALG_SHA1,
3284 .mode = HASH_MODE_HMAC,
3289 .type = CRYPTO_ALG_TYPE_AEAD,
3292 .cra_name = "authenc(hmac(sha256),cbc(aes))",
3293 .cra_driver_name = "authenc-hmac-sha256-cbc-aes-iproc",
3294 .cra_blocksize = AES_BLOCK_SIZE,
3295 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3297 .setkey = aead_authenc_setkey,
3298 .ivsize = AES_BLOCK_SIZE,
3299 .maxauthsize = SHA256_DIGEST_SIZE,
3302 .alg = CIPHER_ALG_AES,
3303 .mode = CIPHER_MODE_CBC,
3306 .alg = HASH_ALG_SHA256,
3307 .mode = HASH_MODE_HMAC,
3312 .type = CRYPTO_ALG_TYPE_AEAD,
3315 .cra_name = "authenc(hmac(md5),cbc(des))",
3316 .cra_driver_name = "authenc-hmac-md5-cbc-des-iproc",
3317 .cra_blocksize = DES_BLOCK_SIZE,
3318 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3320 .setkey = aead_authenc_setkey,
3321 .ivsize = DES_BLOCK_SIZE,
3322 .maxauthsize = MD5_DIGEST_SIZE,
3325 .alg = CIPHER_ALG_DES,
3326 .mode = CIPHER_MODE_CBC,
3329 .alg = HASH_ALG_MD5,
3330 .mode = HASH_MODE_HMAC,
3335 .type = CRYPTO_ALG_TYPE_AEAD,
3338 .cra_name = "authenc(hmac(sha1),cbc(des))",
3339 .cra_driver_name = "authenc-hmac-sha1-cbc-des-iproc",
3340 .cra_blocksize = DES_BLOCK_SIZE,
3341 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3343 .setkey = aead_authenc_setkey,
3344 .ivsize = DES_BLOCK_SIZE,
3345 .maxauthsize = SHA1_DIGEST_SIZE,
3348 .alg = CIPHER_ALG_DES,
3349 .mode = CIPHER_MODE_CBC,
3352 .alg = HASH_ALG_SHA1,
3353 .mode = HASH_MODE_HMAC,
3358 .type = CRYPTO_ALG_TYPE_AEAD,
3361 .cra_name = "authenc(hmac(sha224),cbc(des))",
3362 .cra_driver_name = "authenc-hmac-sha224-cbc-des-iproc",
3363 .cra_blocksize = DES_BLOCK_SIZE,
3364 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3366 .setkey = aead_authenc_setkey,
3367 .ivsize = DES_BLOCK_SIZE,
3368 .maxauthsize = SHA224_DIGEST_SIZE,
3371 .alg = CIPHER_ALG_DES,
3372 .mode = CIPHER_MODE_CBC,
3375 .alg = HASH_ALG_SHA224,
3376 .mode = HASH_MODE_HMAC,
3381 .type = CRYPTO_ALG_TYPE_AEAD,
3384 .cra_name = "authenc(hmac(sha256),cbc(des))",
3385 .cra_driver_name = "authenc-hmac-sha256-cbc-des-iproc",
3386 .cra_blocksize = DES_BLOCK_SIZE,
3387 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3389 .setkey = aead_authenc_setkey,
3390 .ivsize = DES_BLOCK_SIZE,
3391 .maxauthsize = SHA256_DIGEST_SIZE,
3394 .alg = CIPHER_ALG_DES,
3395 .mode = CIPHER_MODE_CBC,
3398 .alg = HASH_ALG_SHA256,
3399 .mode = HASH_MODE_HMAC,
3404 .type = CRYPTO_ALG_TYPE_AEAD,
3407 .cra_name = "authenc(hmac(sha384),cbc(des))",
3408 .cra_driver_name = "authenc-hmac-sha384-cbc-des-iproc",
3409 .cra_blocksize = DES_BLOCK_SIZE,
3410 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3412 .setkey = aead_authenc_setkey,
3413 .ivsize = DES_BLOCK_SIZE,
3414 .maxauthsize = SHA384_DIGEST_SIZE,
3417 .alg = CIPHER_ALG_DES,
3418 .mode = CIPHER_MODE_CBC,
3421 .alg = HASH_ALG_SHA384,
3422 .mode = HASH_MODE_HMAC,
3427 .type = CRYPTO_ALG_TYPE_AEAD,
3430 .cra_name = "authenc(hmac(sha512),cbc(des))",
3431 .cra_driver_name = "authenc-hmac-sha512-cbc-des-iproc",
3432 .cra_blocksize = DES_BLOCK_SIZE,
3433 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3435 .setkey = aead_authenc_setkey,
3436 .ivsize = DES_BLOCK_SIZE,
3437 .maxauthsize = SHA512_DIGEST_SIZE,
3440 .alg = CIPHER_ALG_DES,
3441 .mode = CIPHER_MODE_CBC,
3444 .alg = HASH_ALG_SHA512,
3445 .mode = HASH_MODE_HMAC,
3450 .type = CRYPTO_ALG_TYPE_AEAD,
3453 .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
3454 .cra_driver_name = "authenc-hmac-md5-cbc-des3-iproc",
3455 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3456 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3458 .setkey = aead_authenc_setkey,
3459 .ivsize = DES3_EDE_BLOCK_SIZE,
3460 .maxauthsize = MD5_DIGEST_SIZE,
3463 .alg = CIPHER_ALG_3DES,
3464 .mode = CIPHER_MODE_CBC,
3467 .alg = HASH_ALG_MD5,
3468 .mode = HASH_MODE_HMAC,
3473 .type = CRYPTO_ALG_TYPE_AEAD,
3476 .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
3477 .cra_driver_name = "authenc-hmac-sha1-cbc-des3-iproc",
3478 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3479 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3481 .setkey = aead_authenc_setkey,
3482 .ivsize = DES3_EDE_BLOCK_SIZE,
3483 .maxauthsize = SHA1_DIGEST_SIZE,
3486 .alg = CIPHER_ALG_3DES,
3487 .mode = CIPHER_MODE_CBC,
3490 .alg = HASH_ALG_SHA1,
3491 .mode = HASH_MODE_HMAC,
3496 .type = CRYPTO_ALG_TYPE_AEAD,
3499 .cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
3500 .cra_driver_name = "authenc-hmac-sha224-cbc-des3-iproc",
3501 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3502 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3504 .setkey = aead_authenc_setkey,
3505 .ivsize = DES3_EDE_BLOCK_SIZE,
3506 .maxauthsize = SHA224_DIGEST_SIZE,
3509 .alg = CIPHER_ALG_3DES,
3510 .mode = CIPHER_MODE_CBC,
3513 .alg = HASH_ALG_SHA224,
3514 .mode = HASH_MODE_HMAC,
3519 .type = CRYPTO_ALG_TYPE_AEAD,
3522 .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
3523 .cra_driver_name = "authenc-hmac-sha256-cbc-des3-iproc",
3524 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3525 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3527 .setkey = aead_authenc_setkey,
3528 .ivsize = DES3_EDE_BLOCK_SIZE,
3529 .maxauthsize = SHA256_DIGEST_SIZE,
3532 .alg = CIPHER_ALG_3DES,
3533 .mode = CIPHER_MODE_CBC,
3536 .alg = HASH_ALG_SHA256,
3537 .mode = HASH_MODE_HMAC,
3542 .type = CRYPTO_ALG_TYPE_AEAD,
3545 .cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
3546 .cra_driver_name = "authenc-hmac-sha384-cbc-des3-iproc",
3547 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3548 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3550 .setkey = aead_authenc_setkey,
3551 .ivsize = DES3_EDE_BLOCK_SIZE,
3552 .maxauthsize = SHA384_DIGEST_SIZE,
3555 .alg = CIPHER_ALG_3DES,
3556 .mode = CIPHER_MODE_CBC,
3559 .alg = HASH_ALG_SHA384,
3560 .mode = HASH_MODE_HMAC,
3565 .type = CRYPTO_ALG_TYPE_AEAD,
3568 .cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
3569 .cra_driver_name = "authenc-hmac-sha512-cbc-des3-iproc",
3570 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3571 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3573 .setkey = aead_authenc_setkey,
3574 .ivsize = DES3_EDE_BLOCK_SIZE,
3575 .maxauthsize = SHA512_DIGEST_SIZE,
3578 .alg = CIPHER_ALG_3DES,
3579 .mode = CIPHER_MODE_CBC,
3582 .alg = HASH_ALG_SHA512,
3583 .mode = HASH_MODE_HMAC,
3588 /* ABLKCIPHER algorithms. */
3590 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3592 .cra_name = "ecb(arc4)",
3593 .cra_driver_name = "ecb-arc4-iproc",
3594 .cra_blocksize = ARC4_BLOCK_SIZE,
3596 .min_keysize = ARC4_MIN_KEY_SIZE,
3597 .max_keysize = ARC4_MAX_KEY_SIZE,
3602 .alg = CIPHER_ALG_RC4,
3603 .mode = CIPHER_MODE_NONE,
3606 .alg = HASH_ALG_NONE,
3607 .mode = HASH_MODE_NONE,
3611 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3613 .cra_name = "ofb(des)",
3614 .cra_driver_name = "ofb-des-iproc",
3615 .cra_blocksize = DES_BLOCK_SIZE,
3617 .min_keysize = DES_KEY_SIZE,
3618 .max_keysize = DES_KEY_SIZE,
3619 .ivsize = DES_BLOCK_SIZE,
3623 .alg = CIPHER_ALG_DES,
3624 .mode = CIPHER_MODE_OFB,
3627 .alg = HASH_ALG_NONE,
3628 .mode = HASH_MODE_NONE,
3632 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3634 .cra_name = "cbc(des)",
3635 .cra_driver_name = "cbc-des-iproc",
3636 .cra_blocksize = DES_BLOCK_SIZE,
3638 .min_keysize = DES_KEY_SIZE,
3639 .max_keysize = DES_KEY_SIZE,
3640 .ivsize = DES_BLOCK_SIZE,
3644 .alg = CIPHER_ALG_DES,
3645 .mode = CIPHER_MODE_CBC,
3648 .alg = HASH_ALG_NONE,
3649 .mode = HASH_MODE_NONE,
3653 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3655 .cra_name = "ecb(des)",
3656 .cra_driver_name = "ecb-des-iproc",
3657 .cra_blocksize = DES_BLOCK_SIZE,
3659 .min_keysize = DES_KEY_SIZE,
3660 .max_keysize = DES_KEY_SIZE,
3665 .alg = CIPHER_ALG_DES,
3666 .mode = CIPHER_MODE_ECB,
3669 .alg = HASH_ALG_NONE,
3670 .mode = HASH_MODE_NONE,
3674 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3676 .cra_name = "ofb(des3_ede)",
3677 .cra_driver_name = "ofb-des3-iproc",
3678 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3680 .min_keysize = DES3_EDE_KEY_SIZE,
3681 .max_keysize = DES3_EDE_KEY_SIZE,
3682 .ivsize = DES3_EDE_BLOCK_SIZE,
3686 .alg = CIPHER_ALG_3DES,
3687 .mode = CIPHER_MODE_OFB,
3690 .alg = HASH_ALG_NONE,
3691 .mode = HASH_MODE_NONE,
3695 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3697 .cra_name = "cbc(des3_ede)",
3698 .cra_driver_name = "cbc-des3-iproc",
3699 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3701 .min_keysize = DES3_EDE_KEY_SIZE,
3702 .max_keysize = DES3_EDE_KEY_SIZE,
3703 .ivsize = DES3_EDE_BLOCK_SIZE,
3707 .alg = CIPHER_ALG_3DES,
3708 .mode = CIPHER_MODE_CBC,
3711 .alg = HASH_ALG_NONE,
3712 .mode = HASH_MODE_NONE,
3716 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3718 .cra_name = "ecb(des3_ede)",
3719 .cra_driver_name = "ecb-des3-iproc",
3720 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3722 .min_keysize = DES3_EDE_KEY_SIZE,
3723 .max_keysize = DES3_EDE_KEY_SIZE,
3728 .alg = CIPHER_ALG_3DES,
3729 .mode = CIPHER_MODE_ECB,
3732 .alg = HASH_ALG_NONE,
3733 .mode = HASH_MODE_NONE,
3737 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3739 .cra_name = "ofb(aes)",
3740 .cra_driver_name = "ofb-aes-iproc",
3741 .cra_blocksize = AES_BLOCK_SIZE,
3743 .min_keysize = AES_MIN_KEY_SIZE,
3744 .max_keysize = AES_MAX_KEY_SIZE,
3745 .ivsize = AES_BLOCK_SIZE,
3749 .alg = CIPHER_ALG_AES,
3750 .mode = CIPHER_MODE_OFB,
3753 .alg = HASH_ALG_NONE,
3754 .mode = HASH_MODE_NONE,
3758 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3760 .cra_name = "cbc(aes)",
3761 .cra_driver_name = "cbc-aes-iproc",
3762 .cra_blocksize = AES_BLOCK_SIZE,
3764 .min_keysize = AES_MIN_KEY_SIZE,
3765 .max_keysize = AES_MAX_KEY_SIZE,
3766 .ivsize = AES_BLOCK_SIZE,
3770 .alg = CIPHER_ALG_AES,
3771 .mode = CIPHER_MODE_CBC,
3774 .alg = HASH_ALG_NONE,
3775 .mode = HASH_MODE_NONE,
3779 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3781 .cra_name = "ecb(aes)",
3782 .cra_driver_name = "ecb-aes-iproc",
3783 .cra_blocksize = AES_BLOCK_SIZE,
3785 .min_keysize = AES_MIN_KEY_SIZE,
3786 .max_keysize = AES_MAX_KEY_SIZE,
3791 .alg = CIPHER_ALG_AES,
3792 .mode = CIPHER_MODE_ECB,
3795 .alg = HASH_ALG_NONE,
3796 .mode = HASH_MODE_NONE,
3800 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3802 .cra_name = "ctr(aes)",
3803 .cra_driver_name = "ctr-aes-iproc",
3804 .cra_blocksize = AES_BLOCK_SIZE,
3806 .min_keysize = AES_MIN_KEY_SIZE,
3807 .max_keysize = AES_MAX_KEY_SIZE,
3808 .ivsize = AES_BLOCK_SIZE,
3812 .alg = CIPHER_ALG_AES,
3813 .mode = CIPHER_MODE_CTR,
3816 .alg = HASH_ALG_NONE,
3817 .mode = HASH_MODE_NONE,
3821 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3823 .cra_name = "xts(aes)",
3824 .cra_driver_name = "xts-aes-iproc",
3825 .cra_blocksize = AES_BLOCK_SIZE,
3827 .min_keysize = 2 * AES_MIN_KEY_SIZE,
3828 .max_keysize = 2 * AES_MAX_KEY_SIZE,
3829 .ivsize = AES_BLOCK_SIZE,
3833 .alg = CIPHER_ALG_AES,
3834 .mode = CIPHER_MODE_XTS,
3837 .alg = HASH_ALG_NONE,
3838 .mode = HASH_MODE_NONE,
3842 /* AHASH algorithms. */
3844 .type = CRYPTO_ALG_TYPE_AHASH,
3846 .halg.digestsize = MD5_DIGEST_SIZE,
3849 .cra_driver_name = "md5-iproc",
3850 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3851 .cra_flags = CRYPTO_ALG_ASYNC,
3855 .alg = CIPHER_ALG_NONE,
3856 .mode = CIPHER_MODE_NONE,
3859 .alg = HASH_ALG_MD5,
3860 .mode = HASH_MODE_HASH,
3864 .type = CRYPTO_ALG_TYPE_AHASH,
3866 .halg.digestsize = MD5_DIGEST_SIZE,
3868 .cra_name = "hmac(md5)",
3869 .cra_driver_name = "hmac-md5-iproc",
3870 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3874 .alg = CIPHER_ALG_NONE,
3875 .mode = CIPHER_MODE_NONE,
3878 .alg = HASH_ALG_MD5,
3879 .mode = HASH_MODE_HMAC,
3882 {.type = CRYPTO_ALG_TYPE_AHASH,
3884 .halg.digestsize = SHA1_DIGEST_SIZE,
3887 .cra_driver_name = "sha1-iproc",
3888 .cra_blocksize = SHA1_BLOCK_SIZE,
3892 .alg = CIPHER_ALG_NONE,
3893 .mode = CIPHER_MODE_NONE,
3896 .alg = HASH_ALG_SHA1,
3897 .mode = HASH_MODE_HASH,
3900 {.type = CRYPTO_ALG_TYPE_AHASH,
3902 .halg.digestsize = SHA1_DIGEST_SIZE,
3904 .cra_name = "hmac(sha1)",
3905 .cra_driver_name = "hmac-sha1-iproc",
3906 .cra_blocksize = SHA1_BLOCK_SIZE,
3910 .alg = CIPHER_ALG_NONE,
3911 .mode = CIPHER_MODE_NONE,
3914 .alg = HASH_ALG_SHA1,
3915 .mode = HASH_MODE_HMAC,
3918 {.type = CRYPTO_ALG_TYPE_AHASH,
3920 .halg.digestsize = SHA224_DIGEST_SIZE,
3922 .cra_name = "sha224",
3923 .cra_driver_name = "sha224-iproc",
3924 .cra_blocksize = SHA224_BLOCK_SIZE,
3928 .alg = CIPHER_ALG_NONE,
3929 .mode = CIPHER_MODE_NONE,
3932 .alg = HASH_ALG_SHA224,
3933 .mode = HASH_MODE_HASH,
3936 {.type = CRYPTO_ALG_TYPE_AHASH,
3938 .halg.digestsize = SHA224_DIGEST_SIZE,
3940 .cra_name = "hmac(sha224)",
3941 .cra_driver_name = "hmac-sha224-iproc",
3942 .cra_blocksize = SHA224_BLOCK_SIZE,
3946 .alg = CIPHER_ALG_NONE,
3947 .mode = CIPHER_MODE_NONE,
3950 .alg = HASH_ALG_SHA224,
3951 .mode = HASH_MODE_HMAC,
3954 {.type = CRYPTO_ALG_TYPE_AHASH,
3956 .halg.digestsize = SHA256_DIGEST_SIZE,
3958 .cra_name = "sha256",
3959 .cra_driver_name = "sha256-iproc",
3960 .cra_blocksize = SHA256_BLOCK_SIZE,
3964 .alg = CIPHER_ALG_NONE,
3965 .mode = CIPHER_MODE_NONE,
3968 .alg = HASH_ALG_SHA256,
3969 .mode = HASH_MODE_HASH,
3972 {.type = CRYPTO_ALG_TYPE_AHASH,
3974 .halg.digestsize = SHA256_DIGEST_SIZE,
3976 .cra_name = "hmac(sha256)",
3977 .cra_driver_name = "hmac-sha256-iproc",
3978 .cra_blocksize = SHA256_BLOCK_SIZE,
3982 .alg = CIPHER_ALG_NONE,
3983 .mode = CIPHER_MODE_NONE,
3986 .alg = HASH_ALG_SHA256,
3987 .mode = HASH_MODE_HMAC,
3991 .type = CRYPTO_ALG_TYPE_AHASH,
3993 .halg.digestsize = SHA384_DIGEST_SIZE,
3995 .cra_name = "sha384",
3996 .cra_driver_name = "sha384-iproc",
3997 .cra_blocksize = SHA384_BLOCK_SIZE,
4001 .alg = CIPHER_ALG_NONE,
4002 .mode = CIPHER_MODE_NONE,
4005 .alg = HASH_ALG_SHA384,
4006 .mode = HASH_MODE_HASH,
4010 .type = CRYPTO_ALG_TYPE_AHASH,
4012 .halg.digestsize = SHA384_DIGEST_SIZE,
4014 .cra_name = "hmac(sha384)",
4015 .cra_driver_name = "hmac-sha384-iproc",
4016 .cra_blocksize = SHA384_BLOCK_SIZE,
4020 .alg = CIPHER_ALG_NONE,
4021 .mode = CIPHER_MODE_NONE,
4024 .alg = HASH_ALG_SHA384,
4025 .mode = HASH_MODE_HMAC,
4029 .type = CRYPTO_ALG_TYPE_AHASH,
4031 .halg.digestsize = SHA512_DIGEST_SIZE,
4033 .cra_name = "sha512",
4034 .cra_driver_name = "sha512-iproc",
4035 .cra_blocksize = SHA512_BLOCK_SIZE,
4039 .alg = CIPHER_ALG_NONE,
4040 .mode = CIPHER_MODE_NONE,
4043 .alg = HASH_ALG_SHA512,
4044 .mode = HASH_MODE_HASH,
4048 .type = CRYPTO_ALG_TYPE_AHASH,
4050 .halg.digestsize = SHA512_DIGEST_SIZE,
4052 .cra_name = "hmac(sha512)",
4053 .cra_driver_name = "hmac-sha512-iproc",
4054 .cra_blocksize = SHA512_BLOCK_SIZE,
4058 .alg = CIPHER_ALG_NONE,
4059 .mode = CIPHER_MODE_NONE,
4062 .alg = HASH_ALG_SHA512,
4063 .mode = HASH_MODE_HMAC,
4067 .type = CRYPTO_ALG_TYPE_AHASH,
4069 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4071 .cra_name = "sha3-224",
4072 .cra_driver_name = "sha3-224-iproc",
4073 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4077 .alg = CIPHER_ALG_NONE,
4078 .mode = CIPHER_MODE_NONE,
4081 .alg = HASH_ALG_SHA3_224,
4082 .mode = HASH_MODE_HASH,
4086 .type = CRYPTO_ALG_TYPE_AHASH,
4088 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4090 .cra_name = "hmac(sha3-224)",
4091 .cra_driver_name = "hmac-sha3-224-iproc",
4092 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4096 .alg = CIPHER_ALG_NONE,
4097 .mode = CIPHER_MODE_NONE,
4100 .alg = HASH_ALG_SHA3_224,
4101 .mode = HASH_MODE_HMAC
4105 .type = CRYPTO_ALG_TYPE_AHASH,
4107 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4109 .cra_name = "sha3-256",
4110 .cra_driver_name = "sha3-256-iproc",
4111 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4115 .alg = CIPHER_ALG_NONE,
4116 .mode = CIPHER_MODE_NONE,
4119 .alg = HASH_ALG_SHA3_256,
4120 .mode = HASH_MODE_HASH,
4124 .type = CRYPTO_ALG_TYPE_AHASH,
4126 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4128 .cra_name = "hmac(sha3-256)",
4129 .cra_driver_name = "hmac-sha3-256-iproc",
4130 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4134 .alg = CIPHER_ALG_NONE,
4135 .mode = CIPHER_MODE_NONE,
4138 .alg = HASH_ALG_SHA3_256,
4139 .mode = HASH_MODE_HMAC,
4143 .type = CRYPTO_ALG_TYPE_AHASH,
4145 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4147 .cra_name = "sha3-384",
4148 .cra_driver_name = "sha3-384-iproc",
4149 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4153 .alg = CIPHER_ALG_NONE,
4154 .mode = CIPHER_MODE_NONE,
4157 .alg = HASH_ALG_SHA3_384,
4158 .mode = HASH_MODE_HASH,
4162 .type = CRYPTO_ALG_TYPE_AHASH,
4164 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4166 .cra_name = "hmac(sha3-384)",
4167 .cra_driver_name = "hmac-sha3-384-iproc",
4168 .cra_blocksize = SHA3_384_BLOCK_SIZE,
4172 .alg = CIPHER_ALG_NONE,
4173 .mode = CIPHER_MODE_NONE,
4176 .alg = HASH_ALG_SHA3_384,
4177 .mode = HASH_MODE_HMAC,
4181 .type = CRYPTO_ALG_TYPE_AHASH,
4183 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4185 .cra_name = "sha3-512",
4186 .cra_driver_name = "sha3-512-iproc",
4187 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4191 .alg = CIPHER_ALG_NONE,
4192 .mode = CIPHER_MODE_NONE,
4195 .alg = HASH_ALG_SHA3_512,
4196 .mode = HASH_MODE_HASH,
4200 .type = CRYPTO_ALG_TYPE_AHASH,
4202 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4204 .cra_name = "hmac(sha3-512)",
4205 .cra_driver_name = "hmac-sha3-512-iproc",
4206 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4210 .alg = CIPHER_ALG_NONE,
4211 .mode = CIPHER_MODE_NONE,
4214 .alg = HASH_ALG_SHA3_512,
4215 .mode = HASH_MODE_HMAC,
4219 .type = CRYPTO_ALG_TYPE_AHASH,
4221 .halg.digestsize = AES_BLOCK_SIZE,
4223 .cra_name = "xcbc(aes)",
4224 .cra_driver_name = "xcbc-aes-iproc",
4225 .cra_blocksize = AES_BLOCK_SIZE,
4229 .alg = CIPHER_ALG_NONE,
4230 .mode = CIPHER_MODE_NONE,
4233 .alg = HASH_ALG_AES,
4234 .mode = HASH_MODE_XCBC,
4238 .type = CRYPTO_ALG_TYPE_AHASH,
4240 .halg.digestsize = AES_BLOCK_SIZE,
4242 .cra_name = "cmac(aes)",
4243 .cra_driver_name = "cmac-aes-iproc",
4244 .cra_blocksize = AES_BLOCK_SIZE,
4248 .alg = CIPHER_ALG_NONE,
4249 .mode = CIPHER_MODE_NONE,
4252 .alg = HASH_ALG_AES,
4253 .mode = HASH_MODE_CMAC,
4258 static int generic_cra_init(struct crypto_tfm *tfm,
4259 struct iproc_alg_s *cipher_alg)
4261 struct spu_hw *spu = &iproc_priv.spu;
4262 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4263 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
4265 flow_log("%s()\n", __func__);
4267 ctx->alg = cipher_alg;
4268 ctx->cipher = cipher_alg->cipher_info;
4269 ctx->auth = cipher_alg->auth_info;
4270 ctx->auth_first = cipher_alg->auth_first;
4271 ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg,
4274 ctx->fallback_cipher = NULL;
4277 ctx->authkeylen = 0;
4279 atomic_inc(&iproc_priv.stream_count);
4280 atomic_inc(&iproc_priv.session_count);
4285 static int ablkcipher_cra_init(struct crypto_tfm *tfm)
4287 struct crypto_alg *alg = tfm->__crt_alg;
4288 struct iproc_alg_s *cipher_alg;
4290 flow_log("%s()\n", __func__);
4292 tfm->crt_ablkcipher.reqsize = sizeof(struct iproc_reqctx_s);
4294 cipher_alg = container_of(alg, struct iproc_alg_s, alg.crypto);
4295 return generic_cra_init(tfm, cipher_alg);
4298 static int ahash_cra_init(struct crypto_tfm *tfm)
4301 struct crypto_alg *alg = tfm->__crt_alg;
4302 struct iproc_alg_s *cipher_alg;
4304 cipher_alg = container_of(__crypto_ahash_alg(alg), struct iproc_alg_s,
4307 err = generic_cra_init(tfm, cipher_alg);
4308 flow_log("%s()\n", __func__);
4311 * export state size has to be < 512 bytes. So don't include msg bufs
4314 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
4315 sizeof(struct iproc_reqctx_s));
4320 static int aead_cra_init(struct crypto_aead *aead)
4322 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4323 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4324 struct crypto_alg *alg = tfm->__crt_alg;
4325 struct aead_alg *aalg = container_of(alg, struct aead_alg, base);
4326 struct iproc_alg_s *cipher_alg = container_of(aalg, struct iproc_alg_s,
4329 int err = generic_cra_init(tfm, cipher_alg);
4331 flow_log("%s()\n", __func__);
4333 crypto_aead_set_reqsize(aead, sizeof(struct iproc_reqctx_s));
4334 ctx->is_esp = false;
4336 ctx->salt_offset = 0;
4338 /* random first IV */
4339 get_random_bytes(ctx->iv, MAX_IV_SIZE);
4340 flow_dump(" iv: ", ctx->iv, MAX_IV_SIZE);
4343 if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) {
4344 flow_log("%s() creating fallback cipher\n", __func__);
4346 ctx->fallback_cipher =
4347 crypto_alloc_aead(alg->cra_name, 0,
4349 CRYPTO_ALG_NEED_FALLBACK);
4350 if (IS_ERR(ctx->fallback_cipher)) {
4351 pr_err("%s() Error: failed to allocate fallback for %s\n",
4352 __func__, alg->cra_name);
4353 return PTR_ERR(ctx->fallback_cipher);
4361 static void generic_cra_exit(struct crypto_tfm *tfm)
4363 atomic_dec(&iproc_priv.session_count);
4366 static void aead_cra_exit(struct crypto_aead *aead)
4368 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4369 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4371 generic_cra_exit(tfm);
4373 if (ctx->fallback_cipher) {
4374 crypto_free_aead(ctx->fallback_cipher);
4375 ctx->fallback_cipher = NULL;
4380 * spu_functions_register() - Specify hardware-specific SPU functions based on
4381 * SPU type read from device tree.
4382 * @dev: device structure
4383 * @spu_type: SPU hardware generation
4384 * @spu_subtype: SPU hardware version
4386 static void spu_functions_register(struct device *dev,
4387 enum spu_spu_type spu_type,
4388 enum spu_spu_subtype spu_subtype)
4390 struct spu_hw *spu = &iproc_priv.spu;
4392 if (spu_type == SPU_TYPE_SPUM) {
4393 dev_dbg(dev, "Registering SPUM functions");
4394 spu->spu_dump_msg_hdr = spum_dump_msg_hdr;
4395 spu->spu_payload_length = spum_payload_length;
4396 spu->spu_response_hdr_len = spum_response_hdr_len;
4397 spu->spu_hash_pad_len = spum_hash_pad_len;
4398 spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len;
4399 spu->spu_assoc_resp_len = spum_assoc_resp_len;
4400 spu->spu_aead_ivlen = spum_aead_ivlen;
4401 spu->spu_hash_type = spum_hash_type;
4402 spu->spu_digest_size = spum_digest_size;
4403 spu->spu_create_request = spum_create_request;
4404 spu->spu_cipher_req_init = spum_cipher_req_init;
4405 spu->spu_cipher_req_finish = spum_cipher_req_finish;
4406 spu->spu_request_pad = spum_request_pad;
4407 spu->spu_tx_status_len = spum_tx_status_len;
4408 spu->spu_rx_status_len = spum_rx_status_len;
4409 spu->spu_status_process = spum_status_process;
4410 spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload;
4411 spu->spu_ccm_update_iv = spum_ccm_update_iv;
4412 spu->spu_wordalign_padlen = spum_wordalign_padlen;
4413 if (spu_subtype == SPU_SUBTYPE_SPUM_NS2)
4414 spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload;
4416 spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload;
4418 dev_dbg(dev, "Registering SPU2 functions");
4419 spu->spu_dump_msg_hdr = spu2_dump_msg_hdr;
4420 spu->spu_ctx_max_payload = spu2_ctx_max_payload;
4421 spu->spu_payload_length = spu2_payload_length;
4422 spu->spu_response_hdr_len = spu2_response_hdr_len;
4423 spu->spu_hash_pad_len = spu2_hash_pad_len;
4424 spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len;
4425 spu->spu_assoc_resp_len = spu2_assoc_resp_len;
4426 spu->spu_aead_ivlen = spu2_aead_ivlen;
4427 spu->spu_hash_type = spu2_hash_type;
4428 spu->spu_digest_size = spu2_digest_size;
4429 spu->spu_create_request = spu2_create_request;
4430 spu->spu_cipher_req_init = spu2_cipher_req_init;
4431 spu->spu_cipher_req_finish = spu2_cipher_req_finish;
4432 spu->spu_request_pad = spu2_request_pad;
4433 spu->spu_tx_status_len = spu2_tx_status_len;
4434 spu->spu_rx_status_len = spu2_rx_status_len;
4435 spu->spu_status_process = spu2_status_process;
4436 spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload;
4437 spu->spu_ccm_update_iv = spu2_ccm_update_iv;
4438 spu->spu_wordalign_padlen = spu2_wordalign_padlen;
4443 * spu_mb_init() - Initialize mailbox client. Request ownership of a mailbox
4444 * channel for the SPU being probed.
4445 * @dev: SPU driver device structure
4447 * Return: 0 if successful
4450 static int spu_mb_init(struct device *dev)
4452 struct mbox_client *mcl = &iproc_priv.mcl;
4455 iproc_priv.mbox = devm_kcalloc(dev, iproc_priv.spu.num_chan,
4456 sizeof(struct mbox_chan *), GFP_KERNEL);
4457 if (!iproc_priv.mbox)
4461 mcl->tx_block = false;
4463 mcl->knows_txdone = true;
4464 mcl->rx_callback = spu_rx_callback;
4465 mcl->tx_done = NULL;
4467 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4468 iproc_priv.mbox[i] = mbox_request_channel(mcl, i);
4469 if (IS_ERR(iproc_priv.mbox[i])) {
4470 err = (int)PTR_ERR(iproc_priv.mbox[i]);
4472 "Mbox channel %d request failed with err %d",
4474 iproc_priv.mbox[i] = NULL;
4481 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4482 if (iproc_priv.mbox[i])
4483 mbox_free_channel(iproc_priv.mbox[i]);
4489 static void spu_mb_release(struct platform_device *pdev)
4493 for (i = 0; i < iproc_priv.spu.num_chan; i++)
4494 mbox_free_channel(iproc_priv.mbox[i]);
4497 static void spu_counters_init(void)
4502 atomic_set(&iproc_priv.session_count, 0);
4503 atomic_set(&iproc_priv.stream_count, 0);
4504 atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_chan);
4505 atomic64_set(&iproc_priv.bytes_in, 0);
4506 atomic64_set(&iproc_priv.bytes_out, 0);
4507 for (i = 0; i < SPU_OP_NUM; i++) {
4508 atomic_set(&iproc_priv.op_counts[i], 0);
4509 atomic_set(&iproc_priv.setkey_cnt[i], 0);
4511 for (i = 0; i < CIPHER_ALG_LAST; i++)
4512 for (j = 0; j < CIPHER_MODE_LAST; j++)
4513 atomic_set(&iproc_priv.cipher_cnt[i][j], 0);
4515 for (i = 0; i < HASH_ALG_LAST; i++) {
4516 atomic_set(&iproc_priv.hash_cnt[i], 0);
4517 atomic_set(&iproc_priv.hmac_cnt[i], 0);
4519 for (i = 0; i < AEAD_TYPE_LAST; i++)
4520 atomic_set(&iproc_priv.aead_cnt[i], 0);
4522 atomic_set(&iproc_priv.mb_no_spc, 0);
4523 atomic_set(&iproc_priv.mb_send_fail, 0);
4524 atomic_set(&iproc_priv.bad_icv, 0);
4527 static int spu_register_ablkcipher(struct iproc_alg_s *driver_alg)
4529 struct spu_hw *spu = &iproc_priv.spu;
4530 struct crypto_alg *crypto = &driver_alg->alg.crypto;
4533 /* SPU2 does not support RC4 */
4534 if ((driver_alg->cipher_info.alg == CIPHER_ALG_RC4) &&
4535 (spu->spu_type == SPU_TYPE_SPU2))
4538 crypto->cra_module = THIS_MODULE;
4539 crypto->cra_priority = cipher_pri;
4540 crypto->cra_alignmask = 0;
4541 crypto->cra_ctxsize = sizeof(struct iproc_ctx_s);
4543 crypto->cra_init = ablkcipher_cra_init;
4544 crypto->cra_exit = generic_cra_exit;
4545 crypto->cra_type = &crypto_ablkcipher_type;
4546 crypto->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
4547 CRYPTO_ALG_KERN_DRIVER_ONLY;
4549 crypto->cra_ablkcipher.setkey = ablkcipher_setkey;
4550 crypto->cra_ablkcipher.encrypt = ablkcipher_encrypt;
4551 crypto->cra_ablkcipher.decrypt = ablkcipher_decrypt;
4553 err = crypto_register_alg(crypto);
4554 /* Mark alg as having been registered, if successful */
4556 driver_alg->registered = true;
4557 pr_debug(" registered ablkcipher %s\n", crypto->cra_driver_name);
4561 static int spu_register_ahash(struct iproc_alg_s *driver_alg)
4563 struct spu_hw *spu = &iproc_priv.spu;
4564 struct ahash_alg *hash = &driver_alg->alg.hash;
4567 /* AES-XCBC is the only AES hash type currently supported on SPU-M */
4568 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4569 (driver_alg->auth_info.mode != HASH_MODE_XCBC) &&
4570 (spu->spu_type == SPU_TYPE_SPUM))
4573 /* SHA3 algorithm variants are not registered for SPU-M or SPU2. */
4574 if ((driver_alg->auth_info.alg >= HASH_ALG_SHA3_224) &&
4575 (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2))
4578 hash->halg.base.cra_module = THIS_MODULE;
4579 hash->halg.base.cra_priority = hash_pri;
4580 hash->halg.base.cra_alignmask = 0;
4581 hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4582 hash->halg.base.cra_init = ahash_cra_init;
4583 hash->halg.base.cra_exit = generic_cra_exit;
4584 hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
4585 hash->halg.statesize = sizeof(struct spu_hash_export_s);
4587 if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
4588 hash->init = ahash_init;
4589 hash->update = ahash_update;
4590 hash->final = ahash_final;
4591 hash->finup = ahash_finup;
4592 hash->digest = ahash_digest;
4593 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4594 ((driver_alg->auth_info.mode == HASH_MODE_XCBC) ||
4595 (driver_alg->auth_info.mode == HASH_MODE_CMAC))) {
4596 hash->setkey = ahash_setkey;
4599 hash->setkey = ahash_hmac_setkey;
4600 hash->init = ahash_hmac_init;
4601 hash->update = ahash_hmac_update;
4602 hash->final = ahash_hmac_final;
4603 hash->finup = ahash_hmac_finup;
4604 hash->digest = ahash_hmac_digest;
4606 hash->export = ahash_export;
4607 hash->import = ahash_import;
4609 err = crypto_register_ahash(hash);
4610 /* Mark alg as having been registered, if successful */
4612 driver_alg->registered = true;
4613 pr_debug(" registered ahash %s\n",
4614 hash->halg.base.cra_driver_name);
4618 static int spu_register_aead(struct iproc_alg_s *driver_alg)
4620 struct aead_alg *aead = &driver_alg->alg.aead;
4623 aead->base.cra_module = THIS_MODULE;
4624 aead->base.cra_priority = aead_pri;
4625 aead->base.cra_alignmask = 0;
4626 aead->base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4628 aead->base.cra_flags |= CRYPTO_ALG_ASYNC;
4629 /* setkey set in alg initialization */
4630 aead->setauthsize = aead_setauthsize;
4631 aead->encrypt = aead_encrypt;
4632 aead->decrypt = aead_decrypt;
4633 aead->init = aead_cra_init;
4634 aead->exit = aead_cra_exit;
4636 err = crypto_register_aead(aead);
4637 /* Mark alg as having been registered, if successful */
4639 driver_alg->registered = true;
4640 pr_debug(" registered aead %s\n", aead->base.cra_driver_name);
4644 /* register crypto algorithms the device supports */
4645 static int spu_algs_register(struct device *dev)
4650 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4651 switch (driver_algs[i].type) {
4652 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4653 err = spu_register_ablkcipher(&driver_algs[i]);
4655 case CRYPTO_ALG_TYPE_AHASH:
4656 err = spu_register_ahash(&driver_algs[i]);
4658 case CRYPTO_ALG_TYPE_AEAD:
4659 err = spu_register_aead(&driver_algs[i]);
4663 "iproc-crypto: unknown alg type: %d",
4664 driver_algs[i].type);
4669 dev_err(dev, "alg registration failed with error %d\n",
4678 for (j = 0; j < i; j++) {
4679 /* Skip any algorithm not registered */
4680 if (!driver_algs[j].registered)
4682 switch (driver_algs[j].type) {
4683 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4684 crypto_unregister_alg(&driver_algs[j].alg.crypto);
4685 driver_algs[j].registered = false;
4687 case CRYPTO_ALG_TYPE_AHASH:
4688 crypto_unregister_ahash(&driver_algs[j].alg.hash);
4689 driver_algs[j].registered = false;
4691 case CRYPTO_ALG_TYPE_AEAD:
4692 crypto_unregister_aead(&driver_algs[j].alg.aead);
4693 driver_algs[j].registered = false;
4700 /* ==================== Kernel Platform API ==================== */
4702 static struct spu_type_subtype spum_ns2_types = {
4703 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NS2
4706 static struct spu_type_subtype spum_nsp_types = {
4707 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NSP
4710 static struct spu_type_subtype spu2_types = {
4711 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V1
4714 static struct spu_type_subtype spu2_v2_types = {
4715 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V2
4718 static const struct of_device_id bcm_spu_dt_ids[] = {
4720 .compatible = "brcm,spum-crypto",
4721 .data = &spum_ns2_types,
4724 .compatible = "brcm,spum-nsp-crypto",
4725 .data = &spum_nsp_types,
4728 .compatible = "brcm,spu2-crypto",
4729 .data = &spu2_types,
4732 .compatible = "brcm,spu2-v2-crypto",
4733 .data = &spu2_v2_types,
4738 MODULE_DEVICE_TABLE(of, bcm_spu_dt_ids);
4740 static int spu_dt_read(struct platform_device *pdev)
4742 struct device *dev = &pdev->dev;
4743 struct spu_hw *spu = &iproc_priv.spu;
4744 struct resource *spu_ctrl_regs;
4745 const struct spu_type_subtype *matched_spu_type;
4746 struct device_node *dn = pdev->dev.of_node;
4749 /* Count number of mailbox channels */
4750 spu->num_chan = of_count_phandle_with_args(dn, "mboxes", "#mbox-cells");
4752 matched_spu_type = of_device_get_match_data(dev);
4753 if (!matched_spu_type) {
4754 dev_err(&pdev->dev, "Failed to match device\n");
4758 spu->spu_type = matched_spu_type->type;
4759 spu->spu_subtype = matched_spu_type->subtype;
4762 for (i = 0; (i < MAX_SPUS) && ((spu_ctrl_regs =
4763 platform_get_resource(pdev, IORESOURCE_MEM, i)) != NULL); i++) {
4765 spu->reg_vbase[i] = devm_ioremap_resource(dev, spu_ctrl_regs);
4766 if (IS_ERR(spu->reg_vbase[i])) {
4767 err = PTR_ERR(spu->reg_vbase[i]);
4768 dev_err(&pdev->dev, "Failed to map registers: %d\n",
4770 spu->reg_vbase[i] = NULL;
4775 dev_dbg(dev, "Device has %d SPUs", spu->num_spu);
4780 static int bcm_spu_probe(struct platform_device *pdev)
4782 struct device *dev = &pdev->dev;
4783 struct spu_hw *spu = &iproc_priv.spu;
4786 iproc_priv.pdev = pdev;
4787 platform_set_drvdata(iproc_priv.pdev,
4790 err = spu_dt_read(pdev);
4794 err = spu_mb_init(&pdev->dev);
4798 if (spu->spu_type == SPU_TYPE_SPUM)
4799 iproc_priv.bcm_hdr_len = 8;
4800 else if (spu->spu_type == SPU_TYPE_SPU2)
4801 iproc_priv.bcm_hdr_len = 0;
4803 spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype);
4805 spu_counters_init();
4807 spu_setup_debugfs();
4809 err = spu_algs_register(dev);
4818 spu_mb_release(pdev);
4819 dev_err(dev, "%s failed with error %d.\n", __func__, err);
4824 static int bcm_spu_remove(struct platform_device *pdev)
4827 struct device *dev = &pdev->dev;
4830 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4832 * Not all algorithms were registered, depending on whether
4833 * hardware is SPU or SPU2. So here we make sure to skip
4834 * those algorithms that were not previously registered.
4836 if (!driver_algs[i].registered)
4839 switch (driver_algs[i].type) {
4840 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4841 crypto_unregister_alg(&driver_algs[i].alg.crypto);
4842 dev_dbg(dev, " unregistered cipher %s\n",
4843 driver_algs[i].alg.crypto.cra_driver_name);
4844 driver_algs[i].registered = false;
4846 case CRYPTO_ALG_TYPE_AHASH:
4847 crypto_unregister_ahash(&driver_algs[i].alg.hash);
4848 cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name;
4849 dev_dbg(dev, " unregistered hash %s\n", cdn);
4850 driver_algs[i].registered = false;
4852 case CRYPTO_ALG_TYPE_AEAD:
4853 crypto_unregister_aead(&driver_algs[i].alg.aead);
4854 dev_dbg(dev, " unregistered aead %s\n",
4855 driver_algs[i].alg.aead.base.cra_driver_name);
4856 driver_algs[i].registered = false;
4861 spu_mb_release(pdev);
4865 /* ===== Kernel Module API ===== */
4867 static struct platform_driver bcm_spu_pdriver = {
4869 .name = "brcm-spu-crypto",
4870 .of_match_table = of_match_ptr(bcm_spu_dt_ids),
4872 .probe = bcm_spu_probe,
4873 .remove = bcm_spu_remove,
4875 module_platform_driver(bcm_spu_pdriver);
4877 MODULE_AUTHOR("Rob Rice <rob.rice@broadcom.com>");
4878 MODULE_DESCRIPTION("Broadcom symmetric crypto offload driver");
4879 MODULE_LICENSE("GPL v2");