Linux-libre 4.14.145-gnu
[librecmc/linux-libre.git] / drivers / clk / samsung / clk-exynos-clkout.c
1 /*
2  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
3  * Author: Tomasz Figa <t.figa@samsung.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * Clock driver for Exynos clock output
10  */
11
12 #include <linux/slab.h>
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/of.h>
16 #include <linux/of_address.h>
17 #include <linux/syscore_ops.h>
18
19 #define EXYNOS_CLKOUT_NR_CLKS           1
20 #define EXYNOS_CLKOUT_PARENTS           32
21
22 #define EXYNOS_PMU_DEBUG_REG            0xa00
23 #define EXYNOS_CLKOUT_DISABLE_SHIFT     0
24 #define EXYNOS_CLKOUT_MUX_SHIFT         8
25 #define EXYNOS4_CLKOUT_MUX_MASK         0xf
26 #define EXYNOS5_CLKOUT_MUX_MASK         0x1f
27
28 struct exynos_clkout {
29         struct clk_gate gate;
30         struct clk_mux mux;
31         spinlock_t slock;
32         void __iomem *reg;
33         u32 pmu_debug_save;
34         struct clk_hw_onecell_data data;
35 };
36
37 static struct exynos_clkout *clkout;
38
39 static int exynos_clkout_suspend(void)
40 {
41         clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG);
42
43         return 0;
44 }
45
46 static void exynos_clkout_resume(void)
47 {
48         writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG);
49 }
50
51 static struct syscore_ops exynos_clkout_syscore_ops = {
52         .suspend = exynos_clkout_suspend,
53         .resume = exynos_clkout_resume,
54 };
55
56 static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
57 {
58         const char *parent_names[EXYNOS_CLKOUT_PARENTS];
59         struct clk *parents[EXYNOS_CLKOUT_PARENTS];
60         int parent_count;
61         int ret;
62         int i;
63
64         clkout = kzalloc(sizeof(*clkout) +
65                          sizeof(*clkout->data.hws) * EXYNOS_CLKOUT_NR_CLKS,
66                          GFP_KERNEL);
67         if (!clkout)
68                 return;
69
70         spin_lock_init(&clkout->slock);
71
72         parent_count = 0;
73         for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i) {
74                 char name[] = "clkoutXX";
75
76                 snprintf(name, sizeof(name), "clkout%d", i);
77                 parents[i] = of_clk_get_by_name(node, name);
78                 if (IS_ERR(parents[i])) {
79                         parent_names[i] = "none";
80                         continue;
81                 }
82
83                 parent_names[i] = __clk_get_name(parents[i]);
84                 parent_count = i + 1;
85         }
86
87         if (!parent_count)
88                 goto free_clkout;
89
90         clkout->reg = of_iomap(node, 0);
91         if (!clkout->reg)
92                 goto clks_put;
93
94         clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
95         clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT;
96         clkout->gate.flags = CLK_GATE_SET_TO_DISABLE;
97         clkout->gate.lock = &clkout->slock;
98
99         clkout->mux.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
100         clkout->mux.mask = mux_mask;
101         clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT;
102         clkout->mux.lock = &clkout->slock;
103
104         clkout->data.hws[0] = clk_hw_register_composite(NULL, "clkout",
105                                 parent_names, parent_count, &clkout->mux.hw,
106                                 &clk_mux_ops, NULL, NULL, &clkout->gate.hw,
107                                 &clk_gate_ops, CLK_SET_RATE_PARENT
108                                 | CLK_SET_RATE_NO_REPARENT);
109         if (IS_ERR(clkout->data.hws[0]))
110                 goto err_unmap;
111
112         clkout->data.num = EXYNOS_CLKOUT_NR_CLKS;
113         ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, &clkout->data);
114         if (ret)
115                 goto err_clk_unreg;
116
117         register_syscore_ops(&exynos_clkout_syscore_ops);
118
119         return;
120
121 err_clk_unreg:
122         clk_hw_unregister(clkout->data.hws[0]);
123 err_unmap:
124         iounmap(clkout->reg);
125 clks_put:
126         for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
127                 if (!IS_ERR(parents[i]))
128                         clk_put(parents[i]);
129 free_clkout:
130         kfree(clkout);
131
132         pr_err("%s: failed to register clkout clock\n", __func__);
133 }
134
135 /*
136  * We use CLK_OF_DECLARE_DRIVER initialization method to avoid setting
137  * the OF_POPULATED flag on the pmu device tree node, so later the
138  * Exynos PMU platform device can be properly probed with PMU driver.
139  */
140
141 static void __init exynos4_clkout_init(struct device_node *node)
142 {
143         exynos_clkout_init(node, EXYNOS4_CLKOUT_MUX_MASK);
144 }
145 CLK_OF_DECLARE_DRIVER(exynos4210_clkout, "samsung,exynos4210-pmu",
146                 exynos4_clkout_init);
147 CLK_OF_DECLARE_DRIVER(exynos4212_clkout, "samsung,exynos4212-pmu",
148                 exynos4_clkout_init);
149 CLK_OF_DECLARE_DRIVER(exynos4412_clkout, "samsung,exynos4412-pmu",
150                 exynos4_clkout_init);
151 CLK_OF_DECLARE_DRIVER(exynos3250_clkout, "samsung,exynos3250-pmu",
152                 exynos4_clkout_init);
153
154 static void __init exynos5_clkout_init(struct device_node *node)
155 {
156         exynos_clkout_init(node, EXYNOS5_CLKOUT_MUX_MASK);
157 }
158 CLK_OF_DECLARE_DRIVER(exynos5250_clkout, "samsung,exynos5250-pmu",
159                 exynos5_clkout_init);
160 CLK_OF_DECLARE_DRIVER(exynos5410_clkout, "samsung,exynos5410-pmu",
161                 exynos5_clkout_init);
162 CLK_OF_DECLARE_DRIVER(exynos5420_clkout, "samsung,exynos5420-pmu",
163                 exynos5_clkout_init);
164 CLK_OF_DECLARE_DRIVER(exynos5433_clkout, "samsung,exynos5433-pmu",
165                 exynos5_clkout_init);