drivers/char/tpm/tpm_tis.c

   1 /*
   2  * Copyright (C) 2005, 2006 IBM Corporation
   3  *
   4  * Authors:
   5  * Leendert van Doorn <leendert@watson.ibm.com>
   6  * Kylene Hall <kjhall@us.ibm.com>
   7  *
   8  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
   9  *
  10  * Device driver for TCG/TCPA TPM (trusted platform module).
  11  * Specifications at www.trustedcomputinggroup.org
  12  *
  13  * This device driver implements the TPM interface as defined in
  14  * the TCG TPM Interface Spec version 1.2, revision 1.0.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation, version 2 of the
  19  * License.
  20  */
  21 #include <linux/init.h>
  22 #include <linux/module.h>
  23 #include <linux/moduleparam.h>
  24 #include <linux/pnp.h>
  25 #include <linux/slab.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/wait.h>
  28 #include <linux/acpi.h>
  29 #include <linux/freezer.h>
  30 #include "tpm.h"
  31
  32 enum tis_access {
  33         TPM_ACCESS_VALID = 0x80,
  34         TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  35         TPM_ACCESS_REQUEST_PENDING = 0x04,
  36         TPM_ACCESS_REQUEST_USE = 0x02,
  37 };
  38
  39 enum tis_status {
  40         TPM_STS_VALID = 0x80,
  41         TPM_STS_COMMAND_READY = 0x40,
  42         TPM_STS_GO = 0x20,
  43         TPM_STS_DATA_AVAIL = 0x10,
  44         TPM_STS_DATA_EXPECT = 0x08,
  45 };
  46
  47 enum tis_int_flags {
  48         TPM_GLOBAL_INT_ENABLE = 0x80000000,
  49         TPM_INTF_BURST_COUNT_STATIC = 0x100,
  50         TPM_INTF_CMD_READY_INT = 0x080,
  51         TPM_INTF_INT_EDGE_FALLING = 0x040,
  52         TPM_INTF_INT_EDGE_RISING = 0x020,
  53         TPM_INTF_INT_LEVEL_LOW = 0x010,
  54         TPM_INTF_INT_LEVEL_HIGH = 0x008,
  55         TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
  56         TPM_INTF_STS_VALID_INT = 0x002,
  57         TPM_INTF_DATA_AVAIL_INT = 0x001,
  58 };
  59
  60 enum tis_defaults {
  61         TIS_MEM_BASE = 0xFED40000,
  62         TIS_MEM_LEN = 0x5000,
  63         TIS_SHORT_TIMEOUT = 750,        /* ms */
  64         TIS_LONG_TIMEOUT = 2000,        /* 2 sec */
  65 };
  66
  67 #define TPM_ACCESS(l)                   (0x0000 | ((l) << 12))
  68 #define TPM_INT_ENABLE(l)               (0x0008 | ((l) << 12))
  69 #define TPM_INT_VECTOR(l)               (0x000C | ((l) << 12))
  70 #define TPM_INT_STATUS(l)               (0x0010 | ((l) << 12))
  71 #define TPM_INTF_CAPS(l)                (0x0014 | ((l) << 12))
  72 #define TPM_STS(l)                      (0x0018 | ((l) << 12))
  73 #define TPM_DATA_FIFO(l)                (0x0024 | ((l) << 12))
  74
  75 #define TPM_DID_VID(l)                  (0x0F00 | ((l) << 12))
  76 #define TPM_RID(l)                      (0x0F04 | ((l) << 12))
  77
  78 struct priv_data {
  79         bool irq_tested;
  80 };
  81
  82 static LIST_HEAD(tis_chips);
  83 static DEFINE_MUTEX(tis_lock);
  84
  85 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
  86 static int is_itpm(struct pnp_dev *dev)
  87 {
  88         struct acpi_device *acpi = pnp_acpi_device(dev);
  89         struct acpi_hardware_id *id;
  90
  91         if (!acpi)
  92                 return 0;
  93
  94         list_for_each_entry(id, &acpi->pnp.ids, list) {
  95                 if (!strcmp("INTC0102", id->id))
  96                         return 1;
  97         }
  98
  99         return 0;
 100 }
 101 #else
 102 static inline int is_itpm(struct pnp_dev *dev)
 103 {
 104         return 0;
 105 }
 106 #endif
 107
 108 /* Before we attempt to access the TPM we must see that the valid bit is set.
 109  * The specification says that this bit is 0 at reset and remains 0 until the
 110  * 'TPM has gone through its self test and initialization and has established
 111  * correct values in the other bits.' */
 112 static int wait_startup(struct tpm_chip *chip, int l)
 113 {
 114         unsigned long stop = jiffies + chip->vendor.timeout_a;
 115         do {
 116                 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 117                     TPM_ACCESS_VALID)
 118                         return 0;
 119                 msleep(TPM_TIMEOUT);
 120         } while (time_before(jiffies, stop));
 121         return -1;
 122 }
 123
 124 static int check_locality(struct tpm_chip *chip, int l)
 125 {
 126         if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 127              (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
 128             (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
 129                 return chip->vendor.locality = l;
 130
 131         return -1;
 132 }
 133
 134 static void release_locality(struct tpm_chip *chip, int l, int force)
 135 {
 136         if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 137                       (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
 138             (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
 139                 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
 140                          chip->vendor.iobase + TPM_ACCESS(l));
 141 }
 142
 143 static int request_locality(struct tpm_chip *chip, int l)
 144 {
 145         unsigned long stop, timeout;
 146         long rc;
 147
 148         if (check_locality(chip, l) >= 0)
 149                 return l;
 150
 151         iowrite8(TPM_ACCESS_REQUEST_USE,
 152                  chip->vendor.iobase + TPM_ACCESS(l));
 153
 154         stop = jiffies + chip->vendor.timeout_a;
 155
 156         if (chip->vendor.irq) {
 157 again:
 158                 timeout = stop - jiffies;
 159                 if ((long)timeout <= 0)
 160                         return -1;
 161                 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
 162                                                       (check_locality
 163                                                        (chip, l) >= 0),
 164                                                       timeout);
 165                 if (rc > 0)
 166                         return l;
 167                 if (rc == -ERESTARTSYS && freezing(current)) {
 168                         clear_thread_flag(TIF_SIGPENDING);
 169                         goto again;
 170                 }
 171         } else {
 172                 /* wait for burstcount */
 173                 do {
 174                         if (check_locality(chip, l) >= 0)
 175                                 return l;
 176                         msleep(TPM_TIMEOUT);
 177                 }
 178                 while (time_before(jiffies, stop));
 179         }
 180         return -1;
 181 }
 182
 183 static u8 tpm_tis_status(struct tpm_chip *chip)
 184 {
 185         return ioread8(chip->vendor.iobase +
 186                        TPM_STS(chip->vendor.locality));
 187 }
 188
 189 static void tpm_tis_ready(struct tpm_chip *chip)
 190 {
 191         /* this causes the current command to be aborted */
 192         iowrite8(TPM_STS_COMMAND_READY,
 193                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
 194 }
 195
 196 static int get_burstcount(struct tpm_chip *chip)
 197 {
 198         unsigned long stop;
 199         int burstcnt;
 200         u32 value;
 201
 202         /* wait for burstcount */
 203         /* which timeout value, spec has 2 answers (c & d) */
 204         stop = jiffies + chip->vendor.timeout_d;
 205         do {
 206                 value = ioread32(chip->vendor.iobase +
 207                                  TPM_STS(chip->vendor.locality));
 208                 burstcnt = (value >> 8) & 0xFFFF;
 209                 if (burstcnt)
 210                         return burstcnt;
 211                 msleep(TPM_TIMEOUT);
 212         } while (time_before(jiffies, stop));
 213         return -EBUSY;
 214 }
 215
 216 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
 217 {
 218         int size = 0, burstcnt;
 219         while (size < count &&
 220                wait_for_tpm_stat(chip,
 221                                  TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 222                                  chip->vendor.timeout_c,
 223                                  &chip->vendor.read_queue, true)
 224                == 0) {
 225                 burstcnt = get_burstcount(chip);
 226                 for (; burstcnt > 0 && size < count; burstcnt--)
 227                         buf[size++] = ioread8(chip->vendor.iobase +
 228                                               TPM_DATA_FIFO(chip->vendor.
 229                                                             locality));
 230         }
 231         return size;
 232 }
 233
 234 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
 235 {
 236         int size = 0;
 237         int status;
 238         u32 expected;
 239
 240         if (count < TPM_HEADER_SIZE) {
 241                 size = -EIO;
 242                 goto out;
 243         }
 244
 245         /* read first 10 bytes, including tag, paramsize, and result */
 246         if ((size =
 247              recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
 248                 dev_err(chip->dev, "Unable to read header\n");
 249                 goto out;
 250         }
 251
 252         expected = be32_to_cpu(*(__be32 *) (buf + 2));
 253         if (expected > count || expected < TPM_HEADER_SIZE) {
 254                 size = -EIO;
 255                 goto out;
 256         }
 257
 258         if ((size +=
 259              recv_data(chip, &buf[TPM_HEADER_SIZE],
 260                        expected - TPM_HEADER_SIZE)) < expected) {
 261                 dev_err(chip->dev, "Unable to read remainder of result\n");
 262                 size = -ETIME;
 263                 goto out;
 264         }
 265
 266         wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 267                           &chip->vendor.int_queue, false);
 268         status = tpm_tis_status(chip);
 269         if (status & TPM_STS_DATA_AVAIL) {      /* retry? */
 270                 dev_err(chip->dev, "Error left over data\n");
 271                 size = -EIO;
 272                 goto out;
 273         }
 274
 275 out:
 276         tpm_tis_ready(chip);
 277         release_locality(chip, chip->vendor.locality, 0);
 278         return size;
 279 }
 280
 281 static bool itpm;
 282 module_param(itpm, bool, 0444);
 283 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
 284
 285 /*
 286  * If interrupts are used (signaled by an irq set in the vendor structure)
 287  * tpm.c can skip polling for the data to be available as the interrupt is
 288  * waited for here
 289  */
 290 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
 291 {
 292         int rc, status, burstcnt;
 293         size_t count = 0;
 294
 295         if (request_locality(chip, 0) < 0)
 296                 return -EBUSY;
 297
 298         status = tpm_tis_status(chip);
 299         if ((status & TPM_STS_COMMAND_READY) == 0) {
 300                 tpm_tis_ready(chip);
 301                 if (wait_for_tpm_stat
 302                     (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
 303                      &chip->vendor.int_queue, false) < 0) {
 304                         rc = -ETIME;
 305                         goto out_err;
 306                 }
 307         }
 308
 309         while (count < len - 1) {
 310                 burstcnt = get_burstcount(chip);
 311                 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
 312                         iowrite8(buf[count], chip->vendor.iobase +
 313                                  TPM_DATA_FIFO(chip->vendor.locality));
 314                         count++;
 315                 }
 316
 317                 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 318                                   &chip->vendor.int_queue, false);
 319                 status = tpm_tis_status(chip);
 320                 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
 321                         rc = -EIO;
 322                         goto out_err;
 323                 }
 324         }
 325
 326         /* write last byte */
 327         iowrite8(buf[count],
 328                  chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
 329         wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 330                           &chip->vendor.int_queue, false);
 331         status = tpm_tis_status(chip);
 332         if ((status & TPM_STS_DATA_EXPECT) != 0) {
 333                 rc = -EIO;
 334                 goto out_err;
 335         }
 336
 337         return 0;
 338
 339 out_err:
 340         tpm_tis_ready(chip);
 341         release_locality(chip, chip->vendor.locality, 0);
 342         return rc;
 343 }
 344
 345 static void disable_interrupts(struct tpm_chip *chip)
 346 {
 347         u32 intmask;
 348
 349         intmask =
 350             ioread32(chip->vendor.iobase +
 351                      TPM_INT_ENABLE(chip->vendor.locality));
 352         intmask &= ~TPM_GLOBAL_INT_ENABLE;
 353         iowrite32(intmask,
 354                   chip->vendor.iobase +
 355                   TPM_INT_ENABLE(chip->vendor.locality));
 356         free_irq(chip->vendor.irq, chip);
 357         chip->vendor.irq = 0;
 358 }
 359
 360 /*
 361  * If interrupts are used (signaled by an irq set in the vendor structure)
 362  * tpm.c can skip polling for the data to be available as the interrupt is
 363  * waited for here
 364  */
 365 static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
 366 {
 367         int rc;
 368         u32 ordinal;
 369
 370         rc = tpm_tis_send_data(chip, buf, len);
 371         if (rc < 0)
 372                 return rc;
 373
 374         /* go and do it */
 375         iowrite8(TPM_STS_GO,
 376                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
 377
 378         if (chip->vendor.irq) {
 379                 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
 380                 if (wait_for_tpm_stat
 381                     (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 382                      tpm_calc_ordinal_duration(chip, ordinal),
 383                      &chip->vendor.read_queue, false) < 0) {
 384                         rc = -ETIME;
 385                         goto out_err;
 386                 }
 387         }
 388         return len;
 389 out_err:
 390         tpm_tis_ready(chip);
 391         release_locality(chip, chip->vendor.locality, 0);
 392         return rc;
 393 }
 394
 395 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
 396 {
 397         int rc, irq;
 398         struct priv_data *priv = chip->vendor.priv;
 399
 400         if (!chip->vendor.irq || priv->irq_tested)
 401                 return tpm_tis_send_main(chip, buf, len);
 402
 403         /* Verify receipt of the expected IRQ */
 404         irq = chip->vendor.irq;
 405         chip->vendor.irq = 0;
 406         rc = tpm_tis_send_main(chip, buf, len);
 407         chip->vendor.irq = irq;
 408         if (!priv->irq_tested)
 409                 msleep(1);
 410         if (!priv->irq_tested) {
 411                 disable_interrupts(chip);
 412                 dev_err(chip->dev,
 413                         FW_BUG "TPM interrupt not working, polling instead\n");
 414         }
 415         priv->irq_tested = true;
 416         return rc;
 417 }
 418
 419 struct tis_vendor_timeout_override {
 420         u32 did_vid;
 421         unsigned long timeout_us[4];
 422 };
 423
 424 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
 425         /* Atmel 3204 */
 426         { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
 427                         (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
 428 };
 429
 430 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
 431                                     unsigned long *timeout_cap)
 432 {
 433         int i;
 434         u32 did_vid;
 435
 436         did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
 437
 438         for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
 439                 if (vendor_timeout_overrides[i].did_vid != did_vid)
 440                         continue;
 441                 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
 442                        sizeof(vendor_timeout_overrides[i].timeout_us));
 443                 return true;
 444         }
 445
 446         return false;
 447 }
 448
 449 /*
 450  * Early probing for iTPM with STS_DATA_EXPECT flaw.
 451  * Try sending command without itpm flag set and if that
 452  * fails, repeat with itpm flag set.
 453  */
 454 static int probe_itpm(struct tpm_chip *chip)
 455 {
 456         int rc = 0;
 457         u8 cmd_getticks[] = {
 458                 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
 459                 0x00, 0x00, 0x00, 0xf1
 460         };
 461         size_t len = sizeof(cmd_getticks);
 462         bool rem_itpm = itpm;
 463         u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
 464
 465         /* probe only iTPMS */
 466         if (vendor != TPM_VID_INTEL)
 467                 return 0;
 468
 469         itpm = false;
 470
 471         rc = tpm_tis_send_data(chip, cmd_getticks, len);
 472         if (rc == 0)
 473                 goto out;
 474
 475         tpm_tis_ready(chip);
 476         release_locality(chip, chip->vendor.locality, 0);
 477
 478         itpm = true;
 479
 480         rc = tpm_tis_send_data(chip, cmd_getticks, len);
 481         if (rc == 0) {
 482                 dev_info(chip->dev, "Detected an iTPM.\n");
 483                 rc = 1;
 484         } else
 485                 rc = -EFAULT;
 486
 487 out:
 488         itpm = rem_itpm;
 489         tpm_tis_ready(chip);
 490         release_locality(chip, chip->vendor.locality, 0);
 491
 492         return rc;
 493 }
 494
 495 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
 496 {
 497         switch (chip->vendor.manufacturer_id) {
 498         case TPM_VID_WINBOND:
 499                 return ((status == TPM_STS_VALID) ||
 500                         (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
 501         case TPM_VID_STM:
 502                 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
 503         default:
 504                 return (status == TPM_STS_COMMAND_READY);
 505         }
 506 }
 507
 508 static const struct tpm_class_ops tpm_tis = {
 509         .status = tpm_tis_status,
 510         .recv = tpm_tis_recv,
 511         .send = tpm_tis_send,
 512         .cancel = tpm_tis_ready,
 513         .update_timeouts = tpm_tis_update_timeouts,
 514         .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 515         .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 516         .req_canceled = tpm_tis_req_canceled,
 517 };
 518
 519 static irqreturn_t tis_int_probe(int irq, void *dev_id)
 520 {
 521         struct tpm_chip *chip = dev_id;
 522         u32 interrupt;
 523
 524         interrupt = ioread32(chip->vendor.iobase +
 525                              TPM_INT_STATUS(chip->vendor.locality));
 526
 527         if (interrupt == 0)
 528                 return IRQ_NONE;
 529
 530         chip->vendor.probed_irq = irq;
 531
 532         /* Clear interrupts handled with TPM_EOI */
 533         iowrite32(interrupt,
 534                   chip->vendor.iobase +
 535                   TPM_INT_STATUS(chip->vendor.locality));
 536         return IRQ_HANDLED;
 537 }
 538
 539 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
 540 {
 541         struct tpm_chip *chip = dev_id;
 542         u32 interrupt;
 543         int i;
 544
 545         interrupt = ioread32(chip->vendor.iobase +
 546                              TPM_INT_STATUS(chip->vendor.locality));
 547
 548         if (interrupt == 0)
 549                 return IRQ_NONE;
 550
 551         ((struct priv_data *)chip->vendor.priv)->irq_tested = true;
 552         if (interrupt & TPM_INTF_DATA_AVAIL_INT)
 553                 wake_up_interruptible(&chip->vendor.read_queue);
 554         if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
 555                 for (i = 0; i < 5; i++)
 556                         if (check_locality(chip, i) >= 0)
 557                                 break;
 558         if (interrupt &
 559             (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
 560              TPM_INTF_CMD_READY_INT))
 561                 wake_up_interruptible(&chip->vendor.int_queue);
 562
 563         /* Clear interrupts handled with TPM_EOI */
 564         iowrite32(interrupt,
 565                   chip->vendor.iobase +
 566                   TPM_INT_STATUS(chip->vendor.locality));
 567         ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
 568         return IRQ_HANDLED;
 569 }
 570
 571 static bool interrupts = true;
 572 module_param(interrupts, bool, 0444);
 573 MODULE_PARM_DESC(interrupts, "Enable interrupts");
 574
 575 static int tpm_tis_init(struct device *dev, resource_size_t start,
 576                         resource_size_t len, unsigned int irq)
 577 {
 578         u32 vendor, intfcaps, intmask;
 579         int rc, i, irq_s, irq_e, probe;
 580         struct tpm_chip *chip;
 581         struct priv_data *priv;
 582
 583         priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
 584         if (priv == NULL)
 585                 return -ENOMEM;
 586         if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
 587                 return -ENODEV;
 588         chip->vendor.priv = priv;
 589
 590         chip->vendor.iobase = ioremap(start, len);
 591         if (!chip->vendor.iobase) {
 592                 rc = -EIO;
 593                 goto out_err;
 594         }
 595
 596         /* Default timeouts */
 597         chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 598         chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
 599         chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 600         chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 601
 602         if (wait_startup(chip, 0) != 0) {
 603                 rc = -ENODEV;
 604                 goto out_err;
 605         }
 606
 607         if (request_locality(chip, 0) != 0) {
 608                 rc = -ENODEV;
 609                 goto out_err;
 610         }
 611
 612         vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
 613         chip->vendor.manufacturer_id = vendor;
 614
 615         dev_info(dev,
 616                  "1.2 TPM (device-id 0x%X, rev-id %d)\n",
 617                  vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
 618
 619         if (!itpm) {
 620                 probe = probe_itpm(chip);
 621                 if (probe < 0) {
 622                         rc = -ENODEV;
 623                         goto out_err;
 624                 }
 625                 itpm = !!probe;
 626         }
 627
 628         if (itpm)
 629                 dev_info(dev, "Intel iTPM workaround enabled\n");
 630
 631
 632         /* Figure out the capabilities */
 633         intfcaps =
 634             ioread32(chip->vendor.iobase +
 635                      TPM_INTF_CAPS(chip->vendor.locality));
 636         dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
 637                 intfcaps);
 638         if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
 639                 dev_dbg(dev, "\tBurst Count Static\n");
 640         if (intfcaps & TPM_INTF_CMD_READY_INT)
 641                 dev_dbg(dev, "\tCommand Ready Int Support\n");
 642         if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
 643                 dev_dbg(dev, "\tInterrupt Edge Falling\n");
 644         if (intfcaps & TPM_INTF_INT_EDGE_RISING)
 645                 dev_dbg(dev, "\tInterrupt Edge Rising\n");
 646         if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
 647                 dev_dbg(dev, "\tInterrupt Level Low\n");
 648         if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
 649                 dev_dbg(dev, "\tInterrupt Level High\n");
 650         if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
 651                 dev_dbg(dev, "\tLocality Change Int Support\n");
 652         if (intfcaps & TPM_INTF_STS_VALID_INT)
 653                 dev_dbg(dev, "\tSts Valid Int Support\n");
 654         if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
 655                 dev_dbg(dev, "\tData Avail Int Support\n");
 656
 657         /* INTERRUPT Setup */
 658         init_waitqueue_head(&chip->vendor.read_queue);
 659         init_waitqueue_head(&chip->vendor.int_queue);
 660
 661         intmask =
 662             ioread32(chip->vendor.iobase +
 663                      TPM_INT_ENABLE(chip->vendor.locality));
 664
 665         intmask |= TPM_INTF_CMD_READY_INT
 666             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
 667             | TPM_INTF_STS_VALID_INT;
 668
 669         iowrite32(intmask,
 670                   chip->vendor.iobase +
 671                   TPM_INT_ENABLE(chip->vendor.locality));
 672         if (interrupts)
 673                 chip->vendor.irq = irq;
 674         if (interrupts && !chip->vendor.irq) {
 675                 irq_s =
 676                     ioread8(chip->vendor.iobase +
 677                             TPM_INT_VECTOR(chip->vendor.locality));
 678                 if (irq_s) {
 679                         irq_e = irq_s;
 680                 } else {
 681                         irq_s = 3;
 682                         irq_e = 15;
 683                 }
 684
 685                 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
 686                         iowrite8(i, chip->vendor.iobase +
 687                                  TPM_INT_VECTOR(chip->vendor.locality));
 688                         if (request_irq
 689                             (i, tis_int_probe, IRQF_SHARED,
 690                              chip->vendor.miscdev.name, chip) != 0) {
 691                                 dev_info(chip->dev,
 692                                          "Unable to request irq: %d for probe\n",
 693                                          i);
 694                                 continue;
 695                         }
 696
 697                         /* Clear all existing */
 698                         iowrite32(ioread32
 699                                   (chip->vendor.iobase +
 700                                    TPM_INT_STATUS(chip->vendor.locality)),
 701                                   chip->vendor.iobase +
 702                                   TPM_INT_STATUS(chip->vendor.locality));
 703
 704                         /* Turn on */
 705                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
 706                                   chip->vendor.iobase +
 707                                   TPM_INT_ENABLE(chip->vendor.locality));
 708
 709                         chip->vendor.probed_irq = 0;
 710
 711                         /* Generate Interrupts */
 712                         tpm_gen_interrupt(chip);
 713
 714                         chip->vendor.irq = chip->vendor.probed_irq;
 715
 716                         /* free_irq will call into tis_int_probe;
 717                            clear all irqs we haven't seen while doing
 718                            tpm_gen_interrupt */
 719                         iowrite32(ioread32
 720                                   (chip->vendor.iobase +
 721                                    TPM_INT_STATUS(chip->vendor.locality)),
 722                                   chip->vendor.iobase +
 723                                   TPM_INT_STATUS(chip->vendor.locality));
 724
 725                         /* Turn off */
 726                         iowrite32(intmask,
 727                                   chip->vendor.iobase +
 728                                   TPM_INT_ENABLE(chip->vendor.locality));
 729                         free_irq(i, chip);
 730                 }
 731         }
 732         if (chip->vendor.irq) {
 733                 iowrite8(chip->vendor.irq,
 734                          chip->vendor.iobase +
 735                          TPM_INT_VECTOR(chip->vendor.locality));
 736                 if (request_irq
 737                     (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
 738                      chip->vendor.miscdev.name, chip) != 0) {
 739                         dev_info(chip->dev,
 740                                  "Unable to request irq: %d for use\n",
 741                                  chip->vendor.irq);
 742                         chip->vendor.irq = 0;
 743                 } else {
 744                         /* Clear all existing */
 745                         iowrite32(ioread32
 746                                   (chip->vendor.iobase +
 747                                    TPM_INT_STATUS(chip->vendor.locality)),
 748                                   chip->vendor.iobase +
 749                                   TPM_INT_STATUS(chip->vendor.locality));
 750
 751                         /* Turn on */
 752                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
 753                                   chip->vendor.iobase +
 754                                   TPM_INT_ENABLE(chip->vendor.locality));
 755                 }
 756         }
 757
 758         if (tpm_get_timeouts(chip)) {
 759                 dev_err(dev, "Could not get TPM timeouts and durations\n");
 760                 rc = -ENODEV;
 761                 goto out_err;
 762         }
 763
 764         if (tpm_do_selftest(chip)) {
 765                 dev_err(dev, "TPM self test failed\n");
 766                 rc = -ENODEV;
 767                 goto out_err;
 768         }
 769
 770         INIT_LIST_HEAD(&chip->vendor.list);
 771         mutex_lock(&tis_lock);
 772         list_add(&chip->vendor.list, &tis_chips);
 773         mutex_unlock(&tis_lock);
 774
 775
 776         return 0;
 777 out_err:
 778         if (chip->vendor.iobase)
 779                 iounmap(chip->vendor.iobase);
 780         tpm_remove_hardware(chip->dev);
 781         return rc;
 782 }
 783
 784 #ifdef CONFIG_PM_SLEEP
 785 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
 786 {
 787         u32 intmask;
 788
 789         /* reenable interrupts that device may have lost or
 790            BIOS/firmware may have disabled */
 791         iowrite8(chip->vendor.irq, chip->vendor.iobase +
 792                  TPM_INT_VECTOR(chip->vendor.locality));
 793
 794         intmask =
 795             ioread32(chip->vendor.iobase +
 796                      TPM_INT_ENABLE(chip->vendor.locality));
 797
 798         intmask |= TPM_INTF_CMD_READY_INT
 799             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
 800             | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
 801
 802         iowrite32(intmask,
 803                   chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
 804 }
 805
 806 static int tpm_tis_resume(struct device *dev)
 807 {
 808         struct tpm_chip *chip = dev_get_drvdata(dev);
 809         int ret;
 810
 811         if (chip->vendor.irq)
 812                 tpm_tis_reenable_interrupts(chip);
 813
 814         ret = tpm_pm_resume(dev);
 815         if (!ret)
 816                 tpm_do_selftest(chip);
 817
 818         return ret;
 819 }
 820 #endif
 821
 822 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
 823
 824 #ifdef CONFIG_PNP
 825 static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
 826                                       const struct pnp_device_id *pnp_id)
 827 {
 828         resource_size_t start, len;
 829         unsigned int irq = 0;
 830
 831         start = pnp_mem_start(pnp_dev, 0);
 832         len = pnp_mem_len(pnp_dev, 0);
 833
 834         if (pnp_irq_valid(pnp_dev, 0))
 835                 irq = pnp_irq(pnp_dev, 0);
 836         else
 837                 interrupts = false;
 838
 839         if (is_itpm(pnp_dev))
 840                 itpm = true;
 841
 842         return tpm_tis_init(&pnp_dev->dev, start, len, irq);
 843 }
 844
 845 static struct pnp_device_id tpm_pnp_tbl[] = {
 846         {"PNP0C31", 0},         /* TPM */
 847         {"ATM1200", 0},         /* Atmel */
 848         {"IFX0102", 0},         /* Infineon */
 849         {"BCM0101", 0},         /* Broadcom */
 850         {"BCM0102", 0},         /* Broadcom */
 851         {"NSC1200", 0},         /* National */
 852         {"ICO0102", 0},         /* Intel */
 853         /* Add new here */
 854         {"", 0},                /* User Specified */
 855         {"", 0}                 /* Terminator */
 856 };
 857 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
 858
 859 static void tpm_tis_pnp_remove(struct pnp_dev *dev)
 860 {
 861         struct tpm_chip *chip = pnp_get_drvdata(dev);
 862
 863         tpm_dev_vendor_release(chip);
 864
 865         kfree(chip);
 866 }
 867
 868
 869 static struct pnp_driver tis_pnp_driver = {
 870         .name = "tpm_tis",
 871         .id_table = tpm_pnp_tbl,
 872         .probe = tpm_tis_pnp_init,
 873         .remove = tpm_tis_pnp_remove,
 874         .driver = {
 875                 .pm = &tpm_tis_pm,
 876         },
 877 };
 878
 879 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
 880 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
 881                     sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
 882 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
 883 #endif
 884
 885 static struct platform_driver tis_drv = {
 886         .driver = {
 887                 .name = "tpm_tis",
 888                 .owner          = THIS_MODULE,
 889                 .pm             = &tpm_tis_pm,
 890         },
 891 };
 892
 893 static struct platform_device *pdev;
 894
 895 static bool force;
 896 module_param(force, bool, 0444);
 897 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
 898 static int __init init_tis(void)
 899 {
 900         int rc;
 901 #ifdef CONFIG_PNP
 902         if (!force)
 903                 return pnp_register_driver(&tis_pnp_driver);
 904 #endif
 905
 906         rc = platform_driver_register(&tis_drv);
 907         if (rc < 0)
 908                 return rc;
 909         pdev = platform_device_register_simple("tpm_tis", -1, NULL, 0);
 910         if (IS_ERR(pdev)) {
 911                 rc = PTR_ERR(pdev);
 912                 goto err_dev;
 913         }
 914         rc = tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0);
 915         if (rc)
 916                 goto err_init;
 917         return 0;
 918 err_init:
 919         platform_device_unregister(pdev);
 920 err_dev:
 921         platform_driver_unregister(&tis_drv);
 922         return rc;
 923 }
 924
 925 static void __exit cleanup_tis(void)
 926 {
 927         struct tpm_vendor_specific *i, *j;
 928         struct tpm_chip *chip;
 929         mutex_lock(&tis_lock);
 930         list_for_each_entry_safe(i, j, &tis_chips, list) {
 931                 chip = to_tpm_chip(i);
 932                 tpm_remove_hardware(chip->dev);
 933                 iowrite32(~TPM_GLOBAL_INT_ENABLE &
 934                           ioread32(chip->vendor.iobase +
 935                                    TPM_INT_ENABLE(chip->vendor.
 936                                                   locality)),
 937                           chip->vendor.iobase +
 938                           TPM_INT_ENABLE(chip->vendor.locality));
 939                 release_locality(chip, chip->vendor.locality, 1);
 940                 if (chip->vendor.irq)
 941                         free_irq(chip->vendor.irq, chip);
 942                 iounmap(i->iobase);
 943                 list_del(&i->list);
 944         }
 945         mutex_unlock(&tis_lock);
 946 #ifdef CONFIG_PNP
 947         if (!force) {
 948                 pnp_unregister_driver(&tis_pnp_driver);
 949                 return;
 950         }
 951 #endif
 952         platform_device_unregister(pdev);
 953         platform_driver_unregister(&tis_drv);
 954 }
 955
 956 module_init(init_tis);
 957 module_exit(cleanup_tis);
 958 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
 959 MODULE_DESCRIPTION("TPM Driver");
 960 MODULE_VERSION("2.0");
 961 MODULE_LICENSE("GPL");