arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 unsigned int min_timer_period_us = 500;
  98 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  99
 100 bool kvm_has_tsc_control;
 101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 102 u32  kvm_max_guest_tsc_khz;
 103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 104
 105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 106 static u32 tsc_tolerance_ppm = 250;
 107 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 108
 109 #define KVM_NR_SHARED_MSRS 16
 110
 111 struct kvm_shared_msrs_global {
 112         int nr;
 113         u32 msrs[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 struct kvm_shared_msrs {
 117         struct user_return_notifier urn;
 118         bool registered;
 119         struct kvm_shared_msr_values {
 120                 u64 host;
 121                 u64 curr;
 122         } values[KVM_NR_SHARED_MSRS];
 123 };
 124
 125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 126 static struct kvm_shared_msrs __percpu *shared_msrs;
 127
 128 struct kvm_stats_debugfs_item debugfs_entries[] = {
 129         { "pf_fixed", VCPU_STAT(pf_fixed) },
 130         { "pf_guest", VCPU_STAT(pf_guest) },
 131         { "tlb_flush", VCPU_STAT(tlb_flush) },
 132         { "invlpg", VCPU_STAT(invlpg) },
 133         { "exits", VCPU_STAT(exits) },
 134         { "io_exits", VCPU_STAT(io_exits) },
 135         { "mmio_exits", VCPU_STAT(mmio_exits) },
 136         { "signal_exits", VCPU_STAT(signal_exits) },
 137         { "irq_window", VCPU_STAT(irq_window_exits) },
 138         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 139         { "halt_exits", VCPU_STAT(halt_exits) },
 140         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 141         { "hypercalls", VCPU_STAT(hypercalls) },
 142         { "request_irq", VCPU_STAT(request_irq_exits) },
 143         { "irq_exits", VCPU_STAT(irq_exits) },
 144         { "host_state_reload", VCPU_STAT(host_state_reload) },
 145         { "efer_reload", VCPU_STAT(efer_reload) },
 146         { "fpu_reload", VCPU_STAT(fpu_reload) },
 147         { "insn_emulation", VCPU_STAT(insn_emulation) },
 148         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 149         { "irq_injections", VCPU_STAT(irq_injections) },
 150         { "nmi_injections", VCPU_STAT(nmi_injections) },
 151         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 152         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 153         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 154         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 155         { "mmu_flooded", VM_STAT(mmu_flooded) },
 156         { "mmu_recycled", VM_STAT(mmu_recycled) },
 157         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 158         { "mmu_unsync", VM_STAT(mmu_unsync) },
 159         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 160         { "largepages", VM_STAT(lpages) },
 161         { NULL }
 162 };
 163
 164 u64 __read_mostly host_xcr0;
 165
 166 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 167
 168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 169 {
 170         int i;
 171         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 172                 vcpu->arch.apf.gfns[i] = ~0;
 173 }
 174
 175 static void kvm_on_user_return(struct user_return_notifier *urn)
 176 {
 177         unsigned slot;
 178         struct kvm_shared_msrs *locals
 179                 = container_of(urn, struct kvm_shared_msrs, urn);
 180         struct kvm_shared_msr_values *values;
 181
 182         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 183                 values = &locals->values[slot];
 184                 if (values->host != values->curr) {
 185                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 186                         values->curr = values->host;
 187                 }
 188         }
 189         locals->registered = false;
 190         user_return_notifier_unregister(urn);
 191 }
 192
 193 static void shared_msr_update(unsigned slot, u32 msr)
 194 {
 195         u64 value;
 196         unsigned int cpu = smp_processor_id();
 197         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 198
 199         /* only read, and nobody should modify it at this time,
 200          * so don't need lock */
 201         if (slot >= shared_msrs_global.nr) {
 202                 printk(KERN_ERR "kvm: invalid MSR slot!");
 203                 return;
 204         }
 205         rdmsrl_safe(msr, &value);
 206         smsr->values[slot].host = value;
 207         smsr->values[slot].curr = value;
 208 }
 209
 210 void kvm_define_shared_msr(unsigned slot, u32 msr)
 211 {
 212         if (slot >= shared_msrs_global.nr)
 213                 shared_msrs_global.nr = slot + 1;
 214         shared_msrs_global.msrs[slot] = msr;
 215         /* we need ensured the shared_msr_global have been updated */
 216         smp_wmb();
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 219
 220 static void kvm_shared_msr_cpu_online(void)
 221 {
 222         unsigned i;
 223
 224         for (i = 0; i < shared_msrs_global.nr; ++i)
 225                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 226 }
 227
 228 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 229 {
 230         unsigned int cpu = smp_processor_id();
 231         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 232         int err;
 233
 234         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 235                 return 0;
 236         smsr->values[slot].curr = value;
 237         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 238         if (err)
 239                 return 1;
 240
 241         if (!smsr->registered) {
 242                 smsr->urn.on_user_return = kvm_on_user_return;
 243                 user_return_notifier_register(&smsr->urn);
 244                 smsr->registered = true;
 245         }
 246         return 0;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 249
 250 static void drop_user_return_notifiers(void *ignore)
 251 {
 252         unsigned int cpu = smp_processor_id();
 253         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 254
 255         if (smsr->registered)
 256                 kvm_on_user_return(&smsr->urn);
 257 }
 258
 259 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 260 {
 261         return vcpu->arch.apic_base;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 264
 265 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 266 {
 267         /* TODO: reserve bits check */
 268         kvm_lapic_set_base(vcpu, data);
 269 }
 270 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 271
 272 asmlinkage void kvm_spurious_fault(void)
 273 {
 274         /* Fault while not rebooting.  We want the trace. */
 275         BUG();
 276 }
 277 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 278
 279 #define EXCPT_BENIGN            0
 280 #define EXCPT_CONTRIBUTORY      1
 281 #define EXCPT_PF                2
 282
 283 static int exception_class(int vector)
 284 {
 285         switch (vector) {
 286         case PF_VECTOR:
 287                 return EXCPT_PF;
 288         case DE_VECTOR:
 289         case TS_VECTOR:
 290         case NP_VECTOR:
 291         case SS_VECTOR:
 292         case GP_VECTOR:
 293                 return EXCPT_CONTRIBUTORY;
 294         default:
 295                 break;
 296         }
 297         return EXCPT_BENIGN;
 298 }
 299
 300 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 301                 unsigned nr, bool has_error, u32 error_code,
 302                 bool reinject)
 303 {
 304         u32 prev_nr;
 305         int class1, class2;
 306
 307         kvm_make_request(KVM_REQ_EVENT, vcpu);
 308
 309         if (!vcpu->arch.exception.pending) {
 310         queue:
 311                 vcpu->arch.exception.pending = true;
 312                 vcpu->arch.exception.has_error_code = has_error;
 313                 vcpu->arch.exception.nr = nr;
 314                 vcpu->arch.exception.error_code = error_code;
 315                 vcpu->arch.exception.reinject = reinject;
 316                 return;
 317         }
 318
 319         /* to check exception */
 320         prev_nr = vcpu->arch.exception.nr;
 321         if (prev_nr == DF_VECTOR) {
 322                 /* triple fault -> shutdown */
 323                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 324                 return;
 325         }
 326         class1 = exception_class(prev_nr);
 327         class2 = exception_class(nr);
 328         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 329                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 330                 /* generate double fault per SDM Table 5-5 */
 331                 vcpu->arch.exception.pending = true;
 332                 vcpu->arch.exception.has_error_code = true;
 333                 vcpu->arch.exception.nr = DF_VECTOR;
 334                 vcpu->arch.exception.error_code = 0;
 335         } else
 336                 /* replace previous exception with a new one in a hope
 337                    that instruction re-execution will regenerate lost
 338                    exception */
 339                 goto queue;
 340 }
 341
 342 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 343 {
 344         kvm_multiple_exception(vcpu, nr, false, 0, false);
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 347
 348 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 349 {
 350         kvm_multiple_exception(vcpu, nr, false, 0, true);
 351 }
 352 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 353
 354 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 355 {
 356         if (err)
 357                 kvm_inject_gp(vcpu, 0);
 358         else
 359                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 362
 363 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 364 {
 365         ++vcpu->stat.pf_guest;
 366         vcpu->arch.cr2 = fault->address;
 367         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 370
 371 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 372 {
 373         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 374                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 375         else
 376                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 377 }
 378
 379 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 380 {
 381         atomic_inc(&vcpu->arch.nmi_queued);
 382         kvm_make_request(KVM_REQ_NMI, vcpu);
 383 }
 384 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 385
 386 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 387 {
 388         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 391
 392 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 393 {
 394         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 395 }
 396 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 397
 398 /*
 399  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 400  * a #GP and return false.
 401  */
 402 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 403 {
 404         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 405                 return true;
 406         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 407         return false;
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 410
 411 /*
 412  * This function will be used to read from the physical memory of the currently
 413  * running guest. The difference to kvm_read_guest_page is that this function
 414  * can read from guest physical or from the guest's guest physical memory.
 415  */
 416 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 417                             gfn_t ngfn, void *data, int offset, int len,
 418                             u32 access)
 419 {
 420         gfn_t real_gfn;
 421         gpa_t ngpa;
 422
 423         ngpa     = gfn_to_gpa(ngfn);
 424         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 425         if (real_gfn == UNMAPPED_GVA)
 426                 return -EFAULT;
 427
 428         real_gfn = gpa_to_gfn(real_gfn);
 429
 430         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 433
 434 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 435                                void *data, int offset, int len, u32 access)
 436 {
 437         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 438                                        data, offset, len, access);
 439 }
 440
 441 /*
 442  * Load the pae pdptrs.  Return true is they are all valid.
 443  */
 444 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 445 {
 446         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 447         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 448         int i;
 449         int ret;
 450         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 451
 452         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 453                                       offset * sizeof(u64), sizeof(pdpte),
 454                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 455         if (ret < 0) {
 456                 ret = 0;
 457                 goto out;
 458         }
 459         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 460                 if (is_present_gpte(pdpte[i]) &&
 461                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 462                         ret = 0;
 463                         goto out;
 464                 }
 465         }
 466         ret = 1;
 467
 468         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 469         __set_bit(VCPU_EXREG_PDPTR,
 470                   (unsigned long *)&vcpu->arch.regs_avail);
 471         __set_bit(VCPU_EXREG_PDPTR,
 472                   (unsigned long *)&vcpu->arch.regs_dirty);
 473 out:
 474
 475         return ret;
 476 }
 477 EXPORT_SYMBOL_GPL(load_pdptrs);
 478
 479 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 480 {
 481         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 482         bool changed = true;
 483         int offset;
 484         gfn_t gfn;
 485         int r;
 486
 487         if (is_long_mode(vcpu) || !is_pae(vcpu))
 488                 return false;
 489
 490         if (!test_bit(VCPU_EXREG_PDPTR,
 491                       (unsigned long *)&vcpu->arch.regs_avail))
 492                 return true;
 493
 494         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 495         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 496         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 497                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 498         if (r < 0)
 499                 goto out;
 500         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 501 out:
 502
 503         return changed;
 504 }
 505
 506 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 507 {
 508         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 509         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 510                                     X86_CR0_CD | X86_CR0_NW;
 511
 512         cr0 |= X86_CR0_ET;
 513
 514 #ifdef CONFIG_X86_64
 515         if (cr0 & 0xffffffff00000000UL)
 516                 return 1;
 517 #endif
 518
 519         cr0 &= ~CR0_RESERVED_BITS;
 520
 521         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 522                 return 1;
 523
 524         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 525                 return 1;
 526
 527         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 528 #ifdef CONFIG_X86_64
 529                 if ((vcpu->arch.efer & EFER_LME)) {
 530                         int cs_db, cs_l;
 531
 532                         if (!is_pae(vcpu))
 533                                 return 1;
 534                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 535                         if (cs_l)
 536                                 return 1;
 537                 } else
 538 #endif
 539                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 540                                                  kvm_read_cr3(vcpu)))
 541                         return 1;
 542         }
 543
 544         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 545                 return 1;
 546
 547         kvm_x86_ops->set_cr0(vcpu, cr0);
 548
 549         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 550                 kvm_clear_async_pf_completion_queue(vcpu);
 551                 kvm_async_pf_hash_reset(vcpu);
 552         }
 553
 554         if ((cr0 ^ old_cr0) & update_bits)
 555                 kvm_mmu_reset_context(vcpu);
 556         return 0;
 557 }
 558 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 559
 560 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 561 {
 562         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_lmsw);
 565
 566 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 567 {
 568         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 569                         !vcpu->guest_xcr0_loaded) {
 570                 /* kvm_set_xcr() also depends on this */
 571                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 572                 vcpu->guest_xcr0_loaded = 1;
 573         }
 574 }
 575
 576 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 577 {
 578         if (vcpu->guest_xcr0_loaded) {
 579                 if (vcpu->arch.xcr0 != host_xcr0)
 580                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 581                 vcpu->guest_xcr0_loaded = 0;
 582         }
 583 }
 584
 585 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 586 {
 587         u64 xcr0;
 588
 589         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 590         if (index != XCR_XFEATURE_ENABLED_MASK)
 591                 return 1;
 592         xcr0 = xcr;
 593         if (!(xcr0 & XSTATE_FP))
 594                 return 1;
 595         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 596                 return 1;
 597         if (xcr0 & ~host_xcr0)
 598                 return 1;
 599         kvm_put_guest_xcr0(vcpu);
 600         vcpu->arch.xcr0 = xcr0;
 601         return 0;
 602 }
 603
 604 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 605 {
 606         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 607             __kvm_set_xcr(vcpu, index, xcr)) {
 608                 kvm_inject_gp(vcpu, 0);
 609                 return 1;
 610         }
 611         return 0;
 612 }
 613 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 614
 615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 616 {
 617         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 618         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 619                                    X86_CR4_PAE | X86_CR4_SMEP;
 620         if (cr4 & CR4_RESERVED_BITS)
 621                 return 1;
 622
 623         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 624                 return 1;
 625
 626         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 627                 return 1;
 628
 629         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 630                 return 1;
 631
 632         if (is_long_mode(vcpu)) {
 633                 if (!(cr4 & X86_CR4_PAE))
 634                         return 1;
 635         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 636                    && ((cr4 ^ old_cr4) & pdptr_bits)
 637                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 638                                    kvm_read_cr3(vcpu)))
 639                 return 1;
 640
 641         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 642                 if (!guest_cpuid_has_pcid(vcpu))
 643                         return 1;
 644
 645                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 646                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 647                         return 1;
 648         }
 649
 650         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 651                 return 1;
 652
 653         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 654             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 655                 kvm_mmu_reset_context(vcpu);
 656
 657         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 658                 kvm_update_cpuid(vcpu);
 659
 660         return 0;
 661 }
 662 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 663
 664 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 665 {
 666         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 667                 kvm_mmu_sync_roots(vcpu);
 668                 kvm_mmu_flush_tlb(vcpu);
 669                 return 0;
 670         }
 671
 672         if (is_long_mode(vcpu)) {
 673                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 674                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 675                                 return 1;
 676                 } else
 677                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 678                                 return 1;
 679         } else {
 680                 if (is_pae(vcpu)) {
 681                         if (cr3 & CR3_PAE_RESERVED_BITS)
 682                                 return 1;
 683                         if (is_paging(vcpu) &&
 684                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 685                                 return 1;
 686                 }
 687                 /*
 688                  * We don't check reserved bits in nonpae mode, because
 689                  * this isn't enforced, and VMware depends on this.
 690                  */
 691         }
 692
 693         /*
 694          * Does the new cr3 value map to physical memory? (Note, we
 695          * catch an invalid cr3 even in real-mode, because it would
 696          * cause trouble later on when we turn on paging anyway.)
 697          *
 698          * A real CPU would silently accept an invalid cr3 and would
 699          * attempt to use it - with largely undefined (and often hard
 700          * to debug) behavior on the guest side.
 701          */
 702         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 703                 return 1;
 704         vcpu->arch.cr3 = cr3;
 705         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 706         vcpu->arch.mmu.new_cr3(vcpu);
 707         return 0;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 710
 711 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 712 {
 713         if (cr8 & CR8_RESERVED_BITS)
 714                 return 1;
 715         if (irqchip_in_kernel(vcpu->kvm))
 716                 kvm_lapic_set_tpr(vcpu, cr8);
 717         else
 718                 vcpu->arch.cr8 = cr8;
 719         return 0;
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 722
 723 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 724 {
 725         if (irqchip_in_kernel(vcpu->kvm))
 726                 return kvm_lapic_get_cr8(vcpu);
 727         else
 728                 return vcpu->arch.cr8;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 731
 732 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 733 {
 734         unsigned long dr7;
 735
 736         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 737                 dr7 = vcpu->arch.guest_debug_dr7;
 738         else
 739                 dr7 = vcpu->arch.dr7;
 740         kvm_x86_ops->set_dr7(vcpu, dr7);
 741         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 742 }
 743
 744 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 745 {
 746         switch (dr) {
 747         case 0 ... 3:
 748                 vcpu->arch.db[dr] = val;
 749                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 750                         vcpu->arch.eff_db[dr] = val;
 751                 break;
 752         case 4:
 753                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 754                         return 1; /* #UD */
 755                 /* fall through */
 756         case 6:
 757                 if (val & 0xffffffff00000000ULL)
 758                         return -1; /* #GP */
 759                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 760                 break;
 761         case 5:
 762                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 763                         return 1; /* #UD */
 764                 /* fall through */
 765         default: /* 7 */
 766                 if (val & 0xffffffff00000000ULL)
 767                         return -1; /* #GP */
 768                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 769                 kvm_update_dr7(vcpu);
 770                 break;
 771         }
 772
 773         return 0;
 774 }
 775
 776 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 777 {
 778         int res;
 779
 780         res = __kvm_set_dr(vcpu, dr, val);
 781         if (res > 0)
 782                 kvm_queue_exception(vcpu, UD_VECTOR);
 783         else if (res < 0)
 784                 kvm_inject_gp(vcpu, 0);
 785
 786         return res;
 787 }
 788 EXPORT_SYMBOL_GPL(kvm_set_dr);
 789
 790 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 791 {
 792         switch (dr) {
 793         case 0 ... 3:
 794                 *val = vcpu->arch.db[dr];
 795                 break;
 796         case 4:
 797                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 798                         return 1;
 799                 /* fall through */
 800         case 6:
 801                 *val = vcpu->arch.dr6;
 802                 break;
 803         case 5:
 804                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 805                         return 1;
 806                 /* fall through */
 807         default: /* 7 */
 808                 *val = vcpu->arch.dr7;
 809                 break;
 810         }
 811
 812         return 0;
 813 }
 814
 815 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 816 {
 817         if (_kvm_get_dr(vcpu, dr, val)) {
 818                 kvm_queue_exception(vcpu, UD_VECTOR);
 819                 return 1;
 820         }
 821         return 0;
 822 }
 823 EXPORT_SYMBOL_GPL(kvm_get_dr);
 824
 825 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 826 {
 827         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 828         u64 data;
 829         int err;
 830
 831         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 832         if (err)
 833                 return err;
 834         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 835         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 836         return err;
 837 }
 838 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 839
 840 /*
 841  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 842  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 843  *
 844  * This list is modified at module load time to reflect the
 845  * capabilities of the host cpu. This capabilities test skips MSRs that are
 846  * kvm-specific. Those are put in the beginning of the list.
 847  */
 848
 849 #define KVM_SAVE_MSRS_BEGIN     10
 850 static u32 msrs_to_save[] = {
 851         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 852         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 853         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 854         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 855         MSR_KVM_PV_EOI_EN,
 856         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 857         MSR_STAR,
 858 #ifdef CONFIG_X86_64
 859         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 860 #endif
 861         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 862 };
 863
 864 static unsigned num_msrs_to_save;
 865
 866 static const u32 emulated_msrs[] = {
 867         MSR_IA32_TSC_ADJUST,
 868         MSR_IA32_TSCDEADLINE,
 869         MSR_IA32_MISC_ENABLE,
 870         MSR_IA32_MCG_STATUS,
 871         MSR_IA32_MCG_CTL,
 872 };
 873
 874 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 875 {
 876         if (efer & efer_reserved_bits)
 877                 return false;
 878
 879         if (efer & EFER_FFXSR) {
 880                 struct kvm_cpuid_entry2 *feat;
 881
 882                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 883                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 884                         return false;
 885         }
 886
 887         if (efer & EFER_SVME) {
 888                 struct kvm_cpuid_entry2 *feat;
 889
 890                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 891                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 892                         return false;
 893         }
 894
 895         return true;
 896 }
 897 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 898
 899 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 900 {
 901         u64 old_efer = vcpu->arch.efer;
 902
 903         if (!kvm_valid_efer(vcpu, efer))
 904                 return 1;
 905
 906         if (is_paging(vcpu)
 907             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 908                 return 1;
 909
 910         efer &= ~EFER_LMA;
 911         efer |= vcpu->arch.efer & EFER_LMA;
 912
 913         kvm_x86_ops->set_efer(vcpu, efer);
 914
 915         /* Update reserved bits */
 916         if ((efer ^ old_efer) & EFER_NX)
 917                 kvm_mmu_reset_context(vcpu);
 918
 919         return 0;
 920 }
 921
 922 void kvm_enable_efer_bits(u64 mask)
 923 {
 924        efer_reserved_bits &= ~mask;
 925 }
 926 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 927
 928 /*
 929  * Writes msr value into into the appropriate "register".
 930  * Returns 0 on success, non-0 otherwise.
 931  * Assumes vcpu_load() was already called.
 932  */
 933 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 934 {
 935         switch (msr->index) {
 936         case MSR_FS_BASE:
 937         case MSR_GS_BASE:
 938         case MSR_KERNEL_GS_BASE:
 939         case MSR_CSTAR:
 940         case MSR_LSTAR:
 941                 if (is_noncanonical_address(msr->data))
 942                         return 1;
 943                 break;
 944         case MSR_IA32_SYSENTER_EIP:
 945         case MSR_IA32_SYSENTER_ESP:
 946                 /*
 947                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
 948                  * non-canonical address is written on Intel but not on
 949                  * AMD (which ignores the top 32-bits, because it does
 950                  * not implement 64-bit SYSENTER).
 951                  *
 952                  * 64-bit code should hence be able to write a non-canonical
 953                  * value on AMD.  Making the address canonical ensures that
 954                  * vmentry does not fail on Intel after writing a non-canonical
 955                  * value, and that something deterministic happens if the guest
 956                  * invokes 64-bit SYSENTER.
 957                  */
 958                 msr->data = get_canonical(msr->data);
 959         }
 960         return kvm_x86_ops->set_msr(vcpu, msr);
 961 }
 962 EXPORT_SYMBOL_GPL(kvm_set_msr);
 963
 964 /*
 965  * Adapt set_msr() to msr_io()'s calling convention
 966  */
 967 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 968 {
 969         struct msr_data msr;
 970
 971         msr.data = *data;
 972         msr.index = index;
 973         msr.host_initiated = true;
 974         return kvm_set_msr(vcpu, &msr);
 975 }
 976
 977 #ifdef CONFIG_X86_64
 978 struct pvclock_gtod_data {
 979         seqcount_t      seq;
 980
 981         struct { /* extract of a clocksource struct */
 982                 int vclock_mode;
 983                 cycle_t cycle_last;
 984                 cycle_t mask;
 985                 u32     mult;
 986                 u32     shift;
 987         } clock;
 988
 989         /* open coded 'struct timespec' */
 990         u64             monotonic_time_snsec;
 991         time_t          monotonic_time_sec;
 992 };
 993
 994 static struct pvclock_gtod_data pvclock_gtod_data;
 995
 996 static void update_pvclock_gtod(struct timekeeper *tk)
 997 {
 998         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 999
1000         write_seqcount_begin(&vdata->seq);
1001
1002         /* copy pvclock gtod data */
1003         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
1004         vdata->clock.cycle_last         = tk->clock->cycle_last;
1005         vdata->clock.mask               = tk->clock->mask;
1006         vdata->clock.mult               = tk->mult;
1007         vdata->clock.shift              = tk->shift;
1008
1009         vdata->monotonic_time_sec       = tk->xtime_sec
1010                                         + tk->wall_to_monotonic.tv_sec;
1011         vdata->monotonic_time_snsec     = tk->xtime_nsec
1012                                         + (tk->wall_to_monotonic.tv_nsec
1013                                                 << tk->shift);
1014         while (vdata->monotonic_time_snsec >=
1015                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
1016                 vdata->monotonic_time_snsec -=
1017                                         ((u64)NSEC_PER_SEC) << tk->shift;
1018                 vdata->monotonic_time_sec++;
1019         }
1020
1021         write_seqcount_end(&vdata->seq);
1022 }
1023 #endif
1024
1025
1026 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1027 {
1028         int version;
1029         int r;
1030         struct pvclock_wall_clock wc;
1031         struct timespec boot;
1032
1033         if (!wall_clock)
1034                 return;
1035
1036         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1037         if (r)
1038                 return;
1039
1040         if (version & 1)
1041                 ++version;  /* first time write, random junk */
1042
1043         ++version;
1044
1045         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1046
1047         /*
1048          * The guest calculates current wall clock time by adding
1049          * system time (updated by kvm_guest_time_update below) to the
1050          * wall clock specified here.  guest system time equals host
1051          * system time for us, thus we must fill in host boot time here.
1052          */
1053         getboottime(&boot);
1054
1055         if (kvm->arch.kvmclock_offset) {
1056                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1057                 boot = timespec_sub(boot, ts);
1058         }
1059         wc.sec = boot.tv_sec;
1060         wc.nsec = boot.tv_nsec;
1061         wc.version = version;
1062
1063         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1064
1065         version++;
1066         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1067 }
1068
1069 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1070 {
1071         uint32_t quotient, remainder;
1072
1073         /* Don't try to replace with do_div(), this one calculates
1074          * "(dividend << 32) / divisor" */
1075         __asm__ ( "divl %4"
1076                   : "=a" (quotient), "=d" (remainder)
1077                   : "0" (0), "1" (dividend), "r" (divisor) );
1078         return quotient;
1079 }
1080
1081 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1082                                s8 *pshift, u32 *pmultiplier)
1083 {
1084         uint64_t scaled64;
1085         int32_t  shift = 0;
1086         uint64_t tps64;
1087         uint32_t tps32;
1088
1089         tps64 = base_khz * 1000LL;
1090         scaled64 = scaled_khz * 1000LL;
1091         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1092                 tps64 >>= 1;
1093                 shift--;
1094         }
1095
1096         tps32 = (uint32_t)tps64;
1097         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1098                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1099                         scaled64 >>= 1;
1100                 else
1101                         tps32 <<= 1;
1102                 shift++;
1103         }
1104
1105         *pshift = shift;
1106         *pmultiplier = div_frac(scaled64, tps32);
1107
1108         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1109                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1110 }
1111
1112 static inline u64 get_kernel_ns(void)
1113 {
1114         struct timespec ts;
1115
1116         WARN_ON(preemptible());
1117         ktime_get_ts(&ts);
1118         monotonic_to_bootbased(&ts);
1119         return timespec_to_ns(&ts);
1120 }
1121
1122 #ifdef CONFIG_X86_64
1123 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1124 #endif
1125
1126 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1127 unsigned long max_tsc_khz;
1128
1129 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1130 {
1131         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1132                                    vcpu->arch.virtual_tsc_shift);
1133 }
1134
1135 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1136 {
1137         u64 v = (u64)khz * (1000000 + ppm);
1138         do_div(v, 1000000);
1139         return v;
1140 }
1141
1142 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1143 {
1144         u32 thresh_lo, thresh_hi;
1145         int use_scaling = 0;
1146
1147         /* tsc_khz can be zero if TSC calibration fails */
1148         if (this_tsc_khz == 0)
1149                 return;
1150
1151         /* Compute a scale to convert nanoseconds in TSC cycles */
1152         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1153                            &vcpu->arch.virtual_tsc_shift,
1154                            &vcpu->arch.virtual_tsc_mult);
1155         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1156
1157         /*
1158          * Compute the variation in TSC rate which is acceptable
1159          * within the range of tolerance and decide if the
1160          * rate being applied is within that bounds of the hardware
1161          * rate.  If so, no scaling or compensation need be done.
1162          */
1163         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1164         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1165         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1166                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1167                 use_scaling = 1;
1168         }
1169         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1170 }
1171
1172 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1173 {
1174         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1175                                       vcpu->arch.virtual_tsc_mult,
1176                                       vcpu->arch.virtual_tsc_shift);
1177         tsc += vcpu->arch.this_tsc_write;
1178         return tsc;
1179 }
1180
1181 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1182 {
1183 #ifdef CONFIG_X86_64
1184         bool vcpus_matched;
1185         bool do_request = false;
1186         struct kvm_arch *ka = &vcpu->kvm->arch;
1187         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1188
1189         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1190                          atomic_read(&vcpu->kvm->online_vcpus));
1191
1192         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1193                 if (!ka->use_master_clock)
1194                         do_request = 1;
1195
1196         if (!vcpus_matched && ka->use_master_clock)
1197                         do_request = 1;
1198
1199         if (do_request)
1200                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1201
1202         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1203                             atomic_read(&vcpu->kvm->online_vcpus),
1204                             ka->use_master_clock, gtod->clock.vclock_mode);
1205 #endif
1206 }
1207
1208 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1209 {
1210         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1211         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1212 }
1213
1214 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1215 {
1216         struct kvm *kvm = vcpu->kvm;
1217         u64 offset, ns, elapsed;
1218         unsigned long flags;
1219         s64 usdiff;
1220         bool matched;
1221         u64 data = msr->data;
1222
1223         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1224         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1225         ns = get_kernel_ns();
1226         elapsed = ns - kvm->arch.last_tsc_nsec;
1227
1228         if (vcpu->arch.virtual_tsc_khz) {
1229                 int faulted = 0;
1230
1231                 /* n.b - signed multiplication and division required */
1232                 usdiff = data - kvm->arch.last_tsc_write;
1233 #ifdef CONFIG_X86_64
1234                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1235 #else
1236                 /* do_div() only does unsigned */
1237                 asm("1: idivl %[divisor]\n"
1238                     "2: xor %%edx, %%edx\n"
1239                     "   movl $0, %[faulted]\n"
1240                     "3:\n"
1241                     ".section .fixup,\"ax\"\n"
1242                     "4: movl $1, %[faulted]\n"
1243                     "   jmp  3b\n"
1244                     ".previous\n"
1245
1246                 _ASM_EXTABLE(1b, 4b)
1247
1248                 : "=A"(usdiff), [faulted] "=r" (faulted)
1249                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1250
1251 #endif
1252                 do_div(elapsed, 1000);
1253                 usdiff -= elapsed;
1254                 if (usdiff < 0)
1255                         usdiff = -usdiff;
1256
1257                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1258                 if (faulted)
1259                         usdiff = USEC_PER_SEC;
1260         } else
1261                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1262
1263         /*
1264          * Special case: TSC write with a small delta (1 second) of virtual
1265          * cycle time against real time is interpreted as an attempt to
1266          * synchronize the CPU.
1267          *
1268          * For a reliable TSC, we can match TSC offsets, and for an unstable
1269          * TSC, we add elapsed time in this computation.  We could let the
1270          * compensation code attempt to catch up if we fall behind, but
1271          * it's better to try to match offsets from the beginning.
1272          */
1273         if (usdiff < USEC_PER_SEC &&
1274             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1275                 if (!check_tsc_unstable()) {
1276                         offset = kvm->arch.cur_tsc_offset;
1277                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1278                 } else {
1279                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1280                         data += delta;
1281                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1282                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1283                 }
1284                 matched = true;
1285         } else {
1286                 /*
1287                  * We split periods of matched TSC writes into generations.
1288                  * For each generation, we track the original measured
1289                  * nanosecond time, offset, and write, so if TSCs are in
1290                  * sync, we can match exact offset, and if not, we can match
1291                  * exact software computation in compute_guest_tsc()
1292                  *
1293                  * These values are tracked in kvm->arch.cur_xxx variables.
1294                  */
1295                 kvm->arch.cur_tsc_generation++;
1296                 kvm->arch.cur_tsc_nsec = ns;
1297                 kvm->arch.cur_tsc_write = data;
1298                 kvm->arch.cur_tsc_offset = offset;
1299                 matched = false;
1300                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1301                          kvm->arch.cur_tsc_generation, data);
1302         }
1303
1304         /*
1305          * We also track th most recent recorded KHZ, write and time to
1306          * allow the matching interval to be extended at each write.
1307          */
1308         kvm->arch.last_tsc_nsec = ns;
1309         kvm->arch.last_tsc_write = data;
1310         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1311
1312         /* Reset of TSC must disable overshoot protection below */
1313         vcpu->arch.hv_clock.tsc_timestamp = 0;
1314         vcpu->arch.last_guest_tsc = data;
1315
1316         /* Keep track of which generation this VCPU has synchronized to */
1317         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1318         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1319         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1320
1321         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1322                 update_ia32_tsc_adjust_msr(vcpu, offset);
1323         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1324         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1325
1326         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1327         if (matched)
1328                 kvm->arch.nr_vcpus_matched_tsc++;
1329         else
1330                 kvm->arch.nr_vcpus_matched_tsc = 0;
1331
1332         kvm_track_tsc_matching(vcpu);
1333         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1334 }
1335
1336 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1337
1338 #ifdef CONFIG_X86_64
1339
1340 static cycle_t read_tsc(void)
1341 {
1342         cycle_t ret;
1343         u64 last;
1344
1345         /*
1346          * Empirically, a fence (of type that depends on the CPU)
1347          * before rdtsc is enough to ensure that rdtsc is ordered
1348          * with respect to loads.  The various CPU manuals are unclear
1349          * as to whether rdtsc can be reordered with later loads,
1350          * but no one has ever seen it happen.
1351          */
1352         rdtsc_barrier();
1353         ret = (cycle_t)vget_cycles();
1354
1355         last = pvclock_gtod_data.clock.cycle_last;
1356
1357         if (likely(ret >= last))
1358                 return ret;
1359
1360         /*
1361          * GCC likes to generate cmov here, but this branch is extremely
1362          * predictable (it's just a funciton of time and the likely is
1363          * very likely) and there's a data dependence, so force GCC
1364          * to generate a branch instead.  I don't barrier() because
1365          * we don't actually need a barrier, and if this function
1366          * ever gets inlined it will generate worse code.
1367          */
1368         asm volatile ("");
1369         return last;
1370 }
1371
1372 static inline u64 vgettsc(cycle_t *cycle_now)
1373 {
1374         long v;
1375         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1376
1377         *cycle_now = read_tsc();
1378
1379         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1380         return v * gtod->clock.mult;
1381 }
1382
1383 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1384 {
1385         unsigned long seq;
1386         u64 ns;
1387         int mode;
1388         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1389
1390         ts->tv_nsec = 0;
1391         do {
1392                 seq = read_seqcount_begin(&gtod->seq);
1393                 mode = gtod->clock.vclock_mode;
1394                 ts->tv_sec = gtod->monotonic_time_sec;
1395                 ns = gtod->monotonic_time_snsec;
1396                 ns += vgettsc(cycle_now);
1397                 ns >>= gtod->clock.shift;
1398         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1399         timespec_add_ns(ts, ns);
1400
1401         return mode;
1402 }
1403
1404 /* returns true if host is using tsc clocksource */
1405 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1406 {
1407         struct timespec ts;
1408
1409         /* checked again under seqlock below */
1410         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1411                 return false;
1412
1413         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1414                 return false;
1415
1416         monotonic_to_bootbased(&ts);
1417         *kernel_ns = timespec_to_ns(&ts);
1418
1419         return true;
1420 }
1421 #endif
1422
1423 /*
1424  *
1425  * Assuming a stable TSC across physical CPUS, and a stable TSC
1426  * across virtual CPUs, the following condition is possible.
1427  * Each numbered line represents an event visible to both
1428  * CPUs at the next numbered event.
1429  *
1430  * "timespecX" represents host monotonic time. "tscX" represents
1431  * RDTSC value.
1432  *
1433  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1434  *
1435  * 1.  read timespec0,tsc0
1436  * 2.                                   | timespec1 = timespec0 + N
1437  *                                      | tsc1 = tsc0 + M
1438  * 3. transition to guest               | transition to guest
1439  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1440  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1441  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1442  *
1443  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1444  *
1445  *      - ret0 < ret1
1446  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1447  *              ...
1448  *      - 0 < N - M => M < N
1449  *
1450  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1451  * always the case (the difference between two distinct xtime instances
1452  * might be smaller then the difference between corresponding TSC reads,
1453  * when updating guest vcpus pvclock areas).
1454  *
1455  * To avoid that problem, do not allow visibility of distinct
1456  * system_timestamp/tsc_timestamp values simultaneously: use a master
1457  * copy of host monotonic time values. Update that master copy
1458  * in lockstep.
1459  *
1460  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1461  *
1462  */
1463
1464 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1465 {
1466 #ifdef CONFIG_X86_64
1467         struct kvm_arch *ka = &kvm->arch;
1468         int vclock_mode;
1469         bool host_tsc_clocksource, vcpus_matched;
1470
1471         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1472                         atomic_read(&kvm->online_vcpus));
1473
1474         /*
1475          * If the host uses TSC clock, then passthrough TSC as stable
1476          * to the guest.
1477          */
1478         host_tsc_clocksource = kvm_get_time_and_clockread(
1479                                         &ka->master_kernel_ns,
1480                                         &ka->master_cycle_now);
1481
1482         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1483
1484         if (ka->use_master_clock)
1485                 atomic_set(&kvm_guest_has_master_clock, 1);
1486
1487         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1488         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1489                                         vcpus_matched);
1490 #endif
1491 }
1492
1493 static int kvm_guest_time_update(struct kvm_vcpu *v)
1494 {
1495         unsigned long flags, this_tsc_khz;
1496         struct kvm_vcpu_arch *vcpu = &v->arch;
1497         struct kvm_arch *ka = &v->kvm->arch;
1498         s64 kernel_ns, max_kernel_ns;
1499         u64 tsc_timestamp, host_tsc;
1500         struct pvclock_vcpu_time_info guest_hv_clock;
1501         u8 pvclock_flags;
1502         bool use_master_clock;
1503
1504         kernel_ns = 0;
1505         host_tsc = 0;
1506
1507         /*
1508          * If the host uses TSC clock, then passthrough TSC as stable
1509          * to the guest.
1510          */
1511         spin_lock(&ka->pvclock_gtod_sync_lock);
1512         use_master_clock = ka->use_master_clock;
1513         if (use_master_clock) {
1514                 host_tsc = ka->master_cycle_now;
1515                 kernel_ns = ka->master_kernel_ns;
1516         }
1517         spin_unlock(&ka->pvclock_gtod_sync_lock);
1518
1519         /* Keep irq disabled to prevent changes to the clock */
1520         local_irq_save(flags);
1521         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1522         if (unlikely(this_tsc_khz == 0)) {
1523                 local_irq_restore(flags);
1524                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1525                 return 1;
1526         }
1527         if (!use_master_clock) {
1528                 host_tsc = native_read_tsc();
1529                 kernel_ns = get_kernel_ns();
1530         }
1531
1532         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1533
1534         /*
1535          * We may have to catch up the TSC to match elapsed wall clock
1536          * time for two reasons, even if kvmclock is used.
1537          *   1) CPU could have been running below the maximum TSC rate
1538          *   2) Broken TSC compensation resets the base at each VCPU
1539          *      entry to avoid unknown leaps of TSC even when running
1540          *      again on the same CPU.  This may cause apparent elapsed
1541          *      time to disappear, and the guest to stand still or run
1542          *      very slowly.
1543          */
1544         if (vcpu->tsc_catchup) {
1545                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1546                 if (tsc > tsc_timestamp) {
1547                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1548                         tsc_timestamp = tsc;
1549                 }
1550         }
1551
1552         local_irq_restore(flags);
1553
1554         if (!vcpu->pv_time_enabled)
1555                 return 0;
1556
1557         /*
1558          * Time as measured by the TSC may go backwards when resetting the base
1559          * tsc_timestamp.  The reason for this is that the TSC resolution is
1560          * higher than the resolution of the other clock scales.  Thus, many
1561          * possible measurments of the TSC correspond to one measurement of any
1562          * other clock, and so a spread of values is possible.  This is not a
1563          * problem for the computation of the nanosecond clock; with TSC rates
1564          * around 1GHZ, there can only be a few cycles which correspond to one
1565          * nanosecond value, and any path through this code will inevitably
1566          * take longer than that.  However, with the kernel_ns value itself,
1567          * the precision may be much lower, down to HZ granularity.  If the
1568          * first sampling of TSC against kernel_ns ends in the low part of the
1569          * range, and the second in the high end of the range, we can get:
1570          *
1571          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1572          *
1573          * As the sampling errors potentially range in the thousands of cycles,
1574          * it is possible such a time value has already been observed by the
1575          * guest.  To protect against this, we must compute the system time as
1576          * observed by the guest and ensure the new system time is greater.
1577          */
1578         max_kernel_ns = 0;
1579         if (vcpu->hv_clock.tsc_timestamp) {
1580                 max_kernel_ns = vcpu->last_guest_tsc -
1581                                 vcpu->hv_clock.tsc_timestamp;
1582                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1583                                     vcpu->hv_clock.tsc_to_system_mul,
1584                                     vcpu->hv_clock.tsc_shift);
1585                 max_kernel_ns += vcpu->last_kernel_ns;
1586         }
1587
1588         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1589                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1590                                    &vcpu->hv_clock.tsc_shift,
1591                                    &vcpu->hv_clock.tsc_to_system_mul);
1592                 vcpu->hw_tsc_khz = this_tsc_khz;
1593         }
1594
1595         /* with a master <monotonic time, tsc value> tuple,
1596          * pvclock clock reads always increase at the (scaled) rate
1597          * of guest TSC - no need to deal with sampling errors.
1598          */
1599         if (!use_master_clock) {
1600                 if (max_kernel_ns > kernel_ns)
1601                         kernel_ns = max_kernel_ns;
1602         }
1603         /* With all the info we got, fill in the values */
1604         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1605         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1606         vcpu->last_kernel_ns = kernel_ns;
1607         vcpu->last_guest_tsc = tsc_timestamp;
1608
1609         /*
1610          * The interface expects us to write an even number signaling that the
1611          * update is finished. Since the guest won't see the intermediate
1612          * state, we just increase by 2 at the end.
1613          */
1614         vcpu->hv_clock.version += 2;
1615
1616         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1617                 &guest_hv_clock, sizeof(guest_hv_clock))))
1618                 return 0;
1619
1620         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1621         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1622
1623         if (vcpu->pvclock_set_guest_stopped_request) {
1624                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1625                 vcpu->pvclock_set_guest_stopped_request = false;
1626         }
1627
1628         /* If the host uses TSC clocksource, then it is stable */
1629         if (use_master_clock)
1630                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1631
1632         vcpu->hv_clock.flags = pvclock_flags;
1633
1634         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1635                                 &vcpu->hv_clock,
1636                                 sizeof(vcpu->hv_clock));
1637         return 0;
1638 }
1639
1640 static bool msr_mtrr_valid(unsigned msr)
1641 {
1642         switch (msr) {
1643         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1644         case MSR_MTRRfix64K_00000:
1645         case MSR_MTRRfix16K_80000:
1646         case MSR_MTRRfix16K_A0000:
1647         case MSR_MTRRfix4K_C0000:
1648         case MSR_MTRRfix4K_C8000:
1649         case MSR_MTRRfix4K_D0000:
1650         case MSR_MTRRfix4K_D8000:
1651         case MSR_MTRRfix4K_E0000:
1652         case MSR_MTRRfix4K_E8000:
1653         case MSR_MTRRfix4K_F0000:
1654         case MSR_MTRRfix4K_F8000:
1655         case MSR_MTRRdefType:
1656         case MSR_IA32_CR_PAT:
1657                 return true;
1658         case 0x2f8:
1659                 return true;
1660         }
1661         return false;
1662 }
1663
1664 static bool valid_pat_type(unsigned t)
1665 {
1666         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1667 }
1668
1669 static bool valid_mtrr_type(unsigned t)
1670 {
1671         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1672 }
1673
1674 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1675 {
1676         int i;
1677
1678         if (!msr_mtrr_valid(msr))
1679                 return false;
1680
1681         if (msr == MSR_IA32_CR_PAT) {
1682                 for (i = 0; i < 8; i++)
1683                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1684                                 return false;
1685                 return true;
1686         } else if (msr == MSR_MTRRdefType) {
1687                 if (data & ~0xcff)
1688                         return false;
1689                 return valid_mtrr_type(data & 0xff);
1690         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1691                 for (i = 0; i < 8 ; i++)
1692                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1693                                 return false;
1694                 return true;
1695         }
1696
1697         /* variable MTRRs */
1698         return valid_mtrr_type(data & 0xff);
1699 }
1700
1701 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1702 {
1703         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1704
1705         if (!mtrr_valid(vcpu, msr, data))
1706                 return 1;
1707
1708         if (msr == MSR_MTRRdefType) {
1709                 vcpu->arch.mtrr_state.def_type = data;
1710                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1711         } else if (msr == MSR_MTRRfix64K_00000)
1712                 p[0] = data;
1713         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1714                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1715         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1716                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1717         else if (msr == MSR_IA32_CR_PAT)
1718                 vcpu->arch.pat = data;
1719         else {  /* Variable MTRRs */
1720                 int idx, is_mtrr_mask;
1721                 u64 *pt;
1722
1723                 idx = (msr - 0x200) / 2;
1724                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1725                 if (!is_mtrr_mask)
1726                         pt =
1727                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1728                 else
1729                         pt =
1730                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1731                 *pt = data;
1732         }
1733
1734         kvm_mmu_reset_context(vcpu);
1735         return 0;
1736 }
1737
1738 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1739 {
1740         u64 mcg_cap = vcpu->arch.mcg_cap;
1741         unsigned bank_num = mcg_cap & 0xff;
1742
1743         switch (msr) {
1744         case MSR_IA32_MCG_STATUS:
1745                 vcpu->arch.mcg_status = data;
1746                 break;
1747         case MSR_IA32_MCG_CTL:
1748                 if (!(mcg_cap & MCG_CTL_P))
1749                         return 1;
1750                 if (data != 0 && data != ~(u64)0)
1751                         return -1;
1752                 vcpu->arch.mcg_ctl = data;
1753                 break;
1754         default:
1755                 if (msr >= MSR_IA32_MC0_CTL &&
1756                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1757                         u32 offset = msr - MSR_IA32_MC0_CTL;
1758                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1759                          * some Linux kernels though clear bit 10 in bank 4 to
1760                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1761                          * this to avoid an uncatched #GP in the guest
1762                          */
1763                         if ((offset & 0x3) == 0 &&
1764                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1765                                 return -1;
1766                         vcpu->arch.mce_banks[offset] = data;
1767                         break;
1768                 }
1769                 return 1;
1770         }
1771         return 0;
1772 }
1773
1774 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1775 {
1776         struct kvm *kvm = vcpu->kvm;
1777         int lm = is_long_mode(vcpu);
1778         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1779                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1780         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1781                 : kvm->arch.xen_hvm_config.blob_size_32;
1782         u32 page_num = data & ~PAGE_MASK;
1783         u64 page_addr = data & PAGE_MASK;
1784         u8 *page;
1785         int r;
1786
1787         r = -E2BIG;
1788         if (page_num >= blob_size)
1789                 goto out;
1790         r = -ENOMEM;
1791         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1792         if (IS_ERR(page)) {
1793                 r = PTR_ERR(page);
1794                 goto out;
1795         }
1796         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1797                 goto out_free;
1798         r = 0;
1799 out_free:
1800         kfree(page);
1801 out:
1802         return r;
1803 }
1804
1805 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1806 {
1807         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1808 }
1809
1810 static bool kvm_hv_msr_partition_wide(u32 msr)
1811 {
1812         bool r = false;
1813         switch (msr) {
1814         case HV_X64_MSR_GUEST_OS_ID:
1815         case HV_X64_MSR_HYPERCALL:
1816                 r = true;
1817                 break;
1818         }
1819
1820         return r;
1821 }
1822
1823 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1824 {
1825         struct kvm *kvm = vcpu->kvm;
1826
1827         switch (msr) {
1828         case HV_X64_MSR_GUEST_OS_ID:
1829                 kvm->arch.hv_guest_os_id = data;
1830                 /* setting guest os id to zero disables hypercall page */
1831                 if (!kvm->arch.hv_guest_os_id)
1832                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1833                 break;
1834         case HV_X64_MSR_HYPERCALL: {
1835                 u64 gfn;
1836                 unsigned long addr;
1837                 u8 instructions[4];
1838
1839                 /* if guest os id is not set hypercall should remain disabled */
1840                 if (!kvm->arch.hv_guest_os_id)
1841                         break;
1842                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1843                         kvm->arch.hv_hypercall = data;
1844                         break;
1845                 }
1846                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1847                 addr = gfn_to_hva(kvm, gfn);
1848                 if (kvm_is_error_hva(addr))
1849                         return 1;
1850                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1851                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1852                 if (__copy_to_user((void __user *)addr, instructions, 4))
1853                         return 1;
1854                 kvm->arch.hv_hypercall = data;
1855                 break;
1856         }
1857         default:
1858                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1859                             "data 0x%llx\n", msr, data);
1860                 return 1;
1861         }
1862         return 0;
1863 }
1864
1865 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1866 {
1867         switch (msr) {
1868         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1869                 unsigned long addr;
1870
1871                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1872                         vcpu->arch.hv_vapic = data;
1873                         break;
1874                 }
1875                 addr = gfn_to_hva(vcpu->kvm, data >>
1876                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1877                 if (kvm_is_error_hva(addr))
1878                         return 1;
1879                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1880                         return 1;
1881                 vcpu->arch.hv_vapic = data;
1882                 break;
1883         }
1884         case HV_X64_MSR_EOI:
1885                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1886         case HV_X64_MSR_ICR:
1887                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1888         case HV_X64_MSR_TPR:
1889                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1890         default:
1891                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1892                             "data 0x%llx\n", msr, data);
1893                 return 1;
1894         }
1895
1896         return 0;
1897 }
1898
1899 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1900 {
1901         gpa_t gpa = data & ~0x3f;
1902
1903         /* Bits 2:5 are reserved, Should be zero */
1904         if (data & 0x3c)
1905                 return 1;
1906
1907         vcpu->arch.apf.msr_val = data;
1908
1909         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1910                 kvm_clear_async_pf_completion_queue(vcpu);
1911                 kvm_async_pf_hash_reset(vcpu);
1912                 return 0;
1913         }
1914
1915         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1916                                         sizeof(u32)))
1917                 return 1;
1918
1919         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1920         kvm_async_pf_wakeup_all(vcpu);
1921         return 0;
1922 }
1923
1924 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1925 {
1926         vcpu->arch.pv_time_enabled = false;
1927 }
1928
1929 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1930 {
1931         u64 delta;
1932
1933         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1934                 return;
1935
1936         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1937         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1938         vcpu->arch.st.accum_steal = delta;
1939 }
1940
1941 static void record_steal_time(struct kvm_vcpu *vcpu)
1942 {
1943         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1944                 return;
1945
1946         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1947                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1948                 return;
1949
1950         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1951         vcpu->arch.st.steal.version += 2;
1952         vcpu->arch.st.accum_steal = 0;
1953
1954         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1955                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1956 }
1957
1958 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1959 {
1960         bool pr = false;
1961         u32 msr = msr_info->index;
1962         u64 data = msr_info->data;
1963
1964         switch (msr) {
1965         case MSR_AMD64_NB_CFG:
1966         case MSR_IA32_UCODE_REV:
1967         case MSR_IA32_UCODE_WRITE:
1968         case MSR_VM_HSAVE_PA:
1969         case MSR_AMD64_PATCH_LOADER:
1970         case MSR_AMD64_BU_CFG2:
1971                 break;
1972
1973         case MSR_EFER:
1974                 return set_efer(vcpu, data);
1975         case MSR_K7_HWCR:
1976                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1977                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1978                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1979                 if (data != 0) {
1980                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1981                                     data);
1982                         return 1;
1983                 }
1984                 break;
1985         case MSR_FAM10H_MMIO_CONF_BASE:
1986                 if (data != 0) {
1987                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1988                                     "0x%llx\n", data);
1989                         return 1;
1990                 }
1991                 break;
1992         case MSR_IA32_DEBUGCTLMSR:
1993                 if (!data) {
1994                         /* We support the non-activated case already */
1995                         break;
1996                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1997                         /* Values other than LBR and BTF are vendor-specific,
1998                            thus reserved and should throw a #GP */
1999                         return 1;
2000                 }
2001                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2002                             __func__, data);
2003                 break;
2004         case 0x200 ... 0x2ff:
2005                 return set_msr_mtrr(vcpu, msr, data);
2006         case MSR_IA32_APICBASE:
2007                 kvm_set_apic_base(vcpu, data);
2008                 break;
2009         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2010                 return kvm_x2apic_msr_write(vcpu, msr, data);
2011         case MSR_IA32_TSCDEADLINE:
2012                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2013                 break;
2014         case MSR_IA32_TSC_ADJUST:
2015                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2016                         if (!msr_info->host_initiated) {
2017                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2018                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2019                         }
2020                         vcpu->arch.ia32_tsc_adjust_msr = data;
2021                 }
2022                 break;
2023         case MSR_IA32_MISC_ENABLE:
2024                 vcpu->arch.ia32_misc_enable_msr = data;
2025                 break;
2026         case MSR_KVM_WALL_CLOCK_NEW:
2027         case MSR_KVM_WALL_CLOCK:
2028                 vcpu->kvm->arch.wall_clock = data;
2029                 kvm_write_wall_clock(vcpu->kvm, data);
2030                 break;
2031         case MSR_KVM_SYSTEM_TIME_NEW:
2032         case MSR_KVM_SYSTEM_TIME: {
2033                 u64 gpa_offset;
2034                 kvmclock_reset(vcpu);
2035
2036                 vcpu->arch.time = data;
2037                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2038
2039                 /* we verify if the enable bit is set... */
2040                 if (!(data & 1))
2041                         break;
2042
2043                 gpa_offset = data & ~(PAGE_MASK | 1);
2044
2045                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2046                      &vcpu->arch.pv_time, data & ~1ULL,
2047                      sizeof(struct pvclock_vcpu_time_info)))
2048                         vcpu->arch.pv_time_enabled = false;
2049                 else
2050                         vcpu->arch.pv_time_enabled = true;
2051
2052                 break;
2053         }
2054         case MSR_KVM_ASYNC_PF_EN:
2055                 if (kvm_pv_enable_async_pf(vcpu, data))
2056                         return 1;
2057                 break;
2058         case MSR_KVM_STEAL_TIME:
2059
2060                 if (unlikely(!sched_info_on()))
2061                         return 1;
2062
2063                 if (data & KVM_STEAL_RESERVED_MASK)
2064                         return 1;
2065
2066                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2067                                                 data & KVM_STEAL_VALID_BITS,
2068                                                 sizeof(struct kvm_steal_time)))
2069                         return 1;
2070
2071                 vcpu->arch.st.msr_val = data;
2072
2073                 if (!(data & KVM_MSR_ENABLED))
2074                         break;
2075
2076                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2077
2078                 preempt_disable();
2079                 accumulate_steal_time(vcpu);
2080                 preempt_enable();
2081
2082                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2083
2084                 break;
2085         case MSR_KVM_PV_EOI_EN:
2086                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2087                         return 1;
2088                 break;
2089
2090         case MSR_IA32_MCG_CTL:
2091         case MSR_IA32_MCG_STATUS:
2092         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2093                 return set_msr_mce(vcpu, msr, data);
2094
2095         /* Performance counters are not protected by a CPUID bit,
2096          * so we should check all of them in the generic path for the sake of
2097          * cross vendor migration.
2098          * Writing a zero into the event select MSRs disables them,
2099          * which we perfectly emulate ;-). Any other value should be at least
2100          * reported, some guests depend on them.
2101          */
2102         case MSR_K7_EVNTSEL0:
2103         case MSR_K7_EVNTSEL1:
2104         case MSR_K7_EVNTSEL2:
2105         case MSR_K7_EVNTSEL3:
2106                 if (data != 0)
2107                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2108                                     "0x%x data 0x%llx\n", msr, data);
2109                 break;
2110         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2111          * so we ignore writes to make it happy.
2112          */
2113         case MSR_K7_PERFCTR0:
2114         case MSR_K7_PERFCTR1:
2115         case MSR_K7_PERFCTR2:
2116         case MSR_K7_PERFCTR3:
2117                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2118                             "0x%x data 0x%llx\n", msr, data);
2119                 break;
2120         case MSR_P6_PERFCTR0:
2121         case MSR_P6_PERFCTR1:
2122                 pr = true;
2123         case MSR_P6_EVNTSEL0:
2124         case MSR_P6_EVNTSEL1:
2125                 if (kvm_pmu_msr(vcpu, msr))
2126                         return kvm_pmu_set_msr(vcpu, msr_info);
2127
2128                 if (pr || data != 0)
2129                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2130                                     "0x%x data 0x%llx\n", msr, data);
2131                 break;
2132         case MSR_K7_CLK_CTL:
2133                 /*
2134                  * Ignore all writes to this no longer documented MSR.
2135                  * Writes are only relevant for old K7 processors,
2136                  * all pre-dating SVM, but a recommended workaround from
2137                  * AMD for these chips. It is possible to specify the
2138                  * affected processor models on the command line, hence
2139                  * the need to ignore the workaround.
2140                  */
2141                 break;
2142         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2143                 if (kvm_hv_msr_partition_wide(msr)) {
2144                         int r;
2145                         mutex_lock(&vcpu->kvm->lock);
2146                         r = set_msr_hyperv_pw(vcpu, msr, data);
2147                         mutex_unlock(&vcpu->kvm->lock);
2148                         return r;
2149                 } else
2150                         return set_msr_hyperv(vcpu, msr, data);
2151                 break;
2152         case MSR_IA32_BBL_CR_CTL3:
2153                 /* Drop writes to this legacy MSR -- see rdmsr
2154                  * counterpart for further detail.
2155                  */
2156                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2157                 break;
2158         case MSR_AMD64_OSVW_ID_LENGTH:
2159                 if (!guest_cpuid_has_osvw(vcpu))
2160                         return 1;
2161                 vcpu->arch.osvw.length = data;
2162                 break;
2163         case MSR_AMD64_OSVW_STATUS:
2164                 if (!guest_cpuid_has_osvw(vcpu))
2165                         return 1;
2166                 vcpu->arch.osvw.status = data;
2167                 break;
2168         default:
2169                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2170                         return xen_hvm_config(vcpu, data);
2171                 if (kvm_pmu_msr(vcpu, msr))
2172                         return kvm_pmu_set_msr(vcpu, msr_info);
2173                 if (!ignore_msrs) {
2174                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2175                                     msr, data);
2176                         return 1;
2177                 } else {
2178                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2179                                     msr, data);
2180                         break;
2181                 }
2182         }
2183         return 0;
2184 }
2185 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2186
2187
2188 /*
2189  * Reads an msr value (of 'msr_index') into 'pdata'.
2190  * Returns 0 on success, non-0 otherwise.
2191  * Assumes vcpu_load() was already called.
2192  */
2193 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2194 {
2195         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2196 }
2197
2198 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2199 {
2200         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2201
2202         if (!msr_mtrr_valid(msr))
2203                 return 1;
2204
2205         if (msr == MSR_MTRRdefType)
2206                 *pdata = vcpu->arch.mtrr_state.def_type +
2207                          (vcpu->arch.mtrr_state.enabled << 10);
2208         else if (msr == MSR_MTRRfix64K_00000)
2209                 *pdata = p[0];
2210         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2211                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2212         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2213                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2214         else if (msr == MSR_IA32_CR_PAT)
2215                 *pdata = vcpu->arch.pat;
2216         else {  /* Variable MTRRs */
2217                 int idx, is_mtrr_mask;
2218                 u64 *pt;
2219
2220                 idx = (msr - 0x200) / 2;
2221                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2222                 if (!is_mtrr_mask)
2223                         pt =
2224                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2225                 else
2226                         pt =
2227                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2228                 *pdata = *pt;
2229         }
2230
2231         return 0;
2232 }
2233
2234 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2235 {
2236         u64 data;
2237         u64 mcg_cap = vcpu->arch.mcg_cap;
2238         unsigned bank_num = mcg_cap & 0xff;
2239
2240         switch (msr) {
2241         case MSR_IA32_P5_MC_ADDR:
2242         case MSR_IA32_P5_MC_TYPE:
2243                 data = 0;
2244                 break;
2245         case MSR_IA32_MCG_CAP:
2246                 data = vcpu->arch.mcg_cap;
2247                 break;
2248         case MSR_IA32_MCG_CTL:
2249                 if (!(mcg_cap & MCG_CTL_P))
2250                         return 1;
2251                 data = vcpu->arch.mcg_ctl;
2252                 break;
2253         case MSR_IA32_MCG_STATUS:
2254                 data = vcpu->arch.mcg_status;
2255                 break;
2256         default:
2257                 if (msr >= MSR_IA32_MC0_CTL &&
2258                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2259                         u32 offset = msr - MSR_IA32_MC0_CTL;
2260                         data = vcpu->arch.mce_banks[offset];
2261                         break;
2262                 }
2263                 return 1;
2264         }
2265         *pdata = data;
2266         return 0;
2267 }
2268
2269 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2270 {
2271         u64 data = 0;
2272         struct kvm *kvm = vcpu->kvm;
2273
2274         switch (msr) {
2275         case HV_X64_MSR_GUEST_OS_ID:
2276                 data = kvm->arch.hv_guest_os_id;
2277                 break;
2278         case HV_X64_MSR_HYPERCALL:
2279                 data = kvm->arch.hv_hypercall;
2280                 break;
2281         default:
2282                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2283                 return 1;
2284         }
2285
2286         *pdata = data;
2287         return 0;
2288 }
2289
2290 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2291 {
2292         u64 data = 0;
2293
2294         switch (msr) {
2295         case HV_X64_MSR_VP_INDEX: {
2296                 int r;
2297                 struct kvm_vcpu *v;
2298                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2299                         if (v == vcpu)
2300                                 data = r;
2301                 break;
2302         }
2303         case HV_X64_MSR_EOI:
2304                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2305         case HV_X64_MSR_ICR:
2306                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2307         case HV_X64_MSR_TPR:
2308                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2309         case HV_X64_MSR_APIC_ASSIST_PAGE:
2310                 data = vcpu->arch.hv_vapic;
2311                 break;
2312         default:
2313                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2314                 return 1;
2315         }
2316         *pdata = data;
2317         return 0;
2318 }
2319
2320 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2321 {
2322         u64 data;
2323
2324         switch (msr) {
2325         case MSR_IA32_PLATFORM_ID:
2326         case MSR_IA32_EBL_CR_POWERON:
2327         case MSR_IA32_DEBUGCTLMSR:
2328         case MSR_IA32_LASTBRANCHFROMIP:
2329         case MSR_IA32_LASTBRANCHTOIP:
2330         case MSR_IA32_LASTINTFROMIP:
2331         case MSR_IA32_LASTINTTOIP:
2332         case MSR_K8_SYSCFG:
2333         case MSR_K7_HWCR:
2334         case MSR_VM_HSAVE_PA:
2335         case MSR_K7_EVNTSEL0:
2336         case MSR_K7_PERFCTR0:
2337         case MSR_K8_INT_PENDING_MSG:
2338         case MSR_AMD64_NB_CFG:
2339         case MSR_FAM10H_MMIO_CONF_BASE:
2340         case MSR_AMD64_BU_CFG2:
2341                 data = 0;
2342                 break;
2343         case MSR_P6_PERFCTR0:
2344         case MSR_P6_PERFCTR1:
2345         case MSR_P6_EVNTSEL0:
2346         case MSR_P6_EVNTSEL1:
2347                 if (kvm_pmu_msr(vcpu, msr))
2348                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2349                 data = 0;
2350                 break;
2351         case MSR_IA32_UCODE_REV:
2352                 data = 0x100000000ULL;
2353                 break;
2354         case MSR_MTRRcap:
2355                 data = 0x500 | KVM_NR_VAR_MTRR;
2356                 break;
2357         case 0x200 ... 0x2ff:
2358                 return get_msr_mtrr(vcpu, msr, pdata);
2359         case 0xcd: /* fsb frequency */
2360                 data = 3;
2361                 break;
2362                 /*
2363                  * MSR_EBC_FREQUENCY_ID
2364                  * Conservative value valid for even the basic CPU models.
2365                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2366                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2367                  * and 266MHz for model 3, or 4. Set Core Clock
2368                  * Frequency to System Bus Frequency Ratio to 1 (bits
2369                  * 31:24) even though these are only valid for CPU
2370                  * models > 2, however guests may end up dividing or
2371                  * multiplying by zero otherwise.
2372                  */
2373         case MSR_EBC_FREQUENCY_ID:
2374                 data = 1 << 24;
2375                 break;
2376         case MSR_IA32_APICBASE:
2377                 data = kvm_get_apic_base(vcpu);
2378                 break;
2379         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2380                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2381                 break;
2382         case MSR_IA32_TSCDEADLINE:
2383                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2384                 break;
2385         case MSR_IA32_TSC_ADJUST:
2386                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2387                 break;
2388         case MSR_IA32_MISC_ENABLE:
2389                 data = vcpu->arch.ia32_misc_enable_msr;
2390                 break;
2391         case MSR_IA32_PERF_STATUS:
2392                 /* TSC increment by tick */
2393                 data = 1000ULL;
2394                 /* CPU multiplier */
2395                 data |= (((uint64_t)4ULL) << 40);
2396                 break;
2397         case MSR_EFER:
2398                 data = vcpu->arch.efer;
2399                 break;
2400         case MSR_KVM_WALL_CLOCK:
2401         case MSR_KVM_WALL_CLOCK_NEW:
2402                 data = vcpu->kvm->arch.wall_clock;
2403                 break;
2404         case MSR_KVM_SYSTEM_TIME:
2405         case MSR_KVM_SYSTEM_TIME_NEW:
2406                 data = vcpu->arch.time;
2407                 break;
2408         case MSR_KVM_ASYNC_PF_EN:
2409                 data = vcpu->arch.apf.msr_val;
2410                 break;
2411         case MSR_KVM_STEAL_TIME:
2412                 data = vcpu->arch.st.msr_val;
2413                 break;
2414         case MSR_KVM_PV_EOI_EN:
2415                 data = vcpu->arch.pv_eoi.msr_val;
2416                 break;
2417         case MSR_IA32_P5_MC_ADDR:
2418         case MSR_IA32_P5_MC_TYPE:
2419         case MSR_IA32_MCG_CAP:
2420         case MSR_IA32_MCG_CTL:
2421         case MSR_IA32_MCG_STATUS:
2422         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2423                 return get_msr_mce(vcpu, msr, pdata);
2424         case MSR_K7_CLK_CTL:
2425                 /*
2426                  * Provide expected ramp-up count for K7. All other
2427                  * are set to zero, indicating minimum divisors for
2428                  * every field.
2429                  *
2430                  * This prevents guest kernels on AMD host with CPU
2431                  * type 6, model 8 and higher from exploding due to
2432                  * the rdmsr failing.
2433                  */
2434                 data = 0x20000000;
2435                 break;
2436         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2437                 if (kvm_hv_msr_partition_wide(msr)) {
2438                         int r;
2439                         mutex_lock(&vcpu->kvm->lock);
2440                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2441                         mutex_unlock(&vcpu->kvm->lock);
2442                         return r;
2443                 } else
2444                         return get_msr_hyperv(vcpu, msr, pdata);
2445                 break;
2446         case MSR_IA32_BBL_CR_CTL3:
2447                 /* This legacy MSR exists but isn't fully documented in current
2448                  * silicon.  It is however accessed by winxp in very narrow
2449                  * scenarios where it sets bit #19, itself documented as
2450                  * a "reserved" bit.  Best effort attempt to source coherent
2451                  * read data here should the balance of the register be
2452                  * interpreted by the guest:
2453                  *
2454                  * L2 cache control register 3: 64GB range, 256KB size,
2455                  * enabled, latency 0x1, configured
2456                  */
2457                 data = 0xbe702111;
2458                 break;
2459         case MSR_AMD64_OSVW_ID_LENGTH:
2460                 if (!guest_cpuid_has_osvw(vcpu))
2461                         return 1;
2462                 data = vcpu->arch.osvw.length;
2463                 break;
2464         case MSR_AMD64_OSVW_STATUS:
2465                 if (!guest_cpuid_has_osvw(vcpu))
2466                         return 1;
2467                 data = vcpu->arch.osvw.status;
2468                 break;
2469         default:
2470                 if (kvm_pmu_msr(vcpu, msr))
2471                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2472                 if (!ignore_msrs) {
2473                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2474                         return 1;
2475                 } else {
2476                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2477                         data = 0;
2478                 }
2479                 break;
2480         }
2481         *pdata = data;
2482         return 0;
2483 }
2484 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2485
2486 /*
2487  * Read or write a bunch of msrs. All parameters are kernel addresses.
2488  *
2489  * @return number of msrs set successfully.
2490  */
2491 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2492                     struct kvm_msr_entry *entries,
2493                     int (*do_msr)(struct kvm_vcpu *vcpu,
2494                                   unsigned index, u64 *data))
2495 {
2496         int i, idx;
2497
2498         idx = srcu_read_lock(&vcpu->kvm->srcu);
2499         for (i = 0; i < msrs->nmsrs; ++i)
2500                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2501                         break;
2502         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2503
2504         return i;
2505 }
2506
2507 /*
2508  * Read or write a bunch of msrs. Parameters are user addresses.
2509  *
2510  * @return number of msrs set successfully.
2511  */
2512 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2513                   int (*do_msr)(struct kvm_vcpu *vcpu,
2514                                 unsigned index, u64 *data),
2515                   int writeback)
2516 {
2517         struct kvm_msrs msrs;
2518         struct kvm_msr_entry *entries;
2519         int r, n;
2520         unsigned size;
2521
2522         r = -EFAULT;
2523         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2524                 goto out;
2525
2526         r = -E2BIG;
2527         if (msrs.nmsrs >= MAX_IO_MSRS)
2528                 goto out;
2529
2530         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2531         entries = memdup_user(user_msrs->entries, size);
2532         if (IS_ERR(entries)) {
2533                 r = PTR_ERR(entries);
2534                 goto out;
2535         }
2536
2537         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2538         if (r < 0)
2539                 goto out_free;
2540
2541         r = -EFAULT;
2542         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2543                 goto out_free;
2544
2545         r = n;
2546
2547 out_free:
2548         kfree(entries);
2549 out:
2550         return r;
2551 }
2552
2553 int kvm_dev_ioctl_check_extension(long ext)
2554 {
2555         int r;
2556
2557         switch (ext) {
2558         case KVM_CAP_IRQCHIP:
2559         case KVM_CAP_HLT:
2560         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2561         case KVM_CAP_SET_TSS_ADDR:
2562         case KVM_CAP_EXT_CPUID:
2563         case KVM_CAP_CLOCKSOURCE:
2564         case KVM_CAP_PIT:
2565         case KVM_CAP_NOP_IO_DELAY:
2566         case KVM_CAP_MP_STATE:
2567         case KVM_CAP_SYNC_MMU:
2568         case KVM_CAP_USER_NMI:
2569         case KVM_CAP_REINJECT_CONTROL:
2570         case KVM_CAP_IRQ_INJECT_STATUS:
2571         case KVM_CAP_IRQFD:
2572         case KVM_CAP_IOEVENTFD:
2573         case KVM_CAP_PIT2:
2574         case KVM_CAP_PIT_STATE2:
2575         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2576         case KVM_CAP_XEN_HVM:
2577         case KVM_CAP_ADJUST_CLOCK:
2578         case KVM_CAP_VCPU_EVENTS:
2579         case KVM_CAP_HYPERV:
2580         case KVM_CAP_HYPERV_VAPIC:
2581         case KVM_CAP_HYPERV_SPIN:
2582         case KVM_CAP_PCI_SEGMENT:
2583         case KVM_CAP_DEBUGREGS:
2584         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2585         case KVM_CAP_XSAVE:
2586         case KVM_CAP_ASYNC_PF:
2587         case KVM_CAP_GET_TSC_KHZ:
2588         case KVM_CAP_KVMCLOCK_CTRL:
2589         case KVM_CAP_READONLY_MEM:
2590 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2591         case KVM_CAP_ASSIGN_DEV_IRQ:
2592         case KVM_CAP_PCI_2_3:
2593 #endif
2594                 r = 1;
2595                 break;
2596         case KVM_CAP_COALESCED_MMIO:
2597                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2598                 break;
2599         case KVM_CAP_VAPIC:
2600                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2601                 break;
2602         case KVM_CAP_NR_VCPUS:
2603                 r = KVM_SOFT_MAX_VCPUS;
2604                 break;
2605         case KVM_CAP_MAX_VCPUS:
2606                 r = KVM_MAX_VCPUS;
2607                 break;
2608         case KVM_CAP_NR_MEMSLOTS:
2609                 r = KVM_USER_MEM_SLOTS;
2610                 break;
2611         case KVM_CAP_PV_MMU:    /* obsolete */
2612                 r = 0;
2613                 break;
2614 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2615         case KVM_CAP_IOMMU:
2616                 r = iommu_present(&pci_bus_type);
2617                 break;
2618 #endif
2619         case KVM_CAP_MCE:
2620                 r = KVM_MAX_MCE_BANKS;
2621                 break;
2622         case KVM_CAP_XCRS:
2623                 r = cpu_has_xsave;
2624                 break;
2625         case KVM_CAP_TSC_CONTROL:
2626                 r = kvm_has_tsc_control;
2627                 break;
2628         case KVM_CAP_TSC_DEADLINE_TIMER:
2629                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2630                 break;
2631         default:
2632                 r = 0;
2633                 break;
2634         }
2635         return r;
2636
2637 }
2638
2639 long kvm_arch_dev_ioctl(struct file *filp,
2640                         unsigned int ioctl, unsigned long arg)
2641 {
2642         void __user *argp = (void __user *)arg;
2643         long r;
2644
2645         switch (ioctl) {
2646         case KVM_GET_MSR_INDEX_LIST: {
2647                 struct kvm_msr_list __user *user_msr_list = argp;
2648                 struct kvm_msr_list msr_list;
2649                 unsigned n;
2650
2651                 r = -EFAULT;
2652                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2653                         goto out;
2654                 n = msr_list.nmsrs;
2655                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2656                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2657                         goto out;
2658                 r = -E2BIG;
2659                 if (n < msr_list.nmsrs)
2660                         goto out;
2661                 r = -EFAULT;
2662                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2663                                  num_msrs_to_save * sizeof(u32)))
2664                         goto out;
2665                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2666                                  &emulated_msrs,
2667                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2668                         goto out;
2669                 r = 0;
2670                 break;
2671         }
2672         case KVM_GET_SUPPORTED_CPUID: {
2673                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2674                 struct kvm_cpuid2 cpuid;
2675
2676                 r = -EFAULT;
2677                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2678                         goto out;
2679                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2680                                                       cpuid_arg->entries);
2681                 if (r)
2682                         goto out;
2683
2684                 r = -EFAULT;
2685                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2686                         goto out;
2687                 r = 0;
2688                 break;
2689         }
2690         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2691                 u64 mce_cap;
2692
2693                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2694                 r = -EFAULT;
2695                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2696                         goto out;
2697                 r = 0;
2698                 break;
2699         }
2700         default:
2701                 r = -EINVAL;
2702         }
2703 out:
2704         return r;
2705 }
2706
2707 static void wbinvd_ipi(void *garbage)
2708 {
2709         wbinvd();
2710 }
2711
2712 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2713 {
2714         return vcpu->kvm->arch.iommu_domain &&
2715                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2716 }
2717
2718 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2719 {
2720         /* Address WBINVD may be executed by guest */
2721         if (need_emulate_wbinvd(vcpu)) {
2722                 if (kvm_x86_ops->has_wbinvd_exit())
2723                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2724                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2725                         smp_call_function_single(vcpu->cpu,
2726                                         wbinvd_ipi, NULL, 1);
2727         }
2728
2729         kvm_x86_ops->vcpu_load(vcpu, cpu);
2730
2731         /* Apply any externally detected TSC adjustments (due to suspend) */
2732         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2733                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2734                 vcpu->arch.tsc_offset_adjustment = 0;
2735                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2736         }
2737
2738         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2739                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2740                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2741                 if (tsc_delta < 0)
2742                         mark_tsc_unstable("KVM discovered backwards TSC");
2743                 if (check_tsc_unstable()) {
2744                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2745                                                 vcpu->arch.last_guest_tsc);
2746                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2747                         vcpu->arch.tsc_catchup = 1;
2748                 }
2749                 /*
2750                  * On a host with synchronized TSC, there is no need to update
2751                  * kvmclock on vcpu->cpu migration
2752                  */
2753                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2754                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2755                 if (vcpu->cpu != cpu)
2756                         kvm_migrate_timers(vcpu);
2757                 vcpu->cpu = cpu;
2758         }
2759
2760         accumulate_steal_time(vcpu);
2761         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2762 }
2763
2764 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2765 {
2766         kvm_x86_ops->vcpu_put(vcpu);
2767         kvm_put_guest_fpu(vcpu);
2768         vcpu->arch.last_host_tsc = native_read_tsc();
2769 }
2770
2771 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2772                                     struct kvm_lapic_state *s)
2773 {
2774         kvm_x86_ops->sync_pir_to_irr(vcpu);
2775         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2776
2777         return 0;
2778 }
2779
2780 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2781                                     struct kvm_lapic_state *s)
2782 {
2783         kvm_apic_post_state_restore(vcpu, s);
2784         update_cr8_intercept(vcpu);
2785
2786         return 0;
2787 }
2788
2789 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2790                                     struct kvm_interrupt *irq)
2791 {
2792         if (irq->irq >= KVM_NR_INTERRUPTS)
2793                 return -EINVAL;
2794         if (irqchip_in_kernel(vcpu->kvm))
2795                 return -ENXIO;
2796
2797         kvm_queue_interrupt(vcpu, irq->irq, false);
2798         kvm_make_request(KVM_REQ_EVENT, vcpu);
2799
2800         return 0;
2801 }
2802
2803 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2804 {
2805         kvm_inject_nmi(vcpu);
2806
2807         return 0;
2808 }
2809
2810 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2811                                            struct kvm_tpr_access_ctl *tac)
2812 {
2813         if (tac->flags)
2814                 return -EINVAL;
2815         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2816         return 0;
2817 }
2818
2819 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2820                                         u64 mcg_cap)
2821 {
2822         int r;
2823         unsigned bank_num = mcg_cap & 0xff, bank;
2824
2825         r = -EINVAL;
2826         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2827                 goto out;
2828         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2829                 goto out;
2830         r = 0;
2831         vcpu->arch.mcg_cap = mcg_cap;
2832         /* Init IA32_MCG_CTL to all 1s */
2833         if (mcg_cap & MCG_CTL_P)
2834                 vcpu->arch.mcg_ctl = ~(u64)0;
2835         /* Init IA32_MCi_CTL to all 1s */
2836         for (bank = 0; bank < bank_num; bank++)
2837                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2838 out:
2839         return r;
2840 }
2841
2842 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2843                                       struct kvm_x86_mce *mce)
2844 {
2845         u64 mcg_cap = vcpu->arch.mcg_cap;
2846         unsigned bank_num = mcg_cap & 0xff;
2847         u64 *banks = vcpu->arch.mce_banks;
2848
2849         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2850                 return -EINVAL;
2851         /*
2852          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2853          * reporting is disabled
2854          */
2855         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2856             vcpu->arch.mcg_ctl != ~(u64)0)
2857                 return 0;
2858         banks += 4 * mce->bank;
2859         /*
2860          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2861          * reporting is disabled for the bank
2862          */
2863         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2864                 return 0;
2865         if (mce->status & MCI_STATUS_UC) {
2866                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2867                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2868                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2869                         return 0;
2870                 }
2871                 if (banks[1] & MCI_STATUS_VAL)
2872                         mce->status |= MCI_STATUS_OVER;
2873                 banks[2] = mce->addr;
2874                 banks[3] = mce->misc;
2875                 vcpu->arch.mcg_status = mce->mcg_status;
2876                 banks[1] = mce->status;
2877                 kvm_queue_exception(vcpu, MC_VECTOR);
2878         } else if (!(banks[1] & MCI_STATUS_VAL)
2879                    || !(banks[1] & MCI_STATUS_UC)) {
2880                 if (banks[1] & MCI_STATUS_VAL)
2881                         mce->status |= MCI_STATUS_OVER;
2882                 banks[2] = mce->addr;
2883                 banks[3] = mce->misc;
2884                 banks[1] = mce->status;
2885         } else
2886                 banks[1] |= MCI_STATUS_OVER;
2887         return 0;
2888 }
2889
2890 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2891                                                struct kvm_vcpu_events *events)
2892 {
2893         process_nmi(vcpu);
2894         events->exception.injected =
2895                 vcpu->arch.exception.pending &&
2896                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2897         events->exception.nr = vcpu->arch.exception.nr;
2898         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2899         events->exception.pad = 0;
2900         events->exception.error_code = vcpu->arch.exception.error_code;
2901
2902         events->interrupt.injected =
2903                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2904         events->interrupt.nr = vcpu->arch.interrupt.nr;
2905         events->interrupt.soft = 0;
2906         events->interrupt.shadow =
2907                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2908                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2909
2910         events->nmi.injected = vcpu->arch.nmi_injected;
2911         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2912         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2913         events->nmi.pad = 0;
2914
2915         events->sipi_vector = 0; /* never valid when reporting to user space */
2916
2917         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2918                          | KVM_VCPUEVENT_VALID_SHADOW);
2919         memset(&events->reserved, 0, sizeof(events->reserved));
2920 }
2921
2922 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2923                                               struct kvm_vcpu_events *events)
2924 {
2925         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2926                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2927                               | KVM_VCPUEVENT_VALID_SHADOW))
2928                 return -EINVAL;
2929
2930         process_nmi(vcpu);
2931         vcpu->arch.exception.pending = events->exception.injected;
2932         vcpu->arch.exception.nr = events->exception.nr;
2933         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2934         vcpu->arch.exception.error_code = events->exception.error_code;
2935
2936         vcpu->arch.interrupt.pending = events->interrupt.injected;
2937         vcpu->arch.interrupt.nr = events->interrupt.nr;
2938         vcpu->arch.interrupt.soft = events->interrupt.soft;
2939         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2940                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2941                                                   events->interrupt.shadow);
2942
2943         vcpu->arch.nmi_injected = events->nmi.injected;
2944         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2945                 vcpu->arch.nmi_pending = events->nmi.pending;
2946         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2947
2948         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2949             kvm_vcpu_has_lapic(vcpu))
2950                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2951
2952         kvm_make_request(KVM_REQ_EVENT, vcpu);
2953
2954         return 0;
2955 }
2956
2957 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2958                                              struct kvm_debugregs *dbgregs)
2959 {
2960         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2961         dbgregs->dr6 = vcpu->arch.dr6;
2962         dbgregs->dr7 = vcpu->arch.dr7;
2963         dbgregs->flags = 0;
2964         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2965 }
2966
2967 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2968                                             struct kvm_debugregs *dbgregs)
2969 {
2970         if (dbgregs->flags)
2971                 return -EINVAL;
2972
2973         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2974         vcpu->arch.dr6 = dbgregs->dr6;
2975         vcpu->arch.dr7 = dbgregs->dr7;
2976
2977         return 0;
2978 }
2979
2980 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2981                                          struct kvm_xsave *guest_xsave)
2982 {
2983         if (cpu_has_xsave)
2984                 memcpy(guest_xsave->region,
2985                         &vcpu->arch.guest_fpu.state->xsave,
2986                         xstate_size);
2987         else {
2988                 memcpy(guest_xsave->region,
2989                         &vcpu->arch.guest_fpu.state->fxsave,
2990                         sizeof(struct i387_fxsave_struct));
2991                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2992                         XSTATE_FPSSE;
2993         }
2994 }
2995
2996 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2997                                         struct kvm_xsave *guest_xsave)
2998 {
2999         u64 xstate_bv =
3000                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3001
3002         if (cpu_has_xsave)
3003                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3004                         guest_xsave->region, xstate_size);
3005         else {
3006                 if (xstate_bv & ~XSTATE_FPSSE)
3007                         return -EINVAL;
3008                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3009                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3010         }
3011         return 0;
3012 }
3013
3014 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3015                                         struct kvm_xcrs *guest_xcrs)
3016 {
3017         if (!cpu_has_xsave) {
3018                 guest_xcrs->nr_xcrs = 0;
3019                 return;
3020         }
3021
3022         guest_xcrs->nr_xcrs = 1;
3023         guest_xcrs->flags = 0;
3024         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3025         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3026 }
3027
3028 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3029                                        struct kvm_xcrs *guest_xcrs)
3030 {
3031         int i, r = 0;
3032
3033         if (!cpu_has_xsave)
3034                 return -EINVAL;
3035
3036         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3037                 return -EINVAL;
3038
3039         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3040                 /* Only support XCR0 currently */
3041                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3042                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3043                                 guest_xcrs->xcrs[0].value);
3044                         break;
3045                 }
3046         if (r)
3047                 r = -EINVAL;
3048         return r;
3049 }
3050
3051 /*
3052  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3053  * stopped by the hypervisor.  This function will be called from the host only.
3054  * EINVAL is returned when the host attempts to set the flag for a guest that
3055  * does not support pv clocks.
3056  */
3057 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3058 {
3059         if (!vcpu->arch.pv_time_enabled)
3060                 return -EINVAL;
3061         vcpu->arch.pvclock_set_guest_stopped_request = true;
3062         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3063         return 0;
3064 }
3065
3066 long kvm_arch_vcpu_ioctl(struct file *filp,
3067                          unsigned int ioctl, unsigned long arg)
3068 {
3069         struct kvm_vcpu *vcpu = filp->private_data;
3070         void __user *argp = (void __user *)arg;
3071         int r;
3072         union {
3073                 struct kvm_lapic_state *lapic;
3074                 struct kvm_xsave *xsave;
3075                 struct kvm_xcrs *xcrs;
3076                 void *buffer;
3077         } u;
3078
3079         u.buffer = NULL;
3080         switch (ioctl) {
3081         case KVM_GET_LAPIC: {
3082                 r = -EINVAL;
3083                 if (!vcpu->arch.apic)
3084                         goto out;
3085                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3086
3087                 r = -ENOMEM;
3088                 if (!u.lapic)
3089                         goto out;
3090                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3091                 if (r)
3092                         goto out;
3093                 r = -EFAULT;
3094                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3095                         goto out;
3096                 r = 0;
3097                 break;
3098         }
3099         case KVM_SET_LAPIC: {
3100                 r = -EINVAL;
3101                 if (!vcpu->arch.apic)
3102                         goto out;
3103                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3104                 if (IS_ERR(u.lapic))
3105                         return PTR_ERR(u.lapic);
3106
3107                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3108                 break;
3109         }
3110         case KVM_INTERRUPT: {
3111                 struct kvm_interrupt irq;
3112
3113                 r = -EFAULT;
3114                 if (copy_from_user(&irq, argp, sizeof irq))
3115                         goto out;
3116                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3117                 break;
3118         }
3119         case KVM_NMI: {
3120                 r = kvm_vcpu_ioctl_nmi(vcpu);
3121                 break;
3122         }
3123         case KVM_SET_CPUID: {
3124                 struct kvm_cpuid __user *cpuid_arg = argp;
3125                 struct kvm_cpuid cpuid;
3126
3127                 r = -EFAULT;
3128                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3129                         goto out;
3130                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3131                 break;
3132         }
3133         case KVM_SET_CPUID2: {
3134                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3135                 struct kvm_cpuid2 cpuid;
3136
3137                 r = -EFAULT;
3138                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3139                         goto out;
3140                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3141                                               cpuid_arg->entries);
3142                 break;
3143         }
3144         case KVM_GET_CPUID2: {
3145                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3146                 struct kvm_cpuid2 cpuid;
3147
3148                 r = -EFAULT;
3149                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3150                         goto out;
3151                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3152                                               cpuid_arg->entries);
3153                 if (r)
3154                         goto out;
3155                 r = -EFAULT;
3156                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3157                         goto out;
3158                 r = 0;
3159                 break;
3160         }
3161         case KVM_GET_MSRS:
3162                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3163                 break;
3164         case KVM_SET_MSRS:
3165                 r = msr_io(vcpu, argp, do_set_msr, 0);
3166                 break;
3167         case KVM_TPR_ACCESS_REPORTING: {
3168                 struct kvm_tpr_access_ctl tac;
3169
3170                 r = -EFAULT;
3171                 if (copy_from_user(&tac, argp, sizeof tac))
3172                         goto out;
3173                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3174                 if (r)
3175                         goto out;
3176                 r = -EFAULT;
3177                 if (copy_to_user(argp, &tac, sizeof tac))
3178                         goto out;
3179                 r = 0;
3180                 break;
3181         };
3182         case KVM_SET_VAPIC_ADDR: {
3183                 struct kvm_vapic_addr va;
3184
3185                 r = -EINVAL;
3186                 if (!irqchip_in_kernel(vcpu->kvm))
3187                         goto out;
3188                 r = -EFAULT;
3189                 if (copy_from_user(&va, argp, sizeof va))
3190                         goto out;
3191                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3192                 break;
3193         }
3194         case KVM_X86_SETUP_MCE: {
3195                 u64 mcg_cap;
3196
3197                 r = -EFAULT;
3198                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3199                         goto out;
3200                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3201                 break;
3202         }
3203         case KVM_X86_SET_MCE: {
3204                 struct kvm_x86_mce mce;
3205
3206                 r = -EFAULT;
3207                 if (copy_from_user(&mce, argp, sizeof mce))
3208                         goto out;
3209                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3210                 break;
3211         }
3212         case KVM_GET_VCPU_EVENTS: {
3213                 struct kvm_vcpu_events events;
3214
3215                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3216
3217                 r = -EFAULT;
3218                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3219                         break;
3220                 r = 0;
3221                 break;
3222         }
3223         case KVM_SET_VCPU_EVENTS: {
3224                 struct kvm_vcpu_events events;
3225
3226                 r = -EFAULT;
3227                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3228                         break;
3229
3230                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3231                 break;
3232         }
3233         case KVM_GET_DEBUGREGS: {
3234                 struct kvm_debugregs dbgregs;
3235
3236                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3237
3238                 r = -EFAULT;
3239                 if (copy_to_user(argp, &dbgregs,
3240                                  sizeof(struct kvm_debugregs)))
3241                         break;
3242                 r = 0;
3243                 break;
3244         }
3245         case KVM_SET_DEBUGREGS: {
3246                 struct kvm_debugregs dbgregs;
3247
3248                 r = -EFAULT;
3249                 if (copy_from_user(&dbgregs, argp,
3250                                    sizeof(struct kvm_debugregs)))
3251                         break;
3252
3253                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3254                 break;
3255         }
3256         case KVM_GET_XSAVE: {
3257                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3258                 r = -ENOMEM;
3259                 if (!u.xsave)
3260                         break;
3261
3262                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3263
3264                 r = -EFAULT;
3265                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3266                         break;
3267                 r = 0;
3268                 break;
3269         }
3270         case KVM_SET_XSAVE: {
3271                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3272                 if (IS_ERR(u.xsave))
3273                         return PTR_ERR(u.xsave);
3274
3275                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3276                 break;
3277         }
3278         case KVM_GET_XCRS: {
3279                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3280                 r = -ENOMEM;
3281                 if (!u.xcrs)
3282                         break;
3283
3284                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3285
3286                 r = -EFAULT;
3287                 if (copy_to_user(argp, u.xcrs,
3288                                  sizeof(struct kvm_xcrs)))
3289                         break;
3290                 r = 0;
3291                 break;
3292         }
3293         case KVM_SET_XCRS: {
3294                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3295                 if (IS_ERR(u.xcrs))
3296                         return PTR_ERR(u.xcrs);
3297
3298                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3299                 break;
3300         }
3301         case KVM_SET_TSC_KHZ: {
3302                 u32 user_tsc_khz;
3303
3304                 r = -EINVAL;
3305                 user_tsc_khz = (u32)arg;
3306
3307                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3308                         goto out;
3309
3310                 if (user_tsc_khz == 0)
3311                         user_tsc_khz = tsc_khz;
3312
3313                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3314
3315                 r = 0;
3316                 goto out;
3317         }
3318         case KVM_GET_TSC_KHZ: {
3319                 r = vcpu->arch.virtual_tsc_khz;
3320                 goto out;
3321         }
3322         case KVM_KVMCLOCK_CTRL: {
3323                 r = kvm_set_guest_paused(vcpu);
3324                 goto out;
3325         }
3326         default:
3327                 r = -EINVAL;
3328         }
3329 out:
3330         kfree(u.buffer);
3331         return r;
3332 }
3333
3334 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3335 {
3336         return VM_FAULT_SIGBUS;
3337 }
3338
3339 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3340 {
3341         int ret;
3342
3343         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3344                 return -EINVAL;
3345         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3346         return ret;
3347 }
3348
3349 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3350                                               u64 ident_addr)
3351 {
3352         kvm->arch.ept_identity_map_addr = ident_addr;
3353         return 0;
3354 }
3355
3356 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3357                                           u32 kvm_nr_mmu_pages)
3358 {
3359         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3360                 return -EINVAL;
3361
3362         mutex_lock(&kvm->slots_lock);
3363
3364         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3365         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3366
3367         mutex_unlock(&kvm->slots_lock);
3368         return 0;
3369 }
3370
3371 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3372 {
3373         return kvm->arch.n_max_mmu_pages;
3374 }
3375
3376 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3377 {
3378         int r;
3379
3380         r = 0;
3381         switch (chip->chip_id) {
3382         case KVM_IRQCHIP_PIC_MASTER:
3383                 memcpy(&chip->chip.pic,
3384                         &pic_irqchip(kvm)->pics[0],
3385                         sizeof(struct kvm_pic_state));
3386                 break;
3387         case KVM_IRQCHIP_PIC_SLAVE:
3388                 memcpy(&chip->chip.pic,
3389                         &pic_irqchip(kvm)->pics[1],
3390                         sizeof(struct kvm_pic_state));
3391                 break;
3392         case KVM_IRQCHIP_IOAPIC:
3393                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3394                 break;
3395         default:
3396                 r = -EINVAL;
3397                 break;
3398         }
3399         return r;
3400 }
3401
3402 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3403 {
3404         int r;
3405
3406         r = 0;
3407         switch (chip->chip_id) {
3408         case KVM_IRQCHIP_PIC_MASTER:
3409                 spin_lock(&pic_irqchip(kvm)->lock);
3410                 memcpy(&pic_irqchip(kvm)->pics[0],
3411                         &chip->chip.pic,
3412                         sizeof(struct kvm_pic_state));
3413                 spin_unlock(&pic_irqchip(kvm)->lock);
3414                 break;
3415         case KVM_IRQCHIP_PIC_SLAVE:
3416                 spin_lock(&pic_irqchip(kvm)->lock);
3417                 memcpy(&pic_irqchip(kvm)->pics[1],
3418                         &chip->chip.pic,
3419                         sizeof(struct kvm_pic_state));
3420                 spin_unlock(&pic_irqchip(kvm)->lock);
3421                 break;
3422         case KVM_IRQCHIP_IOAPIC:
3423                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3424                 break;
3425         default:
3426                 r = -EINVAL;
3427                 break;
3428         }
3429         kvm_pic_update_irq(pic_irqchip(kvm));
3430         return r;
3431 }
3432
3433 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3434 {
3435         int r = 0;
3436
3437         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3438         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3439         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3440         return r;
3441 }
3442
3443 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3444 {
3445         int r = 0;
3446
3447         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3448         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3449         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3450         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3451         return r;
3452 }
3453
3454 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3455 {
3456         int r = 0;
3457
3458         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3459         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3460                 sizeof(ps->channels));
3461         ps->flags = kvm->arch.vpit->pit_state.flags;
3462         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3463         memset(&ps->reserved, 0, sizeof(ps->reserved));
3464         return r;
3465 }
3466
3467 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3468 {
3469         int r = 0, start = 0;
3470         u32 prev_legacy, cur_legacy;
3471         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3472         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3473         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3474         if (!prev_legacy && cur_legacy)
3475                 start = 1;
3476         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3477                sizeof(kvm->arch.vpit->pit_state.channels));
3478         kvm->arch.vpit->pit_state.flags = ps->flags;
3479         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3480         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3481         return r;
3482 }
3483
3484 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3485                                  struct kvm_reinject_control *control)
3486 {
3487         if (!kvm->arch.vpit)
3488                 return -ENXIO;
3489         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3490         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3491         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3492         return 0;
3493 }
3494
3495 /**
3496  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3497  * @kvm: kvm instance
3498  * @log: slot id and address to which we copy the log
3499  *
3500  * We need to keep it in mind that VCPU threads can write to the bitmap
3501  * concurrently.  So, to avoid losing data, we keep the following order for
3502  * each bit:
3503  *
3504  *   1. Take a snapshot of the bit and clear it if needed.
3505  *   2. Write protect the corresponding page.
3506  *   3. Flush TLB's if needed.
3507  *   4. Copy the snapshot to the userspace.
3508  *
3509  * Between 2 and 3, the guest may write to the page using the remaining TLB
3510  * entry.  This is not a problem because the page will be reported dirty at
3511  * step 4 using the snapshot taken before and step 3 ensures that successive
3512  * writes will be logged for the next call.
3513  */
3514 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3515 {
3516         int r;
3517         struct kvm_memory_slot *memslot;
3518         unsigned long n, i;
3519         unsigned long *dirty_bitmap;
3520         unsigned long *dirty_bitmap_buffer;
3521         bool is_dirty = false;
3522
3523         mutex_lock(&kvm->slots_lock);
3524
3525         r = -EINVAL;
3526         if (log->slot >= KVM_USER_MEM_SLOTS)
3527                 goto out;
3528
3529         memslot = id_to_memslot(kvm->memslots, log->slot);
3530
3531         dirty_bitmap = memslot->dirty_bitmap;
3532         r = -ENOENT;
3533         if (!dirty_bitmap)
3534                 goto out;
3535
3536         n = kvm_dirty_bitmap_bytes(memslot);
3537
3538         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3539         memset(dirty_bitmap_buffer, 0, n);
3540
3541         spin_lock(&kvm->mmu_lock);
3542
3543         for (i = 0; i < n / sizeof(long); i++) {
3544                 unsigned long mask;
3545                 gfn_t offset;
3546
3547                 if (!dirty_bitmap[i])
3548                         continue;
3549
3550                 is_dirty = true;
3551
3552                 mask = xchg(&dirty_bitmap[i], 0);
3553                 dirty_bitmap_buffer[i] = mask;
3554
3555                 offset = i * BITS_PER_LONG;
3556                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3557         }
3558         if (is_dirty)
3559                 kvm_flush_remote_tlbs(kvm);
3560
3561         spin_unlock(&kvm->mmu_lock);
3562
3563         r = -EFAULT;
3564         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3565                 goto out;
3566
3567         r = 0;
3568 out:
3569         mutex_unlock(&kvm->slots_lock);
3570         return r;
3571 }
3572
3573 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3574                         bool line_status)
3575 {
3576         if (!irqchip_in_kernel(kvm))
3577                 return -ENXIO;
3578
3579         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3580                                         irq_event->irq, irq_event->level,
3581                                         line_status);
3582         return 0;
3583 }
3584
3585 long kvm_arch_vm_ioctl(struct file *filp,
3586                        unsigned int ioctl, unsigned long arg)
3587 {
3588         struct kvm *kvm = filp->private_data;
3589         void __user *argp = (void __user *)arg;
3590         int r = -ENOTTY;
3591         /*
3592          * This union makes it completely explicit to gcc-3.x
3593          * that these two variables' stack usage should be
3594          * combined, not added together.
3595          */
3596         union {
3597                 struct kvm_pit_state ps;
3598                 struct kvm_pit_state2 ps2;
3599                 struct kvm_pit_config pit_config;
3600         } u;
3601
3602         switch (ioctl) {
3603         case KVM_SET_TSS_ADDR:
3604                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3605                 break;
3606         case KVM_SET_IDENTITY_MAP_ADDR: {
3607                 u64 ident_addr;
3608
3609                 r = -EFAULT;
3610                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3611                         goto out;
3612                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3613                 break;
3614         }
3615         case KVM_SET_NR_MMU_PAGES:
3616                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3617                 break;
3618         case KVM_GET_NR_MMU_PAGES:
3619                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3620                 break;
3621         case KVM_CREATE_IRQCHIP: {
3622                 struct kvm_pic *vpic;
3623
3624                 mutex_lock(&kvm->lock);
3625                 r = -EEXIST;
3626                 if (kvm->arch.vpic)
3627                         goto create_irqchip_unlock;
3628                 r = -EINVAL;
3629                 if (atomic_read(&kvm->online_vcpus))
3630                         goto create_irqchip_unlock;
3631                 r = -ENOMEM;
3632                 vpic = kvm_create_pic(kvm);
3633                 if (vpic) {
3634                         r = kvm_ioapic_init(kvm);
3635                         if (r) {
3636                                 mutex_lock(&kvm->slots_lock);
3637                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3638                                                           &vpic->dev_master);
3639                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3640                                                           &vpic->dev_slave);
3641                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3642                                                           &vpic->dev_eclr);
3643                                 mutex_unlock(&kvm->slots_lock);
3644                                 kfree(vpic);
3645                                 goto create_irqchip_unlock;
3646                         }
3647                 } else
3648                         goto create_irqchip_unlock;
3649                 smp_wmb();
3650                 kvm->arch.vpic = vpic;
3651                 smp_wmb();
3652                 r = kvm_setup_default_irq_routing(kvm);
3653                 if (r) {
3654                         mutex_lock(&kvm->slots_lock);
3655                         mutex_lock(&kvm->irq_lock);
3656                         kvm_ioapic_destroy(kvm);
3657                         kvm_destroy_pic(kvm);
3658                         mutex_unlock(&kvm->irq_lock);
3659                         mutex_unlock(&kvm->slots_lock);
3660                 }
3661         create_irqchip_unlock:
3662                 mutex_unlock(&kvm->lock);
3663                 break;
3664         }
3665         case KVM_CREATE_PIT:
3666                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3667                 goto create_pit;
3668         case KVM_CREATE_PIT2:
3669                 r = -EFAULT;
3670                 if (copy_from_user(&u.pit_config, argp,
3671                                    sizeof(struct kvm_pit_config)))
3672                         goto out;
3673         create_pit:
3674                 mutex_lock(&kvm->slots_lock);
3675                 r = -EEXIST;
3676                 if (kvm->arch.vpit)
3677                         goto create_pit_unlock;
3678                 r = -ENOMEM;
3679                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3680                 if (kvm->arch.vpit)
3681                         r = 0;
3682         create_pit_unlock:
3683                 mutex_unlock(&kvm->slots_lock);
3684                 break;
3685         case KVM_GET_IRQCHIP: {
3686                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3687                 struct kvm_irqchip *chip;
3688
3689                 chip = memdup_user(argp, sizeof(*chip));
3690                 if (IS_ERR(chip)) {
3691                         r = PTR_ERR(chip);
3692                         goto out;
3693                 }
3694
3695                 r = -ENXIO;
3696                 if (!irqchip_in_kernel(kvm))
3697                         goto get_irqchip_out;
3698                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3699                 if (r)
3700                         goto get_irqchip_out;
3701                 r = -EFAULT;
3702                 if (copy_to_user(argp, chip, sizeof *chip))
3703                         goto get_irqchip_out;
3704                 r = 0;
3705         get_irqchip_out:
3706                 kfree(chip);
3707                 break;
3708         }
3709         case KVM_SET_IRQCHIP: {
3710                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3711                 struct kvm_irqchip *chip;
3712
3713                 chip = memdup_user(argp, sizeof(*chip));
3714                 if (IS_ERR(chip)) {
3715                         r = PTR_ERR(chip);
3716                         goto out;
3717                 }
3718
3719                 r = -ENXIO;
3720                 if (!irqchip_in_kernel(kvm))
3721                         goto set_irqchip_out;
3722                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3723                 if (r)
3724                         goto set_irqchip_out;
3725                 r = 0;
3726         set_irqchip_out:
3727                 kfree(chip);
3728                 break;
3729         }
3730         case KVM_GET_PIT: {
3731                 r = -EFAULT;
3732                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3733                         goto out;
3734                 r = -ENXIO;
3735                 if (!kvm->arch.vpit)
3736                         goto out;
3737                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3738                 if (r)
3739                         goto out;
3740                 r = -EFAULT;
3741                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3742                         goto out;
3743                 r = 0;
3744                 break;
3745         }
3746         case KVM_SET_PIT: {
3747                 r = -EFAULT;
3748                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3749                         goto out;
3750                 r = -ENXIO;
3751                 if (!kvm->arch.vpit)
3752                         goto out;
3753                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3754                 break;
3755         }
3756         case KVM_GET_PIT2: {
3757                 r = -ENXIO;
3758                 if (!kvm->arch.vpit)
3759                         goto out;
3760                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3761                 if (r)
3762                         goto out;
3763                 r = -EFAULT;
3764                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3765                         goto out;
3766                 r = 0;
3767                 break;
3768         }
3769         case KVM_SET_PIT2: {
3770                 r = -EFAULT;
3771                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3772                         goto out;
3773                 r = -ENXIO;
3774                 if (!kvm->arch.vpit)
3775                         goto out;
3776                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3777                 break;
3778         }
3779         case KVM_REINJECT_CONTROL: {
3780                 struct kvm_reinject_control control;
3781                 r =  -EFAULT;
3782                 if (copy_from_user(&control, argp, sizeof(control)))
3783                         goto out;
3784                 r = kvm_vm_ioctl_reinject(kvm, &control);
3785                 break;
3786         }
3787         case KVM_XEN_HVM_CONFIG: {
3788                 r = -EFAULT;
3789                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3790                                    sizeof(struct kvm_xen_hvm_config)))
3791                         goto out;
3792                 r = -EINVAL;
3793                 if (kvm->arch.xen_hvm_config.flags)
3794                         goto out;
3795                 r = 0;
3796                 break;
3797         }
3798         case KVM_SET_CLOCK: {
3799                 struct kvm_clock_data user_ns;
3800                 u64 now_ns;
3801                 s64 delta;
3802
3803                 r = -EFAULT;
3804                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3805                         goto out;
3806
3807                 r = -EINVAL;
3808                 if (user_ns.flags)
3809                         goto out;
3810
3811                 r = 0;
3812                 local_irq_disable();
3813                 now_ns = get_kernel_ns();
3814                 delta = user_ns.clock - now_ns;
3815                 local_irq_enable();
3816                 kvm->arch.kvmclock_offset = delta;
3817                 break;
3818         }
3819         case KVM_GET_CLOCK: {
3820                 struct kvm_clock_data user_ns;
3821                 u64 now_ns;
3822
3823                 local_irq_disable();
3824                 now_ns = get_kernel_ns();
3825                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3826                 local_irq_enable();
3827                 user_ns.flags = 0;
3828                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3829
3830                 r = -EFAULT;
3831                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3832                         goto out;
3833                 r = 0;
3834                 break;
3835         }
3836
3837         default:
3838                 ;
3839         }
3840 out:
3841         return r;
3842 }
3843
3844 static void kvm_init_msr_list(void)
3845 {
3846         u32 dummy[2];
3847         unsigned i, j;
3848
3849         /* skip the first msrs in the list. KVM-specific */
3850         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3851                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3852                         continue;
3853                 if (j < i)
3854                         msrs_to_save[j] = msrs_to_save[i];
3855                 j++;
3856         }
3857         num_msrs_to_save = j;
3858 }
3859
3860 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3861                            const void *v)
3862 {
3863         int handled = 0;
3864         int n;
3865
3866         do {
3867                 n = min(len, 8);
3868                 if (!(vcpu->arch.apic &&
3869                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3870                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3871                         break;
3872                 handled += n;
3873                 addr += n;
3874                 len -= n;
3875                 v += n;
3876         } while (len);
3877
3878         return handled;
3879 }
3880
3881 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3882 {
3883         int handled = 0;
3884         int n;
3885
3886         do {
3887                 n = min(len, 8);
3888                 if (!(vcpu->arch.apic &&
3889                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3890                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3891                         break;
3892                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3893                 handled += n;
3894                 addr += n;
3895                 len -= n;
3896                 v += n;
3897         } while (len);
3898
3899         return handled;
3900 }
3901
3902 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3903                         struct kvm_segment *var, int seg)
3904 {
3905         kvm_x86_ops->set_segment(vcpu, var, seg);
3906 }
3907
3908 void kvm_get_segment(struct kvm_vcpu *vcpu,
3909                      struct kvm_segment *var, int seg)
3910 {
3911         kvm_x86_ops->get_segment(vcpu, var, seg);
3912 }
3913
3914 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3915 {
3916         gpa_t t_gpa;
3917         struct x86_exception exception;
3918
3919         BUG_ON(!mmu_is_nested(vcpu));
3920
3921         /* NPT walks are always user-walks */
3922         access |= PFERR_USER_MASK;
3923         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3924
3925         return t_gpa;
3926 }
3927
3928 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3929                               struct x86_exception *exception)
3930 {
3931         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3932         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3933 }
3934
3935  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3936                                 struct x86_exception *exception)
3937 {
3938         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3939         access |= PFERR_FETCH_MASK;
3940         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3941 }
3942
3943 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3944                                struct x86_exception *exception)
3945 {
3946         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3947         access |= PFERR_WRITE_MASK;
3948         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3949 }
3950
3951 /* uses this to access any guest's mapped memory without checking CPL */
3952 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3953                                 struct x86_exception *exception)
3954 {
3955         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3956 }
3957
3958 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3959                                       struct kvm_vcpu *vcpu, u32 access,
3960                                       struct x86_exception *exception)
3961 {
3962         void *data = val;
3963         int r = X86EMUL_CONTINUE;
3964
3965         while (bytes) {
3966                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3967                                                             exception);
3968                 unsigned offset = addr & (PAGE_SIZE-1);
3969                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3970                 int ret;
3971
3972                 if (gpa == UNMAPPED_GVA)
3973                         return X86EMUL_PROPAGATE_FAULT;
3974                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3975                 if (ret < 0) {
3976                         r = X86EMUL_IO_NEEDED;
3977                         goto out;
3978                 }
3979
3980                 bytes -= toread;
3981                 data += toread;
3982                 addr += toread;
3983         }
3984 out:
3985         return r;
3986 }
3987
3988 /* used for instruction fetching */
3989 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3990                                 gva_t addr, void *val, unsigned int bytes,
3991                                 struct x86_exception *exception)
3992 {
3993         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3994         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3995
3996         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3997                                           access | PFERR_FETCH_MASK,
3998                                           exception);
3999 }
4000
4001 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4002                                gva_t addr, void *val, unsigned int bytes,
4003                                struct x86_exception *exception)
4004 {
4005         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4006         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4007
4008         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4009                                           exception);
4010 }
4011 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4012
4013 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4014                                       gva_t addr, void *val, unsigned int bytes,
4015                                       struct x86_exception *exception)
4016 {
4017         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4018         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4019 }
4020
4021 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4022                                        gva_t addr, void *val,
4023                                        unsigned int bytes,
4024                                        struct x86_exception *exception)
4025 {
4026         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4027         void *data = val;
4028         int r = X86EMUL_CONTINUE;
4029
4030         while (bytes) {
4031                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4032                                                              PFERR_WRITE_MASK,
4033                                                              exception);
4034                 unsigned offset = addr & (PAGE_SIZE-1);
4035                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4036                 int ret;
4037
4038                 if (gpa == UNMAPPED_GVA)
4039                         return X86EMUL_PROPAGATE_FAULT;
4040                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4041                 if (ret < 0) {
4042                         r = X86EMUL_IO_NEEDED;
4043                         goto out;
4044                 }
4045
4046                 bytes -= towrite;
4047                 data += towrite;
4048                 addr += towrite;
4049         }
4050 out:
4051         return r;
4052 }
4053 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4054
4055 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4056                                 gpa_t *gpa, struct x86_exception *exception,
4057                                 bool write)
4058 {
4059         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4060                 | (write ? PFERR_WRITE_MASK : 0);
4061
4062         if (vcpu_match_mmio_gva(vcpu, gva)
4063             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4064                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4065                                         (gva & (PAGE_SIZE - 1));
4066                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4067                 return 1;
4068         }
4069
4070         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4071
4072         if (*gpa == UNMAPPED_GVA)
4073                 return -1;
4074
4075         /* For APIC access vmexit */
4076         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4077                 return 1;
4078
4079         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4080                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4081                 return 1;
4082         }
4083
4084         return 0;
4085 }
4086
4087 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4088                         const void *val, int bytes)
4089 {
4090         int ret;
4091
4092         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4093         if (ret < 0)
4094                 return 0;
4095         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4096         return 1;
4097 }
4098
4099 struct read_write_emulator_ops {
4100         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4101                                   int bytes);
4102         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4103                                   void *val, int bytes);
4104         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4105                                int bytes, void *val);
4106         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4107                                     void *val, int bytes);
4108         bool write;
4109 };
4110
4111 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4112 {
4113         if (vcpu->mmio_read_completed) {
4114                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4115                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4116                 vcpu->mmio_read_completed = 0;
4117                 return 1;
4118         }
4119
4120         return 0;
4121 }
4122
4123 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4124                         void *val, int bytes)
4125 {
4126         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4127 }
4128
4129 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4130                          void *val, int bytes)
4131 {
4132         return emulator_write_phys(vcpu, gpa, val, bytes);
4133 }
4134
4135 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4136 {
4137         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4138         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4139 }
4140
4141 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4142                           void *val, int bytes)
4143 {
4144         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4145         return X86EMUL_IO_NEEDED;
4146 }
4147
4148 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4149                            void *val, int bytes)
4150 {
4151         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4152
4153         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4154         return X86EMUL_CONTINUE;
4155 }
4156
4157 static const struct read_write_emulator_ops read_emultor = {
4158         .read_write_prepare = read_prepare,
4159         .read_write_emulate = read_emulate,
4160         .read_write_mmio = vcpu_mmio_read,
4161         .read_write_exit_mmio = read_exit_mmio,
4162 };
4163
4164 static const struct read_write_emulator_ops write_emultor = {
4165         .read_write_emulate = write_emulate,
4166         .read_write_mmio = write_mmio,
4167         .read_write_exit_mmio = write_exit_mmio,
4168         .write = true,
4169 };
4170
4171 static int emulator_read_write_onepage(unsigned long addr, void *val,
4172                                        unsigned int bytes,
4173                                        struct x86_exception *exception,
4174                                        struct kvm_vcpu *vcpu,
4175                                        const struct read_write_emulator_ops *ops)
4176 {
4177         gpa_t gpa;
4178         int handled, ret;
4179         bool write = ops->write;
4180         struct kvm_mmio_fragment *frag;
4181
4182         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4183
4184         if (ret < 0)
4185                 return X86EMUL_PROPAGATE_FAULT;
4186
4187         /* For APIC access vmexit */
4188         if (ret)
4189                 goto mmio;
4190
4191         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4192                 return X86EMUL_CONTINUE;
4193
4194 mmio:
4195         /*
4196          * Is this MMIO handled locally?
4197          */
4198         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4199         if (handled == bytes)
4200                 return X86EMUL_CONTINUE;
4201
4202         gpa += handled;
4203         bytes -= handled;
4204         val += handled;
4205
4206         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4207         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4208         frag->gpa = gpa;
4209         frag->data = val;
4210         frag->len = bytes;
4211         return X86EMUL_CONTINUE;
4212 }
4213
4214 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4215                         void *val, unsigned int bytes,
4216                         struct x86_exception *exception,
4217                         const struct read_write_emulator_ops *ops)
4218 {
4219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4220         gpa_t gpa;
4221         int rc;
4222
4223         if (ops->read_write_prepare &&
4224                   ops->read_write_prepare(vcpu, val, bytes))
4225                 return X86EMUL_CONTINUE;
4226
4227         vcpu->mmio_nr_fragments = 0;
4228
4229         /* Crossing a page boundary? */
4230         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4231                 int now;
4232
4233                 now = -addr & ~PAGE_MASK;
4234                 rc = emulator_read_write_onepage(addr, val, now, exception,
4235                                                  vcpu, ops);
4236
4237                 if (rc != X86EMUL_CONTINUE)
4238                         return rc;
4239                 addr += now;
4240                 val += now;
4241                 bytes -= now;
4242         }
4243
4244         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4245                                          vcpu, ops);
4246         if (rc != X86EMUL_CONTINUE)
4247                 return rc;
4248
4249         if (!vcpu->mmio_nr_fragments)
4250                 return rc;
4251
4252         gpa = vcpu->mmio_fragments[0].gpa;
4253
4254         vcpu->mmio_needed = 1;
4255         vcpu->mmio_cur_fragment = 0;
4256
4257         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4258         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4259         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4260         vcpu->run->mmio.phys_addr = gpa;
4261
4262         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4263 }
4264
4265 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4266                                   unsigned long addr,
4267                                   void *val,
4268                                   unsigned int bytes,
4269                                   struct x86_exception *exception)
4270 {
4271         return emulator_read_write(ctxt, addr, val, bytes,
4272                                    exception, &read_emultor);
4273 }
4274
4275 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4276                             unsigned long addr,
4277                             const void *val,
4278                             unsigned int bytes,
4279                             struct x86_exception *exception)
4280 {
4281         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4282                                    exception, &write_emultor);
4283 }
4284
4285 #define CMPXCHG_TYPE(t, ptr, old, new) \
4286         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4287
4288 #ifdef CONFIG_X86_64
4289 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4290 #else
4291 #  define CMPXCHG64(ptr, old, new) \
4292         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4293 #endif
4294
4295 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4296                                      unsigned long addr,
4297                                      const void *old,
4298                                      const void *new,
4299                                      unsigned int bytes,
4300                                      struct x86_exception *exception)
4301 {
4302         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4303         gpa_t gpa;
4304         struct page *page;
4305         char *kaddr;
4306         bool exchanged;
4307
4308         /* guests cmpxchg8b have to be emulated atomically */
4309         if (bytes > 8 || (bytes & (bytes - 1)))
4310                 goto emul_write;
4311
4312         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4313
4314         if (gpa == UNMAPPED_GVA ||
4315             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4316                 goto emul_write;
4317
4318         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4319                 goto emul_write;
4320
4321         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4322         if (is_error_page(page))
4323                 goto emul_write;
4324
4325         kaddr = kmap_atomic(page);
4326         kaddr += offset_in_page(gpa);
4327         switch (bytes) {
4328         case 1:
4329                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4330                 break;
4331         case 2:
4332                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4333                 break;
4334         case 4:
4335                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4336                 break;
4337         case 8:
4338                 exchanged = CMPXCHG64(kaddr, old, new);
4339                 break;
4340         default:
4341                 BUG();
4342         }
4343         kunmap_atomic(kaddr);
4344         kvm_release_page_dirty(page);
4345
4346         if (!exchanged)
4347                 return X86EMUL_CMPXCHG_FAILED;
4348
4349         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4350
4351         return X86EMUL_CONTINUE;
4352
4353 emul_write:
4354         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4355
4356         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4357 }
4358
4359 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4360 {
4361         /* TODO: String I/O for in kernel device */
4362         int r;
4363
4364         if (vcpu->arch.pio.in)
4365                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4366                                     vcpu->arch.pio.size, pd);
4367         else
4368                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4369                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4370                                      pd);
4371         return r;
4372 }
4373
4374 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4375                                unsigned short port, void *val,
4376                                unsigned int count, bool in)
4377 {
4378         trace_kvm_pio(!in, port, size, count);
4379
4380         vcpu->arch.pio.port = port;
4381         vcpu->arch.pio.in = in;
4382         vcpu->arch.pio.count  = count;
4383         vcpu->arch.pio.size = size;
4384
4385         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4386                 vcpu->arch.pio.count = 0;
4387                 return 1;
4388         }
4389
4390         vcpu->run->exit_reason = KVM_EXIT_IO;
4391         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4392         vcpu->run->io.size = size;
4393         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4394         vcpu->run->io.count = count;
4395         vcpu->run->io.port = port;
4396
4397         return 0;
4398 }
4399
4400 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4401                                     int size, unsigned short port, void *val,
4402                                     unsigned int count)
4403 {
4404         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4405         int ret;
4406
4407         if (vcpu->arch.pio.count)
4408                 goto data_avail;
4409
4410         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4411         if (ret) {
4412 data_avail:
4413                 memcpy(val, vcpu->arch.pio_data, size * count);
4414                 vcpu->arch.pio.count = 0;
4415                 return 1;
4416         }
4417
4418         return 0;
4419 }
4420
4421 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4422                                      int size, unsigned short port,
4423                                      const void *val, unsigned int count)
4424 {
4425         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4426
4427         memcpy(vcpu->arch.pio_data, val, size * count);
4428         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4429 }
4430
4431 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4432 {
4433         return kvm_x86_ops->get_segment_base(vcpu, seg);
4434 }
4435
4436 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4437 {
4438         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4439 }
4440
4441 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4442 {
4443         if (!need_emulate_wbinvd(vcpu))
4444                 return X86EMUL_CONTINUE;
4445
4446         if (kvm_x86_ops->has_wbinvd_exit()) {
4447                 int cpu = get_cpu();
4448
4449                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4450                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4451                                 wbinvd_ipi, NULL, 1);
4452                 put_cpu();
4453                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4454         } else
4455                 wbinvd();
4456         return X86EMUL_CONTINUE;
4457 }
4458 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4459
4460 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4461 {
4462         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4463 }
4464
4465 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4466 {
4467         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4468 }
4469
4470 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4471 {
4472
4473         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4474 }
4475
4476 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4477 {
4478         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4479 }
4480
4481 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4482 {
4483         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4484         unsigned long value;
4485
4486         switch (cr) {
4487         case 0:
4488                 value = kvm_read_cr0(vcpu);
4489                 break;
4490         case 2:
4491                 value = vcpu->arch.cr2;
4492                 break;
4493         case 3:
4494                 value = kvm_read_cr3(vcpu);
4495                 break;
4496         case 4:
4497                 value = kvm_read_cr4(vcpu);
4498                 break;
4499         case 8:
4500                 value = kvm_get_cr8(vcpu);
4501                 break;
4502         default:
4503                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4504                 return 0;
4505         }
4506
4507         return value;
4508 }
4509
4510 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4511 {
4512         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4513         int res = 0;
4514
4515         switch (cr) {
4516         case 0:
4517                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4518                 break;
4519         case 2:
4520                 vcpu->arch.cr2 = val;
4521                 break;
4522         case 3:
4523                 res = kvm_set_cr3(vcpu, val);
4524                 break;
4525         case 4:
4526                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4527                 break;
4528         case 8:
4529                 res = kvm_set_cr8(vcpu, val);
4530                 break;
4531         default:
4532                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4533                 res = -1;
4534         }
4535
4536         return res;
4537 }
4538
4539 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4540 {
4541         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4542 }
4543
4544 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4545 {
4546         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4547 }
4548
4549 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4550 {
4551         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4552 }
4553
4554 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4555 {
4556         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4557 }
4558
4559 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4560 {
4561         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4562 }
4563
4564 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4565 {
4566         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4567 }
4568
4569 static unsigned long emulator_get_cached_segment_base(
4570         struct x86_emulate_ctxt *ctxt, int seg)
4571 {
4572         return get_segment_base(emul_to_vcpu(ctxt), seg);
4573 }
4574
4575 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4576                                  struct desc_struct *desc, u32 *base3,
4577                                  int seg)
4578 {
4579         struct kvm_segment var;
4580
4581         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4582         *selector = var.selector;
4583
4584         if (var.unusable) {
4585                 memset(desc, 0, sizeof(*desc));
4586                 return false;
4587         }
4588
4589         if (var.g)
4590                 var.limit >>= 12;
4591         set_desc_limit(desc, var.limit);
4592         set_desc_base(desc, (unsigned long)var.base);
4593 #ifdef CONFIG_X86_64
4594         if (base3)
4595                 *base3 = var.base >> 32;
4596 #endif
4597         desc->type = var.type;
4598         desc->s = var.s;
4599         desc->dpl = var.dpl;
4600         desc->p = var.present;
4601         desc->avl = var.avl;
4602         desc->l = var.l;
4603         desc->d = var.db;
4604         desc->g = var.g;
4605
4606         return true;
4607 }
4608
4609 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4610                                  struct desc_struct *desc, u32 base3,
4611                                  int seg)
4612 {
4613         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4614         struct kvm_segment var;
4615
4616         var.selector = selector;
4617         var.base = get_desc_base(desc);
4618 #ifdef CONFIG_X86_64
4619         var.base |= ((u64)base3) << 32;
4620 #endif
4621         var.limit = get_desc_limit(desc);
4622         if (desc->g)
4623                 var.limit = (var.limit << 12) | 0xfff;
4624         var.type = desc->type;
4625         var.present = desc->p;
4626         var.dpl = desc->dpl;
4627         var.db = desc->d;
4628         var.s = desc->s;
4629         var.l = desc->l;
4630         var.g = desc->g;
4631         var.avl = desc->avl;
4632         var.present = desc->p;
4633         var.unusable = !var.present;
4634         var.padding = 0;
4635
4636         kvm_set_segment(vcpu, &var, seg);
4637         return;
4638 }
4639
4640 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4641                             u32 msr_index, u64 *pdata)
4642 {
4643         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4644 }
4645
4646 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4647                             u32 msr_index, u64 data)
4648 {
4649         struct msr_data msr;
4650
4651         msr.data = data;
4652         msr.index = msr_index;
4653         msr.host_initiated = false;
4654         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4655 }
4656
4657 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4658                              u32 pmc, u64 *pdata)
4659 {
4660         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4661 }
4662
4663 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4664 {
4665         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4666 }
4667
4668 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4669 {
4670         preempt_disable();
4671         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4672         /*
4673          * CR0.TS may reference the host fpu state, not the guest fpu state,
4674          * so it may be clear at this point.
4675          */
4676         clts();
4677 }
4678
4679 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4680 {
4681         preempt_enable();
4682 }
4683
4684 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4685                               struct x86_instruction_info *info,
4686                               enum x86_intercept_stage stage)
4687 {
4688         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4689 }
4690
4691 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4692                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4693 {
4694         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4695 }
4696
4697 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4698 {
4699         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4700 }
4701
4702 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4703 {
4704         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4705 }
4706
4707 static const struct x86_emulate_ops emulate_ops = {
4708         .read_gpr            = emulator_read_gpr,
4709         .write_gpr           = emulator_write_gpr,
4710         .read_std            = kvm_read_guest_virt_system,
4711         .write_std           = kvm_write_guest_virt_system,
4712         .fetch               = kvm_fetch_guest_virt,
4713         .read_emulated       = emulator_read_emulated,
4714         .write_emulated      = emulator_write_emulated,
4715         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4716         .invlpg              = emulator_invlpg,
4717         .pio_in_emulated     = emulator_pio_in_emulated,
4718         .pio_out_emulated    = emulator_pio_out_emulated,
4719         .get_segment         = emulator_get_segment,
4720         .set_segment         = emulator_set_segment,
4721         .get_cached_segment_base = emulator_get_cached_segment_base,
4722         .get_gdt             = emulator_get_gdt,
4723         .get_idt             = emulator_get_idt,
4724         .set_gdt             = emulator_set_gdt,
4725         .set_idt             = emulator_set_idt,
4726         .get_cr              = emulator_get_cr,
4727         .set_cr              = emulator_set_cr,
4728         .set_rflags          = emulator_set_rflags,
4729         .cpl                 = emulator_get_cpl,
4730         .get_dr              = emulator_get_dr,
4731         .set_dr              = emulator_set_dr,
4732         .set_msr             = emulator_set_msr,
4733         .get_msr             = emulator_get_msr,
4734         .read_pmc            = emulator_read_pmc,
4735         .halt                = emulator_halt,
4736         .wbinvd              = emulator_wbinvd,
4737         .fix_hypercall       = emulator_fix_hypercall,
4738         .get_fpu             = emulator_get_fpu,
4739         .put_fpu             = emulator_put_fpu,
4740         .intercept           = emulator_intercept,
4741         .get_cpuid           = emulator_get_cpuid,
4742 };
4743
4744 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4745 {
4746         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4747         /*
4748          * an sti; sti; sequence only disable interrupts for the first
4749          * instruction. So, if the last instruction, be it emulated or
4750          * not, left the system with the INT_STI flag enabled, it
4751          * means that the last instruction is an sti. We should not
4752          * leave the flag on in this case. The same goes for mov ss
4753          */
4754         if (!(int_shadow & mask))
4755                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4756 }
4757
4758 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4759 {
4760         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4761         if (ctxt->exception.vector == PF_VECTOR)
4762                 kvm_propagate_fault(vcpu, &ctxt->exception);
4763         else if (ctxt->exception.error_code_valid)
4764                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4765                                       ctxt->exception.error_code);
4766         else
4767                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4768 }
4769
4770 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4771 {
4772         memset(&ctxt->twobyte, 0,
4773                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4774
4775         ctxt->fetch.start = 0;
4776         ctxt->fetch.end = 0;
4777         ctxt->io_read.pos = 0;
4778         ctxt->io_read.end = 0;
4779         ctxt->mem_read.pos = 0;
4780         ctxt->mem_read.end = 0;
4781 }
4782
4783 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4784 {
4785         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4786         int cs_db, cs_l;
4787
4788         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4789
4790         ctxt->eflags = kvm_get_rflags(vcpu);
4791         ctxt->eip = kvm_rip_read(vcpu);
4792         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4793                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4794                      cs_l                               ? X86EMUL_MODE_PROT64 :
4795                      cs_db                              ? X86EMUL_MODE_PROT32 :
4796                                                           X86EMUL_MODE_PROT16;
4797         ctxt->guest_mode = is_guest_mode(vcpu);
4798
4799         init_decode_cache(ctxt);
4800         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4801 }
4802
4803 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4804 {
4805         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4806         int ret;
4807
4808         init_emulate_ctxt(vcpu);
4809
4810         ctxt->op_bytes = 2;
4811         ctxt->ad_bytes = 2;
4812         ctxt->_eip = ctxt->eip + inc_eip;
4813         ret = emulate_int_real(ctxt, irq);
4814
4815         if (ret != X86EMUL_CONTINUE)
4816                 return EMULATE_FAIL;
4817
4818         ctxt->eip = ctxt->_eip;
4819         kvm_rip_write(vcpu, ctxt->eip);
4820         kvm_set_rflags(vcpu, ctxt->eflags);
4821
4822         if (irq == NMI_VECTOR)
4823                 vcpu->arch.nmi_pending = 0;
4824         else
4825                 vcpu->arch.interrupt.pending = false;
4826
4827         return EMULATE_DONE;
4828 }
4829 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4830
4831 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4832 {
4833         int r = EMULATE_DONE;
4834
4835         ++vcpu->stat.insn_emulation_fail;
4836         trace_kvm_emulate_insn_failed(vcpu);
4837         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4838                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4839                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4840                 vcpu->run->internal.ndata = 0;
4841                 r = EMULATE_FAIL;
4842         }
4843         kvm_queue_exception(vcpu, UD_VECTOR);
4844
4845         return r;
4846 }
4847
4848 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4849                                   bool write_fault_to_shadow_pgtable,
4850                                   int emulation_type)
4851 {
4852         gpa_t gpa = cr2;
4853         pfn_t pfn;
4854
4855         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4856                 return false;
4857
4858         if (!vcpu->arch.mmu.direct_map) {
4859                 /*
4860                  * Write permission should be allowed since only
4861                  * write access need to be emulated.
4862                  */
4863                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4864
4865                 /*
4866                  * If the mapping is invalid in guest, let cpu retry
4867                  * it to generate fault.
4868                  */
4869                 if (gpa == UNMAPPED_GVA)
4870                         return true;
4871         }
4872
4873         /*
4874          * Do not retry the unhandleable instruction if it faults on the
4875          * readonly host memory, otherwise it will goto a infinite loop:
4876          * retry instruction -> write #PF -> emulation fail -> retry
4877          * instruction -> ...
4878          */
4879         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4880
4881         /*
4882          * If the instruction failed on the error pfn, it can not be fixed,
4883          * report the error to userspace.
4884          */
4885         if (is_error_noslot_pfn(pfn))
4886                 return false;
4887
4888         kvm_release_pfn_clean(pfn);
4889
4890         /* The instructions are well-emulated on direct mmu. */
4891         if (vcpu->arch.mmu.direct_map) {
4892                 unsigned int indirect_shadow_pages;
4893
4894                 spin_lock(&vcpu->kvm->mmu_lock);
4895                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4896                 spin_unlock(&vcpu->kvm->mmu_lock);
4897
4898                 if (indirect_shadow_pages)
4899                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4900
4901                 return true;
4902         }
4903
4904         /*
4905          * if emulation was due to access to shadowed page table
4906          * and it failed try to unshadow page and re-enter the
4907          * guest to let CPU execute the instruction.
4908          */
4909         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4910
4911         /*
4912          * If the access faults on its page table, it can not
4913          * be fixed by unprotecting shadow page and it should
4914          * be reported to userspace.
4915          */
4916         return !write_fault_to_shadow_pgtable;
4917 }
4918
4919 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4920                               unsigned long cr2,  int emulation_type)
4921 {
4922         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4923         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4924
4925         last_retry_eip = vcpu->arch.last_retry_eip;
4926         last_retry_addr = vcpu->arch.last_retry_addr;
4927
4928         /*
4929          * If the emulation is caused by #PF and it is non-page_table
4930          * writing instruction, it means the VM-EXIT is caused by shadow
4931          * page protected, we can zap the shadow page and retry this
4932          * instruction directly.
4933          *
4934          * Note: if the guest uses a non-page-table modifying instruction
4935          * on the PDE that points to the instruction, then we will unmap
4936          * the instruction and go to an infinite loop. So, we cache the
4937          * last retried eip and the last fault address, if we meet the eip
4938          * and the address again, we can break out of the potential infinite
4939          * loop.
4940          */
4941         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4942
4943         if (!(emulation_type & EMULTYPE_RETRY))
4944                 return false;
4945
4946         if (x86_page_table_writing_insn(ctxt))
4947                 return false;
4948
4949         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4950                 return false;
4951
4952         vcpu->arch.last_retry_eip = ctxt->eip;
4953         vcpu->arch.last_retry_addr = cr2;
4954
4955         if (!vcpu->arch.mmu.direct_map)
4956                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4957
4958         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4959
4960         return true;
4961 }
4962
4963 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4964 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4965
4966 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4967                             unsigned long cr2,
4968                             int emulation_type,
4969                             void *insn,
4970                             int insn_len)
4971 {
4972         int r;
4973         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4974         bool writeback = true;
4975         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4976
4977         /*
4978          * Clear write_fault_to_shadow_pgtable here to ensure it is
4979          * never reused.
4980          */
4981         vcpu->arch.write_fault_to_shadow_pgtable = false;
4982         kvm_clear_exception_queue(vcpu);
4983
4984         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4985                 init_emulate_ctxt(vcpu);
4986                 ctxt->interruptibility = 0;
4987                 ctxt->have_exception = false;
4988                 ctxt->perm_ok = false;
4989
4990                 ctxt->only_vendor_specific_insn
4991                         = emulation_type & EMULTYPE_TRAP_UD;
4992
4993                 r = x86_decode_insn(ctxt, insn, insn_len);
4994
4995                 trace_kvm_emulate_insn_start(vcpu);
4996                 ++vcpu->stat.insn_emulation;
4997                 if (r != EMULATION_OK)  {
4998                         if (emulation_type & EMULTYPE_TRAP_UD)
4999                                 return EMULATE_FAIL;
5000                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5001                                                 emulation_type))
5002                                 return EMULATE_DONE;
5003                         if (emulation_type & EMULTYPE_SKIP)
5004                                 return EMULATE_FAIL;
5005                         return handle_emulation_failure(vcpu);
5006                 }
5007         }
5008
5009         if (emulation_type & EMULTYPE_SKIP) {
5010                 kvm_rip_write(vcpu, ctxt->_eip);
5011                 return EMULATE_DONE;
5012         }
5013
5014         if (retry_instruction(ctxt, cr2, emulation_type))
5015                 return EMULATE_DONE;
5016
5017         /* this is needed for vmware backdoor interface to work since it
5018            changes registers values  during IO operation */
5019         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5020                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5021                 emulator_invalidate_register_cache(ctxt);
5022         }
5023
5024 restart:
5025         r = x86_emulate_insn(ctxt);
5026
5027         if (r == EMULATION_INTERCEPTED)
5028                 return EMULATE_DONE;
5029
5030         if (r == EMULATION_FAILED) {
5031                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5032                                         emulation_type))
5033                         return EMULATE_DONE;
5034
5035                 return handle_emulation_failure(vcpu);
5036         }
5037
5038         if (ctxt->have_exception) {
5039                 inject_emulated_exception(vcpu);
5040                 r = EMULATE_DONE;
5041         } else if (vcpu->arch.pio.count) {
5042                 if (!vcpu->arch.pio.in)
5043                         vcpu->arch.pio.count = 0;
5044                 else {
5045                         writeback = false;
5046                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5047                 }
5048                 r = EMULATE_DO_MMIO;
5049         } else if (vcpu->mmio_needed) {
5050                 if (!vcpu->mmio_is_write)
5051                         writeback = false;
5052                 r = EMULATE_DO_MMIO;
5053                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5054         } else if (r == EMULATION_RESTART)
5055                 goto restart;
5056         else
5057                 r = EMULATE_DONE;
5058
5059         if (writeback) {
5060                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5061                 kvm_set_rflags(vcpu, ctxt->eflags);
5062                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5063                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5064                 kvm_rip_write(vcpu, ctxt->eip);
5065         } else
5066                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5067
5068         return r;
5069 }
5070 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5071
5072 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5073 {
5074         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5075         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5076                                             size, port, &val, 1);
5077         /* do not return to emulator after return from userspace */
5078         vcpu->arch.pio.count = 0;
5079         return ret;
5080 }
5081 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5082
5083 static void tsc_bad(void *info)
5084 {
5085         __this_cpu_write(cpu_tsc_khz, 0);
5086 }
5087
5088 static void tsc_khz_changed(void *data)
5089 {
5090         struct cpufreq_freqs *freq = data;
5091         unsigned long khz = 0;
5092
5093         if (data)
5094                 khz = freq->new;
5095         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5096                 khz = cpufreq_quick_get(raw_smp_processor_id());
5097         if (!khz)
5098                 khz = tsc_khz;
5099         __this_cpu_write(cpu_tsc_khz, khz);
5100 }
5101
5102 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5103                                      void *data)
5104 {
5105         struct cpufreq_freqs *freq = data;
5106         struct kvm *kvm;
5107         struct kvm_vcpu *vcpu;
5108         int i, send_ipi = 0;
5109
5110         /*
5111          * We allow guests to temporarily run on slowing clocks,
5112          * provided we notify them after, or to run on accelerating
5113          * clocks, provided we notify them before.  Thus time never
5114          * goes backwards.
5115          *
5116          * However, we have a problem.  We can't atomically update
5117          * the frequency of a given CPU from this function; it is
5118          * merely a notifier, which can be called from any CPU.
5119          * Changing the TSC frequency at arbitrary points in time
5120          * requires a recomputation of local variables related to
5121          * the TSC for each VCPU.  We must flag these local variables
5122          * to be updated and be sure the update takes place with the
5123          * new frequency before any guests proceed.
5124          *
5125          * Unfortunately, the combination of hotplug CPU and frequency
5126          * change creates an intractable locking scenario; the order
5127          * of when these callouts happen is undefined with respect to
5128          * CPU hotplug, and they can race with each other.  As such,
5129          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5130          * undefined; you can actually have a CPU frequency change take
5131          * place in between the computation of X and the setting of the
5132          * variable.  To protect against this problem, all updates of
5133          * the per_cpu tsc_khz variable are done in an interrupt
5134          * protected IPI, and all callers wishing to update the value
5135          * must wait for a synchronous IPI to complete (which is trivial
5136          * if the caller is on the CPU already).  This establishes the
5137          * necessary total order on variable updates.
5138          *
5139          * Note that because a guest time update may take place
5140          * anytime after the setting of the VCPU's request bit, the
5141          * correct TSC value must be set before the request.  However,
5142          * to ensure the update actually makes it to any guest which
5143          * starts running in hardware virtualization between the set
5144          * and the acquisition of the spinlock, we must also ping the
5145          * CPU after setting the request bit.
5146          *
5147          */
5148
5149         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5150                 return 0;
5151         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5152                 return 0;
5153
5154         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5155
5156         raw_spin_lock(&kvm_lock);
5157         list_for_each_entry(kvm, &vm_list, vm_list) {
5158                 kvm_for_each_vcpu(i, vcpu, kvm) {
5159                         if (vcpu->cpu != freq->cpu)
5160                                 continue;
5161                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5162                         if (vcpu->cpu != smp_processor_id())
5163                                 send_ipi = 1;
5164                 }
5165         }
5166         raw_spin_unlock(&kvm_lock);
5167
5168         if (freq->old < freq->new && send_ipi) {
5169                 /*
5170                  * We upscale the frequency.  Must make the guest
5171                  * doesn't see old kvmclock values while running with
5172                  * the new frequency, otherwise we risk the guest sees
5173                  * time go backwards.
5174                  *
5175                  * In case we update the frequency for another cpu
5176                  * (which might be in guest context) send an interrupt
5177                  * to kick the cpu out of guest context.  Next time
5178                  * guest context is entered kvmclock will be updated,
5179                  * so the guest will not see stale values.
5180                  */
5181                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5182         }
5183         return 0;
5184 }
5185
5186 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5187         .notifier_call  = kvmclock_cpufreq_notifier
5188 };
5189
5190 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5191                                         unsigned long action, void *hcpu)
5192 {
5193         unsigned int cpu = (unsigned long)hcpu;
5194
5195         switch (action) {
5196                 case CPU_ONLINE:
5197                 case CPU_DOWN_FAILED:
5198                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5199                         break;
5200                 case CPU_DOWN_PREPARE:
5201                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5202                         break;
5203         }
5204         return NOTIFY_OK;
5205 }
5206
5207 static struct notifier_block kvmclock_cpu_notifier_block = {
5208         .notifier_call  = kvmclock_cpu_notifier,
5209         .priority = -INT_MAX
5210 };
5211
5212 static void kvm_timer_init(void)
5213 {
5214         int cpu;
5215
5216         max_tsc_khz = tsc_khz;
5217         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5218         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5219 #ifdef CONFIG_CPU_FREQ
5220                 struct cpufreq_policy policy;
5221                 memset(&policy, 0, sizeof(policy));
5222                 cpu = get_cpu();
5223                 cpufreq_get_policy(&policy, cpu);
5224                 if (policy.cpuinfo.max_freq)
5225                         max_tsc_khz = policy.cpuinfo.max_freq;
5226                 put_cpu();
5227 #endif
5228                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5229                                           CPUFREQ_TRANSITION_NOTIFIER);
5230         }
5231         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5232         for_each_online_cpu(cpu)
5233                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5234 }
5235
5236 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5237
5238 int kvm_is_in_guest(void)
5239 {
5240         return __this_cpu_read(current_vcpu) != NULL;
5241 }
5242
5243 static int kvm_is_user_mode(void)
5244 {
5245         int user_mode = 3;
5246
5247         if (__this_cpu_read(current_vcpu))
5248                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5249
5250         return user_mode != 0;
5251 }
5252
5253 static unsigned long kvm_get_guest_ip(void)
5254 {
5255         unsigned long ip = 0;
5256
5257         if (__this_cpu_read(current_vcpu))
5258                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5259
5260         return ip;
5261 }
5262
5263 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5264         .is_in_guest            = kvm_is_in_guest,
5265         .is_user_mode           = kvm_is_user_mode,
5266         .get_guest_ip           = kvm_get_guest_ip,
5267 };
5268
5269 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5270 {
5271         __this_cpu_write(current_vcpu, vcpu);
5272 }
5273 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5274
5275 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5276 {
5277         __this_cpu_write(current_vcpu, NULL);
5278 }
5279 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5280
5281 static void kvm_set_mmio_spte_mask(void)
5282 {
5283         u64 mask;
5284         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5285
5286         /*
5287          * Set the reserved bits and the present bit of an paging-structure
5288          * entry to generate page fault with PFER.RSV = 1.
5289          */
5290         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5291         mask |= 1ull;
5292
5293 #ifdef CONFIG_X86_64
5294         /*
5295          * If reserved bit is not supported, clear the present bit to disable
5296          * mmio page fault.
5297          */
5298         if (maxphyaddr == 52)
5299                 mask &= ~1ull;
5300 #endif
5301
5302         kvm_mmu_set_mmio_spte_mask(mask);
5303 }
5304
5305 #ifdef CONFIG_X86_64
5306 static void pvclock_gtod_update_fn(struct work_struct *work)
5307 {
5308         struct kvm *kvm;
5309
5310         struct kvm_vcpu *vcpu;
5311         int i;
5312
5313         raw_spin_lock(&kvm_lock);
5314         list_for_each_entry(kvm, &vm_list, vm_list)
5315                 kvm_for_each_vcpu(i, vcpu, kvm)
5316                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5317         atomic_set(&kvm_guest_has_master_clock, 0);
5318         raw_spin_unlock(&kvm_lock);
5319 }
5320
5321 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5322
5323 /*
5324  * Notification about pvclock gtod data update.
5325  */
5326 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5327                                void *priv)
5328 {
5329         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5330         struct timekeeper *tk = priv;
5331
5332         update_pvclock_gtod(tk);
5333
5334         /* disable master clock if host does not trust, or does not
5335          * use, TSC clocksource
5336          */
5337         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5338             atomic_read(&kvm_guest_has_master_clock) != 0)
5339                 queue_work(system_long_wq, &pvclock_gtod_work);
5340
5341         return 0;
5342 }
5343
5344 static struct notifier_block pvclock_gtod_notifier = {
5345         .notifier_call = pvclock_gtod_notify,
5346 };
5347 #endif
5348
5349 int kvm_arch_init(void *opaque)
5350 {
5351         int r;
5352         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5353
5354         if (kvm_x86_ops) {
5355                 printk(KERN_ERR "kvm: already loaded the other module\n");
5356                 r = -EEXIST;
5357                 goto out;
5358         }
5359
5360         if (!ops->cpu_has_kvm_support()) {
5361                 printk(KERN_ERR "kvm: no hardware support\n");
5362                 r = -EOPNOTSUPP;
5363                 goto out;
5364         }
5365         if (ops->disabled_by_bios()) {
5366                 printk(KERN_ERR "kvm: disabled by bios\n");
5367                 r = -EOPNOTSUPP;
5368                 goto out;
5369         }
5370
5371         r = -ENOMEM;
5372         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5373         if (!shared_msrs) {
5374                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5375                 goto out;
5376         }
5377
5378         r = kvm_mmu_module_init();
5379         if (r)
5380                 goto out_free_percpu;
5381
5382         kvm_set_mmio_spte_mask();
5383         kvm_init_msr_list();
5384
5385         kvm_x86_ops = ops;
5386         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5387                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5388
5389         kvm_timer_init();
5390
5391         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5392
5393         if (cpu_has_xsave)
5394                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5395
5396         kvm_lapic_init();
5397 #ifdef CONFIG_X86_64
5398         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5399 #endif
5400
5401         return 0;
5402
5403 out_free_percpu:
5404         free_percpu(shared_msrs);
5405 out:
5406         return r;
5407 }
5408
5409 void kvm_arch_exit(void)
5410 {
5411         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5412
5413         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5414                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5415                                             CPUFREQ_TRANSITION_NOTIFIER);
5416         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5417 #ifdef CONFIG_X86_64
5418         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5419 #endif
5420         kvm_x86_ops = NULL;
5421         kvm_mmu_module_exit();
5422         free_percpu(shared_msrs);
5423 }
5424
5425 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5426 {
5427         ++vcpu->stat.halt_exits;
5428         if (irqchip_in_kernel(vcpu->kvm)) {
5429                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5430                 return 1;
5431         } else {
5432                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5433                 return 0;
5434         }
5435 }
5436 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5437
5438 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5439 {
5440         u64 param, ingpa, outgpa, ret;
5441         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5442         bool fast, longmode;
5443         int cs_db, cs_l;
5444
5445         /*
5446          * hypercall generates UD from non zero cpl and real mode
5447          * per HYPER-V spec
5448          */
5449         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5450                 kvm_queue_exception(vcpu, UD_VECTOR);
5451                 return 0;
5452         }
5453
5454         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5455         longmode = is_long_mode(vcpu) && cs_l == 1;
5456
5457         if (!longmode) {
5458                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5459                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5460                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5461                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5462                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5463                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5464         }
5465 #ifdef CONFIG_X86_64
5466         else {
5467                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5468                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5469                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5470         }
5471 #endif
5472
5473         code = param & 0xffff;
5474         fast = (param >> 16) & 0x1;
5475         rep_cnt = (param >> 32) & 0xfff;
5476         rep_idx = (param >> 48) & 0xfff;
5477
5478         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5479
5480         switch (code) {
5481         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5482                 kvm_vcpu_on_spin(vcpu);
5483                 break;
5484         default:
5485                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5486                 break;
5487         }
5488
5489         ret = res | (((u64)rep_done & 0xfff) << 32);
5490         if (longmode) {
5491                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5492         } else {
5493                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5494                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5495         }
5496
5497         return 1;
5498 }
5499
5500 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5501 {
5502         unsigned long nr, a0, a1, a2, a3, ret;
5503         int r = 1;
5504
5505         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5506                 return kvm_hv_hypercall(vcpu);
5507
5508         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5509         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5510         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5511         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5512         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5513
5514         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5515
5516         if (!is_long_mode(vcpu)) {
5517                 nr &= 0xFFFFFFFF;
5518                 a0 &= 0xFFFFFFFF;
5519                 a1 &= 0xFFFFFFFF;
5520                 a2 &= 0xFFFFFFFF;
5521                 a3 &= 0xFFFFFFFF;
5522         }
5523
5524         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5525                 ret = -KVM_EPERM;
5526                 goto out;
5527         }
5528
5529         switch (nr) {
5530         case KVM_HC_VAPIC_POLL_IRQ:
5531                 ret = 0;
5532                 break;
5533         default:
5534                 ret = -KVM_ENOSYS;
5535                 break;
5536         }
5537 out:
5538         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5539         ++vcpu->stat.hypercalls;
5540         return r;
5541 }
5542 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5543
5544 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5545 {
5546         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5547         char instruction[3];
5548         unsigned long rip = kvm_rip_read(vcpu);
5549
5550         /*
5551          * Blow out the MMU to ensure that no other VCPU has an active mapping
5552          * to ensure that the updated hypercall appears atomically across all
5553          * VCPUs.
5554          */
5555         kvm_mmu_zap_all(vcpu->kvm);
5556
5557         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5558
5559         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5560 }
5561
5562 /*
5563  * Check if userspace requested an interrupt window, and that the
5564  * interrupt window is open.
5565  *
5566  * No need to exit to userspace if we already have an interrupt queued.
5567  */
5568 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5569 {
5570         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5571                 vcpu->run->request_interrupt_window &&
5572                 kvm_arch_interrupt_allowed(vcpu));
5573 }
5574
5575 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5576 {
5577         struct kvm_run *kvm_run = vcpu->run;
5578
5579         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5580         kvm_run->cr8 = kvm_get_cr8(vcpu);
5581         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5582         if (irqchip_in_kernel(vcpu->kvm))
5583                 kvm_run->ready_for_interrupt_injection = 1;
5584         else
5585                 kvm_run->ready_for_interrupt_injection =
5586                         kvm_arch_interrupt_allowed(vcpu) &&
5587                         !kvm_cpu_has_interrupt(vcpu) &&
5588                         !kvm_event_needs_reinjection(vcpu);
5589 }
5590
5591 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5592 {
5593         int max_irr, tpr;
5594
5595         if (!kvm_x86_ops->update_cr8_intercept)
5596                 return;
5597
5598         if (!vcpu->arch.apic)
5599                 return;
5600
5601         if (!vcpu->arch.apic->vapic_addr)
5602                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5603         else
5604                 max_irr = -1;
5605
5606         if (max_irr != -1)
5607                 max_irr >>= 4;
5608
5609         tpr = kvm_lapic_get_cr8(vcpu);
5610
5611         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5612 }
5613
5614 static void inject_pending_event(struct kvm_vcpu *vcpu)
5615 {
5616         /* try to reinject previous events if any */
5617         if (vcpu->arch.exception.pending) {
5618                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5619                                         vcpu->arch.exception.has_error_code,
5620                                         vcpu->arch.exception.error_code);
5621                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5622                                           vcpu->arch.exception.has_error_code,
5623                                           vcpu->arch.exception.error_code,
5624                                           vcpu->arch.exception.reinject);
5625                 return;
5626         }
5627
5628         if (vcpu->arch.nmi_injected) {
5629                 kvm_x86_ops->set_nmi(vcpu);
5630                 return;
5631         }
5632
5633         if (vcpu->arch.interrupt.pending) {
5634                 kvm_x86_ops->set_irq(vcpu);
5635                 return;
5636         }
5637
5638         /* try to inject new event if pending */
5639         if (vcpu->arch.nmi_pending) {
5640                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5641                         --vcpu->arch.nmi_pending;
5642                         vcpu->arch.nmi_injected = true;
5643                         kvm_x86_ops->set_nmi(vcpu);
5644                 }
5645         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5646                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5647                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5648                                             false);
5649                         kvm_x86_ops->set_irq(vcpu);
5650                 }
5651         }
5652 }
5653
5654 static void process_nmi(struct kvm_vcpu *vcpu)
5655 {
5656         unsigned limit = 2;
5657
5658         /*
5659          * x86 is limited to one NMI running, and one NMI pending after it.
5660          * If an NMI is already in progress, limit further NMIs to just one.
5661          * Otherwise, allow two (and we'll inject the first one immediately).
5662          */
5663         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5664                 limit = 1;
5665
5666         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5667         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5668         kvm_make_request(KVM_REQ_EVENT, vcpu);
5669 }
5670
5671 static void kvm_gen_update_masterclock(struct kvm *kvm)
5672 {
5673 #ifdef CONFIG_X86_64
5674         int i;
5675         struct kvm_vcpu *vcpu;
5676         struct kvm_arch *ka = &kvm->arch;
5677
5678         spin_lock(&ka->pvclock_gtod_sync_lock);
5679         kvm_make_mclock_inprogress_request(kvm);
5680         /* no guest entries from this point */
5681         pvclock_update_vm_gtod_copy(kvm);
5682
5683         kvm_for_each_vcpu(i, vcpu, kvm)
5684                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5685
5686         /* guest entries allowed */
5687         kvm_for_each_vcpu(i, vcpu, kvm)
5688                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5689
5690         spin_unlock(&ka->pvclock_gtod_sync_lock);
5691 #endif
5692 }
5693
5694 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5695 {
5696         u64 eoi_exit_bitmap[4];
5697         u32 tmr[8];
5698
5699         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5700                 return;
5701
5702         memset(eoi_exit_bitmap, 0, 32);
5703         memset(tmr, 0, 32);
5704
5705         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5706         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5707         kvm_apic_update_tmr(vcpu, tmr);
5708 }
5709
5710 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5711 {
5712         int r;
5713         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5714                 vcpu->run->request_interrupt_window;
5715         bool req_immediate_exit = false;
5716
5717         if (vcpu->requests) {
5718                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5719                         kvm_mmu_unload(vcpu);
5720                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5721                         __kvm_migrate_timers(vcpu);
5722                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5723                         kvm_gen_update_masterclock(vcpu->kvm);
5724                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5725                         r = kvm_guest_time_update(vcpu);
5726                         if (unlikely(r))
5727                                 goto out;
5728                 }
5729                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5730                         kvm_mmu_sync_roots(vcpu);
5731                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5732                         kvm_x86_ops->tlb_flush(vcpu);
5733                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5734                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5735                         r = 0;
5736                         goto out;
5737                 }
5738                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5739                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5740                         r = 0;
5741                         goto out;
5742                 }
5743                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5744                         vcpu->fpu_active = 0;
5745                         kvm_x86_ops->fpu_deactivate(vcpu);
5746                 }
5747                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5748                         /* Page is swapped out. Do synthetic halt */
5749                         vcpu->arch.apf.halted = true;
5750                         r = 1;
5751                         goto out;
5752                 }
5753                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5754                         record_steal_time(vcpu);
5755                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5756                         process_nmi(vcpu);
5757                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5758                         kvm_handle_pmu_event(vcpu);
5759                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5760                         kvm_deliver_pmi(vcpu);
5761                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5762                         vcpu_scan_ioapic(vcpu);
5763         }
5764
5765         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5766                 kvm_apic_accept_events(vcpu);
5767                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5768                         r = 1;
5769                         goto out;
5770                 }
5771
5772                 inject_pending_event(vcpu);
5773
5774                 /* enable NMI/IRQ window open exits if needed */
5775                 if (vcpu->arch.nmi_pending)
5776                         req_immediate_exit =
5777                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5778                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5779                         req_immediate_exit =
5780                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5781
5782                 if (kvm_lapic_enabled(vcpu)) {
5783                         /*
5784                          * Update architecture specific hints for APIC
5785                          * virtual interrupt delivery.
5786                          */
5787                         if (kvm_x86_ops->hwapic_irr_update)
5788                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5789                                         kvm_lapic_find_highest_irr(vcpu));
5790                         update_cr8_intercept(vcpu);
5791                         kvm_lapic_sync_to_vapic(vcpu);
5792                 }
5793         }
5794
5795         r = kvm_mmu_reload(vcpu);
5796         if (unlikely(r)) {
5797                 goto cancel_injection;
5798         }
5799
5800         preempt_disable();
5801
5802         kvm_x86_ops->prepare_guest_switch(vcpu);
5803         if (vcpu->fpu_active)
5804                 kvm_load_guest_fpu(vcpu);
5805         kvm_load_guest_xcr0(vcpu);
5806
5807         vcpu->mode = IN_GUEST_MODE;
5808
5809         /* We should set ->mode before check ->requests,
5810          * see the comment in make_all_cpus_request.
5811          */
5812         smp_mb();
5813
5814         local_irq_disable();
5815
5816         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5817             || need_resched() || signal_pending(current)) {
5818                 vcpu->mode = OUTSIDE_GUEST_MODE;
5819                 smp_wmb();
5820                 local_irq_enable();
5821                 preempt_enable();
5822                 r = 1;
5823                 goto cancel_injection;
5824         }
5825
5826         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5827
5828         if (req_immediate_exit)
5829                 smp_send_reschedule(vcpu->cpu);
5830
5831         kvm_guest_enter();
5832
5833         if (unlikely(vcpu->arch.switch_db_regs)) {
5834                 set_debugreg(0, 7);
5835                 set_debugreg(vcpu->arch.eff_db[0], 0);
5836                 set_debugreg(vcpu->arch.eff_db[1], 1);
5837                 set_debugreg(vcpu->arch.eff_db[2], 2);
5838                 set_debugreg(vcpu->arch.eff_db[3], 3);
5839         }
5840
5841         trace_kvm_entry(vcpu->vcpu_id);
5842         kvm_x86_ops->run(vcpu);
5843
5844         /*
5845          * If the guest has used debug registers, at least dr7
5846          * will be disabled while returning to the host.
5847          * If we don't have active breakpoints in the host, we don't
5848          * care about the messed up debug address registers. But if
5849          * we have some of them active, restore the old state.
5850          */
5851         if (hw_breakpoint_active())
5852                 hw_breakpoint_restore();
5853
5854         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5855                                                            native_read_tsc());
5856
5857         vcpu->mode = OUTSIDE_GUEST_MODE;
5858         smp_wmb();
5859
5860         /* Interrupt is enabled by handle_external_intr() */
5861         kvm_x86_ops->handle_external_intr(vcpu);
5862
5863         ++vcpu->stat.exits;
5864
5865         /*
5866          * We must have an instruction between local_irq_enable() and
5867          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5868          * the interrupt shadow.  The stat.exits increment will do nicely.
5869          * But we need to prevent reordering, hence this barrier():
5870          */
5871         barrier();
5872
5873         kvm_guest_exit();
5874
5875         preempt_enable();
5876
5877         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5878
5879         /*
5880          * Profile KVM exit RIPs:
5881          */
5882         if (unlikely(prof_on == KVM_PROFILING)) {
5883                 unsigned long rip = kvm_rip_read(vcpu);
5884                 profile_hit(KVM_PROFILING, (void *)rip);
5885         }
5886
5887         if (unlikely(vcpu->arch.tsc_always_catchup))
5888                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5889
5890         if (vcpu->arch.apic_attention)
5891                 kvm_lapic_sync_from_vapic(vcpu);
5892
5893         r = kvm_x86_ops->handle_exit(vcpu);
5894         return r;
5895
5896 cancel_injection:
5897         kvm_x86_ops->cancel_injection(vcpu);
5898         if (unlikely(vcpu->arch.apic_attention))
5899                 kvm_lapic_sync_from_vapic(vcpu);
5900 out:
5901         return r;
5902 }
5903
5904
5905 static int __vcpu_run(struct kvm_vcpu *vcpu)
5906 {
5907         int r;
5908         struct kvm *kvm = vcpu->kvm;
5909
5910         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5911
5912         r = 1;
5913         while (r > 0) {
5914                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5915                     !vcpu->arch.apf.halted)
5916                         r = vcpu_enter_guest(vcpu);
5917                 else {
5918                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5919                         kvm_vcpu_block(vcpu);
5920                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5921                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
5922                                 kvm_apic_accept_events(vcpu);
5923                                 switch(vcpu->arch.mp_state) {
5924                                 case KVM_MP_STATE_HALTED:
5925                                         vcpu->arch.mp_state =
5926                                                 KVM_MP_STATE_RUNNABLE;
5927                                 case KVM_MP_STATE_RUNNABLE:
5928                                         vcpu->arch.apf.halted = false;
5929                                         break;
5930                                 case KVM_MP_STATE_INIT_RECEIVED:
5931                                         break;
5932                                 default:
5933                                         r = -EINTR;
5934                                         break;
5935                                 }
5936                         }
5937                 }
5938
5939                 if (r <= 0)
5940                         break;
5941
5942                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5943                 if (kvm_cpu_has_pending_timer(vcpu))
5944                         kvm_inject_pending_timer_irqs(vcpu);
5945
5946                 if (dm_request_for_irq_injection(vcpu)) {
5947                         r = -EINTR;
5948                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5949                         ++vcpu->stat.request_irq_exits;
5950                 }
5951
5952                 kvm_check_async_pf_completion(vcpu);
5953
5954                 if (signal_pending(current)) {
5955                         r = -EINTR;
5956                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5957                         ++vcpu->stat.signal_exits;
5958                 }
5959                 if (need_resched()) {
5960                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5961                         kvm_resched(vcpu);
5962                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5963                 }
5964         }
5965
5966         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5967
5968         return r;
5969 }
5970
5971 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5972 {
5973         int r;
5974         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5975         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5976         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5977         if (r != EMULATE_DONE)
5978                 return 0;
5979         return 1;
5980 }
5981
5982 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5983 {
5984         BUG_ON(!vcpu->arch.pio.count);
5985
5986         return complete_emulated_io(vcpu);
5987 }
5988
5989 /*
5990  * Implements the following, as a state machine:
5991  *
5992  * read:
5993  *   for each fragment
5994  *     for each mmio piece in the fragment
5995  *       write gpa, len
5996  *       exit
5997  *       copy data
5998  *   execute insn
5999  *
6000  * write:
6001  *   for each fragment
6002  *     for each mmio piece in the fragment
6003  *       write gpa, len
6004  *       copy data
6005  *       exit
6006  */
6007 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6008 {
6009         struct kvm_run *run = vcpu->run;
6010         struct kvm_mmio_fragment *frag;
6011         unsigned len;
6012
6013         BUG_ON(!vcpu->mmio_needed);
6014
6015         /* Complete previous fragment */
6016         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6017         len = min(8u, frag->len);
6018         if (!vcpu->mmio_is_write)
6019                 memcpy(frag->data, run->mmio.data, len);
6020
6021         if (frag->len <= 8) {
6022                 /* Switch to the next fragment. */
6023                 frag++;
6024                 vcpu->mmio_cur_fragment++;
6025         } else {
6026                 /* Go forward to the next mmio piece. */
6027                 frag->data += len;
6028                 frag->gpa += len;
6029                 frag->len -= len;
6030         }
6031
6032         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6033                 vcpu->mmio_needed = 0;
6034                 if (vcpu->mmio_is_write)
6035                         return 1;
6036                 vcpu->mmio_read_completed = 1;
6037                 return complete_emulated_io(vcpu);
6038         }
6039
6040         run->exit_reason = KVM_EXIT_MMIO;
6041         run->mmio.phys_addr = frag->gpa;
6042         if (vcpu->mmio_is_write)
6043                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6044         run->mmio.len = min(8u, frag->len);
6045         run->mmio.is_write = vcpu->mmio_is_write;
6046         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6047         return 0;
6048 }
6049
6050
6051 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6052 {
6053         int r;
6054         sigset_t sigsaved;
6055
6056         if (!tsk_used_math(current) && init_fpu(current))
6057                 return -ENOMEM;
6058
6059         if (vcpu->sigset_active)
6060                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6061
6062         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6063                 kvm_vcpu_block(vcpu);
6064                 kvm_apic_accept_events(vcpu);
6065                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6066                 r = -EAGAIN;
6067                 goto out;
6068         }
6069
6070         /* re-sync apic's tpr */
6071         if (!irqchip_in_kernel(vcpu->kvm)) {
6072                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6073                         r = -EINVAL;
6074                         goto out;
6075                 }
6076         }
6077
6078         if (unlikely(vcpu->arch.complete_userspace_io)) {
6079                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6080                 vcpu->arch.complete_userspace_io = NULL;
6081                 r = cui(vcpu);
6082                 if (r <= 0)
6083                         goto out;
6084         } else
6085                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6086
6087         r = __vcpu_run(vcpu);
6088
6089 out:
6090         post_kvm_run_save(vcpu);
6091         if (vcpu->sigset_active)
6092                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6093
6094         return r;
6095 }
6096
6097 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6098 {
6099         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6100                 /*
6101                  * We are here if userspace calls get_regs() in the middle of
6102                  * instruction emulation. Registers state needs to be copied
6103                  * back from emulation context to vcpu. Userspace shouldn't do
6104                  * that usually, but some bad designed PV devices (vmware
6105                  * backdoor interface) need this to work
6106                  */
6107                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6108                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6109         }
6110         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6111         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6112         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6113         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6114         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6115         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6116         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6117         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6118 #ifdef CONFIG_X86_64
6119         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6120         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6121         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6122         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6123         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6124         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6125         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6126         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6127 #endif
6128
6129         regs->rip = kvm_rip_read(vcpu);
6130         regs->rflags = kvm_get_rflags(vcpu);
6131
6132         return 0;
6133 }
6134
6135 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6136 {
6137         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6138         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6139
6140         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6141         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6142         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6143         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6144         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6145         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6146         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6147         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6148 #ifdef CONFIG_X86_64
6149         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6150         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6151         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6152         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6153         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6154         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6155         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6156         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6157 #endif
6158
6159         kvm_rip_write(vcpu, regs->rip);
6160         kvm_set_rflags(vcpu, regs->rflags);
6161
6162         vcpu->arch.exception.pending = false;
6163
6164         kvm_make_request(KVM_REQ_EVENT, vcpu);
6165
6166         return 0;
6167 }
6168
6169 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6170 {
6171         struct kvm_segment cs;
6172
6173         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6174         *db = cs.db;
6175         *l = cs.l;
6176 }
6177 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6178
6179 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6180                                   struct kvm_sregs *sregs)
6181 {
6182         struct desc_ptr dt;
6183
6184         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6185         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6186         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6187         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6188         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6189         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6190
6191         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6192         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6193
6194         kvm_x86_ops->get_idt(vcpu, &dt);
6195         sregs->idt.limit = dt.size;
6196         sregs->idt.base = dt.address;
6197         kvm_x86_ops->get_gdt(vcpu, &dt);
6198         sregs->gdt.limit = dt.size;
6199         sregs->gdt.base = dt.address;
6200
6201         sregs->cr0 = kvm_read_cr0(vcpu);
6202         sregs->cr2 = vcpu->arch.cr2;
6203         sregs->cr3 = kvm_read_cr3(vcpu);
6204         sregs->cr4 = kvm_read_cr4(vcpu);
6205         sregs->cr8 = kvm_get_cr8(vcpu);
6206         sregs->efer = vcpu->arch.efer;
6207         sregs->apic_base = kvm_get_apic_base(vcpu);
6208
6209         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6210
6211         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6212                 set_bit(vcpu->arch.interrupt.nr,
6213                         (unsigned long *)sregs->interrupt_bitmap);
6214
6215         return 0;
6216 }
6217
6218 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6219                                     struct kvm_mp_state *mp_state)
6220 {
6221         kvm_apic_accept_events(vcpu);
6222         mp_state->mp_state = vcpu->arch.mp_state;
6223         return 0;
6224 }
6225
6226 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6227                                     struct kvm_mp_state *mp_state)
6228 {
6229         if (!kvm_vcpu_has_lapic(vcpu) &&
6230             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6231                 return -EINVAL;
6232
6233         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6234                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6235                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6236         } else
6237                 vcpu->arch.mp_state = mp_state->mp_state;
6238         kvm_make_request(KVM_REQ_EVENT, vcpu);
6239         return 0;
6240 }
6241
6242 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6243                     int reason, bool has_error_code, u32 error_code)
6244 {
6245         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6246         int ret;
6247
6248         init_emulate_ctxt(vcpu);
6249
6250         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6251                                    has_error_code, error_code);
6252
6253         if (ret)
6254                 return EMULATE_FAIL;
6255
6256         kvm_rip_write(vcpu, ctxt->eip);
6257         kvm_set_rflags(vcpu, ctxt->eflags);
6258         kvm_make_request(KVM_REQ_EVENT, vcpu);
6259         return EMULATE_DONE;
6260 }
6261 EXPORT_SYMBOL_GPL(kvm_task_switch);
6262
6263 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6264                                   struct kvm_sregs *sregs)
6265 {
6266         int mmu_reset_needed = 0;
6267         int pending_vec, max_bits, idx;
6268         struct desc_ptr dt;
6269
6270         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6271                 return -EINVAL;
6272
6273         dt.size = sregs->idt.limit;
6274         dt.address = sregs->idt.base;
6275         kvm_x86_ops->set_idt(vcpu, &dt);
6276         dt.size = sregs->gdt.limit;
6277         dt.address = sregs->gdt.base;
6278         kvm_x86_ops->set_gdt(vcpu, &dt);
6279
6280         vcpu->arch.cr2 = sregs->cr2;
6281         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6282         vcpu->arch.cr3 = sregs->cr3;
6283         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6284
6285         kvm_set_cr8(vcpu, sregs->cr8);
6286
6287         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6288         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6289         kvm_set_apic_base(vcpu, sregs->apic_base);
6290
6291         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6292         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6293         vcpu->arch.cr0 = sregs->cr0;
6294
6295         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6296         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6297         if (sregs->cr4 & X86_CR4_OSXSAVE)
6298                 kvm_update_cpuid(vcpu);
6299
6300         idx = srcu_read_lock(&vcpu->kvm->srcu);
6301         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6302                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6303                 mmu_reset_needed = 1;
6304         }
6305         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6306
6307         if (mmu_reset_needed)
6308                 kvm_mmu_reset_context(vcpu);
6309
6310         max_bits = KVM_NR_INTERRUPTS;
6311         pending_vec = find_first_bit(
6312                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6313         if (pending_vec < max_bits) {
6314                 kvm_queue_interrupt(vcpu, pending_vec, false);
6315                 pr_debug("Set back pending irq %d\n", pending_vec);
6316         }
6317
6318         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6319         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6320         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6321         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6322         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6323         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6324
6325         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6326         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6327
6328         update_cr8_intercept(vcpu);
6329
6330         /* Older userspace won't unhalt the vcpu on reset. */
6331         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6332             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6333             !is_protmode(vcpu))
6334                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6335
6336         kvm_make_request(KVM_REQ_EVENT, vcpu);
6337
6338         return 0;
6339 }
6340
6341 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6342                                         struct kvm_guest_debug *dbg)
6343 {
6344         unsigned long rflags;
6345         int i, r;
6346
6347         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6348                 r = -EBUSY;
6349                 if (vcpu->arch.exception.pending)
6350                         goto out;
6351                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6352                         kvm_queue_exception(vcpu, DB_VECTOR);
6353                 else
6354                         kvm_queue_exception(vcpu, BP_VECTOR);
6355         }
6356
6357         /*
6358          * Read rflags as long as potentially injected trace flags are still
6359          * filtered out.
6360          */
6361         rflags = kvm_get_rflags(vcpu);
6362
6363         vcpu->guest_debug = dbg->control;
6364         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6365                 vcpu->guest_debug = 0;
6366
6367         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6368                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6369                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6370                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6371         } else {
6372                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6373                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6374         }
6375         kvm_update_dr7(vcpu);
6376
6377         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6378                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6379                         get_segment_base(vcpu, VCPU_SREG_CS);
6380
6381         /*
6382          * Trigger an rflags update that will inject or remove the trace
6383          * flags.
6384          */
6385         kvm_set_rflags(vcpu, rflags);
6386
6387         kvm_x86_ops->update_db_bp_intercept(vcpu);
6388
6389         r = 0;
6390
6391 out:
6392
6393         return r;
6394 }
6395
6396 /*
6397  * Translate a guest virtual address to a guest physical address.
6398  */
6399 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6400                                     struct kvm_translation *tr)
6401 {
6402         unsigned long vaddr = tr->linear_address;
6403         gpa_t gpa;
6404         int idx;
6405
6406         idx = srcu_read_lock(&vcpu->kvm->srcu);
6407         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6408         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6409         tr->physical_address = gpa;
6410         tr->valid = gpa != UNMAPPED_GVA;
6411         tr->writeable = 1;
6412         tr->usermode = 0;
6413
6414         return 0;
6415 }
6416
6417 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6418 {
6419         struct i387_fxsave_struct *fxsave =
6420                         &vcpu->arch.guest_fpu.state->fxsave;
6421
6422         memcpy(fpu->fpr, fxsave->st_space, 128);
6423         fpu->fcw = fxsave->cwd;
6424         fpu->fsw = fxsave->swd;
6425         fpu->ftwx = fxsave->twd;
6426         fpu->last_opcode = fxsave->fop;
6427         fpu->last_ip = fxsave->rip;
6428         fpu->last_dp = fxsave->rdp;
6429         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6430
6431         return 0;
6432 }
6433
6434 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6435 {
6436         struct i387_fxsave_struct *fxsave =
6437                         &vcpu->arch.guest_fpu.state->fxsave;
6438
6439         memcpy(fxsave->st_space, fpu->fpr, 128);
6440         fxsave->cwd = fpu->fcw;
6441         fxsave->swd = fpu->fsw;
6442         fxsave->twd = fpu->ftwx;
6443         fxsave->fop = fpu->last_opcode;
6444         fxsave->rip = fpu->last_ip;
6445         fxsave->rdp = fpu->last_dp;
6446         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6447
6448         return 0;
6449 }
6450
6451 int fx_init(struct kvm_vcpu *vcpu)
6452 {
6453         int err;
6454
6455         err = fpu_alloc(&vcpu->arch.guest_fpu);
6456         if (err)
6457                 return err;
6458
6459         fpu_finit(&vcpu->arch.guest_fpu);
6460
6461         /*
6462          * Ensure guest xcr0 is valid for loading
6463          */
6464         vcpu->arch.xcr0 = XSTATE_FP;
6465
6466         vcpu->arch.cr0 |= X86_CR0_ET;
6467
6468         return 0;
6469 }
6470 EXPORT_SYMBOL_GPL(fx_init);
6471
6472 static void fx_free(struct kvm_vcpu *vcpu)
6473 {
6474         fpu_free(&vcpu->arch.guest_fpu);
6475 }
6476
6477 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6478 {
6479         if (vcpu->guest_fpu_loaded)
6480                 return;
6481
6482         /*
6483          * Restore all possible states in the guest,
6484          * and assume host would use all available bits.
6485          * Guest xcr0 would be loaded later.
6486          */
6487         kvm_put_guest_xcr0(vcpu);
6488         vcpu->guest_fpu_loaded = 1;
6489         __kernel_fpu_begin();
6490         fpu_restore_checking(&vcpu->arch.guest_fpu);
6491         trace_kvm_fpu(1);
6492 }
6493
6494 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6495 {
6496         kvm_put_guest_xcr0(vcpu);
6497
6498         if (!vcpu->guest_fpu_loaded)
6499                 return;
6500
6501         vcpu->guest_fpu_loaded = 0;
6502         fpu_save_init(&vcpu->arch.guest_fpu);
6503         __kernel_fpu_end();
6504         ++vcpu->stat.fpu_reload;
6505         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6506         trace_kvm_fpu(0);
6507 }
6508
6509 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6510 {
6511         kvmclock_reset(vcpu);
6512
6513         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6514         fx_free(vcpu);
6515         kvm_x86_ops->vcpu_free(vcpu);
6516 }
6517
6518 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6519                                                 unsigned int id)
6520 {
6521         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6522                 printk_once(KERN_WARNING
6523                 "kvm: SMP vm created on host with unstable TSC; "
6524                 "guest TSC will not be reliable\n");
6525         return kvm_x86_ops->vcpu_create(kvm, id);
6526 }
6527
6528 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6529 {
6530         int r;
6531
6532         vcpu->arch.mtrr_state.have_fixed = 1;
6533         r = vcpu_load(vcpu);
6534         if (r)
6535                 return r;
6536         kvm_vcpu_reset(vcpu);
6537         r = kvm_mmu_setup(vcpu);
6538         vcpu_put(vcpu);
6539
6540         return r;
6541 }
6542
6543 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6544 {
6545         int r;
6546         struct msr_data msr;
6547
6548         r = vcpu_load(vcpu);
6549         if (r)
6550                 return r;
6551         msr.data = 0x0;
6552         msr.index = MSR_IA32_TSC;
6553         msr.host_initiated = true;
6554         kvm_write_tsc(vcpu, &msr);
6555         vcpu_put(vcpu);
6556
6557         return r;
6558 }
6559
6560 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6561 {
6562         int r;
6563         vcpu->arch.apf.msr_val = 0;
6564
6565         r = vcpu_load(vcpu);
6566         BUG_ON(r);
6567         kvm_mmu_unload(vcpu);
6568         vcpu_put(vcpu);
6569
6570         fx_free(vcpu);
6571         kvm_x86_ops->vcpu_free(vcpu);
6572 }
6573
6574 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6575 {
6576         atomic_set(&vcpu->arch.nmi_queued, 0);
6577         vcpu->arch.nmi_pending = 0;
6578         vcpu->arch.nmi_injected = false;
6579
6580         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6581         vcpu->arch.dr6 = DR6_FIXED_1;
6582         vcpu->arch.dr7 = DR7_FIXED_1;
6583         kvm_update_dr7(vcpu);
6584
6585         kvm_make_request(KVM_REQ_EVENT, vcpu);
6586         vcpu->arch.apf.msr_val = 0;
6587         vcpu->arch.st.msr_val = 0;
6588
6589         kvmclock_reset(vcpu);
6590
6591         kvm_clear_async_pf_completion_queue(vcpu);
6592         kvm_async_pf_hash_reset(vcpu);
6593         vcpu->arch.apf.halted = false;
6594
6595         kvm_pmu_reset(vcpu);
6596
6597         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6598         vcpu->arch.regs_avail = ~0;
6599         vcpu->arch.regs_dirty = ~0;
6600
6601         kvm_x86_ops->vcpu_reset(vcpu);
6602 }
6603
6604 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6605 {
6606         struct kvm_segment cs;
6607
6608         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6609         cs.selector = vector << 8;
6610         cs.base = vector << 12;
6611         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6612         kvm_rip_write(vcpu, 0);
6613 }
6614
6615 int kvm_arch_hardware_enable(void *garbage)
6616 {
6617         struct kvm *kvm;
6618         struct kvm_vcpu *vcpu;
6619         int i;
6620         int ret;
6621         u64 local_tsc;
6622         u64 max_tsc = 0;
6623         bool stable, backwards_tsc = false;
6624
6625         kvm_shared_msr_cpu_online();
6626         ret = kvm_x86_ops->hardware_enable(garbage);
6627         if (ret != 0)
6628                 return ret;
6629
6630         local_tsc = native_read_tsc();
6631         stable = !check_tsc_unstable();
6632         list_for_each_entry(kvm, &vm_list, vm_list) {
6633                 kvm_for_each_vcpu(i, vcpu, kvm) {
6634                         if (!stable && vcpu->cpu == smp_processor_id())
6635                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6636                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6637                                 backwards_tsc = true;
6638                                 if (vcpu->arch.last_host_tsc > max_tsc)
6639                                         max_tsc = vcpu->arch.last_host_tsc;
6640                         }
6641                 }
6642         }
6643
6644         /*
6645          * Sometimes, even reliable TSCs go backwards.  This happens on
6646          * platforms that reset TSC during suspend or hibernate actions, but
6647          * maintain synchronization.  We must compensate.  Fortunately, we can
6648          * detect that condition here, which happens early in CPU bringup,
6649          * before any KVM threads can be running.  Unfortunately, we can't
6650          * bring the TSCs fully up to date with real time, as we aren't yet far
6651          * enough into CPU bringup that we know how much real time has actually
6652          * elapsed; our helper function, get_kernel_ns() will be using boot
6653          * variables that haven't been updated yet.
6654          *
6655          * So we simply find the maximum observed TSC above, then record the
6656          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6657          * the adjustment will be applied.  Note that we accumulate
6658          * adjustments, in case multiple suspend cycles happen before some VCPU
6659          * gets a chance to run again.  In the event that no KVM threads get a
6660          * chance to run, we will miss the entire elapsed period, as we'll have
6661          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6662          * loose cycle time.  This isn't too big a deal, since the loss will be
6663          * uniform across all VCPUs (not to mention the scenario is extremely
6664          * unlikely). It is possible that a second hibernate recovery happens
6665          * much faster than a first, causing the observed TSC here to be
6666          * smaller; this would require additional padding adjustment, which is
6667          * why we set last_host_tsc to the local tsc observed here.
6668          *
6669          * N.B. - this code below runs only on platforms with reliable TSC,
6670          * as that is the only way backwards_tsc is set above.  Also note
6671          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6672          * have the same delta_cyc adjustment applied if backwards_tsc
6673          * is detected.  Note further, this adjustment is only done once,
6674          * as we reset last_host_tsc on all VCPUs to stop this from being
6675          * called multiple times (one for each physical CPU bringup).
6676          *
6677          * Platforms with unreliable TSCs don't have to deal with this, they
6678          * will be compensated by the logic in vcpu_load, which sets the TSC to
6679          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6680          * guarantee that they stay in perfect synchronization.
6681          */
6682         if (backwards_tsc) {
6683                 u64 delta_cyc = max_tsc - local_tsc;
6684                 list_for_each_entry(kvm, &vm_list, vm_list) {
6685                         kvm_for_each_vcpu(i, vcpu, kvm) {
6686                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6687                                 vcpu->arch.last_host_tsc = local_tsc;
6688                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6689                                         &vcpu->requests);
6690                         }
6691
6692                         /*
6693                          * We have to disable TSC offset matching.. if you were
6694                          * booting a VM while issuing an S4 host suspend....
6695                          * you may have some problem.  Solving this issue is
6696                          * left as an exercise to the reader.
6697                          */
6698                         kvm->arch.last_tsc_nsec = 0;
6699                         kvm->arch.last_tsc_write = 0;
6700                 }
6701
6702         }
6703         return 0;
6704 }
6705
6706 void kvm_arch_hardware_disable(void *garbage)
6707 {
6708         kvm_x86_ops->hardware_disable(garbage);
6709         drop_user_return_notifiers(garbage);
6710 }
6711
6712 int kvm_arch_hardware_setup(void)
6713 {
6714         return kvm_x86_ops->hardware_setup();
6715 }
6716
6717 void kvm_arch_hardware_unsetup(void)
6718 {
6719         kvm_x86_ops->hardware_unsetup();
6720 }
6721
6722 void kvm_arch_check_processor_compat(void *rtn)
6723 {
6724         kvm_x86_ops->check_processor_compatibility(rtn);
6725 }
6726
6727 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6728 {
6729         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6730 }
6731
6732 struct static_key kvm_no_apic_vcpu __read_mostly;
6733
6734 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6735 {
6736         struct page *page;
6737         struct kvm *kvm;
6738         int r;
6739
6740         BUG_ON(vcpu->kvm == NULL);
6741         kvm = vcpu->kvm;
6742
6743         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6744         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6745                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6746         else
6747                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6748
6749         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6750         if (!page) {
6751                 r = -ENOMEM;
6752                 goto fail;
6753         }
6754         vcpu->arch.pio_data = page_address(page);
6755
6756         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6757
6758         r = kvm_mmu_create(vcpu);
6759         if (r < 0)
6760                 goto fail_free_pio_data;
6761
6762         if (irqchip_in_kernel(kvm)) {
6763                 r = kvm_create_lapic(vcpu);
6764                 if (r < 0)
6765                         goto fail_mmu_destroy;
6766         } else
6767                 static_key_slow_inc(&kvm_no_apic_vcpu);
6768
6769         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6770                                        GFP_KERNEL);
6771         if (!vcpu->arch.mce_banks) {
6772                 r = -ENOMEM;
6773                 goto fail_free_lapic;
6774         }
6775         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6776
6777         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6778                 r = -ENOMEM;
6779                 goto fail_free_mce_banks;
6780         }
6781
6782         r = fx_init(vcpu);
6783         if (r)
6784                 goto fail_free_wbinvd_dirty_mask;
6785
6786         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6787         vcpu->arch.pv_time_enabled = false;
6788         kvm_async_pf_hash_reset(vcpu);
6789         kvm_pmu_init(vcpu);
6790
6791         return 0;
6792 fail_free_wbinvd_dirty_mask:
6793         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6794 fail_free_mce_banks:
6795         kfree(vcpu->arch.mce_banks);
6796 fail_free_lapic:
6797         kvm_free_lapic(vcpu);
6798 fail_mmu_destroy:
6799         kvm_mmu_destroy(vcpu);
6800 fail_free_pio_data:
6801         free_page((unsigned long)vcpu->arch.pio_data);
6802 fail:
6803         return r;
6804 }
6805
6806 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6807 {
6808         int idx;
6809
6810         kvm_pmu_destroy(vcpu);
6811         kfree(vcpu->arch.mce_banks);
6812         kvm_free_lapic(vcpu);
6813         idx = srcu_read_lock(&vcpu->kvm->srcu);
6814         kvm_mmu_destroy(vcpu);
6815         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6816         free_page((unsigned long)vcpu->arch.pio_data);
6817         if (!irqchip_in_kernel(vcpu->kvm))
6818                 static_key_slow_dec(&kvm_no_apic_vcpu);
6819 }
6820
6821 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6822 {
6823         if (type)
6824                 return -EINVAL;
6825
6826         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6827         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6828
6829         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6830         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6831         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6832         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6833                 &kvm->arch.irq_sources_bitmap);
6834
6835         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6836         mutex_init(&kvm->arch.apic_map_lock);
6837         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6838
6839         pvclock_update_vm_gtod_copy(kvm);
6840
6841         return 0;
6842 }
6843
6844 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6845 {
6846         int r;
6847         r = vcpu_load(vcpu);
6848         BUG_ON(r);
6849         kvm_mmu_unload(vcpu);
6850         vcpu_put(vcpu);
6851 }
6852
6853 static void kvm_free_vcpus(struct kvm *kvm)
6854 {
6855         unsigned int i;
6856         struct kvm_vcpu *vcpu;
6857
6858         /*
6859          * Unpin any mmu pages first.
6860          */
6861         kvm_for_each_vcpu(i, vcpu, kvm) {
6862                 kvm_clear_async_pf_completion_queue(vcpu);
6863                 kvm_unload_vcpu_mmu(vcpu);
6864         }
6865         kvm_for_each_vcpu(i, vcpu, kvm)
6866                 kvm_arch_vcpu_free(vcpu);
6867
6868         mutex_lock(&kvm->lock);
6869         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6870                 kvm->vcpus[i] = NULL;
6871
6872         atomic_set(&kvm->online_vcpus, 0);
6873         mutex_unlock(&kvm->lock);
6874 }
6875
6876 void kvm_arch_sync_events(struct kvm *kvm)
6877 {
6878         kvm_free_all_assigned_devices(kvm);
6879         kvm_free_pit(kvm);
6880 }
6881
6882 void kvm_arch_destroy_vm(struct kvm *kvm)
6883 {
6884         if (current->mm == kvm->mm) {
6885                 /*
6886                  * Free memory regions allocated on behalf of userspace,
6887                  * unless the the memory map has changed due to process exit
6888                  * or fd copying.
6889                  */
6890                 struct kvm_userspace_memory_region mem;
6891                 memset(&mem, 0, sizeof(mem));
6892                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
6893                 kvm_set_memory_region(kvm, &mem);
6894
6895                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
6896                 kvm_set_memory_region(kvm, &mem);
6897
6898                 mem.slot = TSS_PRIVATE_MEMSLOT;
6899                 kvm_set_memory_region(kvm, &mem);
6900         }
6901         kvm_iommu_unmap_guest(kvm);
6902         kfree(kvm->arch.vpic);
6903         kfree(kvm->arch.vioapic);
6904         kvm_free_vcpus(kvm);
6905         if (kvm->arch.apic_access_page)
6906                 put_page(kvm->arch.apic_access_page);
6907         if (kvm->arch.ept_identity_pagetable)
6908                 put_page(kvm->arch.ept_identity_pagetable);
6909         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6910 }
6911
6912 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6913                            struct kvm_memory_slot *dont)
6914 {
6915         int i;
6916
6917         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6918                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6919                         kvm_kvfree(free->arch.rmap[i]);
6920                         free->arch.rmap[i] = NULL;
6921                 }
6922                 if (i == 0)
6923                         continue;
6924
6925                 if (!dont || free->arch.lpage_info[i - 1] !=
6926                              dont->arch.lpage_info[i - 1]) {
6927                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6928                         free->arch.lpage_info[i - 1] = NULL;
6929                 }
6930         }
6931 }
6932
6933 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6934 {
6935         int i;
6936
6937         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6938                 unsigned long ugfn;
6939                 int lpages;
6940                 int level = i + 1;
6941
6942                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6943                                       slot->base_gfn, level) + 1;
6944
6945                 slot->arch.rmap[i] =
6946                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6947                 if (!slot->arch.rmap[i])
6948                         goto out_free;
6949                 if (i == 0)
6950                         continue;
6951
6952                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6953                                         sizeof(*slot->arch.lpage_info[i - 1]));
6954                 if (!slot->arch.lpage_info[i - 1])
6955                         goto out_free;
6956
6957                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6958                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6959                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6960                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6961                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6962                 /*
6963                  * If the gfn and userspace address are not aligned wrt each
6964                  * other, or if explicitly asked to, disable large page
6965                  * support for this slot
6966                  */
6967                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6968                     !kvm_largepages_enabled()) {
6969                         unsigned long j;
6970
6971                         for (j = 0; j < lpages; ++j)
6972                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6973                 }
6974         }
6975
6976         return 0;
6977
6978 out_free:
6979         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6980                 kvm_kvfree(slot->arch.rmap[i]);
6981                 slot->arch.rmap[i] = NULL;
6982                 if (i == 0)
6983                         continue;
6984
6985                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6986                 slot->arch.lpage_info[i - 1] = NULL;
6987         }
6988         return -ENOMEM;
6989 }
6990
6991 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6992                                 struct kvm_memory_slot *memslot,
6993                                 struct kvm_userspace_memory_region *mem,
6994                                 enum kvm_mr_change change)
6995 {
6996         /*
6997          * Only private memory slots need to be mapped here since
6998          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
6999          */
7000         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7001                 unsigned long userspace_addr;
7002
7003                 /*
7004                  * MAP_SHARED to prevent internal slot pages from being moved
7005                  * by fork()/COW.
7006                  */
7007                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7008                                          PROT_READ | PROT_WRITE,
7009                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7010
7011                 if (IS_ERR((void *)userspace_addr))
7012                         return PTR_ERR((void *)userspace_addr);
7013
7014                 memslot->userspace_addr = userspace_addr;
7015         }
7016
7017         return 0;
7018 }
7019
7020 void kvm_arch_commit_memory_region(struct kvm *kvm,
7021                                 struct kvm_userspace_memory_region *mem,
7022                                 const struct kvm_memory_slot *old,
7023                                 enum kvm_mr_change change)
7024 {
7025
7026         int nr_mmu_pages = 0;
7027
7028         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7029                 int ret;
7030
7031                 ret = vm_munmap(old->userspace_addr,
7032                                 old->npages * PAGE_SIZE);
7033                 if (ret < 0)
7034                         printk(KERN_WARNING
7035                                "kvm_vm_ioctl_set_memory_region: "
7036                                "failed to munmap memory\n");
7037         }
7038
7039         if (!kvm->arch.n_requested_mmu_pages)
7040                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7041
7042         if (nr_mmu_pages)
7043                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7044         /*
7045          * Write protect all pages for dirty logging.
7046          * Existing largepage mappings are destroyed here and new ones will
7047          * not be created until the end of the logging.
7048          */
7049         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7050                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7051         /*
7052          * If memory slot is created, or moved, we need to clear all
7053          * mmio sptes.
7054          */
7055         if ((change == KVM_MR_CREATE) || (change == KVM_MR_MOVE)) {
7056                 kvm_mmu_zap_mmio_sptes(kvm);
7057                 kvm_reload_remote_mmus(kvm);
7058         }
7059 }
7060
7061 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7062 {
7063         kvm_mmu_zap_all(kvm);
7064         kvm_reload_remote_mmus(kvm);
7065 }
7066
7067 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7068                                    struct kvm_memory_slot *slot)
7069 {
7070         kvm_arch_flush_shadow_all(kvm);
7071 }
7072
7073 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7074 {
7075         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7076                 !vcpu->arch.apf.halted)
7077                 || !list_empty_careful(&vcpu->async_pf.done)
7078                 || kvm_apic_has_events(vcpu)
7079                 || atomic_read(&vcpu->arch.nmi_queued) ||
7080                 (kvm_arch_interrupt_allowed(vcpu) &&
7081                  kvm_cpu_has_interrupt(vcpu));
7082 }
7083
7084 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7085 {
7086         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7087 }
7088
7089 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7090 {
7091         return kvm_x86_ops->interrupt_allowed(vcpu);
7092 }
7093
7094 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7095 {
7096         unsigned long current_rip = kvm_rip_read(vcpu) +
7097                 get_segment_base(vcpu, VCPU_SREG_CS);
7098
7099         return current_rip == linear_rip;
7100 }
7101 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7102
7103 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7104 {
7105         unsigned long rflags;
7106
7107         rflags = kvm_x86_ops->get_rflags(vcpu);
7108         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7109                 rflags &= ~X86_EFLAGS_TF;
7110         return rflags;
7111 }
7112 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7113
7114 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7115 {
7116         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7117             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7118                 rflags |= X86_EFLAGS_TF;
7119         kvm_x86_ops->set_rflags(vcpu, rflags);
7120         kvm_make_request(KVM_REQ_EVENT, vcpu);
7121 }
7122 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7123
7124 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7125 {
7126         int r;
7127
7128         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7129               is_error_page(work->page))
7130                 return;
7131
7132         r = kvm_mmu_reload(vcpu);
7133         if (unlikely(r))
7134                 return;
7135
7136         if (!vcpu->arch.mmu.direct_map &&
7137               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7138                 return;
7139
7140         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7141 }
7142
7143 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7144 {
7145         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7146 }
7147
7148 static inline u32 kvm_async_pf_next_probe(u32 key)
7149 {
7150         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7151 }
7152
7153 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7154 {
7155         u32 key = kvm_async_pf_hash_fn(gfn);
7156
7157         while (vcpu->arch.apf.gfns[key] != ~0)
7158                 key = kvm_async_pf_next_probe(key);
7159
7160         vcpu->arch.apf.gfns[key] = gfn;
7161 }
7162
7163 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7164 {
7165         int i;
7166         u32 key = kvm_async_pf_hash_fn(gfn);
7167
7168         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7169                      (vcpu->arch.apf.gfns[key] != gfn &&
7170                       vcpu->arch.apf.gfns[key] != ~0); i++)
7171                 key = kvm_async_pf_next_probe(key);
7172
7173         return key;
7174 }
7175
7176 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7177 {
7178         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7179 }
7180
7181 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7182 {
7183         u32 i, j, k;
7184
7185         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7186         while (true) {
7187                 vcpu->arch.apf.gfns[i] = ~0;
7188                 do {
7189                         j = kvm_async_pf_next_probe(j);
7190                         if (vcpu->arch.apf.gfns[j] == ~0)
7191                                 return;
7192                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7193                         /*
7194                          * k lies cyclically in ]i,j]
7195                          * |    i.k.j |
7196                          * |....j i.k.| or  |.k..j i...|
7197                          */
7198                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7199                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7200                 i = j;
7201         }
7202 }
7203
7204 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7205 {
7206
7207         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7208                                       sizeof(val));
7209 }
7210
7211 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7212                                      struct kvm_async_pf *work)
7213 {
7214         struct x86_exception fault;
7215
7216         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7217         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7218
7219         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7220             (vcpu->arch.apf.send_user_only &&
7221              kvm_x86_ops->get_cpl(vcpu) == 0))
7222                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7223         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7224                 fault.vector = PF_VECTOR;
7225                 fault.error_code_valid = true;
7226                 fault.error_code = 0;
7227                 fault.nested_page_fault = false;
7228                 fault.address = work->arch.token;
7229                 kvm_inject_page_fault(vcpu, &fault);
7230         }
7231 }
7232
7233 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7234                                  struct kvm_async_pf *work)
7235 {
7236         struct x86_exception fault;
7237
7238         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7239         if (is_error_page(work->page))
7240                 work->arch.token = ~0; /* broadcast wakeup */
7241         else
7242                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7243
7244         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7245             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7246                 fault.vector = PF_VECTOR;
7247                 fault.error_code_valid = true;
7248                 fault.error_code = 0;
7249                 fault.nested_page_fault = false;
7250                 fault.address = work->arch.token;
7251                 kvm_inject_page_fault(vcpu, &fault);
7252         }
7253         vcpu->arch.apf.halted = false;
7254         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7255 }
7256
7257 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7258 {
7259         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7260                 return true;
7261         else
7262                 return !kvm_event_needs_reinjection(vcpu) &&
7263                         kvm_x86_ops->interrupt_allowed(vcpu);
7264 }
7265
7266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7268 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7269 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7270 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7271 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7272 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7273 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7274 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7277 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);