Linux-libre 3.10.98-gnu
[librecmc/linux-libre.git] / arch / x86 / kernel / i387.c
1 /*
2  *  Copyright (C) 1994 Linus Torvalds
3  *
4  *  Pentium III FXSR, SSE support
5  *  General FPU state handling cleanups
6  *      Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
12
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
18 #include <asm/i387.h>
19 #include <asm/fpu-internal.h>
20 #include <asm/user.h>
21
22 /*
23  * Were we in an interrupt that interrupted kernel mode?
24  *
25  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
26  * pair does nothing at all: the thread must not have fpu (so
27  * that we don't try to save the FPU state), and TS must
28  * be set (so that the clts/stts pair does nothing that is
29  * visible in the interrupted kernel thread).
30  *
31  * Except for the eagerfpu case when we return 1 unless we've already
32  * been eager and saved the state in kernel_fpu_begin().
33  */
34 static inline bool interrupted_kernel_fpu_idle(void)
35 {
36         if (use_eager_fpu())
37                 return __thread_has_fpu(current);
38
39         return !__thread_has_fpu(current) &&
40                 (read_cr0() & X86_CR0_TS);
41 }
42
43 /*
44  * Were we in user mode (or vm86 mode) when we were
45  * interrupted?
46  *
47  * Doing kernel_fpu_begin/end() is ok if we are running
48  * in an interrupt context from user mode - we'll just
49  * save the FPU state as required.
50  */
51 static inline bool interrupted_user_mode(void)
52 {
53         struct pt_regs *regs = get_irq_regs();
54         return regs && user_mode_vm(regs);
55 }
56
57 /*
58  * Can we use the FPU in kernel mode with the
59  * whole "kernel_fpu_begin/end()" sequence?
60  *
61  * It's always ok in process context (ie "not interrupt")
62  * but it is sometimes ok even from an irq.
63  */
64 bool irq_fpu_usable(void)
65 {
66         return !in_interrupt() ||
67                 interrupted_user_mode() ||
68                 interrupted_kernel_fpu_idle();
69 }
70 EXPORT_SYMBOL(irq_fpu_usable);
71
72 void __kernel_fpu_begin(void)
73 {
74         struct task_struct *me = current;
75
76         if (__thread_has_fpu(me)) {
77                 __thread_clear_has_fpu(me);
78                 __save_init_fpu(me);
79                 /* We do 'stts()' in __kernel_fpu_end() */
80         } else if (!use_eager_fpu()) {
81                 this_cpu_write(fpu_owner_task, NULL);
82                 clts();
83         }
84 }
85 EXPORT_SYMBOL(__kernel_fpu_begin);
86
87 void __kernel_fpu_end(void)
88 {
89         if (use_eager_fpu()) {
90                 /*
91                  * For eager fpu, most the time, tsk_used_math() is true.
92                  * Restore the user math as we are done with the kernel usage.
93                  * At few instances during thread exit, signal handling etc,
94                  * tsk_used_math() is false. Those few places will take proper
95                  * actions, so we don't need to restore the math here.
96                  */
97                 if (likely(tsk_used_math(current)))
98                         math_state_restore();
99         } else {
100                 stts();
101         }
102 }
103 EXPORT_SYMBOL(__kernel_fpu_end);
104
105 void unlazy_fpu(struct task_struct *tsk)
106 {
107         preempt_disable();
108         if (__thread_has_fpu(tsk)) {
109                 __save_init_fpu(tsk);
110                 __thread_fpu_end(tsk);
111         } else
112                 tsk->fpu_counter = 0;
113         preempt_enable();
114 }
115 EXPORT_SYMBOL(unlazy_fpu);
116
117 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
118 unsigned int xstate_size;
119 EXPORT_SYMBOL_GPL(xstate_size);
120 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
121
122 static void __cpuinit mxcsr_feature_mask_init(void)
123 {
124         unsigned long mask = 0;
125
126         if (cpu_has_fxsr) {
127                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
128                 asm volatile("fxsave %0" : "+m" (fx_scratch));
129                 mask = fx_scratch.mxcsr_mask;
130                 if (mask == 0)
131                         mask = 0x0000ffbf;
132         }
133         mxcsr_feature_mask &= mask;
134 }
135
136 static void __cpuinit init_thread_xstate(void)
137 {
138         /*
139          * Note that xstate_size might be overwriten later during
140          * xsave_init().
141          */
142
143         if (!HAVE_HWFP) {
144                 /*
145                  * Disable xsave as we do not support it if i387
146                  * emulation is enabled.
147                  */
148                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
149                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
150                 xstate_size = sizeof(struct i387_soft_struct);
151                 return;
152         }
153
154         if (cpu_has_fxsr)
155                 xstate_size = sizeof(struct i387_fxsave_struct);
156         else
157                 xstate_size = sizeof(struct i387_fsave_struct);
158 }
159
160 /*
161  * Called at bootup to set up the initial FPU state that is later cloned
162  * into all processes.
163  */
164
165 void __cpuinit fpu_init(void)
166 {
167         unsigned long cr0;
168         unsigned long cr4_mask = 0;
169
170         if (cpu_has_fxsr)
171                 cr4_mask |= X86_CR4_OSFXSR;
172         if (cpu_has_xmm)
173                 cr4_mask |= X86_CR4_OSXMMEXCPT;
174         if (cr4_mask)
175                 set_in_cr4(cr4_mask);
176
177         cr0 = read_cr0();
178         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
179         if (!HAVE_HWFP)
180                 cr0 |= X86_CR0_EM;
181         write_cr0(cr0);
182
183         /*
184          * init_thread_xstate is only called once to avoid overriding
185          * xstate_size during boot time or during CPU hotplug.
186          */
187         if (xstate_size == 0)
188                 init_thread_xstate();
189
190         mxcsr_feature_mask_init();
191         xsave_init();
192         eager_fpu_init();
193 }
194
195 void fpu_finit(struct fpu *fpu)
196 {
197         if (!HAVE_HWFP) {
198                 finit_soft_fpu(&fpu->state->soft);
199                 return;
200         }
201
202         if (cpu_has_fxsr) {
203                 fx_finit(&fpu->state->fxsave);
204         } else {
205                 struct i387_fsave_struct *fp = &fpu->state->fsave;
206                 memset(fp, 0, xstate_size);
207                 fp->cwd = 0xffff037fu;
208                 fp->swd = 0xffff0000u;
209                 fp->twd = 0xffffffffu;
210                 fp->fos = 0xffff0000u;
211         }
212 }
213 EXPORT_SYMBOL_GPL(fpu_finit);
214
215 /*
216  * The _current_ task is using the FPU for the first time
217  * so initialize it and set the mxcsr to its default
218  * value at reset if we support XMM instructions and then
219  * remember the current task has used the FPU.
220  */
221 int init_fpu(struct task_struct *tsk)
222 {
223         int ret;
224
225         if (tsk_used_math(tsk)) {
226                 if (HAVE_HWFP && tsk == current)
227                         unlazy_fpu(tsk);
228                 tsk->thread.fpu.last_cpu = ~0;
229                 return 0;
230         }
231
232         /*
233          * Memory allocation at the first usage of the FPU and other state.
234          */
235         ret = fpu_alloc(&tsk->thread.fpu);
236         if (ret)
237                 return ret;
238
239         fpu_finit(&tsk->thread.fpu);
240
241         set_stopped_child_used_math(tsk);
242         return 0;
243 }
244 EXPORT_SYMBOL_GPL(init_fpu);
245
246 /*
247  * The xstateregs_active() routine is the same as the fpregs_active() routine,
248  * as the "regset->n" for the xstate regset will be updated based on the feature
249  * capabilites supported by the xsave.
250  */
251 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
252 {
253         return tsk_used_math(target) ? regset->n : 0;
254 }
255
256 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
257 {
258         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
259 }
260
261 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
262                 unsigned int pos, unsigned int count,
263                 void *kbuf, void __user *ubuf)
264 {
265         int ret;
266
267         if (!cpu_has_fxsr)
268                 return -ENODEV;
269
270         ret = init_fpu(target);
271         if (ret)
272                 return ret;
273
274         sanitize_i387_state(target);
275
276         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
277                                    &target->thread.fpu.state->fxsave, 0, -1);
278 }
279
280 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
281                 unsigned int pos, unsigned int count,
282                 const void *kbuf, const void __user *ubuf)
283 {
284         int ret;
285
286         if (!cpu_has_fxsr)
287                 return -ENODEV;
288
289         ret = init_fpu(target);
290         if (ret)
291                 return ret;
292
293         sanitize_i387_state(target);
294
295         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
296                                  &target->thread.fpu.state->fxsave, 0, -1);
297
298         /*
299          * mxcsr reserved bits must be masked to zero for security reasons.
300          */
301         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
302
303         /*
304          * update the header bits in the xsave header, indicating the
305          * presence of FP and SSE state.
306          */
307         if (cpu_has_xsave)
308                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
309
310         return ret;
311 }
312
313 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
314                 unsigned int pos, unsigned int count,
315                 void *kbuf, void __user *ubuf)
316 {
317         int ret;
318
319         if (!cpu_has_xsave)
320                 return -ENODEV;
321
322         ret = init_fpu(target);
323         if (ret)
324                 return ret;
325
326         /*
327          * Copy the 48bytes defined by the software first into the xstate
328          * memory layout in the thread struct, so that we can copy the entire
329          * xstateregs to the user using one user_regset_copyout().
330          */
331         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
332                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
333
334         /*
335          * Copy the xstate memory layout.
336          */
337         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
338                                   &target->thread.fpu.state->xsave, 0, -1);
339         return ret;
340 }
341
342 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
343                   unsigned int pos, unsigned int count,
344                   const void *kbuf, const void __user *ubuf)
345 {
346         int ret;
347         struct xsave_hdr_struct *xsave_hdr;
348
349         if (!cpu_has_xsave)
350                 return -ENODEV;
351
352         ret = init_fpu(target);
353         if (ret)
354                 return ret;
355
356         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
357                                  &target->thread.fpu.state->xsave, 0, -1);
358
359         /*
360          * mxcsr reserved bits must be masked to zero for security reasons.
361          */
362         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
363
364         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
365
366         xsave_hdr->xstate_bv &= pcntxt_mask;
367         /*
368          * These bits must be zero.
369          */
370         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
371
372         return ret;
373 }
374
375 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
376
377 /*
378  * FPU tag word conversions.
379  */
380
381 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
382 {
383         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
384
385         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
386         tmp = ~twd;
387         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
388         /* and move the valid bits to the lower byte. */
389         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
390         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
391         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
392
393         return tmp;
394 }
395
396 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
397 #define FP_EXP_TAG_VALID        0
398 #define FP_EXP_TAG_ZERO         1
399 #define FP_EXP_TAG_SPECIAL      2
400 #define FP_EXP_TAG_EMPTY        3
401
402 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
403 {
404         struct _fpxreg *st;
405         u32 tos = (fxsave->swd >> 11) & 7;
406         u32 twd = (unsigned long) fxsave->twd;
407         u32 tag;
408         u32 ret = 0xffff0000u;
409         int i;
410
411         for (i = 0; i < 8; i++, twd >>= 1) {
412                 if (twd & 0x1) {
413                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
414
415                         switch (st->exponent & 0x7fff) {
416                         case 0x7fff:
417                                 tag = FP_EXP_TAG_SPECIAL;
418                                 break;
419                         case 0x0000:
420                                 if (!st->significand[0] &&
421                                     !st->significand[1] &&
422                                     !st->significand[2] &&
423                                     !st->significand[3])
424                                         tag = FP_EXP_TAG_ZERO;
425                                 else
426                                         tag = FP_EXP_TAG_SPECIAL;
427                                 break;
428                         default:
429                                 if (st->significand[3] & 0x8000)
430                                         tag = FP_EXP_TAG_VALID;
431                                 else
432                                         tag = FP_EXP_TAG_SPECIAL;
433                                 break;
434                         }
435                 } else {
436                         tag = FP_EXP_TAG_EMPTY;
437                 }
438                 ret |= tag << (2 * i);
439         }
440         return ret;
441 }
442
443 /*
444  * FXSR floating point environment conversions.
445  */
446
447 void
448 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
449 {
450         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
451         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
452         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
453         int i;
454
455         env->cwd = fxsave->cwd | 0xffff0000u;
456         env->swd = fxsave->swd | 0xffff0000u;
457         env->twd = twd_fxsr_to_i387(fxsave);
458
459 #ifdef CONFIG_X86_64
460         env->fip = fxsave->rip;
461         env->foo = fxsave->rdp;
462         /*
463          * should be actually ds/cs at fpu exception time, but
464          * that information is not available in 64bit mode.
465          */
466         env->fcs = task_pt_regs(tsk)->cs;
467         if (tsk == current) {
468                 savesegment(ds, env->fos);
469         } else {
470                 env->fos = tsk->thread.ds;
471         }
472         env->fos |= 0xffff0000;
473 #else
474         env->fip = fxsave->fip;
475         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
476         env->foo = fxsave->foo;
477         env->fos = fxsave->fos;
478 #endif
479
480         for (i = 0; i < 8; ++i)
481                 memcpy(&to[i], &from[i], sizeof(to[0]));
482 }
483
484 void convert_to_fxsr(struct task_struct *tsk,
485                      const struct user_i387_ia32_struct *env)
486
487 {
488         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
489         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
490         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
491         int i;
492
493         fxsave->cwd = env->cwd;
494         fxsave->swd = env->swd;
495         fxsave->twd = twd_i387_to_fxsr(env->twd);
496         fxsave->fop = (u16) ((u32) env->fcs >> 16);
497 #ifdef CONFIG_X86_64
498         fxsave->rip = env->fip;
499         fxsave->rdp = env->foo;
500         /* cs and ds ignored */
501 #else
502         fxsave->fip = env->fip;
503         fxsave->fcs = (env->fcs & 0xffff);
504         fxsave->foo = env->foo;
505         fxsave->fos = env->fos;
506 #endif
507
508         for (i = 0; i < 8; ++i)
509                 memcpy(&to[i], &from[i], sizeof(from[0]));
510 }
511
512 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
513                unsigned int pos, unsigned int count,
514                void *kbuf, void __user *ubuf)
515 {
516         struct user_i387_ia32_struct env;
517         int ret;
518
519         ret = init_fpu(target);
520         if (ret)
521                 return ret;
522
523         if (!HAVE_HWFP)
524                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
525
526         if (!cpu_has_fxsr) {
527                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
528                                            &target->thread.fpu.state->fsave, 0,
529                                            -1);
530         }
531
532         sanitize_i387_state(target);
533
534         if (kbuf && pos == 0 && count == sizeof(env)) {
535                 convert_from_fxsr(kbuf, target);
536                 return 0;
537         }
538
539         convert_from_fxsr(&env, target);
540
541         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
542 }
543
544 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
545                unsigned int pos, unsigned int count,
546                const void *kbuf, const void __user *ubuf)
547 {
548         struct user_i387_ia32_struct env;
549         int ret;
550
551         ret = init_fpu(target);
552         if (ret)
553                 return ret;
554
555         sanitize_i387_state(target);
556
557         if (!HAVE_HWFP)
558                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
559
560         if (!cpu_has_fxsr) {
561                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
562                                           &target->thread.fpu.state->fsave, 0, -1);
563         }
564
565         if (pos > 0 || count < sizeof(env))
566                 convert_from_fxsr(&env, target);
567
568         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
569         if (!ret)
570                 convert_to_fxsr(target, &env);
571
572         /*
573          * update the header bit in the xsave header, indicating the
574          * presence of FP.
575          */
576         if (cpu_has_xsave)
577                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
578         return ret;
579 }
580
581 /*
582  * FPU state for core dumps.
583  * This is only used for a.out dumps now.
584  * It is declared generically using elf_fpregset_t (which is
585  * struct user_i387_struct) but is in fact only used for 32-bit
586  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
587  */
588 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
589 {
590         struct task_struct *tsk = current;
591         int fpvalid;
592
593         fpvalid = !!used_math();
594         if (fpvalid)
595                 fpvalid = !fpregs_get(tsk, NULL,
596                                       0, sizeof(struct user_i387_ia32_struct),
597                                       fpu, NULL);
598
599         return fpvalid;
600 }
601 EXPORT_SYMBOL(dump_fpu);
602
603 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */