4 #include <linux/kernel.h>
5 #include <linux/compiler.h>
6 #include <linux/types.h>
8 #include <asm/page.h> /* IO address mapping routines need this */
10 #include <asm-generic/pci_iomap.h>
13 #define __SLOW_DOWN_IO do { } while (0)
14 #define SLOW_DOWN_IO do { } while (0)
16 /* BIO layer definitions. */
17 extern unsigned long kern_base, kern_size;
19 static inline u8 _inb(unsigned long addr)
23 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
25 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
31 static inline u16 _inw(unsigned long addr)
35 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
37 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
43 static inline u32 _inl(unsigned long addr)
47 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
49 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
55 static inline void _outb(u8 b, unsigned long addr)
57 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
59 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
63 static inline void _outw(u16 w, unsigned long addr)
65 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
67 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
71 static inline void _outl(u32 l, unsigned long addr)
73 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
75 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
79 #define inb(__addr) (_inb((unsigned long)(__addr)))
80 #define inw(__addr) (_inw((unsigned long)(__addr)))
81 #define inl(__addr) (_inl((unsigned long)(__addr)))
82 #define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr)))
83 #define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr)))
84 #define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr)))
86 #define inb_p(__addr) inb(__addr)
87 #define outb_p(__b, __addr) outb(__b, __addr)
88 #define inw_p(__addr) inw(__addr)
89 #define outw_p(__w, __addr) outw(__w, __addr)
90 #define inl_p(__addr) inl(__addr)
91 #define outl_p(__l, __addr) outl(__l, __addr)
93 void outsb(unsigned long, const void *, unsigned long);
94 void outsw(unsigned long, const void *, unsigned long);
95 void outsl(unsigned long, const void *, unsigned long);
96 void insb(unsigned long, void *, unsigned long);
97 void insw(unsigned long, void *, unsigned long);
98 void insl(unsigned long, void *, unsigned long);
100 static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
102 insb((unsigned long __force)port, buf, count);
104 static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
106 insw((unsigned long __force)port, buf, count);
109 static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
111 insl((unsigned long __force)port, buf, count);
114 static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
116 outsb((unsigned long __force)port, buf, count);
119 static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
121 outsw((unsigned long __force)port, buf, count);
124 static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
126 outsl((unsigned long __force)port, buf, count);
129 /* Memory functions, same as I/O accesses on Ultra. */
130 static inline u8 _readb(const volatile void __iomem *addr)
133 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
135 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
140 static inline u16 _readw(const volatile void __iomem *addr)
143 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
145 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
151 static inline u32 _readl(const volatile void __iomem *addr)
154 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
156 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
162 static inline u64 _readq(const volatile void __iomem *addr)
165 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
167 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
173 static inline void _writeb(u8 b, volatile void __iomem *addr)
175 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
177 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
181 static inline void _writew(u16 w, volatile void __iomem *addr)
183 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
185 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
189 static inline void _writel(u32 l, volatile void __iomem *addr)
191 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
193 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
197 static inline void _writeq(u64 q, volatile void __iomem *addr)
199 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
201 : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
205 #define readb(__addr) _readb(__addr)
206 #define readw(__addr) _readw(__addr)
207 #define readl(__addr) _readl(__addr)
208 #define readq(__addr) _readq(__addr)
209 #define readb_relaxed(__addr) _readb(__addr)
210 #define readw_relaxed(__addr) _readw(__addr)
211 #define readl_relaxed(__addr) _readl(__addr)
212 #define readq_relaxed(__addr) _readq(__addr)
213 #define writeb(__b, __addr) _writeb(__b, __addr)
214 #define writew(__w, __addr) _writew(__w, __addr)
215 #define writel(__l, __addr) _writel(__l, __addr)
216 #define writeq(__q, __addr) _writeq(__q, __addr)
218 /* Now versions without byte-swapping. */
219 static inline u8 _raw_readb(unsigned long addr)
223 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
225 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
230 static inline u16 _raw_readw(unsigned long addr)
234 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
236 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
241 static inline u32 _raw_readl(unsigned long addr)
245 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
247 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
252 static inline u64 _raw_readq(unsigned long addr)
256 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
258 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
263 static inline void _raw_writeb(u8 b, unsigned long addr)
265 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
267 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
270 static inline void _raw_writew(u16 w, unsigned long addr)
272 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
274 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
277 static inline void _raw_writel(u32 l, unsigned long addr)
279 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
281 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
284 static inline void _raw_writeq(u64 q, unsigned long addr)
286 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
288 : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
291 #define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr)))
292 #define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr)))
293 #define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr)))
294 #define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr)))
295 #define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr)))
296 #define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr)))
297 #define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr)))
298 #define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr)))
300 /* Valid I/O Space regions are anywhere, because each PCI bus supported
301 * can live in an arbitrary area of the physical address range.
303 #define IO_SPACE_LIMIT 0xffffffffffffffffUL
305 /* Now, SBUS variants, only difference from PCI is that we do
306 * not use little-endian ASIs.
308 static inline u8 _sbus_readb(const volatile void __iomem *addr)
312 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
314 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
320 static inline u16 _sbus_readw(const volatile void __iomem *addr)
324 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
326 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
332 static inline u32 _sbus_readl(const volatile void __iomem *addr)
336 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
338 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
344 static inline u64 _sbus_readq(const volatile void __iomem *addr)
348 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */"
350 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
356 static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
358 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
360 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
364 static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
366 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
368 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
372 static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
374 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
376 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
380 static inline void _sbus_writeq(u64 l, volatile void __iomem *addr)
382 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
384 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
388 #define sbus_readb(__addr) _sbus_readb(__addr)
389 #define sbus_readw(__addr) _sbus_readw(__addr)
390 #define sbus_readl(__addr) _sbus_readl(__addr)
391 #define sbus_readq(__addr) _sbus_readq(__addr)
392 #define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr)
393 #define sbus_writew(__w, __addr) _sbus_writew(__w, __addr)
394 #define sbus_writel(__l, __addr) _sbus_writel(__l, __addr)
395 #define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr)
397 static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
405 #define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz)
408 _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
410 volatile void __iomem *d = dst;
418 #define memset_io(d,c,sz) _memset_io(d,c,sz)
421 _sbus_memcpy_fromio(void *dst, const volatile void __iomem *src,
427 char tmp = sbus_readb(src);
433 #define sbus_memcpy_fromio(d, s, sz) _sbus_memcpy_fromio(d, s, sz)
436 _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
441 char tmp = readb(src);
447 #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
450 _sbus_memcpy_toio(volatile void __iomem *dst, const void *src,
454 volatile void __iomem *d = dst;
463 #define sbus_memcpy_toio(d, s, sz) _sbus_memcpy_toio(d, s, sz)
466 _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
469 volatile void __iomem *d = dst;
478 #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
484 /* On sparc64 we have the whole physical IO address space accessible
485 * using physically addressed loads and stores, so this does nothing.
487 static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
489 return (void __iomem *)offset;
492 #define ioremap_nocache(X,Y) ioremap((X),(Y))
493 #define ioremap_wc(X,Y) ioremap((X),(Y))
495 static inline void iounmap(volatile void __iomem *addr)
499 #define ioread8(X) readb(X)
500 #define ioread16(X) readw(X)
501 #define ioread16be(X) __raw_readw(X)
502 #define ioread32(X) readl(X)
503 #define ioread32be(X) __raw_readl(X)
504 #define iowrite8(val,X) writeb(val,X)
505 #define iowrite16(val,X) writew(val,X)
506 #define iowrite16be(val,X) __raw_writew(val,X)
507 #define iowrite32(val,X) writel(val,X)
508 #define iowrite32be(val,X) __raw_writel(val,X)
510 /* Create a virtual mapping cookie for an IO port range */
511 void __iomem *ioport_map(unsigned long port, unsigned int nr);
512 void ioport_unmap(void __iomem *);
514 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
516 void pci_iounmap(struct pci_dev *dev, void __iomem *);
518 static inline int sbus_can_dma_64bit(void)
522 static inline int sbus_can_burst64(void)
527 void sbus_set_sbus64(struct device *, int);
530 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
533 #define xlate_dev_mem_ptr(p) __va(p)
536 * Convert a virtual cached pointer to an uncached pointer
538 #define xlate_dev_kmem_ptr(p) p
542 #endif /* !(__SPARC64_IO_H) */