arch/sh/boards/board-sh7785lcr.c

   1 /*
   2  * Renesas Technology Corp. R0P7785LC0011RL Support.
   3  *
   4  * Copyright (C) 2008  Yoshihiro Shimoda
   5  * Copyright (C) 2009  Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/sm501.h>
  14 #include <linux/sm501-regs.h>
  15 #include <linux/fb.h>
  16 #include <linux/mtd/physmap.h>
  17 #include <linux/delay.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/i2c.h>
  20 #include <linux/i2c-pca-platform.h>
  21 #include <linux/i2c-algo-pca.h>
  22 #include <linux/usb/r8a66597.h>
  23 #include <linux/irq.h>
  24 #include <linux/io.h>
  25 #include <linux/clk.h>
  26 #include <linux/errno.h>
  27 #include <mach/sh7785lcr.h>
  28 #include <cpu/sh7785.h>
  29 #include <asm/heartbeat.h>
  30 #include <asm/clock.h>
  31 #include <asm/bl_bit.h>
  32
  33 /*
  34  * NOTE: This board has 2 physical memory maps.
  35  *       Please look at include/asm-sh/sh7785lcr.h or hardware manual.
  36  */
  37 static struct resource heartbeat_resource = {
  38         .start  = PLD_LEDCR,
  39         .end    = PLD_LEDCR,
  40         .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  41 };
  42
  43 static struct platform_device heartbeat_device = {
  44         .name           = "heartbeat",
  45         .id             = -1,
  46         .num_resources  = 1,
  47         .resource       = &heartbeat_resource,
  48 };
  49
  50 static struct mtd_partition nor_flash_partitions[] = {
  51         {
  52                 .name           = "loader",
  53                 .offset         = 0x00000000,
  54                 .size           = 512 * 1024,
  55         },
  56         {
  57                 .name           = "bootenv",
  58                 .offset         = MTDPART_OFS_APPEND,
  59                 .size           = 512 * 1024,
  60         },
  61         {
  62                 .name           = "kernel",
  63                 .offset         = MTDPART_OFS_APPEND,
  64                 .size           = 4 * 1024 * 1024,
  65         },
  66         {
  67                 .name           = "data",
  68                 .offset         = MTDPART_OFS_APPEND,
  69                 .size           = MTDPART_SIZ_FULL,
  70         },
  71 };
  72
  73 static struct physmap_flash_data nor_flash_data = {
  74         .width          = 4,
  75         .parts          = nor_flash_partitions,
  76         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
  77 };
  78
  79 static struct resource nor_flash_resources[] = {
  80         [0]     = {
  81                 .start  = NOR_FLASH_ADDR,
  82                 .end    = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  83                 .flags  = IORESOURCE_MEM,
  84         }
  85 };
  86
  87 static struct platform_device nor_flash_device = {
  88         .name           = "physmap-flash",
  89         .dev            = {
  90                 .platform_data  = &nor_flash_data,
  91         },
  92         .num_resources  = ARRAY_SIZE(nor_flash_resources),
  93         .resource       = nor_flash_resources,
  94 };
  95
  96 static struct r8a66597_platdata r8a66597_data = {
  97         .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
  98         .vif = 1,
  99 };
 100
 101 static struct resource r8a66597_usb_host_resources[] = {
 102         [0] = {
 103                 .start  = R8A66597_ADDR,
 104                 .end    = R8A66597_ADDR + R8A66597_SIZE - 1,
 105                 .flags  = IORESOURCE_MEM,
 106         },
 107         [1] = {
 108                 .start  = 2,
 109                 .end    = 2,
 110                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 111         },
 112 };
 113
 114 static struct platform_device r8a66597_usb_host_device = {
 115         .name           = "r8a66597_hcd",
 116         .id             = -1,
 117         .dev = {
 118                 .dma_mask               = NULL,
 119                 .coherent_dma_mask      = 0xffffffff,
 120                 .platform_data          = &r8a66597_data,
 121         },
 122         .num_resources  = ARRAY_SIZE(r8a66597_usb_host_resources),
 123         .resource       = r8a66597_usb_host_resources,
 124 };
 125
 126 static struct resource sm501_resources[] = {
 127         [0]     = {
 128                 .start  = SM107_MEM_ADDR,
 129                 .end    = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
 130                 .flags  = IORESOURCE_MEM,
 131         },
 132         [1]     = {
 133                 .start  = SM107_REG_ADDR,
 134                 .end    = SM107_REG_ADDR + SM107_REG_SIZE - 1,
 135                 .flags  = IORESOURCE_MEM,
 136         },
 137         [2]     = {
 138                 .start  = 10,
 139                 .flags  = IORESOURCE_IRQ,
 140         },
 141 };
 142
 143 static struct fb_videomode sm501_default_mode_crt = {
 144         .pixclock       = 35714,        /* 28MHz */
 145         .xres           = 640,
 146         .yres           = 480,
 147         .left_margin    = 105,
 148         .right_margin   = 16,
 149         .upper_margin   = 33,
 150         .lower_margin   = 10,
 151         .hsync_len      = 39,
 152         .vsync_len      = 2,
 153         .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 154 };
 155
 156 static struct fb_videomode sm501_default_mode_pnl = {
 157         .pixclock       = 40000,        /* 25MHz */
 158         .xres           = 640,
 159         .yres           = 480,
 160         .left_margin    = 2,
 161         .right_margin   = 16,
 162         .upper_margin   = 33,
 163         .lower_margin   = 10,
 164         .hsync_len      = 39,
 165         .vsync_len      = 2,
 166         .sync           = 0,
 167 };
 168
 169 static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
 170         .def_bpp        = 16,
 171         .def_mode       = &sm501_default_mode_pnl,
 172         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 173                           SM501FB_FLAG_USE_HWCURSOR |
 174                           SM501FB_FLAG_USE_HWACCEL |
 175                           SM501FB_FLAG_DISABLE_AT_EXIT |
 176                           SM501FB_FLAG_PANEL_NO_VBIASEN,
 177 };
 178
 179 static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
 180         .def_bpp        = 16,
 181         .def_mode       = &sm501_default_mode_crt,
 182         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 183                           SM501FB_FLAG_USE_HWCURSOR |
 184                           SM501FB_FLAG_USE_HWACCEL |
 185                           SM501FB_FLAG_DISABLE_AT_EXIT,
 186 };
 187
 188 static struct sm501_platdata_fb sm501_fb_pdata = {
 189         .fb_route       = SM501_FB_OWN,
 190         .fb_crt         = &sm501_pdata_fbsub_crt,
 191         .fb_pnl         = &sm501_pdata_fbsub_pnl,
 192 };
 193
 194 static struct sm501_initdata sm501_initdata = {
 195         .gpio_high      = {
 196                 .set    = 0x00001fe0,
 197                 .mask   = 0x0,
 198         },
 199         .devices        = 0,
 200         .mclk           = 84 * 1000000,
 201         .m1xclk         = 112 * 1000000,
 202 };
 203
 204 static struct sm501_platdata sm501_platform_data = {
 205         .init           = &sm501_initdata,
 206         .fb             = &sm501_fb_pdata,
 207 };
 208
 209 static struct platform_device sm501_device = {
 210         .name           = "sm501",
 211         .id             = -1,
 212         .dev            = {
 213                 .platform_data  = &sm501_platform_data,
 214         },
 215         .num_resources  = ARRAY_SIZE(sm501_resources),
 216         .resource       = sm501_resources,
 217 };
 218
 219 static struct resource i2c_proto_resources[] = {
 220         [0] = {
 221                 .start  = PCA9564_PROTO_32BIT_ADDR,
 222                 .end    = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
 223                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
 224         },
 225         [1] = {
 226                 .start  = 12,
 227                 .end    = 12,
 228                 .flags  = IORESOURCE_IRQ,
 229         },
 230 };
 231
 232 static struct resource i2c_resources[] = {
 233         [0] = {
 234                 .start  = PCA9564_ADDR,
 235                 .end    = PCA9564_ADDR + PCA9564_SIZE - 1,
 236                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
 237         },
 238         [1] = {
 239                 .start  = 12,
 240                 .end    = 12,
 241                 .flags  = IORESOURCE_IRQ,
 242         },
 243 };
 244
 245 static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
 246         .gpio                   = 0,
 247         .i2c_clock_speed        = I2C_PCA_CON_330kHz,
 248         .timeout                = HZ,
 249 };
 250
 251 static struct platform_device i2c_device = {
 252         .name           = "i2c-pca-platform",
 253         .id             = -1,
 254         .dev            = {
 255                 .platform_data  = &i2c_platform_data,
 256         },
 257         .num_resources  = ARRAY_SIZE(i2c_resources),
 258         .resource       = i2c_resources,
 259 };
 260
 261 static struct platform_device *sh7785lcr_devices[] __initdata = {
 262         &heartbeat_device,
 263         &nor_flash_device,
 264         &r8a66597_usb_host_device,
 265         &sm501_device,
 266         &i2c_device,
 267 };
 268
 269 static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
 270         {
 271                 I2C_BOARD_INFO("r2025sd", 0x32),
 272         },
 273 };
 274
 275 static int __init sh7785lcr_devices_setup(void)
 276 {
 277         i2c_register_board_info(0, sh7785lcr_i2c_devices,
 278                                 ARRAY_SIZE(sh7785lcr_i2c_devices));
 279
 280         if (mach_is_sh7785lcr_pt()) {
 281                 i2c_device.resource = i2c_proto_resources;
 282                 i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
 283         }
 284
 285         return platform_add_devices(sh7785lcr_devices,
 286                                     ARRAY_SIZE(sh7785lcr_devices));
 287 }
 288 device_initcall(sh7785lcr_devices_setup);
 289
 290 /* Initialize IRQ setting */
 291 void __init init_sh7785lcr_IRQ(void)
 292 {
 293         plat_irq_setup_pins(IRQ_MODE_IRQ7654);
 294         plat_irq_setup_pins(IRQ_MODE_IRQ3210);
 295 }
 296
 297 static int sh7785lcr_clk_init(void)
 298 {
 299         struct clk *clk;
 300         int ret;
 301
 302         clk = clk_get(NULL, "extal");
 303         if (IS_ERR(clk))
 304                 return PTR_ERR(clk);
 305         ret = clk_set_rate(clk, 33333333);
 306         clk_put(clk);
 307
 308         return ret;
 309 }
 310
 311 static void sh7785lcr_power_off(void)
 312 {
 313         unsigned char *p;
 314
 315         p = ioremap(PLD_POFCR, PLD_POFCR + 1);
 316         if (!p) {
 317                 printk(KERN_ERR "%s: ioremap error.\n", __func__);
 318                 return;
 319         }
 320         *p = 0x01;
 321         iounmap(p);
 322         set_bl_bit();
 323         while (1)
 324                 cpu_relax();
 325 }
 326
 327 /* Initialize the board */
 328 static void __init sh7785lcr_setup(char **cmdline_p)
 329 {
 330         void __iomem *sm501_reg;
 331
 332         printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
 333
 334         pm_power_off = sh7785lcr_power_off;
 335
 336         /* sm501 DRAM configuration */
 337         sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
 338         if (!sm501_reg) {
 339                 printk(KERN_ERR "%s: ioremap error.\n", __func__);
 340                 return;
 341         }
 342
 343         writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
 344         iounmap(sm501_reg);
 345 }
 346
 347 /* Return the board specific boot mode pin configuration */
 348 static int sh7785lcr_mode_pins(void)
 349 {
 350         int value = 0;
 351
 352         /* These are the factory default settings of S1 and S2.
 353          * If you change these dip switches then you will need to
 354          * adjust the values below as well.
 355          */
 356         value |= MODE_PIN4; /* Clock Mode 16 */
 357         value |= MODE_PIN5; /* 32-bit Area0 bus width */
 358         value |= MODE_PIN6; /* 32-bit Area0 bus width */
 359         value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
 360         value |= MODE_PIN8; /* Little Endian */
 361         value |= MODE_PIN9; /* Master Mode */
 362         value |= MODE_PIN14; /* No PLL step-up */
 363
 364         return value;
 365 }
 366
 367 /*
 368  * The Machine Vector
 369  */
 370 static struct sh_machine_vector mv_sh7785lcr __initmv = {
 371         .mv_name                = "SH7785LCR",
 372         .mv_setup               = sh7785lcr_setup,
 373         .mv_clk_init            = sh7785lcr_clk_init,
 374         .mv_init_irq            = init_sh7785lcr_IRQ,
 375         .mv_mode_pins           = sh7785lcr_mode_pins,
 376 };
 377