2 * S390 low-level entry points.
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
23 #include <asm/vx-insn.h>
24 #include <asm/setup.h>
26 #include <asm/export.h>
27 #include <asm/nospec-insn.h>
30 __PT_R1 = __PT_GPRS + 8
31 __PT_R2 = __PT_GPRS + 16
32 __PT_R3 = __PT_GPRS + 24
33 __PT_R4 = __PT_GPRS + 32
34 __PT_R5 = __PT_GPRS + 40
35 __PT_R6 = __PT_GPRS + 48
36 __PT_R7 = __PT_GPRS + 56
37 __PT_R8 = __PT_GPRS + 64
38 __PT_R9 = __PT_GPRS + 72
39 __PT_R10 = __PT_GPRS + 80
40 __PT_R11 = __PT_GPRS + 88
41 __PT_R12 = __PT_GPRS + 96
42 __PT_R13 = __PT_GPRS + 104
43 __PT_R14 = __PT_GPRS + 112
44 __PT_R15 = __PT_GPRS + 120
46 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
47 STACK_SIZE = 1 << STACK_SHIFT
48 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
50 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
53 _TIF_SYSCALL_TRACEPOINT)
54 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
55 _PIF_WORK = (_PIF_PER_TRAP)
57 #define BASED(name) name-cleanup_critical(%r13)
60 #ifdef CONFIG_TRACE_IRQFLAGS
62 brasl %r14,trace_hardirqs_on_caller
67 #ifdef CONFIG_TRACE_IRQFLAGS
69 brasl %r14,trace_hardirqs_off_caller
73 .macro LOCKDEP_SYS_EXIT
75 tm __PT_PSW+1(%r11),0x01 # returning to user ?
77 brasl %r14,lockdep_sys_exit
81 .macro CHECK_STACK stacksize,savearea
82 #ifdef CONFIG_CHECK_STACK
83 tml %r15,\stacksize - CONFIG_STACK_GUARD
89 .macro SWITCH_ASYNC savearea,timer
90 tmhh %r8,0x0001 # interrupting from user ?
93 slg %r14,BASED(.Lcritical_start)
94 clg %r14,BASED(.Lcritical_length)
96 lghi %r11,\savearea # inside critical section, do cleanup
97 brasl %r14,cleanup_critical
98 tmhh %r8,0x0001 # retest problem state after cleanup
100 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
102 srag %r14,%r14,STACK_SHIFT
104 CHECK_STACK 1<<STACK_SHIFT,\savearea
105 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
108 UPDATE_VTIME %r14,%r15,\timer
109 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
110 2: lg %r15,__LC_ASYNC_STACK # load async stack
111 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
114 .macro UPDATE_VTIME w1,w2,enter_timer
115 lg \w1,__LC_EXIT_TIMER
116 lg \w2,__LC_LAST_UPDATE_TIMER
118 slg \w2,__LC_EXIT_TIMER
119 alg \w1,__LC_USER_TIMER
120 alg \w2,__LC_SYSTEM_TIMER
121 stg \w1,__LC_USER_TIMER
122 stg \w2,__LC_SYSTEM_TIMER
123 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
126 .macro LAST_BREAK scratch
127 srag \scratch,%r10,23
129 stg %r10,__TI_last_break(%r12)
133 stg %r8,__LC_RETURN_PSW
134 ni __LC_RETURN_PSW,0xbf
139 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
140 .insn s,0xb27c0000,\savearea # store clock fast
142 .insn s,0xb2050000,\savearea # store clock
147 * The TSTMSK macro generates a test-under-mask instruction by
148 * calculating the memory offset for the specified mask value.
149 * Mask value can be any constant. The macro shifts the mask
150 * value to calculate the memory offset for the test-under-mask
153 .macro TSTMSK addr, mask, size=8, bytepos=0
154 .if (\bytepos < \size) && (\mask >> 8)
156 .error "Mask exceeds byte boundary"
158 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
162 .error "Mask must not be zero"
164 off = \size - \bytepos - 1
169 .pushsection .altinstr_replacement, "ax"
170 660: .long 0xb2e8c000
172 661: .long 0x47000000
173 .pushsection .altinstructions, "a"
183 .pushsection .altinstr_replacement, "ax"
184 662: .long 0xb2e8d000
186 663: .long 0x47000000
187 .pushsection .altinstructions, "a"
196 .macro BPENTER tif_ptr,tif_mask
197 .pushsection .altinstr_replacement, "ax"
198 662: .word 0xc004, 0x0000, 0x0000 # 6 byte nop
199 .word 0xc004, 0x0000, 0x0000 # 6 byte nop
201 664: TSTMSK \tif_ptr,\tif_mask
204 .pushsection .altinstructions, "a"
213 .macro BPEXIT tif_ptr,tif_mask
214 TSTMSK \tif_ptr,\tif_mask
215 .pushsection .altinstr_replacement, "ax"
221 .pushsection .altinstructions, "a"
232 GEN_BR_THUNK %r14,%r11
234 .section .kprobes.text, "ax"
237 * This nop exists only in order to avoid that __switch_to starts at
238 * the beginning of the kprobes text section. In that case we would
239 * have several symbols at the same address. E.g. objdump would take
240 * an arbitrary symbol name when disassembling this code.
241 * With the added nop in between the __switch_to symbol is unique
252 * Scheduler resume function, called by switch_to
253 * gpr2 = (task_struct *) prev
254 * gpr3 = (task_struct *) next
259 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
261 aghi %r1,__TASK_thread # thread_struct of prev task
262 lg %r5,__TASK_thread_info(%r3) # get thread_info of next
263 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
265 aghi %r1,__TASK_thread # thread_struct of next task
267 aghi %r15,STACK_INIT # end of kernel stack of next
268 stg %r3,__LC_CURRENT # store task struct of next
269 stg %r5,__LC_THREAD_INFO # store thread info of next
270 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
271 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
272 /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */
273 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
274 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
275 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
276 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
278 .insn s,0xb2800000,__LC_LPP # set program parameter
283 #if IS_ENABLED(CONFIG_KVM)
285 * sie64a calling convention:
286 * %r2 pointer to sie control block
287 * %r3 guest register save area
290 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
292 stg %r2,__SF_EMPTY(%r15) # save control block pointer
293 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
294 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
295 mvc __SF_EMPTY+24(8,%r15),__TI_flags(%r12) # copy thread flags
296 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
297 jno .Lsie_load_guest_gprs
298 brasl %r14,load_fpu_regs # load guest fp/vx regs
299 .Lsie_load_guest_gprs:
300 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
301 lg %r14,__LC_GMAP # get gmap pointer
304 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
306 lg %r14,__SF_EMPTY(%r15) # get control block pointer
307 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
308 tm __SIE_PROG20+3(%r14),3 # last exit...
310 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
311 jo .Lsie_skip # exit if fp/vx regs changed
312 BPEXIT __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
316 BPENTER __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
318 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
319 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
321 # some program checks are suppressing. C code (e.g. do_protection_exception)
322 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
323 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
324 # Other instructions between sie64a and .Lsie_done should not cause program
325 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
326 # See also .Lcleanup_sie
335 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
336 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
337 xgr %r0,%r0 # clear guest registers to
338 xgr %r1,%r1 # prevent speculative use
343 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
344 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
348 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
351 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
352 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
353 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
354 EX_TABLE(sie_exit,.Lsie_fault)
355 EXPORT_SYMBOL(sie64a)
356 EXPORT_SYMBOL(sie_exit)
360 * SVC interrupt handler routine. System calls are synchronous events and
361 * are executed with interrupts enabled.
365 stpt __LC_SYNC_ENTER_TIMER
367 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
369 lg %r10,__LC_LAST_BREAK
370 lg %r12,__LC_THREAD_INFO
371 lghi %r14,_PIF_SYSCALL
373 lg %r15,__LC_KERNEL_STACK
374 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
377 UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER
378 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
379 stmg %r0,%r7,__PT_R0(%r11)
380 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
381 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
382 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
383 stg %r14,__PT_FLAGS(%r11)
385 # clear user controlled register to prevent speculative use
387 lg %r10,__TI_sysc_table(%r12) # address of system call table
388 llgh %r8,__PT_INT_CODE+2(%r11)
389 slag %r8,%r8,2 # shift and test for svc 0
391 # svc 0: system call number in %r1
392 llgfr %r1,%r1 # clear high word in r1
395 sth %r1,__PT_INT_CODE+2(%r11)
398 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
399 stg %r2,__PT_ORIG_GPR2(%r11)
400 stg %r7,STACK_FRAME_OVERHEAD(%r15)
401 lgf %r9,0(%r8,%r10) # get system call add.
402 TSTMSK __TI_flags(%r12),_TIF_TRACE
404 BASR_EX %r14,%r9 # call sys_xxxx
405 stg %r2,__PT_R2(%r11) # store return value
410 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
412 TSTMSK __TI_flags(%r12),_TIF_WORK
413 jnz .Lsysc_work # check for work
414 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
416 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
418 lg %r14,__LC_VDSO_PER_CPU
419 lmg %r0,%r10,__PT_R0(%r11)
420 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
423 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
424 lmg %r11,%r15,__PT_R11(%r11)
425 lpswe __LC_RETURN_PSW
429 # One of the work bits is on. Find out which one.
432 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
433 jo .Lsysc_mcck_pending
434 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
436 #ifdef CONFIG_UPROBES
437 TSTMSK __TI_flags(%r12),_TIF_UPROBE
438 jo .Lsysc_uprobe_notify
440 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
442 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
444 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
445 jo .Lsysc_notify_resume
446 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
448 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
450 j .Lsysc_return # beware of critical section cleanup
453 # _TIF_NEED_RESCHED is set, call schedule
456 larl %r14,.Lsysc_return
460 # _CIF_MCCK_PENDING is set, call handler
463 larl %r14,.Lsysc_return
464 jg s390_handle_mcck # TIF bit will be cleared by handler
467 # _CIF_ASCE is set, load user space asce
470 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
471 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
475 # CIF_FPU is set, restore floating-point controls and floating-point registers.
478 larl %r14,.Lsysc_return
482 # _TIF_SIGPENDING is set, call do_signal
485 lgr %r2,%r11 # pass pointer to pt_regs
487 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
489 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
490 lg %r10,__TI_sysc_table(%r12) # address of system call table
491 lghi %r8,0 # svc 0 returns -ENOSYS
492 llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number
494 jnl .Lsysc_nr_ok # invalid svc number -> do svc 0
496 j .Lsysc_nr_ok # restart svc
499 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
501 .Lsysc_notify_resume:
502 lgr %r2,%r11 # pass pointer to pt_regs
503 larl %r14,.Lsysc_return
507 # _TIF_UPROBE is set, call uprobe_notify_resume
509 #ifdef CONFIG_UPROBES
510 .Lsysc_uprobe_notify:
511 lgr %r2,%r11 # pass pointer to pt_regs
512 larl %r14,.Lsysc_return
513 jg uprobe_notify_resume
517 # _PIF_PER_TRAP is set, call do_per_trap
520 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
521 lgr %r2,%r11 # pass pointer to pt_regs
522 larl %r14,.Lsysc_return
526 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
527 # and after the system call
530 lgr %r2,%r11 # pass pointer to pt_regs
532 llgh %r0,__PT_INT_CODE+2(%r11)
533 stg %r0,__PT_R2(%r11)
534 brasl %r14,do_syscall_trace_enter
541 lmg %r3,%r7,__PT_R3(%r11)
542 stg %r7,STACK_FRAME_OVERHEAD(%r15)
543 lg %r2,__PT_ORIG_GPR2(%r11)
544 BASR_EX %r14,%r9 # call sys_xxx
545 stg %r2,__PT_R2(%r11) # store return value
547 TSTMSK __TI_flags(%r12),_TIF_TRACE
549 lgr %r2,%r11 # pass pointer to pt_regs
550 larl %r14,.Lsysc_return
551 jg do_syscall_trace_exit
554 # a new process exits the kernel with ret_from_fork
557 la %r11,STACK_FRAME_OVERHEAD(%r15)
558 lg %r12,__LC_THREAD_INFO
559 brasl %r14,schedule_tail
561 ssm __LC_SVC_NEW_PSW # reenable interrupts
562 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
564 # it's a kernel thread
565 lmg %r9,%r10,__PT_R9(%r11) # load gprs
566 ENTRY(kernel_thread_starter)
572 * Program check handler routine
575 ENTRY(pgm_check_handler)
576 stpt __LC_SYNC_ENTER_TIMER
578 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
579 lg %r10,__LC_LAST_BREAK
580 lg %r12,__LC_THREAD_INFO
581 larl %r13,cleanup_critical
582 lmg %r8,%r9,__LC_PGM_OLD_PSW
583 tmhh %r8,0x0001 # test problem state bit
584 jnz 2f # -> fault in user space
585 #if IS_ENABLED(CONFIG_KVM)
586 # cleanup critical section for sie64a
588 slg %r14,BASED(.Lsie_critical_start)
589 clg %r14,BASED(.Lsie_critical_length)
591 brasl %r14,.Lcleanup_sie
593 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
594 jnz 1f # -> enabled, can't be a double fault
595 tm __LC_PGM_ILC+3,0x80 # check for per exception
596 jnz .Lpgm_svcper # -> single stepped svc
597 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
598 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
601 UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
602 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
603 lg %r15,__LC_KERNEL_STACK
604 lg %r14,__TI_task(%r12)
605 aghi %r14,__TASK_thread # pointer to thread_struct
606 lghi %r13,__LC_PGM_TDB
607 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
609 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
610 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
611 stmg %r0,%r7,__PT_R0(%r11)
612 # clear user controlled registers to prevent speculative use
621 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
622 stmg %r8,%r9,__PT_PSW(%r11)
623 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
624 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
625 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
626 stg %r10,__PT_ARGS(%r11)
627 tm __LC_PGM_ILC+3,0x80 # check for per exception
629 tmhh %r8,0x0001 # kernel per event ?
631 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
632 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
633 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
634 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
636 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
637 larl %r1,pgm_check_table
638 llgh %r10,__PT_INT_CODE+2(%r11)
642 lgf %r9,0(%r10,%r1) # load address of handler routine
643 lgr %r2,%r11 # pass pointer to pt_regs
644 BASR_EX %r14,%r9 # branch to interrupt-handler
647 tm __PT_PSW+1(%r11),0x01 # returning to user ?
652 # PER event in supervisor state, must be kprobes
656 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
657 lgr %r2,%r11 # pass pointer to pt_regs
658 brasl %r14,do_per_trap
662 # single stepped system call
665 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
667 stg %r14,__LC_RETURN_PSW+8
668 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
669 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
672 * IO interrupt handler routine
674 ENTRY(io_int_handler)
676 stpt __LC_ASYNC_ENTER_TIMER
678 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
679 lg %r10,__LC_LAST_BREAK
680 lg %r12,__LC_THREAD_INFO
681 larl %r13,cleanup_critical
682 lmg %r8,%r9,__LC_IO_OLD_PSW
683 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
684 stmg %r0,%r7,__PT_R0(%r11)
685 # clear user controlled registers to prevent speculative use
695 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
696 stmg %r8,%r9,__PT_PSW(%r11)
697 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
698 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
699 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
702 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
704 lgr %r2,%r11 # pass pointer to pt_regs
705 lghi %r3,IO_INTERRUPT
706 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
708 lghi %r3,THIN_INTERRUPT
711 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
715 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
721 TSTMSK __TI_flags(%r12),_TIF_WORK
722 jnz .Lio_work # there is work to do (signals etc.)
723 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
726 lg %r14,__LC_VDSO_PER_CPU
727 lmg %r0,%r10,__PT_R0(%r11)
728 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
729 tm __PT_PSW+1(%r11),0x01 # returning to user ?
731 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
734 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
736 lmg %r11,%r15,__PT_R11(%r11)
737 lpswe __LC_RETURN_PSW
741 # There is work todo, find out in which context we have been interrupted:
742 # 1) if we return to user space we can do all _TIF_WORK work
743 # 2) if we return to kernel code and kvm is enabled check if we need to
744 # modify the psw to leave SIE
745 # 3) if we return to kernel code and preemptive scheduling is enabled check
746 # the preemption counter and if it is zero call preempt_schedule_irq
747 # Before any work can be done, a switch to the kernel stack is required.
750 tm __PT_PSW+1(%r11),0x01 # returning to user ?
751 jo .Lio_work_user # yes -> do resched & signal
752 #ifdef CONFIG_PREEMPT
753 # check for preemptive scheduling
754 icm %r0,15,__TI_precount(%r12)
755 jnz .Lio_restore # preemption is disabled
756 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
758 # switch to kernel stack
759 lg %r1,__PT_R15(%r11)
760 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
761 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
762 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
763 la %r11,STACK_FRAME_OVERHEAD(%r1)
765 # TRACE_IRQS_ON already done at .Lio_return, call
766 # TRACE_IRQS_OFF to keep things symmetrical
768 brasl %r14,preempt_schedule_irq
775 # Need to do work before returning to userspace, switch to kernel stack
778 lg %r1,__LC_KERNEL_STACK
779 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
780 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
781 la %r11,STACK_FRAME_OVERHEAD(%r1)
785 # One of the work bits is on. Find out which one.
788 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
790 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
792 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
794 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
795 jo .Lio_notify_resume
796 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
798 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
800 j .Lio_return # beware of critical section cleanup
803 # _CIF_MCCK_PENDING is set, call handler
806 # TRACE_IRQS_ON already done at .Lio_return
807 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
812 # _CIF_ASCE is set, load user space asce
815 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
816 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
820 # CIF_FPU is set, restore floating-point controls and floating-point registers.
823 larl %r14,.Lio_return
827 # _TIF_NEED_RESCHED is set, call schedule
830 # TRACE_IRQS_ON already done at .Lio_return
831 ssm __LC_SVC_NEW_PSW # reenable interrupts
832 brasl %r14,schedule # call scheduler
833 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
838 # _TIF_SIGPENDING or is set, call do_signal
841 # TRACE_IRQS_ON already done at .Lio_return
842 ssm __LC_SVC_NEW_PSW # reenable interrupts
843 lgr %r2,%r11 # pass pointer to pt_regs
845 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
850 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
853 # TRACE_IRQS_ON already done at .Lio_return
854 ssm __LC_SVC_NEW_PSW # reenable interrupts
855 lgr %r2,%r11 # pass pointer to pt_regs
856 brasl %r14,do_notify_resume
857 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
862 * External interrupt handler routine
864 ENTRY(ext_int_handler)
866 stpt __LC_ASYNC_ENTER_TIMER
868 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
869 lg %r10,__LC_LAST_BREAK
870 lg %r12,__LC_THREAD_INFO
871 larl %r13,cleanup_critical
872 lmg %r8,%r9,__LC_EXT_OLD_PSW
873 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
874 stmg %r0,%r7,__PT_R0(%r11)
875 # clear user controlled registers to prevent speculative use
885 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
886 stmg %r8,%r9,__PT_PSW(%r11)
887 lghi %r1,__LC_EXT_PARAMS2
888 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
889 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
890 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
891 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
892 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
895 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
896 lgr %r2,%r11 # pass pointer to pt_regs
897 lghi %r3,EXT_INTERRUPT
902 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
905 stg %r3,__SF_EMPTY(%r15)
906 larl %r1,.Lpsw_idle_lpsw+4
907 stg %r1,__SF_EMPTY+8(%r15)
909 larl %r1,smp_cpu_mtid
913 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
916 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
918 STCK __CLOCK_IDLE_ENTER(%r2)
919 stpt __TIMER_IDLE_ENTER(%r2)
921 lpswe __SF_EMPTY(%r15)
926 * Store floating-point controls and floating-point or vector register
927 * depending whether the vector facility is available. A critical section
928 * cleanup assures that the registers are stored even if interrupted for
929 * some other work. The CIF_FPU flag is set to trigger a lazy restore
930 * of the register contents at return from io or a system call.
934 aghi %r2,__TASK_thread
935 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
936 jo .Lsave_fpu_regs_exit
937 stfpc __THREAD_FPU_fpc(%r2)
938 .Lsave_fpu_regs_fpc_end:
939 lg %r3,__THREAD_FPU_regs(%r2)
940 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
941 jz .Lsave_fpu_regs_fp # no -> store FP regs
942 .Lsave_fpu_regs_vx_low:
943 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
944 .Lsave_fpu_regs_vx_high:
945 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
946 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
964 .Lsave_fpu_regs_done:
965 oi __LC_CPU_FLAGS+7,_CIF_FPU
966 .Lsave_fpu_regs_exit:
969 #if IS_ENABLED(CONFIG_KVM)
970 EXPORT_SYMBOL(save_fpu_regs)
974 * Load floating-point controls and floating-point or vector registers.
975 * A critical section cleanup assures that the register contents are
976 * loaded even if interrupted for some other work.
978 * There are special calling conventions to fit into sysc and io return work:
979 * %r15: <kernel stack>
980 * The function requires:
985 aghi %r4,__TASK_thread
986 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
987 jno .Lload_fpu_regs_exit
988 lfpc __THREAD_FPU_fpc(%r4)
989 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
990 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
991 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
994 .Lload_fpu_regs_vx_high:
995 VLM %v16,%v31,256,%r4
996 j .Lload_fpu_regs_done
1014 .Lload_fpu_regs_done:
1015 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
1016 .Lload_fpu_regs_exit:
1018 .Lload_fpu_regs_end:
1023 * Machine check handler routines
1025 ENTRY(mcck_int_handler)
1026 STCK __LC_MCCK_CLOCK
1028 la %r1,4095 # revalidate r1
1029 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
1030 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1031 lg %r10,__LC_LAST_BREAK
1032 lg %r12,__LC_THREAD_INFO
1033 larl %r13,cleanup_critical
1034 lmg %r8,%r9,__LC_MCK_OLD_PSW
1035 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
1036 jo .Lmcck_panic # yes -> rest of mcck code invalid
1037 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
1038 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1039 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1041 la %r14,__LC_SYNC_ENTER_TIMER
1042 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
1044 la %r14,__LC_ASYNC_ENTER_TIMER
1045 0: clc 0(8,%r14),__LC_EXIT_TIMER
1047 la %r14,__LC_EXIT_TIMER
1048 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
1050 la %r14,__LC_LAST_UPDATE_TIMER
1052 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1053 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
1054 jno .Lmcck_panic # no -> skip cleanup critical
1055 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
1057 lghi %r14,__LC_GPREGS_SAVE_AREA+64
1058 stmg %r0,%r7,__PT_R0(%r11)
1059 # clear user controlled registers to prevent speculative use
1069 mvc __PT_R8(64,%r11),0(%r14)
1070 stmg %r8,%r9,__PT_PSW(%r11)
1071 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1072 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1073 lgr %r2,%r11 # pass pointer to pt_regs
1074 brasl %r14,s390_do_machine_check
1075 tm __PT_PSW+1(%r11),0x01 # returning to user ?
1077 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
1078 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1079 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1080 la %r11,STACK_FRAME_OVERHEAD(%r1)
1082 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
1083 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
1086 brasl %r14,s390_handle_mcck
1089 lg %r14,__LC_VDSO_PER_CPU
1090 lmg %r0,%r10,__PT_R0(%r11)
1091 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1092 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1094 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
1095 stpt __LC_EXIT_TIMER
1096 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
1097 0: lmg %r11,%r15,__PT_R11(%r11)
1098 lpswe __LC_RETURN_MCCK_PSW
1101 lg %r15,__LC_PANIC_STACK
1102 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
1106 # PSW restart interrupt handler
1108 ENTRY(restart_int_handler)
1109 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1111 .insn s,0xb2800000,__LC_LPP
1112 0: stg %r15,__LC_SAVE_AREA_RESTART
1113 lg %r15,__LC_RESTART_STACK
1114 aghi %r15,-__PT_SIZE # create pt_regs on stack
1115 xc 0(__PT_SIZE,%r15),0(%r15)
1116 stmg %r0,%r14,__PT_R0(%r15)
1117 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1118 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1119 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
1120 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1121 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1122 lg %r2,__LC_RESTART_DATA
1123 lg %r3,__LC_RESTART_SOURCE
1124 ltgr %r3,%r3 # test source cpu address
1125 jm 1f # negative -> skip source stop
1126 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1127 brc 10,0b # wait for status stored
1128 1: basr %r14,%r1 # call function
1129 stap __SF_EMPTY(%r15) # store cpu address
1130 llgh %r3,__SF_EMPTY(%r15)
1131 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1135 .section .kprobes.text, "ax"
1137 #ifdef CONFIG_CHECK_STACK
1139 * The synchronous or the asynchronous stack overflowed. We are dead.
1140 * No need to properly save the registers, we are going to panic anyway.
1141 * Setup a pt_regs so that show_trace can provide a good call trace.
1144 lg %r15,__LC_PANIC_STACK # change to panic stack
1145 la %r11,STACK_FRAME_OVERHEAD(%r15)
1146 stmg %r0,%r7,__PT_R0(%r11)
1147 stmg %r8,%r9,__PT_PSW(%r11)
1148 mvc __PT_R8(64,%r11),0(%r14)
1149 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1150 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1151 lgr %r2,%r11 # pass pointer to pt_regs
1152 jg kernel_stack_overflow
1156 #if IS_ENABLED(CONFIG_KVM)
1157 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1159 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1162 clg %r9,BASED(.Lcleanup_table) # system_call
1164 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1165 jl .Lcleanup_system_call
1166 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1168 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1169 jl .Lcleanup_sysc_tif
1170 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1171 jl .Lcleanup_sysc_restore
1172 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1174 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1176 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1177 jl .Lcleanup_io_restore
1178 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1180 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1182 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1184 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1185 jl .Lcleanup_save_fpu_regs
1186 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1188 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1189 jl .Lcleanup_load_fpu_regs
1197 .quad .Lsysc_restore
1203 .quad .Lpsw_idle_end
1205 .quad .Lsave_fpu_regs_end
1207 .quad .Lload_fpu_regs_end
1209 #if IS_ENABLED(CONFIG_KVM)
1210 .Lcleanup_table_sie:
1215 BPENTER __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
1216 lg %r9,__SF_EMPTY(%r15) # get control block pointer
1217 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1218 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1219 larl %r9,sie_exit # skip forward to sie_exit
1223 .Lcleanup_system_call:
1224 # check if stpt has been executed
1225 clg %r9,BASED(.Lcleanup_system_call_insn)
1227 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1228 cghi %r11,__LC_SAVE_AREA_ASYNC
1230 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1231 0: # check if stmg has been executed
1232 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1234 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1235 0: # check if base register setup + TIF bit load has been done
1236 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1238 # set up saved registers r10 and r12
1239 stg %r10,16(%r11) # r10 last break
1240 stg %r12,32(%r11) # r12 thread-info pointer
1241 0: # check if the user time update has been done
1242 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1244 lg %r15,__LC_EXIT_TIMER
1245 slg %r15,__LC_SYNC_ENTER_TIMER
1246 alg %r15,__LC_USER_TIMER
1247 stg %r15,__LC_USER_TIMER
1248 0: # check if the system time update has been done
1249 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1251 lg %r15,__LC_LAST_UPDATE_TIMER
1252 slg %r15,__LC_EXIT_TIMER
1253 alg %r15,__LC_SYSTEM_TIMER
1254 stg %r15,__LC_SYSTEM_TIMER
1255 0: # update accounting time stamp
1256 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1261 mvc __TI_last_break(8,%r12),16(%r11)
1262 0: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
1263 # set up saved register r11
1264 lg %r15,__LC_KERNEL_STACK
1265 la %r9,STACK_FRAME_OVERHEAD(%r15)
1266 stg %r9,24(%r11) # r11 pt_regs pointer
1268 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1269 stmg %r0,%r7,__PT_R0(%r9)
1270 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1271 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1272 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1273 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1274 # setup saved register r15
1275 stg %r15,56(%r11) # r15 stack pointer
1276 # set new psw address and exit
1277 larl %r9,.Lsysc_do_svc
1279 .Lcleanup_system_call_insn:
1283 .quad .Lsysc_vtime+36
1284 .quad .Lsysc_vtime+42
1290 .Lcleanup_sysc_restore:
1291 # check if stpt has been executed
1292 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1294 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1295 cghi %r11,__LC_SAVE_AREA_ASYNC
1297 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1298 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8)
1300 lg %r9,24(%r11) # get saved pointer to pt_regs
1301 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1302 mvc 0(64,%r11),__PT_R8(%r9)
1303 lmg %r0,%r7,__PT_R0(%r9)
1304 1: lmg %r8,%r9,__LC_RETURN_PSW
1306 .Lcleanup_sysc_restore_insn:
1307 .quad .Lsysc_exit_timer
1308 .quad .Lsysc_done - 4
1314 .Lcleanup_io_restore:
1315 # check if stpt has been executed
1316 clg %r9,BASED(.Lcleanup_io_restore_insn)
1318 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1319 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8)
1321 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1322 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1323 mvc 0(64,%r11),__PT_R8(%r9)
1324 lmg %r0,%r7,__PT_R0(%r9)
1325 1: lmg %r8,%r9,__LC_RETURN_PSW
1327 .Lcleanup_io_restore_insn:
1328 .quad .Lio_exit_timer
1332 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1333 # copy interrupt clock & cpu timer
1334 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1335 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1336 cghi %r11,__LC_SAVE_AREA_ASYNC
1338 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1339 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1340 0: # check if stck & stpt have been executed
1341 clg %r9,BASED(.Lcleanup_idle_insn)
1343 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1344 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1345 1: # calculate idle cycles
1347 clg %r9,BASED(.Lcleanup_idle_insn)
1349 larl %r1,smp_cpu_mtid
1353 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1355 ag %r3,__LC_PERCPU_OFFSET
1356 la %r4,__SF_EMPTY+16(%r15)
1365 3: # account system time going idle
1366 lg %r9,__LC_STEAL_TIMER
1367 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1368 slg %r9,__LC_LAST_UPDATE_CLOCK
1369 stg %r9,__LC_STEAL_TIMER
1370 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1371 lg %r9,__LC_SYSTEM_TIMER
1372 alg %r9,__LC_LAST_UPDATE_TIMER
1373 slg %r9,__TIMER_IDLE_ENTER(%r2)
1374 stg %r9,__LC_SYSTEM_TIMER
1375 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1376 # prepare return psw
1377 nihh %r8,0xfcfd # clear irq & wait state bits
1378 lg %r9,48(%r11) # return from psw_idle
1380 .Lcleanup_idle_insn:
1381 .quad .Lpsw_idle_lpsw
1383 .Lcleanup_save_fpu_regs:
1384 larl %r9,save_fpu_regs
1387 .Lcleanup_load_fpu_regs:
1388 larl %r9,load_fpu_regs
1396 .quad .L__critical_start
1398 .quad .L__critical_end - .L__critical_start
1399 #if IS_ENABLED(CONFIG_KVM)
1400 .Lsie_critical_start:
1402 .Lsie_critical_length:
1403 .quad .Lsie_done - .Lsie_gmap
1405 .section .rodata, "a"
1406 #define SYSCALL(esame,emu) .long esame
1407 .globl sys_call_table
1409 #include "syscalls.S"
1412 #ifdef CONFIG_COMPAT
1414 #define SYSCALL(esame,emu) .long emu
1415 .globl sys_call_table_emu
1417 #include "syscalls.S"