arch/powerpc/kernel/dt_cpu_ftrs.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright 2017, Nicholas Piggin, IBM Corporation
   4  */
   5
   6 #define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
   7
   8 #include <linux/export.h>
   9 #include <linux/init.h>
  10 #include <linux/jump_label.h>
  11 #include <linux/libfdt.h>
  12 #include <linux/memblock.h>
  13 #include <linux/printk.h>
  14 #include <linux/sched.h>
  15 #include <linux/string.h>
  16 #include <linux/threads.h>
  17
  18 #include <asm/cputable.h>
  19 #include <asm/dt_cpu_ftrs.h>
  20 #include <asm/mmu.h>
  21 #include <asm/oprofile_impl.h>
  22 #include <asm/prom.h>
  23 #include <asm/setup.h>
  24
  25
  26 /* Device-tree visible constants follow */
  27 #define ISA_V2_07B      2070
  28 #define ISA_V3_0B       3000
  29
  30 #define USABLE_PR               (1U << 0)
  31 #define USABLE_OS               (1U << 1)
  32 #define USABLE_HV               (1U << 2)
  33
  34 #define HV_SUPPORT_HFSCR        (1U << 0)
  35 #define OS_SUPPORT_FSCR         (1U << 0)
  36
  37 /* For parsing, we define all bits set as "NONE" case */
  38 #define HV_SUPPORT_NONE         0xffffffffU
  39 #define OS_SUPPORT_NONE         0xffffffffU
  40
  41 struct dt_cpu_feature {
  42         const char *name;
  43         uint32_t isa;
  44         uint32_t usable_privilege;
  45         uint32_t hv_support;
  46         uint32_t os_support;
  47         uint32_t hfscr_bit_nr;
  48         uint32_t fscr_bit_nr;
  49         uint32_t hwcap_bit_nr;
  50         /* fdt parsing */
  51         unsigned long node;
  52         int enabled;
  53         int disabled;
  54 };
  55
  56 #define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)
  57
  58 #define COMMON_USER_BASE        (PPC_FEATURE_32 | PPC_FEATURE_64 | \
  59                                  PPC_FEATURE_ARCH_2_06 |\
  60                                  PPC_FEATURE_ICACHE_SNOOP)
  61 #define COMMON_USER2_BASE       (PPC_FEATURE2_ARCH_2_07 | \
  62                                  PPC_FEATURE2_ISEL)
  63 /*
  64  * Set up the base CPU
  65  */
  66
  67 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
  68 extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
  69
  70 static int hv_mode;
  71
  72 static struct {
  73         u64     lpcr;
  74         u64     lpcr_clear;
  75         u64     hfscr;
  76         u64     fscr;
  77 } system_registers;
  78
  79 static void (*init_pmu_registers)(void);
  80
  81 static void __restore_cpu_cpufeatures(void)
  82 {
  83         u64 lpcr;
  84
  85         /*
  86          * LPCR is restored by the power on engine already. It can be changed
  87          * after early init e.g., by radix enable, and we have no unified API
  88          * for saving and restoring such SPRs.
  89          *
  90          * This ->restore hook should really be removed from idle and register
  91          * restore moved directly into the idle restore code, because this code
  92          * doesn't know how idle is implemented or what it needs restored here.
  93          *
  94          * The best we can do to accommodate secondary boot and idle restore
  95          * for now is "or" LPCR with existing.
  96          */
  97         lpcr = mfspr(SPRN_LPCR);
  98         lpcr |= system_registers.lpcr;
  99         lpcr &= ~system_registers.lpcr_clear;
 100         mtspr(SPRN_LPCR, lpcr);
 101         if (hv_mode) {
 102                 mtspr(SPRN_LPID, 0);
 103                 mtspr(SPRN_HFSCR, system_registers.hfscr);
 104                 mtspr(SPRN_PCR, PCR_MASK);
 105         }
 106         mtspr(SPRN_FSCR, system_registers.fscr);
 107
 108         if (init_pmu_registers)
 109                 init_pmu_registers();
 110 }
 111
 112 static char dt_cpu_name[64];
 113
 114 static struct cpu_spec __initdata base_cpu_spec = {
 115         .cpu_name               = NULL,
 116         .cpu_features           = CPU_FTRS_DT_CPU_BASE,
 117         .cpu_user_features      = COMMON_USER_BASE,
 118         .cpu_user_features2     = COMMON_USER2_BASE,
 119         .mmu_features           = 0,
 120         .icache_bsize           = 32, /* minimum block size, fixed by */
 121         .dcache_bsize           = 32, /* cache info init.             */
 122         .num_pmcs               = 0,
 123         .pmc_type               = PPC_PMC_DEFAULT,
 124         .oprofile_cpu_type      = NULL,
 125         .oprofile_type          = PPC_OPROFILE_INVALID,
 126         .cpu_setup              = NULL,
 127         .cpu_restore            = __restore_cpu_cpufeatures,
 128         .machine_check_early    = NULL,
 129         .platform               = NULL,
 130 };
 131
 132 static void __init cpufeatures_setup_cpu(void)
 133 {
 134         set_cur_cpu_spec(&base_cpu_spec);
 135
 136         cur_cpu_spec->pvr_mask = -1;
 137         cur_cpu_spec->pvr_value = mfspr(SPRN_PVR);
 138
 139         /* Initialize the base environment -- clear FSCR/HFSCR.  */
 140         hv_mode = !!(mfmsr() & MSR_HV);
 141         if (hv_mode) {
 142                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 143                 mtspr(SPRN_HFSCR, 0);
 144         }
 145         mtspr(SPRN_FSCR, 0);
 146         mtspr(SPRN_PCR, PCR_MASK);
 147
 148         /*
 149          * LPCR does not get cleared, to match behaviour with secondaries
 150          * in __restore_cpu_cpufeatures. Once the idle code is fixed, this
 151          * could clear LPCR too.
 152          */
 153 }
 154
 155 static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
 156 {
 157         if (f->hv_support == HV_SUPPORT_NONE) {
 158         } else if (f->hv_support & HV_SUPPORT_HFSCR) {
 159                 u64 hfscr = mfspr(SPRN_HFSCR);
 160                 hfscr |= 1UL << f->hfscr_bit_nr;
 161                 mtspr(SPRN_HFSCR, hfscr);
 162         } else {
 163                 /* Does not have a known recipe */
 164                 return 0;
 165         }
 166
 167         if (f->os_support == OS_SUPPORT_NONE) {
 168         } else if (f->os_support & OS_SUPPORT_FSCR) {
 169                 u64 fscr = mfspr(SPRN_FSCR);
 170                 fscr |= 1UL << f->fscr_bit_nr;
 171                 mtspr(SPRN_FSCR, fscr);
 172         } else {
 173                 /* Does not have a known recipe */
 174                 return 0;
 175         }
 176
 177         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 178                 uint32_t word = f->hwcap_bit_nr / 32;
 179                 uint32_t bit = f->hwcap_bit_nr % 32;
 180
 181                 if (word == 0)
 182                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 183                 else if (word == 1)
 184                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 185                 else
 186                         pr_err("%s could not advertise to user (no hwcap bits)\n", f->name);
 187         }
 188
 189         return 1;
 190 }
 191
 192 static int __init feat_enable(struct dt_cpu_feature *f)
 193 {
 194         if (f->hv_support != HV_SUPPORT_NONE) {
 195                 if (f->hfscr_bit_nr != -1) {
 196                         u64 hfscr = mfspr(SPRN_HFSCR);
 197                         hfscr |= 1UL << f->hfscr_bit_nr;
 198                         mtspr(SPRN_HFSCR, hfscr);
 199                 }
 200         }
 201
 202         if (f->os_support != OS_SUPPORT_NONE) {
 203                 if (f->fscr_bit_nr != -1) {
 204                         u64 fscr = mfspr(SPRN_FSCR);
 205                         fscr |= 1UL << f->fscr_bit_nr;
 206                         mtspr(SPRN_FSCR, fscr);
 207                 }
 208         }
 209
 210         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 211                 uint32_t word = f->hwcap_bit_nr / 32;
 212                 uint32_t bit = f->hwcap_bit_nr % 32;
 213
 214                 if (word == 0)
 215                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 216                 else if (word == 1)
 217                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 218                 else
 219                         pr_err("CPU feature: %s could not advertise to user (no hwcap bits)\n", f->name);
 220         }
 221
 222         return 1;
 223 }
 224
 225 static int __init feat_disable(struct dt_cpu_feature *f)
 226 {
 227         return 0;
 228 }
 229
 230 static int __init feat_enable_hv(struct dt_cpu_feature *f)
 231 {
 232         u64 lpcr;
 233
 234         if (!hv_mode) {
 235                 pr_err("CPU feature hypervisor present in device tree but HV mode not enabled in the CPU. Ignoring.\n");
 236                 return 0;
 237         }
 238
 239         mtspr(SPRN_LPID, 0);
 240
 241         lpcr = mfspr(SPRN_LPCR);
 242         lpcr &=  ~LPCR_LPES0; /* HV external interrupts */
 243         mtspr(SPRN_LPCR, lpcr);
 244
 245         cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 246
 247         return 1;
 248 }
 249
 250 static int __init feat_enable_le(struct dt_cpu_feature *f)
 251 {
 252         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_TRUE_LE;
 253         return 1;
 254 }
 255
 256 static int __init feat_enable_smt(struct dt_cpu_feature *f)
 257 {
 258         cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
 259         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_SMT;
 260         return 1;
 261 }
 262
 263 static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
 264 {
 265         u64 lpcr;
 266
 267         /* Set PECE wakeup modes for ISA 207 */
 268         lpcr = mfspr(SPRN_LPCR);
 269         lpcr |=  LPCR_PECE0;
 270         lpcr |=  LPCR_PECE1;
 271         lpcr |=  LPCR_PECE2;
 272         mtspr(SPRN_LPCR, lpcr);
 273
 274         return 1;
 275 }
 276
 277 static int __init feat_enable_align_dsisr(struct dt_cpu_feature *f)
 278 {
 279         cur_cpu_spec->cpu_features &= ~CPU_FTR_NODSISRALIGN;
 280
 281         return 1;
 282 }
 283
 284 static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
 285 {
 286         u64 lpcr;
 287
 288         /* Set PECE wakeup modes for ISAv3.0B */
 289         lpcr = mfspr(SPRN_LPCR);
 290         lpcr |=  LPCR_PECE0;
 291         lpcr |=  LPCR_PECE1;
 292         lpcr |=  LPCR_PECE2;
 293         mtspr(SPRN_LPCR, lpcr);
 294
 295         return 1;
 296 }
 297
 298 static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
 299 {
 300         u64 lpcr;
 301
 302         lpcr = mfspr(SPRN_LPCR);
 303         lpcr &= ~LPCR_ISL;
 304
 305         /* VRMASD */
 306         lpcr |= LPCR_VPM0;
 307         lpcr &= ~LPCR_VPM1;
 308         lpcr |= 0x10UL << LPCR_VRMASD_SH; /* L=1 LP=00 */
 309         mtspr(SPRN_LPCR, lpcr);
 310
 311         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 312         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 313
 314         return 1;
 315 }
 316
 317 static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f)
 318 {
 319         u64 lpcr;
 320
 321         system_registers.lpcr_clear |= (LPCR_ISL | LPCR_UPRT | LPCR_HR);
 322         lpcr = mfspr(SPRN_LPCR);
 323         lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);
 324         mtspr(SPRN_LPCR, lpcr);
 325
 326         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 327         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 328
 329         return 1;
 330 }
 331
 332
 333 static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
 334 {
 335 #ifdef CONFIG_PPC_RADIX_MMU
 336         cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
 337         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 338         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 339
 340         return 1;
 341 #endif
 342         return 0;
 343 }
 344
 345 static int __init feat_enable_dscr(struct dt_cpu_feature *f)
 346 {
 347         u64 lpcr;
 348
 349         /*
 350          * Linux relies on FSCR[DSCR] being clear, so that we can take the
 351          * facility unavailable interrupt and track the task's usage of DSCR.
 352          * See facility_unavailable_exception().
 353          * Clear the bit here so that feat_enable() doesn't set it.
 354          */
 355         f->fscr_bit_nr = -1;
 356
 357         feat_enable(f);
 358
 359         lpcr = mfspr(SPRN_LPCR);
 360         lpcr &= ~LPCR_DPFD;
 361         lpcr |=  (4UL << LPCR_DPFD_SH);
 362         mtspr(SPRN_LPCR, lpcr);
 363
 364         return 1;
 365 }
 366
 367 static void hfscr_pmu_enable(void)
 368 {
 369         u64 hfscr = mfspr(SPRN_HFSCR);
 370         hfscr |= PPC_BIT(60);
 371         mtspr(SPRN_HFSCR, hfscr);
 372 }
 373
 374 static void init_pmu_power8(void)
 375 {
 376         if (hv_mode) {
 377                 mtspr(SPRN_MMCRC, 0);
 378                 mtspr(SPRN_MMCRH, 0);
 379         }
 380
 381         mtspr(SPRN_MMCRA, 0);
 382         mtspr(SPRN_MMCR0, 0);
 383         mtspr(SPRN_MMCR1, 0);
 384         mtspr(SPRN_MMCR2, 0);
 385         mtspr(SPRN_MMCRS, 0);
 386 }
 387
 388 static int __init feat_enable_mce_power8(struct dt_cpu_feature *f)
 389 {
 390         cur_cpu_spec->platform = "power8";
 391         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p8;
 392
 393         return 1;
 394 }
 395
 396 static int __init feat_enable_pmu_power8(struct dt_cpu_feature *f)
 397 {
 398         hfscr_pmu_enable();
 399
 400         init_pmu_power8();
 401         init_pmu_registers = init_pmu_power8;
 402
 403         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 404         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 405         if (pvr_version_is(PVR_POWER8E))
 406                 cur_cpu_spec->cpu_features |= CPU_FTR_PMAO_BUG;
 407
 408         cur_cpu_spec->num_pmcs          = 6;
 409         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 410         cur_cpu_spec->oprofile_cpu_type = "ppc64/power8";
 411
 412         return 1;
 413 }
 414
 415 static void init_pmu_power9(void)
 416 {
 417         if (hv_mode)
 418                 mtspr(SPRN_MMCRC, 0);
 419
 420         mtspr(SPRN_MMCRA, 0);
 421         mtspr(SPRN_MMCR0, 0);
 422         mtspr(SPRN_MMCR1, 0);
 423         mtspr(SPRN_MMCR2, 0);
 424 }
 425
 426 static int __init feat_enable_mce_power9(struct dt_cpu_feature *f)
 427 {
 428         cur_cpu_spec->platform = "power9";
 429         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p9;
 430
 431         return 1;
 432 }
 433
 434 static int __init feat_enable_pmu_power9(struct dt_cpu_feature *f)
 435 {
 436         hfscr_pmu_enable();
 437
 438         init_pmu_power9();
 439         init_pmu_registers = init_pmu_power9;
 440
 441         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 442         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 443
 444         cur_cpu_spec->num_pmcs          = 6;
 445         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 446         cur_cpu_spec->oprofile_cpu_type = "ppc64/power9";
 447
 448         return 1;
 449 }
 450
 451 static int __init feat_enable_tm(struct dt_cpu_feature *f)
 452 {
 453 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 454         feat_enable(f);
 455         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NOSC;
 456         return 1;
 457 #endif
 458         return 0;
 459 }
 460
 461 static int __init feat_enable_fp(struct dt_cpu_feature *f)
 462 {
 463         feat_enable(f);
 464         cur_cpu_spec->cpu_features &= ~CPU_FTR_FPU_UNAVAILABLE;
 465
 466         return 1;
 467 }
 468
 469 static int __init feat_enable_vector(struct dt_cpu_feature *f)
 470 {
 471 #ifdef CONFIG_ALTIVEC
 472         feat_enable(f);
 473         cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
 474         cur_cpu_spec->cpu_features |= CPU_FTR_VMX_COPY;
 475         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
 476
 477         return 1;
 478 #endif
 479         return 0;
 480 }
 481
 482 static int __init feat_enable_vsx(struct dt_cpu_feature *f)
 483 {
 484 #ifdef CONFIG_VSX
 485         feat_enable(f);
 486         cur_cpu_spec->cpu_features |= CPU_FTR_VSX;
 487         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_VSX;
 488
 489         return 1;
 490 #endif
 491         return 0;
 492 }
 493
 494 static int __init feat_enable_purr(struct dt_cpu_feature *f)
 495 {
 496         cur_cpu_spec->cpu_features |= CPU_FTR_PURR | CPU_FTR_SPURR;
 497
 498         return 1;
 499 }
 500
 501 static int __init feat_enable_ebb(struct dt_cpu_feature *f)
 502 {
 503         /*
 504          * PPC_FEATURE2_EBB is enabled in PMU init code because it has
 505          * historically been related to the PMU facility. This may have
 506          * to be decoupled if EBB becomes more generic. For now, follow
 507          * existing convention.
 508          */
 509         f->hwcap_bit_nr = -1;
 510         feat_enable(f);
 511
 512         return 1;
 513 }
 514
 515 static int __init feat_enable_dbell(struct dt_cpu_feature *f)
 516 {
 517         u64 lpcr;
 518
 519         /* P9 has an HFSCR for privileged state */
 520         feat_enable(f);
 521
 522         cur_cpu_spec->cpu_features |= CPU_FTR_DBELL;
 523
 524         lpcr = mfspr(SPRN_LPCR);
 525         lpcr |=  LPCR_PECEDH; /* hyp doorbell wakeup */
 526         mtspr(SPRN_LPCR, lpcr);
 527
 528         return 1;
 529 }
 530
 531 static int __init feat_enable_hvi(struct dt_cpu_feature *f)
 532 {
 533         u64 lpcr;
 534
 535         /*
 536          * POWER9 XIVE interrupts including in OPAL XICS compatibility
 537          * are always delivered as hypervisor virtualization interrupts (HVI)
 538          * rather than EE.
 539          *
 540          * However LPES0 is not set here, in the chance that an EE does get
 541          * delivered to the host somehow, the EE handler would not expect it
 542          * to be delivered in LPES0 mode (e.g., using SRR[01]). This could
 543          * happen if there is a bug in interrupt controller code, or IC is
 544          * misconfigured in systemsim.
 545          */
 546
 547         lpcr = mfspr(SPRN_LPCR);
 548         lpcr |= LPCR_HVICE;     /* enable hvi interrupts */
 549         lpcr |= LPCR_HEIC;      /* disable ee interrupts when MSR_HV */
 550         lpcr |= LPCR_PECE_HVEE; /* hvi can wake from stop */
 551         mtspr(SPRN_LPCR, lpcr);
 552
 553         return 1;
 554 }
 555
 556 static int __init feat_enable_large_ci(struct dt_cpu_feature *f)
 557 {
 558         cur_cpu_spec->mmu_features |= MMU_FTR_CI_LARGE_PAGE;
 559
 560         return 1;
 561 }
 562
 563 struct dt_cpu_feature_match {
 564         const char *name;
 565         int (*enable)(struct dt_cpu_feature *f);
 566         u64 cpu_ftr_bit_mask;
 567 };
 568
 569 static struct dt_cpu_feature_match __initdata
 570                 dt_cpu_feature_match_table[] = {
 571         {"hypervisor", feat_enable_hv, 0},
 572         {"big-endian", feat_enable, 0},
 573         {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
 574         {"smt", feat_enable_smt, 0},
 575         {"interrupt-facilities", feat_enable, 0},
 576         {"timer-facilities", feat_enable, 0},
 577         {"timer-facilities-v3", feat_enable, 0},
 578         {"debug-facilities", feat_enable, 0},
 579         {"come-from-address-register", feat_enable, CPU_FTR_CFAR},
 580         {"branch-tracing", feat_enable, 0},
 581         {"floating-point", feat_enable_fp, 0},
 582         {"vector", feat_enable_vector, 0},
 583         {"vector-scalar", feat_enable_vsx, 0},
 584         {"vector-scalar-v3", feat_enable, 0},
 585         {"decimal-floating-point", feat_enable, 0},
 586         {"decimal-integer", feat_enable, 0},
 587         {"quadword-load-store", feat_enable, 0},
 588         {"vector-crypto", feat_enable, 0},
 589         {"mmu-hash", feat_enable_mmu_hash, 0},
 590         {"mmu-radix", feat_enable_mmu_radix, 0},
 591         {"mmu-hash-v3", feat_enable_mmu_hash_v3, 0},
 592         {"virtual-page-class-key-protection", feat_enable, 0},
 593         {"transactional-memory", feat_enable_tm, CPU_FTR_TM},
 594         {"transactional-memory-v3", feat_enable_tm, 0},
 595         {"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
 596         {"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
 597         {"idle-nap", feat_enable_idle_nap, 0},
 598         {"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
 599         {"idle-stop", feat_enable_idle_stop, 0},
 600         {"machine-check-power8", feat_enable_mce_power8, 0},
 601         {"performance-monitor-power8", feat_enable_pmu_power8, 0},
 602         {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
 603         {"event-based-branch", feat_enable_ebb, 0},
 604         {"target-address-register", feat_enable, 0},
 605         {"branch-history-rolling-buffer", feat_enable, 0},
 606         {"control-register", feat_enable, CPU_FTR_CTRL},
 607         {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL},
 608         {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
 609         {"processor-utilization-of-resources-register", feat_enable_purr, 0},
 610         {"no-execute", feat_enable, 0},
 611         {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
 612         {"cache-inhibited-large-page", feat_enable_large_ci, 0},
 613         {"coprocessor-icswx", feat_enable, 0},
 614         {"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},
 615         {"program-priority-register", feat_enable, CPU_FTR_HAS_PPR},
 616         {"wait", feat_enable, 0},
 617         {"atomic-memory-operations", feat_enable, 0},
 618         {"branch-v3", feat_enable, 0},
 619         {"copy-paste", feat_enable, 0},
 620         {"decimal-floating-point-v3", feat_enable, 0},
 621         {"decimal-integer-v3", feat_enable, 0},
 622         {"fixed-point-v3", feat_enable, 0},
 623         {"floating-point-v3", feat_enable, 0},
 624         {"group-start-register", feat_enable, 0},
 625         {"pc-relative-addressing", feat_enable, 0},
 626         {"machine-check-power9", feat_enable_mce_power9, 0},
 627         {"performance-monitor-power9", feat_enable_pmu_power9, 0},
 628         {"event-based-branch-v3", feat_enable, 0},
 629         {"random-number-generator", feat_enable, 0},
 630         {"system-call-vectored", feat_disable, 0},
 631         {"trace-interrupt-v3", feat_enable, 0},
 632         {"vector-v3", feat_enable, 0},
 633         {"vector-binary128", feat_enable, 0},
 634         {"vector-binary16", feat_enable, 0},
 635         {"wait-v3", feat_enable, 0},
 636 };
 637
 638 static bool __initdata using_dt_cpu_ftrs;
 639 static bool __initdata enable_unknown = true;
 640
 641 static int __init dt_cpu_ftrs_parse(char *str)
 642 {
 643         if (!str)
 644                 return 0;
 645
 646         if (!strcmp(str, "off"))
 647                 using_dt_cpu_ftrs = false;
 648         else if (!strcmp(str, "known"))
 649                 enable_unknown = false;
 650         else
 651                 return 1;
 652
 653         return 0;
 654 }
 655 early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse);
 656
 657 static void __init cpufeatures_setup_start(u32 isa)
 658 {
 659         pr_info("setup for ISA %d\n", isa);
 660
 661         if (isa >= 3000) {
 662                 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
 663                 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
 664         }
 665 }
 666
 667 static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
 668 {
 669         const struct dt_cpu_feature_match *m;
 670         bool known = false;
 671         int i;
 672
 673         for (i = 0; i < ARRAY_SIZE(dt_cpu_feature_match_table); i++) {
 674                 m = &dt_cpu_feature_match_table[i];
 675                 if (!strcmp(f->name, m->name)) {
 676                         known = true;
 677                         if (m->enable(f)) {
 678                                 cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask;
 679                                 break;
 680                         }
 681
 682                         pr_info("not enabling: %s (disabled or unsupported by kernel)\n",
 683                                 f->name);
 684                         return false;
 685                 }
 686         }
 687
 688         if (!known && (!enable_unknown || !feat_try_enable_unknown(f))) {
 689                 pr_info("not enabling: %s (unknown and unsupported by kernel)\n",
 690                         f->name);
 691                 return false;
 692         }
 693
 694         if (known)
 695                 pr_debug("enabling: %s\n", f->name);
 696         else
 697                 pr_debug("enabling: %s (unknown)\n", f->name);
 698
 699         return true;
 700 }
 701
 702 /*
 703  * Handle POWER9 broadcast tlbie invalidation issue using
 704  * cpu feature flag.
 705  */
 706 static __init void update_tlbie_feature_flag(unsigned long pvr)
 707 {
 708         if (PVR_VER(pvr) == PVR_POWER9) {
 709                 /*
 710                  * Set the tlbie feature flag for anything below
 711                  * Nimbus DD 2.3 and Cumulus DD 1.3
 712                  */
 713                 if ((pvr & 0xe000) == 0) {
 714                         /* Nimbus */
 715                         if ((pvr & 0xfff) < 0x203)
 716                                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 717                 } else if ((pvr & 0xc000) == 0) {
 718                         /* Cumulus */
 719                         if ((pvr & 0xfff) < 0x103)
 720                                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 721                 } else {
 722                         WARN_ONCE(1, "Unknown PVR");
 723                         cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 724                 }
 725
 726                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_ERAT_BUG;
 727         }
 728 }
 729
 730 static __init void cpufeatures_cpu_quirks(void)
 731 {
 732         unsigned long version = mfspr(SPRN_PVR);
 733
 734         /*
 735          * Not all quirks can be derived from the cpufeatures device tree.
 736          */
 737         if ((version & 0xffffefff) == 0x004e0200)
 738                 ; /* DD2.0 has no feature flag */
 739         else if ((version & 0xffffefff) == 0x004e0201)
 740                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 741         else if ((version & 0xffffefff) == 0x004e0202) {
 742                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
 743                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
 744                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 745         } else if ((version & 0xffff0000) == 0x004e0000)
 746                 /* DD2.1 and up have DD2_1 */
 747                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 748
 749         if ((version & 0xffff0000) == 0x004e0000) {
 750                 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
 751                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
 752         }
 753
 754         update_tlbie_feature_flag(version);
 755         /*
 756          * PKEY was not in the initial base or feature node
 757          * specification, but it should become optional in the next
 758          * cpu feature version sequence.
 759          */
 760         cur_cpu_spec->cpu_features |= CPU_FTR_PKEY;
 761 }
 762
 763 static void __init cpufeatures_setup_finished(void)
 764 {
 765         cpufeatures_cpu_quirks();
 766
 767         if (hv_mode && !(cur_cpu_spec->cpu_features & CPU_FTR_HVMODE)) {
 768                 pr_err("hypervisor not present in device tree but HV mode is enabled in the CPU. Enabling.\n");
 769                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 770         }
 771
 772         /* Make sure powerpc_base_platform is non-NULL */
 773         powerpc_base_platform = cur_cpu_spec->platform;
 774
 775         system_registers.lpcr = mfspr(SPRN_LPCR);
 776         system_registers.hfscr = mfspr(SPRN_HFSCR);
 777         system_registers.fscr = mfspr(SPRN_FSCR);
 778
 779         pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
 780                 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
 781 }
 782
 783 static int __init disabled_on_cmdline(void)
 784 {
 785         unsigned long root, chosen;
 786         const char *p;
 787
 788         root = of_get_flat_dt_root();
 789         chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
 790         if (chosen == -FDT_ERR_NOTFOUND)
 791                 return false;
 792
 793         p = of_get_flat_dt_prop(chosen, "bootargs", NULL);
 794         if (!p)
 795                 return false;
 796
 797         if (strstr(p, "dt_cpu_ftrs=off"))
 798                 return true;
 799
 800         return false;
 801 }
 802
 803 static int __init fdt_find_cpu_features(unsigned long node, const char *uname,
 804                                         int depth, void *data)
 805 {
 806         if (of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features")
 807             && of_get_flat_dt_prop(node, "isa", NULL))
 808                 return 1;
 809
 810         return 0;
 811 }
 812
 813 bool __init dt_cpu_ftrs_in_use(void)
 814 {
 815         return using_dt_cpu_ftrs;
 816 }
 817
 818 bool __init dt_cpu_ftrs_init(void *fdt)
 819 {
 820         using_dt_cpu_ftrs = false;
 821
 822         /* Setup and verify the FDT, if it fails we just bail */
 823         if (!early_init_dt_verify(fdt))
 824                 return false;
 825
 826         if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
 827                 return false;
 828
 829         if (disabled_on_cmdline())
 830                 return false;
 831
 832         cpufeatures_setup_cpu();
 833
 834         using_dt_cpu_ftrs = true;
 835         return true;
 836 }
 837
 838 static int nr_dt_cpu_features;
 839 static struct dt_cpu_feature *dt_cpu_features;
 840
 841 static int __init process_cpufeatures_node(unsigned long node,
 842                                           const char *uname, int i)
 843 {
 844         const __be32 *prop;
 845         struct dt_cpu_feature *f;
 846         int len;
 847
 848         f = &dt_cpu_features[i];
 849
 850         f->node = node;
 851
 852         f->name = uname;
 853
 854         prop = of_get_flat_dt_prop(node, "isa", &len);
 855         if (!prop) {
 856                 pr_warn("%s: missing isa property\n", uname);
 857                 return 0;
 858         }
 859         f->isa = be32_to_cpup(prop);
 860
 861         prop = of_get_flat_dt_prop(node, "usable-privilege", &len);
 862         if (!prop) {
 863                 pr_warn("%s: missing usable-privilege property", uname);
 864                 return 0;
 865         }
 866         f->usable_privilege = be32_to_cpup(prop);
 867
 868         prop = of_get_flat_dt_prop(node, "hv-support", &len);
 869         if (prop)
 870                 f->hv_support = be32_to_cpup(prop);
 871         else
 872                 f->hv_support = HV_SUPPORT_NONE;
 873
 874         prop = of_get_flat_dt_prop(node, "os-support", &len);
 875         if (prop)
 876                 f->os_support = be32_to_cpup(prop);
 877         else
 878                 f->os_support = OS_SUPPORT_NONE;
 879
 880         prop = of_get_flat_dt_prop(node, "hfscr-bit-nr", &len);
 881         if (prop)
 882                 f->hfscr_bit_nr = be32_to_cpup(prop);
 883         else
 884                 f->hfscr_bit_nr = -1;
 885         prop = of_get_flat_dt_prop(node, "fscr-bit-nr", &len);
 886         if (prop)
 887                 f->fscr_bit_nr = be32_to_cpup(prop);
 888         else
 889                 f->fscr_bit_nr = -1;
 890         prop = of_get_flat_dt_prop(node, "hwcap-bit-nr", &len);
 891         if (prop)
 892                 f->hwcap_bit_nr = be32_to_cpup(prop);
 893         else
 894                 f->hwcap_bit_nr = -1;
 895
 896         if (f->usable_privilege & USABLE_HV) {
 897                 if (!(mfmsr() & MSR_HV)) {
 898                         pr_warn("%s: HV feature passed to guest\n", uname);
 899                         return 0;
 900                 }
 901
 902                 if (f->hv_support == HV_SUPPORT_NONE && f->hfscr_bit_nr != -1) {
 903                         pr_warn("%s: unwanted hfscr_bit_nr\n", uname);
 904                         return 0;
 905                 }
 906
 907                 if (f->hv_support == HV_SUPPORT_HFSCR) {
 908                         if (f->hfscr_bit_nr == -1) {
 909                                 pr_warn("%s: missing hfscr_bit_nr\n", uname);
 910                                 return 0;
 911                         }
 912                 }
 913         } else {
 914                 if (f->hv_support != HV_SUPPORT_NONE || f->hfscr_bit_nr != -1) {
 915                         pr_warn("%s: unwanted hv_support/hfscr_bit_nr\n", uname);
 916                         return 0;
 917                 }
 918         }
 919
 920         if (f->usable_privilege & USABLE_OS) {
 921                 if (f->os_support == OS_SUPPORT_NONE && f->fscr_bit_nr != -1) {
 922                         pr_warn("%s: unwanted fscr_bit_nr\n", uname);
 923                         return 0;
 924                 }
 925
 926                 if (f->os_support == OS_SUPPORT_FSCR) {
 927                         if (f->fscr_bit_nr == -1) {
 928                                 pr_warn("%s: missing fscr_bit_nr\n", uname);
 929                                 return 0;
 930                         }
 931                 }
 932         } else {
 933                 if (f->os_support != OS_SUPPORT_NONE || f->fscr_bit_nr != -1) {
 934                         pr_warn("%s: unwanted os_support/fscr_bit_nr\n", uname);
 935                         return 0;
 936                 }
 937         }
 938
 939         if (!(f->usable_privilege & USABLE_PR)) {
 940                 if (f->hwcap_bit_nr != -1) {
 941                         pr_warn("%s: unwanted hwcap_bit_nr\n", uname);
 942                         return 0;
 943                 }
 944         }
 945
 946         /* Do all the independent features in the first pass */
 947         if (!of_get_flat_dt_prop(node, "dependencies", &len)) {
 948                 if (cpufeatures_process_feature(f))
 949                         f->enabled = 1;
 950                 else
 951                         f->disabled = 1;
 952         }
 953
 954         return 0;
 955 }
 956
 957 static void __init cpufeatures_deps_enable(struct dt_cpu_feature *f)
 958 {
 959         const __be32 *prop;
 960         int len;
 961         int nr_deps;
 962         int i;
 963
 964         if (f->enabled || f->disabled)
 965                 return;
 966
 967         prop = of_get_flat_dt_prop(f->node, "dependencies", &len);
 968         if (!prop) {
 969                 pr_warn("%s: missing dependencies property", f->name);
 970                 return;
 971         }
 972
 973         nr_deps = len / sizeof(int);
 974
 975         for (i = 0; i < nr_deps; i++) {
 976                 unsigned long phandle = be32_to_cpu(prop[i]);
 977                 int j;
 978
 979                 for (j = 0; j < nr_dt_cpu_features; j++) {
 980                         struct dt_cpu_feature *d = &dt_cpu_features[j];
 981
 982                         if (of_get_flat_dt_phandle(d->node) == phandle) {
 983                                 cpufeatures_deps_enable(d);
 984                                 if (d->disabled) {
 985                                         f->disabled = 1;
 986                                         return;
 987                                 }
 988                         }
 989                 }
 990         }
 991
 992         if (cpufeatures_process_feature(f))
 993                 f->enabled = 1;
 994         else
 995                 f->disabled = 1;
 996 }
 997
 998 static int __init scan_cpufeatures_subnodes(unsigned long node,
 999                                           const char *uname,
1000                                           void *data)
1001 {
1002         int *count = data;
1003
1004         process_cpufeatures_node(node, uname, *count);
1005
1006         (*count)++;
1007
1008         return 0;
1009 }
1010
1011 static int __init count_cpufeatures_subnodes(unsigned long node,
1012                                           const char *uname,
1013                                           void *data)
1014 {
1015         int *count = data;
1016
1017         (*count)++;
1018
1019         return 0;
1020 }
1021
1022 static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char
1023                                             *uname, int depth, void *data)
1024 {
1025         const __be32 *prop;
1026         int count, i;
1027         u32 isa;
1028
1029         /* We are scanning "ibm,powerpc-cpu-features" nodes only */
1030         if (!of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features"))
1031                 return 0;
1032
1033         prop = of_get_flat_dt_prop(node, "isa", NULL);
1034         if (!prop)
1035                 /* We checked before, "can't happen" */
1036                 return 0;
1037
1038         isa = be32_to_cpup(prop);
1039
1040         /* Count and allocate space for cpu features */
1041         of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
1042                                                 &nr_dt_cpu_features);
1043         dt_cpu_features = memblock_alloc(sizeof(struct dt_cpu_feature) * nr_dt_cpu_features, PAGE_SIZE);
1044         if (!dt_cpu_features)
1045                 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
1046                       __func__,
1047                       sizeof(struct dt_cpu_feature) * nr_dt_cpu_features,
1048                       PAGE_SIZE);
1049
1050         cpufeatures_setup_start(isa);
1051
1052         /* Scan nodes into dt_cpu_features and enable those without deps  */
1053         count = 0;
1054         of_scan_flat_dt_subnodes(node, scan_cpufeatures_subnodes, &count);
1055
1056         /* Recursive enable remaining features with dependencies */
1057         for (i = 0; i < nr_dt_cpu_features; i++) {
1058                 struct dt_cpu_feature *f = &dt_cpu_features[i];
1059
1060                 cpufeatures_deps_enable(f);
1061         }
1062
1063         prop = of_get_flat_dt_prop(node, "display-name", NULL);
1064         if (prop && strlen((char *)prop) != 0) {
1065                 strlcpy(dt_cpu_name, (char *)prop, sizeof(dt_cpu_name));
1066                 cur_cpu_spec->cpu_name = dt_cpu_name;
1067         }
1068
1069         cpufeatures_setup_finished();
1070
1071         memblock_free(__pa(dt_cpu_features),
1072                         sizeof(struct dt_cpu_feature)*nr_dt_cpu_features);
1073
1074         return 0;
1075 }
1076
1077 void __init dt_cpu_ftrs_scan(void)
1078 {
1079         if (!using_dt_cpu_ftrs)
1080                 return;
1081
1082         of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL);
1083 }