2 * P5040 Silicon/SoC Device Tree Source (post include)
4 * Copyright 2012 Freescale Semiconductor Inc.
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36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
42 /* controller at 0x200000 */
44 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 fsl,iommu-parent = <&pamu0>;
54 #interrupt-cells = <1>;
58 interrupts = <16 2 1 15>;
59 interrupt-map-mask = <0xf800 0 0 7>;
62 0000 0 0 1 &mpic 40 1 0 0
63 0000 0 0 2 &mpic 1 1 0 0
64 0000 0 0 3 &mpic 2 1 0 0
65 0000 0 0 4 &mpic 3 1 0 0
70 /* controller at 0x201000 */
72 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
77 clock-frequency = <33333333>;
78 interrupts = <16 2 1 14>;
79 fsl,iommu-parent = <&pamu0>;
82 #interrupt-cells = <1>;
86 interrupts = <16 2 1 14>;
87 interrupt-map-mask = <0xf800 0 0 7>;
90 0000 0 0 1 &mpic 41 1 0 0
91 0000 0 0 2 &mpic 5 1 0 0
92 0000 0 0 3 &mpic 6 1 0 0
93 0000 0 0 4 &mpic 7 1 0 0
98 /* controller at 0x202000 */
100 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
103 #address-cells = <3>;
104 bus-range = <0x0 0xff>;
105 clock-frequency = <33333333>;
106 interrupts = <16 2 1 13>;
107 fsl,iommu-parent = <&pamu0>;
110 #interrupt-cells = <1>;
112 #address-cells = <3>;
114 interrupts = <16 2 1 13>;
115 interrupt-map-mask = <0xf800 0 0 7>;
118 0000 0 0 1 &mpic 42 1 0 0
119 0000 0 0 2 &mpic 9 1 0 0
120 0000 0 0 3 &mpic 10 1 0 0
121 0000 0 0 4 &mpic 11 1 0 0
127 #address-cells = <1>;
129 compatible = "fsl,dcsr", "simple-bus";
132 compatible = "fsl,p5040-dcsr-epu", "fsl,dcsr-epu";
133 interrupts = <52 2 0 0
139 compatible = "fsl,dcsr-npc";
140 reg = <0x1000 0x1000 0x1000000 0x8000>;
143 compatible = "fsl,dcsr-nxc";
144 reg = <0x2000 0x1000>;
147 compatible = "fsl,dcsr-corenet";
148 reg = <0x8000 0x1000 0xB0000 0x1000>;
151 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
152 reg = <0x9000 0x1000>;
155 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
156 reg = <0x11000 0x1000>;
159 compatible = "fsl,dcsr-ddr";
160 dev-handle = <&ddr1>;
161 reg = <0x12000 0x1000>;
164 compatible = "fsl,dcsr-ddr";
165 dev-handle = <&ddr2>;
166 reg = <0x13000 0x1000>;
169 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
170 reg = <0x18000 0x1000>;
173 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
174 reg = <0x22000 0x1000>;
176 dcsr-cpu-sb-proxy@40000 {
177 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
178 cpu-handle = <&cpu0>;
179 reg = <0x40000 0x1000>;
181 dcsr-cpu-sb-proxy@41000 {
182 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
183 cpu-handle = <&cpu1>;
184 reg = <0x41000 0x1000>;
186 dcsr-cpu-sb-proxy@42000 {
187 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
188 cpu-handle = <&cpu2>;
189 reg = <0x42000 0x1000>;
191 dcsr-cpu-sb-proxy@43000 {
192 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
193 cpu-handle = <&cpu3>;
194 reg = <0x43000 0x1000>;
199 #address-cells = <1>;
202 compatible = "simple-bus";
205 compatible = "fsl,soc-sram-error";
206 interrupts = <16 2 1 29>;
210 compatible = "fsl,corenet-law";
215 ddr1: memory-controller@8000 {
216 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
217 reg = <0x8000 0x1000>;
218 interrupts = <16 2 1 23>;
221 ddr2: memory-controller@9000 {
222 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
223 reg = <0x9000 0x1000>;
224 interrupts = <16 2 1 22>;
227 cpc: l3-cache-controller@10000 {
228 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
229 reg = <0x10000 0x1000
231 interrupts = <16 2 1 27
236 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
237 reg = <0x18000 0x1000>;
238 interrupts = <16 2 1 31>;
239 fsl,ccf-num-csdids = <32>;
240 fsl,ccf-num-snoopids = <32>;
244 compatible = "fsl,pamu-v1.0", "fsl,pamu";
245 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
246 ranges = <0 0x20000 0x5000>;
247 #address-cells = <1>;
249 interrupts = <24 2 0 0
251 fsl,portid-mapping = <0x0f800000>;
255 fsl,primary-cache-geometry = <32 1>;
256 fsl,secondary-cache-geometry = <128 2>;
260 reg = <0x1000 0x1000>;
261 fsl,primary-cache-geometry = <32 1>;
262 fsl,secondary-cache-geometry = <128 2>;
266 reg = <0x2000 0x1000>;
267 fsl,primary-cache-geometry = <32 1>;
268 fsl,secondary-cache-geometry = <128 2>;
272 reg = <0x3000 0x1000>;
273 fsl,primary-cache-geometry = <32 1>;
274 fsl,secondary-cache-geometry = <128 2>;
278 reg = <0x4000 0x1000>;
279 fsl,primary-cache-geometry = <32 1>;
280 fsl,secondary-cache-geometry = <128 2>;
284 /include/ "qoriq-mpic.dtsi"
286 guts: global-utilities@e0000 {
287 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
288 reg = <0xe0000 0xe00>;
291 fsl,liodn-bits = <12>;
294 pins: global-utilities@e0e00 {
295 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
296 reg = <0xe0e00 0x200>;
300 clockgen: global-utilities@e1000 {
301 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
302 ranges = <0x0 0xe1000 0x1000>;
303 reg = <0xe1000 0x1000>;
304 clock-frequency = <0>;
305 #address-cells = <1>;
310 compatible = "fsl,qoriq-sysclk-1.0";
311 clock-output-names = "sysclk";
317 compatible = "fsl,qoriq-core-pll-1.0";
319 clock-output-names = "pll0", "pll0-div2";
325 compatible = "fsl,qoriq-core-pll-1.0";
327 clock-output-names = "pll1", "pll1-div2";
333 compatible = "fsl,qoriq-core-mux-1.0";
334 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
335 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
336 clock-output-names = "cmux0";
342 compatible = "fsl,qoriq-core-mux-1.0";
343 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
344 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
345 clock-output-names = "cmux1";
351 compatible = "fsl,qoriq-core-mux-1.0";
352 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
353 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
354 clock-output-names = "cmux2";
360 compatible = "fsl,qoriq-core-mux-1.0";
361 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
362 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
363 clock-output-names = "cmux3";
367 rcpm: global-utilities@e2000 {
368 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
369 reg = <0xe2000 0x1000>;
374 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
375 reg = <0xe8000 0x1000>;
378 serdes: serdes@ea000 {
379 compatible = "fsl,p5040-serdes";
380 reg = <0xea000 0x1000>;
383 /include/ "qoriq-dma-0.dtsi"
385 fsl,iommu-parent = <&pamu0>;
386 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
389 /include/ "qoriq-dma-1.dtsi"
391 fsl,iommu-parent = <&pamu0>;
392 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
395 /include/ "qoriq-espi-0.dtsi"
397 fsl,espi-num-chipselects = <4>;
400 /include/ "qoriq-esdhc-0.dtsi"
402 fsl,iommu-parent = <&pamu2>;
403 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
407 /include/ "qoriq-i2c-0.dtsi"
408 /include/ "qoriq-i2c-1.dtsi"
409 /include/ "qoriq-duart-0.dtsi"
410 /include/ "qoriq-duart-1.dtsi"
411 /include/ "qoriq-gpio-0.dtsi"
412 /include/ "qoriq-usb2-mph-0.dtsi"
414 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
415 fsl,iommu-parent = <&pamu4>;
416 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
421 /include/ "qoriq-usb2-dr-0.dtsi"
423 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
424 fsl,iommu-parent = <&pamu4>;
425 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
430 /include/ "qoriq-sata2-0.dtsi"
432 fsl,iommu-parent = <&pamu4>;
433 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
436 /include/ "qoriq-sata2-1.dtsi"
438 fsl,iommu-parent = <&pamu4>;
439 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
442 /include/ "qoriq-sec5.2-0.dtsi"
444 fsl,iommu-parent = <&pamu4>;