arch/mips/boot/dts/qca/ar9331.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <dt-bindings/clock/ath79-clk.h>
   3
   4 / {
   5         compatible = "qca,ar9331";
   6
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9
  10         cpus {
  11                 #address-cells = <1>;
  12                 #size-cells = <0>;
  13
  14                 cpu@0 {
  15                         device_type = "cpu";
  16                         compatible = "mips,mips24Kc";
  17                         clocks = <&pll ATH79_CLK_CPU>;
  18                         reg = <0>;
  19                 };
  20         };
  21
  22         cpuintc: interrupt-controller {
  23                 compatible = "qca,ar7100-cpu-intc";
  24
  25                 interrupt-controller;
  26                 #interrupt-cells = <1>;
  27
  28                 qca,ddr-wb-channel-interrupts = <2>, <3>;
  29                 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
  30         };
  31
  32         ref: ref {
  33                 compatible = "fixed-clock";
  34                 #clock-cells = <0>;
  35         };
  36
  37         ahb {
  38                 compatible = "simple-bus";
  39                 ranges;
  40
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43
  44                 interrupt-parent = <&cpuintc>;
  45
  46                 apb {
  47                         compatible = "simple-bus";
  48                         ranges;
  49
  50                         #address-cells = <1>;
  51                         #size-cells = <1>;
  52
  53                         interrupt-parent = <&miscintc>;
  54
  55                         ddr_ctrl: memory-controller@18000000 {
  56                                 compatible = "qca,ar7240-ddr-controller";
  57                                 reg = <0x18000000 0x100>;
  58
  59                                 #qca,ddr-wb-channel-cells = <1>;
  60                         };
  61
  62                         uart: uart@18020000 {
  63                                 compatible = "qca,ar9330-uart";
  64                                 reg = <0x18020000 0x14>;
  65
  66                                 interrupts = <3>;
  67
  68                                 clocks = <&ref>;
  69                                 clock-names = "uart";
  70
  71                                 status = "disabled";
  72                         };
  73
  74                         gpio: gpio@18040000 {
  75                                 compatible = "qca,ar7100-gpio";
  76                                 reg = <0x18040000 0x34>;
  77                                 interrupts = <2>;
  78
  79                                 ngpios = <30>;
  80
  81                                 gpio-controller;
  82                                 #gpio-cells = <2>;
  83
  84                                 interrupt-controller;
  85                                 #interrupt-cells = <2>;
  86
  87                                 status = "disabled";
  88                         };
  89
  90                         pll: pll-controller@18050000 {
  91                                 compatible = "qca,ar9330-pll";
  92                                 reg = <0x18050000 0x100>;
  93
  94                                 clocks = <&ref>;
  95                                 clock-names = "ref";
  96
  97                                 #clock-cells = <1>;
  98                         };
  99
 100                         miscintc: interrupt-controller@18060010 {
 101                                 compatible = "qca,ar7240-misc-intc";
 102                                 reg = <0x18060010 0x8>;
 103
 104                                 interrupt-parent = <&cpuintc>;
 105                                 interrupts = <6>;
 106
 107                                 interrupt-controller;
 108                                 #interrupt-cells = <1>;
 109                         };
 110
 111                         rst: reset-controller@1806001c {
 112                                 compatible = "qca,ar7100-reset";
 113                                 reg = <0x1806001c 0x4>;
 114
 115                                 #reset-cells = <1>;
 116                         };
 117                 };
 118
 119                 usb: usb@1b000100 {
 120                         compatible = "chipidea,usb2";
 121                         reg = <0x1b000000 0x200>;
 122
 123                         interrupts = <3>;
 124                         resets = <&rst 5>;
 125
 126                         phy-names = "usb-phy";
 127                         phys = <&usb_phy>;
 128
 129                         status = "disabled";
 130                 };
 131
 132                 spi: spi@1f000000 {
 133                         compatible = "qca,ar7100-spi";
 134                         reg = <0x1f000000 0x10>;
 135
 136                         clocks = <&pll ATH79_CLK_AHB>;
 137                         clock-names = "ahb";
 138
 139                         #address-cells = <1>;
 140                         #size-cells = <0>;
 141
 142                         status = "disabled";
 143                 };
 144         };
 145
 146         usb_phy: usb-phy {
 147                 compatible = "qca,ar7100-usb-phy";
 148
 149                 reset-names = "phy", "suspend-override";
 150                 resets = <&rst 4>, <&rst 3>;
 151
 152                 #phy-cells = <0>;
 153
 154                 status = "disabled";
 155         };
 156 };