arch/cris/include/arch-v32/arch/hwregs/iop/asm/iop_dmc_in_defs_asm.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __iop_dmc_in_defs_asm_h
   3 #define __iop_dmc_in_defs_asm_h
   4
   5 /*
   6  * This file is autogenerated from
   7  *   file:           ../../inst/io_proc/rtl/iop_dmc_in.r
   8  *     id:           iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
   9  *     last modfied: Mon Apr 11 16:08:45 2005
  10  *
  11  *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_dmc_in_defs_asm.h ../../inst/io_proc/rtl/iop_dmc_in.r
  12  *      id: $Id: iop_dmc_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
  13  * Any changes here will be lost.
  14  *
  15  * -*- buffer-read-only: t -*-
  16  */
  17
  18 #ifndef REG_FIELD
  19 #define REG_FIELD( scope, reg, field, value ) \
  20   REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
  21 #define REG_FIELD_X_( value, shift ) ((value) << shift)
  22 #endif
  23
  24 #ifndef REG_STATE
  25 #define REG_STATE( scope, reg, field, symbolic_value ) \
  26   REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
  27 #define REG_STATE_X_( k, shift ) (k << shift)
  28 #endif
  29
  30 #ifndef REG_MASK
  31 #define REG_MASK( scope, reg, field ) \
  32   REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
  33 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
  34 #endif
  35
  36 #ifndef REG_LSB
  37 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
  38 #endif
  39
  40 #ifndef REG_BIT
  41 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
  42 #endif
  43
  44 #ifndef REG_ADDR
  45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
  46 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
  47 #endif
  48
  49 #ifndef REG_ADDR_VECT
  50 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  51          REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
  52                          STRIDE_##scope##_##reg )
  53 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
  54                           ((inst) + offs + (index) * stride)
  55 #endif
  56
  57 /* Register rw_cfg, scope iop_dmc_in, type rw */
  58 #define reg_iop_dmc_in_rw_cfg___sth_intr___lsb 0
  59 #define reg_iop_dmc_in_rw_cfg___sth_intr___width 3
  60 #define reg_iop_dmc_in_rw_cfg___last_dis_dif___lsb 3
  61 #define reg_iop_dmc_in_rw_cfg___last_dis_dif___width 1
  62 #define reg_iop_dmc_in_rw_cfg___last_dis_dif___bit 3
  63 #define reg_iop_dmc_in_rw_cfg_offset 0
  64
  65 /* Register rw_ctrl, scope iop_dmc_in, type rw */
  66 #define reg_iop_dmc_in_rw_ctrl___dif_en___lsb 0
  67 #define reg_iop_dmc_in_rw_ctrl___dif_en___width 1
  68 #define reg_iop_dmc_in_rw_ctrl___dif_en___bit 0
  69 #define reg_iop_dmc_in_rw_ctrl___dif_dis___lsb 1
  70 #define reg_iop_dmc_in_rw_ctrl___dif_dis___width 1
  71 #define reg_iop_dmc_in_rw_ctrl___dif_dis___bit 1
  72 #define reg_iop_dmc_in_rw_ctrl___stream_clr___lsb 2
  73 #define reg_iop_dmc_in_rw_ctrl___stream_clr___width 1
  74 #define reg_iop_dmc_in_rw_ctrl___stream_clr___bit 2
  75 #define reg_iop_dmc_in_rw_ctrl_offset 4
  76
  77 /* Register r_stat, scope iop_dmc_in, type r */
  78 #define reg_iop_dmc_in_r_stat___dif_en___lsb 0
  79 #define reg_iop_dmc_in_r_stat___dif_en___width 1
  80 #define reg_iop_dmc_in_r_stat___dif_en___bit 0
  81 #define reg_iop_dmc_in_r_stat_offset 8
  82
  83 /* Register rw_stream_cmd, scope iop_dmc_in, type rw */
  84 #define reg_iop_dmc_in_rw_stream_cmd___cmd___lsb 0
  85 #define reg_iop_dmc_in_rw_stream_cmd___cmd___width 10
  86 #define reg_iop_dmc_in_rw_stream_cmd___n___lsb 16
  87 #define reg_iop_dmc_in_rw_stream_cmd___n___width 8
  88 #define reg_iop_dmc_in_rw_stream_cmd_offset 12
  89
  90 /* Register rw_stream_wr_data, scope iop_dmc_in, type rw */
  91 #define reg_iop_dmc_in_rw_stream_wr_data_offset 16
  92
  93 /* Register rw_stream_wr_data_last, scope iop_dmc_in, type rw */
  94 #define reg_iop_dmc_in_rw_stream_wr_data_last_offset 20
  95
  96 /* Register rw_stream_ctrl, scope iop_dmc_in, type rw */
  97 #define reg_iop_dmc_in_rw_stream_ctrl___eop___lsb 0
  98 #define reg_iop_dmc_in_rw_stream_ctrl___eop___width 1
  99 #define reg_iop_dmc_in_rw_stream_ctrl___eop___bit 0
 100 #define reg_iop_dmc_in_rw_stream_ctrl___wait___lsb 1
 101 #define reg_iop_dmc_in_rw_stream_ctrl___wait___width 1
 102 #define reg_iop_dmc_in_rw_stream_ctrl___wait___bit 1
 103 #define reg_iop_dmc_in_rw_stream_ctrl___keep_md___lsb 2
 104 #define reg_iop_dmc_in_rw_stream_ctrl___keep_md___width 1
 105 #define reg_iop_dmc_in_rw_stream_ctrl___keep_md___bit 2
 106 #define reg_iop_dmc_in_rw_stream_ctrl___size___lsb 3
 107 #define reg_iop_dmc_in_rw_stream_ctrl___size___width 3
 108 #define reg_iop_dmc_in_rw_stream_ctrl_offset 24
 109
 110 /* Register r_stream_stat, scope iop_dmc_in, type r */
 111 #define reg_iop_dmc_in_r_stream_stat___sth___lsb 0
 112 #define reg_iop_dmc_in_r_stream_stat___sth___width 7
 113 #define reg_iop_dmc_in_r_stream_stat___full___lsb 16
 114 #define reg_iop_dmc_in_r_stream_stat___full___width 1
 115 #define reg_iop_dmc_in_r_stream_stat___full___bit 16
 116 #define reg_iop_dmc_in_r_stream_stat___last_pkt___lsb 17
 117 #define reg_iop_dmc_in_r_stream_stat___last_pkt___width 1
 118 #define reg_iop_dmc_in_r_stream_stat___last_pkt___bit 17
 119 #define reg_iop_dmc_in_r_stream_stat___data_md_valid___lsb 18
 120 #define reg_iop_dmc_in_r_stream_stat___data_md_valid___width 1
 121 #define reg_iop_dmc_in_r_stream_stat___data_md_valid___bit 18
 122 #define reg_iop_dmc_in_r_stream_stat___ctxt_md_valid___lsb 19
 123 #define reg_iop_dmc_in_r_stream_stat___ctxt_md_valid___width 1
 124 #define reg_iop_dmc_in_r_stream_stat___ctxt_md_valid___bit 19
 125 #define reg_iop_dmc_in_r_stream_stat___group_md_valid___lsb 20
 126 #define reg_iop_dmc_in_r_stream_stat___group_md_valid___width 1
 127 #define reg_iop_dmc_in_r_stream_stat___group_md_valid___bit 20
 128 #define reg_iop_dmc_in_r_stream_stat___stream_busy___lsb 21
 129 #define reg_iop_dmc_in_r_stream_stat___stream_busy___width 1
 130 #define reg_iop_dmc_in_r_stream_stat___stream_busy___bit 21
 131 #define reg_iop_dmc_in_r_stream_stat___cmd_rdy___lsb 22
 132 #define reg_iop_dmc_in_r_stream_stat___cmd_rdy___width 1
 133 #define reg_iop_dmc_in_r_stream_stat___cmd_rdy___bit 22
 134 #define reg_iop_dmc_in_r_stream_stat_offset 28
 135
 136 /* Register r_data_descr, scope iop_dmc_in, type r */
 137 #define reg_iop_dmc_in_r_data_descr___ctrl___lsb 0
 138 #define reg_iop_dmc_in_r_data_descr___ctrl___width 8
 139 #define reg_iop_dmc_in_r_data_descr___stat___lsb 8
 140 #define reg_iop_dmc_in_r_data_descr___stat___width 8
 141 #define reg_iop_dmc_in_r_data_descr___md___lsb 16
 142 #define reg_iop_dmc_in_r_data_descr___md___width 16
 143 #define reg_iop_dmc_in_r_data_descr_offset 32
 144
 145 /* Register r_ctxt_descr, scope iop_dmc_in, type r */
 146 #define reg_iop_dmc_in_r_ctxt_descr___ctrl___lsb 0
 147 #define reg_iop_dmc_in_r_ctxt_descr___ctrl___width 8
 148 #define reg_iop_dmc_in_r_ctxt_descr___stat___lsb 8
 149 #define reg_iop_dmc_in_r_ctxt_descr___stat___width 8
 150 #define reg_iop_dmc_in_r_ctxt_descr___md0___lsb 16
 151 #define reg_iop_dmc_in_r_ctxt_descr___md0___width 16
 152 #define reg_iop_dmc_in_r_ctxt_descr_offset 36
 153
 154 /* Register r_ctxt_descr_md1, scope iop_dmc_in, type r */
 155 #define reg_iop_dmc_in_r_ctxt_descr_md1_offset 40
 156
 157 /* Register r_ctxt_descr_md2, scope iop_dmc_in, type r */
 158 #define reg_iop_dmc_in_r_ctxt_descr_md2_offset 44
 159
 160 /* Register r_group_descr, scope iop_dmc_in, type r */
 161 #define reg_iop_dmc_in_r_group_descr___ctrl___lsb 0
 162 #define reg_iop_dmc_in_r_group_descr___ctrl___width 8
 163 #define reg_iop_dmc_in_r_group_descr___stat___lsb 8
 164 #define reg_iop_dmc_in_r_group_descr___stat___width 8
 165 #define reg_iop_dmc_in_r_group_descr___md___lsb 16
 166 #define reg_iop_dmc_in_r_group_descr___md___width 16
 167 #define reg_iop_dmc_in_r_group_descr_offset 56
 168
 169 /* Register rw_data_descr, scope iop_dmc_in, type rw */
 170 #define reg_iop_dmc_in_rw_data_descr___md___lsb 16
 171 #define reg_iop_dmc_in_rw_data_descr___md___width 16
 172 #define reg_iop_dmc_in_rw_data_descr_offset 60
 173
 174 /* Register rw_ctxt_descr, scope iop_dmc_in, type rw */
 175 #define reg_iop_dmc_in_rw_ctxt_descr___md0___lsb 16
 176 #define reg_iop_dmc_in_rw_ctxt_descr___md0___width 16
 177 #define reg_iop_dmc_in_rw_ctxt_descr_offset 64
 178
 179 /* Register rw_ctxt_descr_md1, scope iop_dmc_in, type rw */
 180 #define reg_iop_dmc_in_rw_ctxt_descr_md1_offset 68
 181
 182 /* Register rw_ctxt_descr_md2, scope iop_dmc_in, type rw */
 183 #define reg_iop_dmc_in_rw_ctxt_descr_md2_offset 72
 184
 185 /* Register rw_group_descr, scope iop_dmc_in, type rw */
 186 #define reg_iop_dmc_in_rw_group_descr___md___lsb 16
 187 #define reg_iop_dmc_in_rw_group_descr___md___width 16
 188 #define reg_iop_dmc_in_rw_group_descr_offset 84
 189
 190 /* Register rw_intr_mask, scope iop_dmc_in, type rw */
 191 #define reg_iop_dmc_in_rw_intr_mask___data_md___lsb 0
 192 #define reg_iop_dmc_in_rw_intr_mask___data_md___width 1
 193 #define reg_iop_dmc_in_rw_intr_mask___data_md___bit 0
 194 #define reg_iop_dmc_in_rw_intr_mask___ctxt_md___lsb 1
 195 #define reg_iop_dmc_in_rw_intr_mask___ctxt_md___width 1
 196 #define reg_iop_dmc_in_rw_intr_mask___ctxt_md___bit 1
 197 #define reg_iop_dmc_in_rw_intr_mask___group_md___lsb 2
 198 #define reg_iop_dmc_in_rw_intr_mask___group_md___width 1
 199 #define reg_iop_dmc_in_rw_intr_mask___group_md___bit 2
 200 #define reg_iop_dmc_in_rw_intr_mask___cmd_rdy___lsb 3
 201 #define reg_iop_dmc_in_rw_intr_mask___cmd_rdy___width 1
 202 #define reg_iop_dmc_in_rw_intr_mask___cmd_rdy___bit 3
 203 #define reg_iop_dmc_in_rw_intr_mask___sth___lsb 4
 204 #define reg_iop_dmc_in_rw_intr_mask___sth___width 1
 205 #define reg_iop_dmc_in_rw_intr_mask___sth___bit 4
 206 #define reg_iop_dmc_in_rw_intr_mask___full___lsb 5
 207 #define reg_iop_dmc_in_rw_intr_mask___full___width 1
 208 #define reg_iop_dmc_in_rw_intr_mask___full___bit 5
 209 #define reg_iop_dmc_in_rw_intr_mask_offset 88
 210
 211 /* Register rw_ack_intr, scope iop_dmc_in, type rw */
 212 #define reg_iop_dmc_in_rw_ack_intr___data_md___lsb 0
 213 #define reg_iop_dmc_in_rw_ack_intr___data_md___width 1
 214 #define reg_iop_dmc_in_rw_ack_intr___data_md___bit 0
 215 #define reg_iop_dmc_in_rw_ack_intr___ctxt_md___lsb 1
 216 #define reg_iop_dmc_in_rw_ack_intr___ctxt_md___width 1
 217 #define reg_iop_dmc_in_rw_ack_intr___ctxt_md___bit 1
 218 #define reg_iop_dmc_in_rw_ack_intr___group_md___lsb 2
 219 #define reg_iop_dmc_in_rw_ack_intr___group_md___width 1
 220 #define reg_iop_dmc_in_rw_ack_intr___group_md___bit 2
 221 #define reg_iop_dmc_in_rw_ack_intr___cmd_rdy___lsb 3
 222 #define reg_iop_dmc_in_rw_ack_intr___cmd_rdy___width 1
 223 #define reg_iop_dmc_in_rw_ack_intr___cmd_rdy___bit 3
 224 #define reg_iop_dmc_in_rw_ack_intr___sth___lsb 4
 225 #define reg_iop_dmc_in_rw_ack_intr___sth___width 1
 226 #define reg_iop_dmc_in_rw_ack_intr___sth___bit 4
 227 #define reg_iop_dmc_in_rw_ack_intr___full___lsb 5
 228 #define reg_iop_dmc_in_rw_ack_intr___full___width 1
 229 #define reg_iop_dmc_in_rw_ack_intr___full___bit 5
 230 #define reg_iop_dmc_in_rw_ack_intr_offset 92
 231
 232 /* Register r_intr, scope iop_dmc_in, type r */
 233 #define reg_iop_dmc_in_r_intr___data_md___lsb 0
 234 #define reg_iop_dmc_in_r_intr___data_md___width 1
 235 #define reg_iop_dmc_in_r_intr___data_md___bit 0
 236 #define reg_iop_dmc_in_r_intr___ctxt_md___lsb 1
 237 #define reg_iop_dmc_in_r_intr___ctxt_md___width 1
 238 #define reg_iop_dmc_in_r_intr___ctxt_md___bit 1
 239 #define reg_iop_dmc_in_r_intr___group_md___lsb 2
 240 #define reg_iop_dmc_in_r_intr___group_md___width 1
 241 #define reg_iop_dmc_in_r_intr___group_md___bit 2
 242 #define reg_iop_dmc_in_r_intr___cmd_rdy___lsb 3
 243 #define reg_iop_dmc_in_r_intr___cmd_rdy___width 1
 244 #define reg_iop_dmc_in_r_intr___cmd_rdy___bit 3
 245 #define reg_iop_dmc_in_r_intr___sth___lsb 4
 246 #define reg_iop_dmc_in_r_intr___sth___width 1
 247 #define reg_iop_dmc_in_r_intr___sth___bit 4
 248 #define reg_iop_dmc_in_r_intr___full___lsb 5
 249 #define reg_iop_dmc_in_r_intr___full___width 1
 250 #define reg_iop_dmc_in_r_intr___full___bit 5
 251 #define reg_iop_dmc_in_r_intr_offset 96
 252
 253 /* Register r_masked_intr, scope iop_dmc_in, type r */
 254 #define reg_iop_dmc_in_r_masked_intr___data_md___lsb 0
 255 #define reg_iop_dmc_in_r_masked_intr___data_md___width 1
 256 #define reg_iop_dmc_in_r_masked_intr___data_md___bit 0
 257 #define reg_iop_dmc_in_r_masked_intr___ctxt_md___lsb 1
 258 #define reg_iop_dmc_in_r_masked_intr___ctxt_md___width 1
 259 #define reg_iop_dmc_in_r_masked_intr___ctxt_md___bit 1
 260 #define reg_iop_dmc_in_r_masked_intr___group_md___lsb 2
 261 #define reg_iop_dmc_in_r_masked_intr___group_md___width 1
 262 #define reg_iop_dmc_in_r_masked_intr___group_md___bit 2
 263 #define reg_iop_dmc_in_r_masked_intr___cmd_rdy___lsb 3
 264 #define reg_iop_dmc_in_r_masked_intr___cmd_rdy___width 1
 265 #define reg_iop_dmc_in_r_masked_intr___cmd_rdy___bit 3
 266 #define reg_iop_dmc_in_r_masked_intr___sth___lsb 4
 267 #define reg_iop_dmc_in_r_masked_intr___sth___width 1
 268 #define reg_iop_dmc_in_r_masked_intr___sth___bit 4
 269 #define reg_iop_dmc_in_r_masked_intr___full___lsb 5
 270 #define reg_iop_dmc_in_r_masked_intr___full___width 1
 271 #define reg_iop_dmc_in_r_masked_intr___full___bit 5
 272 #define reg_iop_dmc_in_r_masked_intr_offset 100
 273
 274
 275 /* Constants */
 276 #define regk_iop_dmc_in_ack_pkt                   0x00000100
 277 #define regk_iop_dmc_in_array                     0x00000008
 278 #define regk_iop_dmc_in_burst                     0x00000020
 279 #define regk_iop_dmc_in_copy_next                 0x00000010
 280 #define regk_iop_dmc_in_copy_up                   0x00000020
 281 #define regk_iop_dmc_in_dis_c                     0x00000010
 282 #define regk_iop_dmc_in_dis_g                     0x00000020
 283 #define regk_iop_dmc_in_lim1                      0x00000000
 284 #define regk_iop_dmc_in_lim16                     0x00000004
 285 #define regk_iop_dmc_in_lim2                      0x00000001
 286 #define regk_iop_dmc_in_lim32                     0x00000005
 287 #define regk_iop_dmc_in_lim4                      0x00000002
 288 #define regk_iop_dmc_in_lim64                     0x00000006
 289 #define regk_iop_dmc_in_lim8                      0x00000003
 290 #define regk_iop_dmc_in_load_c                    0x00000200
 291 #define regk_iop_dmc_in_load_c_n                  0x00000280
 292 #define regk_iop_dmc_in_load_c_next               0x00000240
 293 #define regk_iop_dmc_in_load_d                    0x00000140
 294 #define regk_iop_dmc_in_load_g                    0x00000300
 295 #define regk_iop_dmc_in_load_g_down               0x000003c0
 296 #define regk_iop_dmc_in_load_g_next               0x00000340
 297 #define regk_iop_dmc_in_load_g_up                 0x00000380
 298 #define regk_iop_dmc_in_next_en                   0x00000010
 299 #define regk_iop_dmc_in_next_pkt                  0x00000010
 300 #define regk_iop_dmc_in_no                        0x00000000
 301 #define regk_iop_dmc_in_restore                   0x00000020
 302 #define regk_iop_dmc_in_rw_cfg_default            0x00000000
 303 #define regk_iop_dmc_in_rw_ctxt_descr_default     0x00000000
 304 #define regk_iop_dmc_in_rw_ctxt_descr_md1_default  0x00000000
 305 #define regk_iop_dmc_in_rw_ctxt_descr_md2_default  0x00000000
 306 #define regk_iop_dmc_in_rw_data_descr_default     0x00000000
 307 #define regk_iop_dmc_in_rw_group_descr_default    0x00000000
 308 #define regk_iop_dmc_in_rw_intr_mask_default      0x00000000
 309 #define regk_iop_dmc_in_rw_stream_ctrl_default    0x00000000
 310 #define regk_iop_dmc_in_save_down                 0x00000020
 311 #define regk_iop_dmc_in_save_up                   0x00000020
 312 #define regk_iop_dmc_in_set_reg                   0x00000050
 313 #define regk_iop_dmc_in_set_w_size1               0x00000190
 314 #define regk_iop_dmc_in_set_w_size2               0x000001a0
 315 #define regk_iop_dmc_in_set_w_size4               0x000001c0
 316 #define regk_iop_dmc_in_store_c                   0x00000002
 317 #define regk_iop_dmc_in_store_descr               0x00000000
 318 #define regk_iop_dmc_in_store_g                   0x00000004
 319 #define regk_iop_dmc_in_store_md                  0x00000001
 320 #define regk_iop_dmc_in_update_down               0x00000020
 321 #define regk_iop_dmc_in_yes                       0x00000001
 322 #endif /* __iop_dmc_in_defs_asm_h */