arch/arm/boot/dts/stih416.dtsi

   1 /*
   2  * Copyright (C) 2012 STMicroelectronics Limited.
   3  * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * publishhed by the Free Software Foundation.
   8  */
   9 #include "stih41x.dtsi"
  10 #include "stih416-clock.dtsi"
  11 #include "stih416-pinctrl.dtsi"
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/reset-controller/stih416-resets.h>
  14 / {
  15         L2: cache-controller {
  16                 compatible = "arm,pl310-cache";
  17                 reg = <0xfffe2000 0x1000>;
  18                 arm,data-latency = <3 3 3>;
  19                 arm,tag-latency = <2 2 2>;
  20                 cache-unified;
  21                 cache-level = <2>;
  22         };
  23
  24         soc {
  25                 #address-cells = <1>;
  26                 #size-cells = <1>;
  27                 interrupt-parent = <&intc>;
  28                 ranges;
  29                 compatible      = "simple-bus";
  30
  31                 powerdown: powerdown-controller {
  32                         #reset-cells = <1>;
  33                         compatible = "st,stih416-powerdown";
  34                 };
  35
  36                 softreset: softreset-controller {
  37                         #reset-cells = <1>;
  38                         compatible = "st,stih416-softreset";
  39                 };
  40
  41                 syscfg_sbc:sbc-syscfg@fe600000{
  42                         compatible      = "st,stih416-sbc-syscfg", "syscon";
  43                         reg             = <0xfe600000 0x1000>;
  44                 };
  45
  46                 syscfg_front:front-syscfg@fee10000{
  47                         compatible      = "st,stih416-front-syscfg", "syscon";
  48                         reg             = <0xfee10000 0x1000>;
  49                 };
  50
  51                 syscfg_rear:rear-syscfg@fe830000{
  52                         compatible      = "st,stih416-rear-syscfg", "syscon";
  53                         reg             = <0xfe830000 0x1000>;
  54                 };
  55
  56                 /* MPE */
  57                 syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
  58                         compatible      = "st,stih416-fvdp-fe-syscfg", "syscon";
  59                         reg             = <0xfddf0000 0x1000>;
  60                 };
  61
  62                 syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
  63                         compatible      = "st,stih416-fvdp-lite-syscfg", "syscon";
  64                         reg             = <0xfd6a0000 0x1000>;
  65                 };
  66
  67                 syscfg_cpu:cpu-syscfg@fdde0000{
  68                         compatible      = "st,stih416-cpu-syscfg", "syscon";
  69                         reg             = <0xfdde0000 0x1000>;
  70                 };
  71
  72                 syscfg_compo:compo-syscfg@fd320000{
  73                         compatible      = "st,stih416-compo-syscfg", "syscon";
  74                         reg             = <0xfd320000 0x1000>;
  75                 };
  76
  77                 syscfg_transport:transport-syscfg@fd690000{
  78                         compatible      = "st,stih416-transport-syscfg", "syscon";
  79                         reg             = <0xfd690000 0x1000>;
  80                 };
  81
  82                 syscfg_lpm:lpm-syscfg@fe4b5100{
  83                         compatible      = "st,stih416-lpm-syscfg", "syscon";
  84                         reg             = <0xfe4b5100 0x8>;
  85                 };
  86
  87                 serial2: serial@fed32000{
  88                         compatible      = "st,asc";
  89                         status          = "disabled";
  90                         reg             = <0xfed32000 0x2c>;
  91                         interrupts      = <0 197 0>;
  92                         clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
  93                         pinctrl-names   = "default";
  94                         pinctrl-0       = <&pinctrl_serial2 &pinctrl_serial2_oe>;
  95                 };
  96
  97                 /* SBC_UART1 */
  98                 sbc_serial1: serial@fe531000 {
  99                         compatible      = "st,asc";
 100                         status          = "disabled";
 101                         reg             = <0xfe531000 0x2c>;
 102                         interrupts      = <0 210 0>;
 103                         pinctrl-names   = "default";
 104                         pinctrl-0       = <&pinctrl_sbc_serial1>;
 105                         clocks          = <&clk_sysin>;
 106                 };
 107
 108                 i2c@fed40000 {
 109                         compatible      = "st,comms-ssc4-i2c";
 110                         reg             = <0xfed40000 0x110>;
 111                         interrupts      = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 112                         clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
 113                         clock-names     = "ssc";
 114                         clock-frequency = <400000>;
 115                         pinctrl-names   = "default";
 116                         pinctrl-0       = <&pinctrl_i2c0_default>;
 117
 118                         status          = "disabled";
 119                 };
 120
 121                 i2c@fed41000 {
 122                         compatible      = "st,comms-ssc4-i2c";
 123                         reg             = <0xfed41000 0x110>;
 124                         interrupts      = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 125                         clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
 126                         clock-names     = "ssc";
 127                         clock-frequency = <400000>;
 128                         pinctrl-names   = "default";
 129                         pinctrl-0       = <&pinctrl_i2c1_default>;
 130
 131                         status          = "disabled";
 132                 };
 133
 134                 i2c@fe540000 {
 135                         compatible      = "st,comms-ssc4-i2c";
 136                         reg             = <0xfe540000 0x110>;
 137                         interrupts      = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
 138                         clocks          = <&clk_sysin>;
 139                         clock-names     = "ssc";
 140                         clock-frequency = <400000>;
 141                         pinctrl-names   = "default";
 142                         pinctrl-0       = <&pinctrl_sbc_i2c0_default>;
 143
 144                         status          = "disabled";
 145                 };
 146
 147                 i2c@fe541000 {
 148                         compatible      = "st,comms-ssc4-i2c";
 149                         reg             = <0xfe541000 0x110>;
 150                         interrupts      = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
 151                         clocks          = <&clk_sysin>;
 152                         clock-names     = "ssc";
 153                         clock-frequency = <400000>;
 154                         pinctrl-names   = "default";
 155                         pinctrl-0       = <&pinctrl_sbc_i2c1_default>;
 156
 157                         status          = "disabled";
 158                 };
 159
 160                 ethernet0: dwmac@fe810000 {
 161                         device_type     = "network";
 162                         compatible      = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
 163                         status          = "disabled";
 164                         reg             = <0xfe810000 0x8000>, <0x8bc 0x4>;
 165                         reg-names       = "stmmaceth", "sti-ethconf";
 166
 167                         interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
 168                         interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
 169
 170                         snps,pbl        = <32>;
 171                         snps,mixed-burst;
 172
 173                         st,syscon               = <&syscfg_rear>;
 174                         resets                  = <&softreset STIH416_ETH0_SOFTRESET>;
 175                         reset-names             = "stmmaceth";
 176                         pinctrl-names   = "default";
 177                         pinctrl-0       = <&pinctrl_mii0>;
 178                         clock-names     = "stmmaceth", "sti-ethclk";
 179                         clocks          = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
 180                 };
 181
 182                 ethernet1: dwmac@fef08000 {
 183                         device_type = "network";
 184                         compatible              = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
 185                         status          = "disabled";
 186                         reg             = <0xfef08000 0x8000>, <0x7f0 0x4>;
 187                         reg-names       = "stmmaceth", "sti-ethconf";
 188                         interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
 189                         interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
 190
 191                         snps,pbl        = <32>;
 192                         snps,mixed-burst;
 193
 194                         st,syscon       = <&syscfg_sbc>;
 195
 196                         resets          = <&softreset STIH416_ETH1_SOFTRESET>;
 197                         reset-names     = "stmmaceth";
 198                         pinctrl-names   = "default";
 199                         pinctrl-0       = <&pinctrl_mii1>;
 200                         clock-names     = "stmmaceth", "sti-ethclk";
 201                         clocks          = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
 202                 };
 203
 204                 rc: rc@fe518000 {
 205                         compatible      = "st,comms-irb";
 206                         reg             = <0xfe518000 0x234>;
 207                         interrupts      =  <0 203 0>;
 208                         rx-mode         = "infrared";
 209                         clocks          = <&clk_sysin>;
 210                         pinctrl-names   = "default";
 211                         pinctrl-0       = <&pinctrl_ir>;
 212                         resets          = <&softreset STIH416_IRB_SOFTRESET>;
 213                 };
 214
 215                 /* FSM */
 216                 spifsm: spifsm@fe902000 {
 217                         compatible         = "st,spi-fsm";
 218                         reg                = <0xfe902000 0x1000>;
 219                         pinctrl-0          = <&pinctrl_fsm>;
 220
 221                         st,syscfg          = <&syscfg_rear>;
 222                         st,boot-device-reg = <0x958>;
 223                         st,boot-device-spi = <0x1a>;
 224
 225                         status = "disabled";
 226                 };
 227
 228                 keyscan: keyscan@fe4b0000 {
 229                         compatible = "st,sti-keyscan";
 230                         status = "disabled";
 231                         reg = <0xfe4b0000 0x2000>;
 232                         interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
 233                         clocks = <&clk_sysin>;
 234                         pinctrl-names = "default";
 235                         pinctrl-0 = <&pinctrl_keyscan>;
 236                         resets  = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
 237                                   <&softreset STIH416_KEYSCAN_SOFTRESET>;
 238                 };
 239         };
 240 };