arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // Copyright 2012 Freescale Semiconductor, Inc.
   4 // Copyright 2011 Linaro Ltd.
   5
   6 #include <dt-bindings/clock/imx6qdl-clock.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9
  10 / {
  11         chosen {
  12                 stdout-path = &uart1;
  13         };
  14
  15         memory@10000000 {
  16                 device_type = "memory";
  17                 reg = <0x10000000 0x40000000>;
  18         };
  19
  20         reg_usb_otg_vbus: regulator-usb-otg-vbus {
  21                 compatible = "regulator-fixed";
  22                 regulator-name = "usb_otg_vbus";
  23                 regulator-min-microvolt = <5000000>;
  24                 regulator-max-microvolt = <5000000>;
  25                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  26                 enable-active-high;
  27                 vin-supply = <&swbst_reg>;
  28         };
  29
  30         reg_usb_h1_vbus: regulator-usb-h1-vbus {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "usb_h1_vbus";
  33                 regulator-min-microvolt = <5000000>;
  34                 regulator-max-microvolt = <5000000>;
  35                 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
  36                 enable-active-high;
  37                 vin-supply = <&swbst_reg>;
  38         };
  39
  40         reg_audio: regulator-audio {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "wm8962-supply";
  43                 gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
  44                 enable-active-high;
  45         };
  46
  47         reg_pcie: regulator-pcie {
  48                 compatible = "regulator-fixed";
  49                 pinctrl-names = "default";
  50                 pinctrl-0 = <&pinctrl_pcie_reg>;
  51                 regulator-name = "MPCIE_3V3";
  52                 regulator-min-microvolt = <3300000>;
  53                 regulator-max-microvolt = <3300000>;
  54                 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  55                 enable-active-high;
  56         };
  57
  58         reg_sensors: regulator-sensors {
  59                 compatible = "regulator-fixed";
  60                 pinctrl-names = "default";
  61                 pinctrl-0 = <&pinctrl_sensors_reg>;
  62                 regulator-name = "sensors-supply";
  63                 regulator-min-microvolt = <3300000>;
  64                 regulator-max-microvolt = <3300000>;
  65                 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
  66                 enable-active-high;
  67                 regulator-always-on;
  68         };
  69
  70         gpio-keys {
  71                 compatible = "gpio-keys";
  72                 pinctrl-names = "default";
  73                 pinctrl-0 = <&pinctrl_gpio_keys>;
  74
  75                 power {
  76                         label = "Power Button";
  77                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  78                         wakeup-source;
  79                         linux,code = <KEY_POWER>;
  80                 };
  81
  82                 volume-up {
  83                         label = "Volume Up";
  84                         gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  85                         wakeup-source;
  86                         linux,code = <KEY_VOLUMEUP>;
  87                 };
  88
  89                 volume-down {
  90                         label = "Volume Down";
  91                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  92                         wakeup-source;
  93                         linux,code = <KEY_VOLUMEDOWN>;
  94                 };
  95         };
  96
  97         sound {
  98                 compatible = "fsl,imx6q-sabresd-wm8962",
  99                            "fsl,imx-audio-wm8962";
 100                 model = "wm8962-audio";
 101                 ssi-controller = <&ssi2>;
 102                 audio-codec = <&codec>;
 103                 audio-routing =
 104                         "Headphone Jack", "HPOUTL",
 105                         "Headphone Jack", "HPOUTR",
 106                         "Ext Spk", "SPKOUTL",
 107                         "Ext Spk", "SPKOUTR",
 108                         "AMIC", "MICBIAS",
 109                         "IN3R", "AMIC";
 110                 mux-int-port = <2>;
 111                 mux-ext-port = <3>;
 112         };
 113
 114         backlight_lvds: backlight-lvds {
 115                 compatible = "pwm-backlight";
 116                 pwms = <&pwm1 0 5000000>;
 117                 brightness-levels = <0 4 8 16 32 64 128 255>;
 118                 default-brightness-level = <7>;
 119                 status = "okay";
 120         };
 121
 122         leds {
 123                 compatible = "gpio-leds";
 124                 pinctrl-names = "default";
 125                 pinctrl-0 = <&pinctrl_gpio_leds>;
 126
 127                 red {
 128                         gpios = <&gpio1 2 0>;
 129                         default-state = "on";
 130                 };
 131         };
 132
 133         panel {
 134                 compatible = "hannstar,hsd100pxn1";
 135                 backlight = <&backlight_lvds>;
 136
 137                 port {
 138                         panel_in: endpoint {
 139                                 remote-endpoint = <&lvds0_out>;
 140                         };
 141                 };
 142         };
 143 };
 144
 145 &ipu1_csi0_from_ipu1_csi0_mux {
 146         bus-width = <8>;
 147         data-shift = <12>; /* Lines 19:12 used */
 148         hsync-active = <1>;
 149         vsync-active = <1>;
 150 };
 151
 152 &ipu1_csi0_mux_from_parallel_sensor {
 153         remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
 154 };
 155
 156 &ipu1_csi0 {
 157         pinctrl-names = "default";
 158         pinctrl-0 = <&pinctrl_ipu1_csi0>;
 159 };
 160
 161 &mipi_csi {
 162         status = "okay";
 163
 164         port@0 {
 165                 reg = <0>;
 166
 167                 mipi_csi2_in: endpoint {
 168                         remote-endpoint = <&ov5640_to_mipi_csi2>;
 169                         clock-lanes = <0>;
 170                         data-lanes = <1 2>;
 171                 };
 172         };
 173 };
 174
 175 &audmux {
 176         pinctrl-names = "default";
 177         pinctrl-0 = <&pinctrl_audmux>;
 178         status = "okay";
 179 };
 180
 181 &clks {
 182         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 183                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 184         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 185                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 186 };
 187
 188 &ecspi1 {
 189         cs-gpios = <&gpio4 9 0>;
 190         pinctrl-names = "default";
 191         pinctrl-0 = <&pinctrl_ecspi1>;
 192         status = "okay";
 193
 194         flash: m25p80@0 {
 195                 #address-cells = <1>;
 196                 #size-cells = <1>;
 197                 compatible = "st,m25p32", "jedec,spi-nor";
 198                 spi-max-frequency = <20000000>;
 199                 reg = <0>;
 200         };
 201 };
 202
 203 &fec {
 204         pinctrl-names = "default";
 205         pinctrl-0 = <&pinctrl_enet>;
 206         phy-mode = "rgmii";
 207         phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 208         status = "okay";
 209 };
 210
 211 &hdmi {
 212         pinctrl-names = "default";
 213         pinctrl-0 = <&pinctrl_hdmi_cec>;
 214         ddc-i2c-bus = <&i2c2>;
 215         status = "okay";
 216 };
 217
 218 &i2c1 {
 219         clock-frequency = <100000>;
 220         pinctrl-names = "default";
 221         pinctrl-0 = <&pinctrl_i2c1>;
 222         status = "okay";
 223
 224         codec: wm8962@1a {
 225                 compatible = "wlf,wm8962";
 226                 reg = <0x1a>;
 227                 clocks = <&clks IMX6QDL_CLK_CKO>;
 228                 DCVDD-supply = <&reg_audio>;
 229                 DBVDD-supply = <&reg_audio>;
 230                 AVDD-supply = <&reg_audio>;
 231                 CPVDD-supply = <&reg_audio>;
 232                 MICVDD-supply = <&reg_audio>;
 233                 PLLVDD-supply = <&reg_audio>;
 234                 SPKVDD1-supply = <&reg_audio>;
 235                 SPKVDD2-supply = <&reg_audio>;
 236                 gpio-cfg = <
 237                         0x0000 /* 0:Default */
 238                         0x0000 /* 1:Default */
 239                         0x0013 /* 2:FN_DMICCLK */
 240                         0x0000 /* 3:Default */
 241                         0x8014 /* 4:FN_DMICCDAT */
 242                         0x0000 /* 5:Default */
 243                 >;
 244         };
 245
 246         accelerometer@1c {
 247                 compatible = "fsl,mma8451";
 248                 reg = <0x1c>;
 249                 pinctrl-names = "default";
 250                 pinctrl-0 = <&pinctrl_i2c1_mma8451_int>;
 251                 interrupt-parent = <&gpio1>;
 252                 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
 253         };
 254
 255         ov5642: camera@3c {
 256                 compatible = "ovti,ov5642";
 257                 pinctrl-names = "default";
 258                 pinctrl-0 = <&pinctrl_ov5642>;
 259                 clocks = <&clks IMX6QDL_CLK_CKO>;
 260                 clock-names = "xclk";
 261                 reg = <0x3c>;
 262                 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
 263                 AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is VGEN3
 264                                                 rev B board is VGEN5 */
 265                 DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
 266                 powerdown-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
 267                 reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
 268                 status = "disabled";
 269
 270                 port {
 271                         ov5642_to_ipu1_csi0_mux: endpoint {
 272                                 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
 273                                 bus-width = <8>;
 274                                 hsync-active = <1>;
 275                                 vsync-active = <1>;
 276                         };
 277                 };
 278         };
 279 };
 280
 281 &i2c2 {
 282         clock-frequency = <100000>;
 283         pinctrl-names = "default";
 284         pinctrl-0 = <&pinctrl_i2c2>;
 285         status = "okay";
 286
 287         touchscreen@4 {
 288                 compatible = "eeti,egalax_ts";
 289                 reg = <0x04>;
 290                 pinctrl-names = "default";
 291                 pinctrl-0 = <&pinctrl_i2c2_egalax_int>;
 292                 interrupt-parent = <&gpio6>;
 293                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
 294                 wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
 295         };
 296
 297         ov5640: camera@3c {
 298                 compatible = "ovti,ov5640";
 299                 pinctrl-names = "default";
 300                 pinctrl-0 = <&pinctrl_ov5640>;
 301                 reg = <0x3c>;
 302                 clocks = <&clks IMX6QDL_CLK_CKO>;
 303                 clock-names = "xclk";
 304                 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
 305                 AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is VGEN3
 306                                                 rev B board is VGEN5 */
 307                 DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
 308                 powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
 309                 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
 310
 311                 port {
 312                         ov5640_to_mipi_csi2: endpoint {
 313                                 remote-endpoint = <&mipi_csi2_in>;
 314                                 clock-lanes = <0>;
 315                                 data-lanes = <1 2>;
 316                         };
 317                 };
 318         };
 319
 320         pmic: pfuze100@8 {
 321                 compatible = "fsl,pfuze100";
 322                 reg = <0x08>;
 323
 324                 regulators {
 325                         sw1a_reg: sw1ab {
 326                                 regulator-min-microvolt = <300000>;
 327                                 regulator-max-microvolt = <1875000>;
 328                                 regulator-boot-on;
 329                                 regulator-always-on;
 330                                 regulator-ramp-delay = <6250>;
 331                         };
 332
 333                         sw1c_reg: sw1c {
 334                                 regulator-min-microvolt = <300000>;
 335                                 regulator-max-microvolt = <1875000>;
 336                                 regulator-boot-on;
 337                                 regulator-always-on;
 338                                 regulator-ramp-delay = <6250>;
 339                         };
 340
 341                         sw2_reg: sw2 {
 342                                 regulator-min-microvolt = <800000>;
 343                                 regulator-max-microvolt = <3300000>;
 344                                 regulator-boot-on;
 345                                 regulator-always-on;
 346                                 regulator-ramp-delay = <6250>;
 347                         };
 348
 349                         sw3a_reg: sw3a {
 350                                 regulator-min-microvolt = <400000>;
 351                                 regulator-max-microvolt = <1975000>;
 352                                 regulator-boot-on;
 353                                 regulator-always-on;
 354                         };
 355
 356                         sw3b_reg: sw3b {
 357                                 regulator-min-microvolt = <400000>;
 358                                 regulator-max-microvolt = <1975000>;
 359                                 regulator-boot-on;
 360                                 regulator-always-on;
 361                         };
 362
 363                         sw4_reg: sw4 {
 364                                 regulator-min-microvolt = <800000>;
 365                                 regulator-max-microvolt = <3300000>;
 366                                 regulator-always-on;
 367                         };
 368
 369                         swbst_reg: swbst {
 370                                 regulator-min-microvolt = <5000000>;
 371                                 regulator-max-microvolt = <5150000>;
 372                         };
 373
 374                         snvs_reg: vsnvs {
 375                                 regulator-min-microvolt = <1000000>;
 376                                 regulator-max-microvolt = <3000000>;
 377                                 regulator-boot-on;
 378                                 regulator-always-on;
 379                         };
 380
 381                         vref_reg: vrefddr {
 382                                 regulator-boot-on;
 383                                 regulator-always-on;
 384                         };
 385
 386                         vgen1_reg: vgen1 {
 387                                 regulator-min-microvolt = <800000>;
 388                                 regulator-max-microvolt = <1550000>;
 389                         };
 390
 391                         vgen2_reg: vgen2 {
 392                                 regulator-min-microvolt = <800000>;
 393                                 regulator-max-microvolt = <1550000>;
 394                         };
 395
 396                         vgen3_reg: vgen3 {
 397                                 regulator-min-microvolt = <1800000>;
 398                                 regulator-max-microvolt = <3300000>;
 399                         };
 400
 401                         vgen4_reg: vgen4 {
 402                                 regulator-min-microvolt = <1800000>;
 403                                 regulator-max-microvolt = <3300000>;
 404                                 regulator-always-on;
 405                         };
 406
 407                         vgen5_reg: vgen5 {
 408                                 regulator-min-microvolt = <1800000>;
 409                                 regulator-max-microvolt = <3300000>;
 410                                 regulator-always-on;
 411                         };
 412
 413                         vgen6_reg: vgen6 {
 414                                 regulator-min-microvolt = <1800000>;
 415                                 regulator-max-microvolt = <3300000>;
 416                                 regulator-always-on;
 417                         };
 418                 };
 419         };
 420 };
 421
 422 &i2c3 {
 423         clock-frequency = <100000>;
 424         pinctrl-names = "default";
 425         pinctrl-0 = <&pinctrl_i2c3>;
 426         status = "okay";
 427
 428         egalax_ts@4 {
 429                 compatible = "eeti,egalax_ts";
 430                 reg = <0x04>;
 431                 interrupt-parent = <&gpio6>;
 432                 interrupts = <7 2>;
 433                 wakeup-gpios = <&gpio6 7 0>;
 434         };
 435
 436         magnetometer@e {
 437                 compatible = "fsl,mag3110";
 438                 reg = <0x0e>;
 439                 pinctrl-names = "default";
 440                 pinctrl-0 = <&pinctrl_i2c3_mag3110_int>;
 441                 interrupt-parent = <&gpio3>;
 442                 interrupts = <16 IRQ_TYPE_EDGE_RISING>;
 443         };
 444
 445         light-sensor@44 {
 446                 compatible = "isil,isl29023";
 447                 reg = <0x44>;
 448                 pinctrl-names = "default";
 449                 pinctrl-0 = <&pinctrl_i2c3_isl29023_int>;
 450                 interrupt-parent = <&gpio3>;
 451                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 452         };
 453 };
 454
 455 &iomuxc {
 456         pinctrl-names = "default";
 457         pinctrl-0 = <&pinctrl_hog>;
 458
 459         imx6qdl-sabresd {
 460                 pinctrl_hog: hoggrp {
 461                         fsl,pins = <
 462                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
 463                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
 464                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
 465                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
 466                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 467                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
 468                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
 469                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x1b0b0
 470                                 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
 471                         >;
 472                 };
 473
 474                 pinctrl_audmux: audmuxgrp {
 475                         fsl,pins = <
 476                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 477                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 478                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 479                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 480                         >;
 481                 };
 482
 483                 pinctrl_ecspi1: ecspi1grp {
 484                         fsl,pins = <
 485                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
 486                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
 487                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
 488                                 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09         0x1b0b0
 489                         >;
 490                 };
 491
 492                 pinctrl_enet: enetgrp {
 493                         fsl,pins = <
 494                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 495                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 496                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 497                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 498                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 499                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 500                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 501                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 502                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 503                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 504                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 505                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 506                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 507                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 508                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 509                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 510                         >;
 511                 };
 512
 513                 pinctrl_gpio_keys: gpio_keysgrp {
 514                         fsl,pins = <
 515                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
 516                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1b0b0
 517                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x1b0b0
 518                         >;
 519                 };
 520
 521                 pinctrl_hdmi_cec: hdmicecgrp {
 522                         fsl,pins = <
 523                                 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE   0x1f8b0
 524                         >;
 525                 };
 526
 527                 pinctrl_i2c1: i2c1grp {
 528                         fsl,pins = <
 529                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
 530                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
 531                         >;
 532                 };
 533
 534                 pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp {
 535                         fsl,pins = <
 536                                 MX6QDL_PAD_SD1_CMD__GPIO1_IO18          0xb0b1
 537                         >;
 538                 };
 539
 540                 pinctrl_i2c2: i2c2grp {
 541                         fsl,pins = <
 542                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 543                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 544                         >;
 545                 };
 546
 547                 pinctrl_i2c2_egalax_int: i2c2egalaxintgrp {
 548                         fsl,pins = <
 549                                 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08        0x1b0b0
 550                         >;
 551                 };
 552
 553                 pinctrl_i2c3: i2c3grp {
 554                         fsl,pins = <
 555                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 556                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 557                         >;
 558                 };
 559
 560                 pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp {
 561                         fsl,pins = <
 562                                 MX6QDL_PAD_EIM_DA9__GPIO3_IO09          0xb0b1
 563                         >;
 564                 };
 565
 566                 pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp {
 567                         fsl,pins = <
 568                                 MX6QDL_PAD_EIM_D16__GPIO3_IO16          0xb0b1
 569                         >;
 570                 };
 571
 572                 pinctrl_ipu1_csi0: ipu1csi0grp {
 573                         fsl,pins = <
 574                                 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
 575                                 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
 576                                 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
 577                                 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
 578                                 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
 579                                 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
 580                                 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
 581                                 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
 582                                 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
 583                                 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
 584                                 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
 585                         >;
 586                 };
 587
 588                 pinctrl_ov5640: ov5640grp {
 589                         fsl,pins = <
 590                                 MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0
 591                                 MX6QDL_PAD_SD1_CLK__GPIO1_IO20  0x1b0b0
 592                         >;
 593                 };
 594
 595                 pinctrl_ov5642: ov5642grp {
 596                         fsl,pins = <
 597                                 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
 598                                 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
 599                         >;
 600                 };
 601
 602                 pinctrl_pcie: pciegrp {
 603                         fsl,pins = <
 604                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x1b0b0
 605                         >;
 606                 };
 607
 608                 pinctrl_pcie_reg: pciereggrp {
 609                         fsl,pins = <
 610                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x1b0b0
 611                         >;
 612                 };
 613
 614                 pinctrl_pwm1: pwm1grp {
 615                         fsl,pins = <
 616                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 617                         >;
 618                 };
 619
 620                 pinctrl_sensors_reg: sensorsreggrp {
 621                         fsl,pins = <
 622                                 MX6QDL_PAD_EIM_EB3__GPIO2_IO31          0x1b0b0
 623                         >;
 624                 };
 625
 626                 pinctrl_uart1: uart1grp {
 627                         fsl,pins = <
 628                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 629                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 630                         >;
 631                 };
 632
 633                 pinctrl_usbotg: usbotggrp {
 634                         fsl,pins = <
 635                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 636                         >;
 637                 };
 638
 639                 pinctrl_usdhc2: usdhc2grp {
 640                         fsl,pins = <
 641                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 642                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 643                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 644                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 645                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 646                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 647                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
 648                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
 649                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
 650                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
 651                         >;
 652                 };
 653
 654                 pinctrl_usdhc3: usdhc3grp {
 655                         fsl,pins = <
 656                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 657                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 658                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 659                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 660                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 661                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 662                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 663                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 664                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 665                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 666                         >;
 667                 };
 668
 669                 pinctrl_usdhc4: usdhc4grp {
 670                         fsl,pins = <
 671                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 672                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 673                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 674                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 675                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 676                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 677                                 MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 678                                 MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 679                                 MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 680                                 MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 681                         >;
 682                 };
 683
 684                 pinctrl_wdog: wdoggrp {
 685                         fsl,pins = <
 686                                 MX6QDL_PAD_GPIO_1__WDOG2_B              0x1b0b0
 687                         >;
 688                 };
 689         };
 690
 691         gpio_leds {
 692                 pinctrl_gpio_leds: gpioledsgrp {
 693                         fsl,pins = <
 694                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
 695                         >;
 696                 };
 697         };
 698 };
 699
 700 &ldb {
 701         status = "okay";
 702
 703         lvds-channel@1 {
 704                 fsl,data-mapping = "spwg";
 705                 fsl,data-width = <18>;
 706                 status = "okay";
 707
 708                 port@4 {
 709                         reg = <4>;
 710
 711                         lvds0_out: endpoint {
 712                                 remote-endpoint = <&panel_in>;
 713                         };
 714                 };
 715         };
 716 };
 717
 718 &pcie {
 719         pinctrl-names = "default";
 720         pinctrl-0 = <&pinctrl_pcie>;
 721         reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
 722         vpcie-supply = <&reg_pcie>;
 723         status = "okay";
 724 };
 725
 726 &pwm1 {
 727         pinctrl-names = "default";
 728         pinctrl-0 = <&pinctrl_pwm1>;
 729         status = "okay";
 730 };
 731
 732 &reg_arm {
 733        vin-supply = <&sw1a_reg>;
 734 };
 735
 736 &reg_pu {
 737        vin-supply = <&sw1c_reg>;
 738 };
 739
 740 &reg_soc {
 741        vin-supply = <&sw1c_reg>;
 742 };
 743
 744 &snvs_poweroff {
 745         status = "okay";
 746 };
 747
 748 &ssi2 {
 749         status = "okay";
 750 };
 751
 752 &uart1 {
 753         pinctrl-names = "default";
 754         pinctrl-0 = <&pinctrl_uart1>;
 755         status = "okay";
 756 };
 757
 758 &usbh1 {
 759         vbus-supply = <&reg_usb_h1_vbus>;
 760         status = "okay";
 761 };
 762
 763 &usbotg {
 764         vbus-supply = <&reg_usb_otg_vbus>;
 765         pinctrl-names = "default";
 766         pinctrl-0 = <&pinctrl_usbotg>;
 767         disable-over-current;
 768         status = "okay";
 769 };
 770
 771 &usdhc2 {
 772         pinctrl-names = "default";
 773         pinctrl-0 = <&pinctrl_usdhc2>;
 774         bus-width = <8>;
 775         cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 776         wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
 777         status = "okay";
 778 };
 779
 780 &usdhc3 {
 781         pinctrl-names = "default";
 782         pinctrl-0 = <&pinctrl_usdhc3>;
 783         bus-width = <8>;
 784         cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 785         wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
 786         status = "okay";
 787 };
 788
 789 &usdhc4 {
 790         pinctrl-names = "default";
 791         pinctrl-0 = <&pinctrl_usdhc4>;
 792         bus-width = <8>;
 793         non-removable;
 794         no-1-8-v;
 795         status = "okay";
 796 };
 797
 798 &wdog1 {
 799         status = "disabled";
 800 };
 801
 802 &wdog2 {
 803         pinctrl-names = "default";
 804         pinctrl-0 = <&pinctrl_wdog>;
 805         fsl,ext-reset-output;
 806         status = "okay";
 807 };