arch/arm/boot/dts/bcm2711.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include "bcm283x.dtsi"
   3
   4 #include <dt-bindings/interrupt-controller/arm-gic.h>
   5 #include <dt-bindings/soc/bcm2835-pm.h>
   6
   7 / {
   8         compatible = "brcm,bcm2711";
   9
  10         #address-cells = <2>;
  11         #size-cells = <1>;
  12
  13         interrupt-parent = <&gicv2>;
  14
  15         soc {
  16                 /*
  17                  * Defined ranges:
  18                  *   Common BCM283x peripherals
  19                  *   BCM2711-specific peripherals
  20                  *   ARM-local peripherals
  21                  */
  22                 ranges = <0x7e000000  0x0 0xfe000000  0x01800000>,
  23                          <0x7c000000  0x0 0xfc000000  0x02000000>,
  24                          <0x40000000  0x0 0xff800000  0x00800000>;
  25                 /* Emulate a contiguous 30-bit address range for DMA */
  26                 dma-ranges = <0xc0000000  0x0 0x00000000  0x40000000>;
  27
  28                 /*
  29                  * This node is the provider for the enable-method for
  30                  * bringing up secondary cores.
  31                  */
  32                 local_intc: local_intc@40000000 {
  33                         compatible = "brcm,bcm2836-l1-intc";
  34                         reg = <0x40000000 0x100>;
  35                 };
  36
  37                 gicv2: interrupt-controller@40041000 {
  38                         interrupt-controller;
  39                         #interrupt-cells = <3>;
  40                         compatible = "arm,gic-400";
  41                         reg =   <0x40041000 0x1000>,
  42                                 <0x40042000 0x2000>,
  43                                 <0x40044000 0x2000>,
  44                                 <0x40046000 0x2000>;
  45                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  46                                                  IRQ_TYPE_LEVEL_HIGH)>;
  47                 };
  48
  49                 avs_monitor: avs-monitor@7d5d2000 {
  50                         compatible = "brcm,bcm2711-avs-monitor",
  51                                      "syscon", "simple-mfd";
  52                         reg = <0x7d5d2000 0xf00>;
  53
  54                         thermal: thermal {
  55                                 compatible = "brcm,bcm2711-thermal";
  56                                 #thermal-sensor-cells = <0>;
  57                         };
  58                 };
  59
  60                 dma: dma@7e007000 {
  61                         compatible = "brcm,bcm2835-dma";
  62                         reg = <0x7e007000 0xb00>;
  63                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
  64                                      <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
  65                                      <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
  66                                      <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
  67                                      <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
  68                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
  69                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
  70                                      /* DMA lite 7 - 10 */
  71                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
  72                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
  73                                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
  74                                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
  75                         interrupt-names = "dma0",
  76                                           "dma1",
  77                                           "dma2",
  78                                           "dma3",
  79                                           "dma4",
  80                                           "dma5",
  81                                           "dma6",
  82                                           "dma7",
  83                                           "dma8",
  84                                           "dma9",
  85                                           "dma10";
  86                         #dma-cells = <1>;
  87                         brcm,dma-channel-mask = <0x07f5>;
  88                 };
  89
  90                 pm: watchdog@7e100000 {
  91                         compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
  92                         #power-domain-cells = <1>;
  93                         #reset-cells = <1>;
  94                         reg = <0x7e100000 0x114>,
  95                               <0x7e00a000 0x24>,
  96                               <0x7ec11000 0x20>;
  97                         clocks = <&clocks BCM2835_CLOCK_V3D>,
  98                                  <&clocks BCM2835_CLOCK_PERI_IMAGE>,
  99                                  <&clocks BCM2835_CLOCK_H264>,
 100                                  <&clocks BCM2835_CLOCK_ISP>;
 101                         clock-names = "v3d", "peri_image", "h264", "isp";
 102                         system-power-controller;
 103                 };
 104
 105                 rng@7e104000 {
 106                         compatible = "brcm,bcm2711-rng200";
 107                         reg = <0x7e104000 0x28>;
 108                 };
 109
 110                 uart2: serial@7e201400 {
 111                         compatible = "arm,pl011", "arm,primecell";
 112                         reg = <0x7e201400 0x200>;
 113                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 114                         clocks = <&clocks BCM2835_CLOCK_UART>,
 115                                  <&clocks BCM2835_CLOCK_VPU>;
 116                         clock-names = "uartclk", "apb_pclk";
 117                         arm,primecell-periphid = <0x00241011>;
 118                         status = "disabled";
 119                 };
 120
 121                 uart3: serial@7e201600 {
 122                         compatible = "arm,pl011", "arm,primecell";
 123                         reg = <0x7e201600 0x200>;
 124                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 125                         clocks = <&clocks BCM2835_CLOCK_UART>,
 126                                  <&clocks BCM2835_CLOCK_VPU>;
 127                         clock-names = "uartclk", "apb_pclk";
 128                         arm,primecell-periphid = <0x00241011>;
 129                         status = "disabled";
 130                 };
 131
 132                 uart4: serial@7e201800 {
 133                         compatible = "arm,pl011", "arm,primecell";
 134                         reg = <0x7e201800 0x200>;
 135                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 136                         clocks = <&clocks BCM2835_CLOCK_UART>,
 137                                  <&clocks BCM2835_CLOCK_VPU>;
 138                         clock-names = "uartclk", "apb_pclk";
 139                         arm,primecell-periphid = <0x00241011>;
 140                         status = "disabled";
 141                 };
 142
 143                 uart5: serial@7e201a00 {
 144                         compatible = "arm,pl011", "arm,primecell";
 145                         reg = <0x7e201a00 0x200>;
 146                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 147                         clocks = <&clocks BCM2835_CLOCK_UART>,
 148                                  <&clocks BCM2835_CLOCK_VPU>;
 149                         clock-names = "uartclk", "apb_pclk";
 150                         arm,primecell-periphid = <0x00241011>;
 151                         status = "disabled";
 152                 };
 153
 154                 spi3: spi@7e204600 {
 155                         compatible = "brcm,bcm2835-spi";
 156                         reg = <0x7e204600 0x0200>;
 157                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 158                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 159                         #address-cells = <1>;
 160                         #size-cells = <0>;
 161                         status = "disabled";
 162                 };
 163
 164                 spi4: spi@7e204800 {
 165                         compatible = "brcm,bcm2835-spi";
 166                         reg = <0x7e204800 0x0200>;
 167                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 168                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 169                         #address-cells = <1>;
 170                         #size-cells = <0>;
 171                         status = "disabled";
 172                 };
 173
 174                 spi5: spi@7e204a00 {
 175                         compatible = "brcm,bcm2835-spi";
 176                         reg = <0x7e204a00 0x0200>;
 177                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 178                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 179                         #address-cells = <1>;
 180                         #size-cells = <0>;
 181                         status = "disabled";
 182                 };
 183
 184                 spi6: spi@7e204c00 {
 185                         compatible = "brcm,bcm2835-spi";
 186                         reg = <0x7e204c00 0x0200>;
 187                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 188                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 189                         #address-cells = <1>;
 190                         #size-cells = <0>;
 191                         status = "disabled";
 192                 };
 193
 194                 i2c3: i2c@7e205600 {
 195                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 196                         reg = <0x7e205600 0x200>;
 197                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 198                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201                         status = "disabled";
 202                 };
 203
 204                 i2c4: i2c@7e205800 {
 205                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 206                         reg = <0x7e205800 0x200>;
 207                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 208                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 209                         #address-cells = <1>;
 210                         #size-cells = <0>;
 211                         status = "disabled";
 212                 };
 213
 214                 i2c5: i2c@7e205a00 {
 215                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 216                         reg = <0x7e205a00 0x200>;
 217                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 218                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 219                         #address-cells = <1>;
 220                         #size-cells = <0>;
 221                         status = "disabled";
 222                 };
 223
 224                 i2c6: i2c@7e205c00 {
 225                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 226                         reg = <0x7e205c00 0x200>;
 227                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 228                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 229                         #address-cells = <1>;
 230                         #size-cells = <0>;
 231                         status = "disabled";
 232                 };
 233
 234                 pwm1: pwm@7e20c800 {
 235                         compatible = "brcm,bcm2835-pwm";
 236                         reg = <0x7e20c800 0x28>;
 237                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 238                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 239                         assigned-clock-rates = <10000000>;
 240                         #pwm-cells = <2>;
 241                         status = "disabled";
 242                 };
 243
 244                 hvs@7e400000 {
 245                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 246                 };
 247         };
 248
 249         /*
 250          * emmc2 has different DMA constraints based on SoC revisions. It was
 251          * moved into its own bus, so as for RPi4's firmware to update them.
 252          * The firmware will find whether the emmc2bus alias is defined, and if
 253          * so, it'll edit the dma-ranges property below accordingly.
 254          */
 255         emmc2bus: emmc2bus {
 256                 compatible = "simple-bus";
 257                 #address-cells = <2>;
 258                 #size-cells = <1>;
 259
 260                 ranges = <0x0 0x7e000000  0x0 0xfe000000  0x01800000>;
 261                 dma-ranges = <0x0 0xc0000000  0x0 0x00000000  0x40000000>;
 262
 263                 emmc2: emmc2@7e340000 {
 264                         compatible = "brcm,bcm2711-emmc2";
 265                         reg = <0x0 0x7e340000 0x100>;
 266                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 267                         clocks = <&clocks BCM2711_CLOCK_EMMC2>;
 268                         status = "disabled";
 269                 };
 270         };
 271
 272         arm-pmu {
 273                 compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
 274                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 275                         <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
 276                         <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 277                         <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 278                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 279         };
 280
 281         timer {
 282                 compatible = "arm,armv8-timer";
 283                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
 284                                           IRQ_TYPE_LEVEL_LOW)>,
 285                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
 286                                           IRQ_TYPE_LEVEL_LOW)>,
 287                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
 288                                           IRQ_TYPE_LEVEL_LOW)>,
 289                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
 290                                           IRQ_TYPE_LEVEL_LOW)>;
 291                 /* This only applies to the ARMv7 stub */
 292                 arm,cpu-registers-not-fw-configured;
 293         };
 294
 295         cpus: cpus {
 296                 #address-cells = <1>;
 297                 #size-cells = <0>;
 298                 enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
 299
 300                 cpu0: cpu@0 {
 301                         device_type = "cpu";
 302                         compatible = "arm,cortex-a72";
 303                         reg = <0>;
 304                         enable-method = "spin-table";
 305                         cpu-release-addr = <0x0 0x000000d8>;
 306                 };
 307
 308                 cpu1: cpu@1 {
 309                         device_type = "cpu";
 310                         compatible = "arm,cortex-a72";
 311                         reg = <1>;
 312                         enable-method = "spin-table";
 313                         cpu-release-addr = <0x0 0x000000e0>;
 314                 };
 315
 316                 cpu2: cpu@2 {
 317                         device_type = "cpu";
 318                         compatible = "arm,cortex-a72";
 319                         reg = <2>;
 320                         enable-method = "spin-table";
 321                         cpu-release-addr = <0x0 0x000000e8>;
 322                 };
 323
 324                 cpu3: cpu@3 {
 325                         device_type = "cpu";
 326                         compatible = "arm,cortex-a72";
 327                         reg = <3>;
 328                         enable-method = "spin-table";
 329                         cpu-release-addr = <0x0 0x000000f0>;
 330                 };
 331         };
 332
 333         scb {
 334                 compatible = "simple-bus";
 335                 #address-cells = <2>;
 336                 #size-cells = <1>;
 337
 338                 ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>,
 339                          <0x6 0x00000000  0x6 0x00000000  0x40000000>;
 340
 341                 pcie0: pcie@7d500000 {
 342                         compatible = "brcm,bcm2711-pcie";
 343                         reg = <0x0 0x7d500000 0x9310>;
 344                         device_type = "pci";
 345                         #address-cells = <3>;
 346                         #interrupt-cells = <1>;
 347                         #size-cells = <2>;
 348                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
 349                                      <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 350                         interrupt-names = "pcie", "msi";
 351                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 352                         interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
 353                                                         IRQ_TYPE_LEVEL_HIGH>;
 354                         msi-controller;
 355                         msi-parent = <&pcie0>;
 356
 357                         ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
 358                                   0x0 0x04000000>;
 359                         /*
 360                          * The wrapper around the PCIe block has a bug
 361                          * preventing it from accessing beyond the first 3GB of
 362                          * memory.
 363                          */
 364                         dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
 365                                       0x0 0xc0000000>;
 366                         brcm,enable-ssc;
 367                 };
 368
 369                 genet: ethernet@7d580000 {
 370                         compatible = "brcm,bcm2711-genet-v5";
 371                         reg = <0x0 0x7d580000 0x10000>;
 372                         #address-cells = <0x1>;
 373                         #size-cells = <0x1>;
 374                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
 375                                      <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 376                         status = "disabled";
 377
 378                         genet_mdio: mdio@e14 {
 379                                 compatible = "brcm,genet-mdio-v5";
 380                                 reg = <0xe14 0x8>;
 381                                 reg-names = "mdio";
 382                                 #address-cells = <0x0>;
 383                                 #size-cells = <0x1>;
 384                         };
 385                 };
 386         };
 387 };
 388
 389 &clk_osc {
 390         clock-frequency = <54000000>;
 391 };
 392
 393 &clocks {
 394         compatible = "brcm,bcm2711-cprman";
 395 };
 396
 397 &cpu_thermal {
 398         coefficients = <(-487) 410040>;
 399         thermal-sensors = <&thermal>;
 400 };
 401
 402 &dsi0 {
 403         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 404 };
 405
 406 &dsi1 {
 407         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 408 };
 409
 410 &gpio {
 411         compatible = "brcm,bcm2711-gpio";
 412         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
 413                      <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
 414                      <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
 415                      <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 416
 417         gpclk0_gpio49: gpclk0_gpio49 {
 418                 pin-gpclk {
 419                         pins = "gpio49";
 420                         function = "alt1";
 421                         bias-disable;
 422                 };
 423         };
 424         gpclk1_gpio50: gpclk1_gpio50 {
 425                 pin-gpclk {
 426                         pins = "gpio50";
 427                         function = "alt1";
 428                         bias-disable;
 429                 };
 430         };
 431         gpclk2_gpio51: gpclk2_gpio51 {
 432                 pin-gpclk {
 433                         pins = "gpio51";
 434                         function = "alt1";
 435                         bias-disable;
 436                 };
 437         };
 438
 439         i2c0_gpio46: i2c0_gpio46 {
 440                 pin-sda {
 441                         function = "alt0";
 442                         pins = "gpio46";
 443                         bias-pull-up;
 444                 };
 445                 pin-scl {
 446                         function = "alt0";
 447                         pins = "gpio47";
 448                         bias-disable;
 449                 };
 450         };
 451         i2c1_gpio46: i2c1_gpio46 {
 452                 pin-sda {
 453                         function = "alt1";
 454                         pins = "gpio46";
 455                         bias-pull-up;
 456                 };
 457                 pin-scl {
 458                         function = "alt1";
 459                         pins = "gpio47";
 460                         bias-disable;
 461                 };
 462         };
 463         i2c3_gpio2: i2c3_gpio2 {
 464                 pin-sda {
 465                         function = "alt5";
 466                         pins = "gpio2";
 467                         bias-pull-up;
 468                 };
 469                 pin-scl {
 470                         function = "alt5";
 471                         pins = "gpio3";
 472                         bias-disable;
 473                 };
 474         };
 475         i2c3_gpio4: i2c3_gpio4 {
 476                 pin-sda {
 477                         function = "alt5";
 478                         pins = "gpio4";
 479                         bias-pull-up;
 480                 };
 481                 pin-scl {
 482                         function = "alt5";
 483                         pins = "gpio5";
 484                         bias-disable;
 485                 };
 486         };
 487         i2c4_gpio6: i2c4_gpio6 {
 488                 pin-sda {
 489                         function = "alt5";
 490                         pins = "gpio6";
 491                         bias-pull-up;
 492                 };
 493                 pin-scl {
 494                         function = "alt5";
 495                         pins = "gpio7";
 496                         bias-disable;
 497                 };
 498         };
 499         i2c4_gpio8: i2c4_gpio8 {
 500                 pin-sda {
 501                         function = "alt5";
 502                         pins = "gpio8";
 503                         bias-pull-up;
 504                 };
 505                 pin-scl {
 506                         function = "alt5";
 507                         pins = "gpio9";
 508                         bias-disable;
 509                 };
 510         };
 511         i2c5_gpio10: i2c5_gpio10 {
 512                 pin-sda {
 513                         function = "alt5";
 514                         pins = "gpio10";
 515                         bias-pull-up;
 516                 };
 517                 pin-scl {
 518                         function = "alt5";
 519                         pins = "gpio11";
 520                         bias-disable;
 521                 };
 522         };
 523         i2c5_gpio12: i2c5_gpio12 {
 524                 pin-sda {
 525                         function = "alt5";
 526                         pins = "gpio12";
 527                         bias-pull-up;
 528                 };
 529                 pin-scl {
 530                         function = "alt5";
 531                         pins = "gpio13";
 532                         bias-disable;
 533                 };
 534         };
 535         i2c6_gpio0: i2c6_gpio0 {
 536                 pin-sda {
 537                         function = "alt5";
 538                         pins = "gpio0";
 539                         bias-pull-up;
 540                 };
 541                 pin-scl {
 542                         function = "alt5";
 543                         pins = "gpio1";
 544                         bias-disable;
 545                 };
 546         };
 547         i2c6_gpio22: i2c6_gpio22 {
 548                 pin-sda {
 549                         function = "alt5";
 550                         pins = "gpio22";
 551                         bias-pull-up;
 552                 };
 553                 pin-scl {
 554                         function = "alt5";
 555                         pins = "gpio23";
 556                         bias-disable;
 557                 };
 558         };
 559         i2c_slave_gpio8: i2c_slave_gpio8 {
 560                 pins-i2c-slave {
 561                         pins = "gpio8",
 562                                "gpio9",
 563                                "gpio10",
 564                                "gpio11";
 565                         function = "alt3";
 566                 };
 567         };
 568
 569         jtag_gpio48: jtag_gpio48 {
 570                 pins-jtag {
 571                         pins = "gpio48",
 572                                "gpio49",
 573                                "gpio50",
 574                                "gpio51",
 575                                "gpio52",
 576                                "gpio53";
 577                         function = "alt4";
 578                 };
 579         };
 580
 581         mii_gpio28: mii_gpio28 {
 582                 pins-mii {
 583                         pins = "gpio28",
 584                                "gpio29",
 585                                "gpio30",
 586                                "gpio31";
 587                         function = "alt4";
 588                 };
 589         };
 590         mii_gpio36: mii_gpio36 {
 591                 pins-mii {
 592                         pins = "gpio36",
 593                                "gpio37",
 594                                "gpio38",
 595                                "gpio39";
 596                         function = "alt5";
 597                 };
 598         };
 599
 600         pcm_gpio50: pcm_gpio50 {
 601                 pins-pcm {
 602                         pins = "gpio50",
 603                                "gpio51",
 604                                "gpio52",
 605                                "gpio53";
 606                         function = "alt2";
 607                 };
 608         };
 609
 610         pwm0_0_gpio12: pwm0_0_gpio12 {
 611                 pin-pwm {
 612                         pins = "gpio12";
 613                         function = "alt0";
 614                         bias-disable;
 615                 };
 616         };
 617         pwm0_0_gpio18: pwm0_0_gpio18 {
 618                 pin-pwm {
 619                         pins = "gpio18";
 620                         function = "alt5";
 621                         bias-disable;
 622                 };
 623         };
 624         pwm1_0_gpio40: pwm1_0_gpio40 {
 625                 pin-pwm {
 626                         pins = "gpio40";
 627                         function = "alt0";
 628                         bias-disable;
 629                 };
 630         };
 631         pwm0_1_gpio13: pwm0_1_gpio13 {
 632                 pin-pwm {
 633                         pins = "gpio13";
 634                         function = "alt0";
 635                         bias-disable;
 636                 };
 637         };
 638         pwm0_1_gpio19: pwm0_1_gpio19 {
 639                 pin-pwm {
 640                         pins = "gpio19";
 641                         function = "alt5";
 642                         bias-disable;
 643                 };
 644         };
 645         pwm1_1_gpio41: pwm1_1_gpio41 {
 646                 pin-pwm {
 647                         pins = "gpio41";
 648                         function = "alt0";
 649                         bias-disable;
 650                 };
 651         };
 652         pwm0_1_gpio45: pwm0_1_gpio45 {
 653                 pin-pwm {
 654                         pins = "gpio45";
 655                         function = "alt0";
 656                         bias-disable;
 657                 };
 658         };
 659         pwm0_0_gpio52: pwm0_0_gpio52 {
 660                 pin-pwm {
 661                         pins = "gpio52";
 662                         function = "alt1";
 663                         bias-disable;
 664                 };
 665         };
 666         pwm0_1_gpio53: pwm0_1_gpio53 {
 667                 pin-pwm {
 668                         pins = "gpio53";
 669                         function = "alt1";
 670                         bias-disable;
 671                 };
 672         };
 673
 674         rgmii_gpio35: rgmii_gpio35 {
 675                 pin-start-stop {
 676                         pins = "gpio35";
 677                         function = "alt4";
 678                 };
 679                 pin-rx-ok {
 680                         pins = "gpio36";
 681                         function = "alt4";
 682                 };
 683         };
 684         rgmii_irq_gpio34: rgmii_irq_gpio34 {
 685                 pin-irq {
 686                         pins = "gpio34";
 687                         function = "alt5";
 688                 };
 689         };
 690         rgmii_irq_gpio39: rgmii_irq_gpio39 {
 691                 pin-irq {
 692                         pins = "gpio39";
 693                         function = "alt4";
 694                 };
 695         };
 696         rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
 697                 pins-mdio {
 698                         pins = "gpio28",
 699                                "gpio29";
 700                         function = "alt5";
 701                 };
 702         };
 703         rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
 704                 pins-mdio {
 705                         pins = "gpio37",
 706                                "gpio38";
 707                         function = "alt4";
 708                 };
 709         };
 710
 711         spi0_gpio46: spi0_gpio46 {
 712                 pins-spi {
 713                         pins = "gpio46",
 714                                "gpio47",
 715                                "gpio48",
 716                                "gpio49";
 717                         function = "alt2";
 718                 };
 719         };
 720         spi2_gpio46: spi2_gpio46 {
 721                 pins-spi {
 722                         pins = "gpio46",
 723                                "gpio47",
 724                                "gpio48",
 725                                "gpio49",
 726                                "gpio50";
 727                         function = "alt5";
 728                 };
 729         };
 730         spi3_gpio0: spi3_gpio0 {
 731                 pins-spi {
 732                         pins = "gpio0",
 733                                "gpio1",
 734                                "gpio2",
 735                                "gpio3";
 736                         function = "alt3";
 737                 };
 738         };
 739         spi4_gpio4: spi4_gpio4 {
 740                 pins-spi {
 741                         pins = "gpio4",
 742                                "gpio5",
 743                                "gpio6",
 744                                "gpio7";
 745                         function = "alt3";
 746                 };
 747         };
 748         spi5_gpio12: spi5_gpio12 {
 749                 pins-spi {
 750                         pins = "gpio12",
 751                                "gpio13",
 752                                "gpio14",
 753                                "gpio15";
 754                         function = "alt3";
 755                 };
 756         };
 757         spi6_gpio18: spi6_gpio18 {
 758                 pins-spi {
 759                         pins = "gpio18",
 760                                "gpio19",
 761                                "gpio20",
 762                                "gpio21";
 763                         function = "alt3";
 764                 };
 765         };
 766
 767         uart2_gpio0: uart2_gpio0 {
 768                 pin-tx {
 769                         pins = "gpio0";
 770                         function = "alt4";
 771                         bias-disable;
 772                 };
 773                 pin-rx {
 774                         pins = "gpio1";
 775                         function = "alt4";
 776                         bias-pull-up;
 777                 };
 778         };
 779         uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
 780                 pin-cts {
 781                         pins = "gpio2";
 782                         function = "alt4";
 783                         bias-pull-up;
 784                 };
 785                 pin-rts {
 786                         pins = "gpio3";
 787                         function = "alt4";
 788                         bias-disable;
 789                 };
 790         };
 791         uart3_gpio4: uart3_gpio4 {
 792                 pin-tx {
 793                         pins = "gpio4";
 794                         function = "alt4";
 795                         bias-disable;
 796                 };
 797                 pin-rx {
 798                         pins = "gpio5";
 799                         function = "alt4";
 800                         bias-pull-up;
 801                 };
 802         };
 803         uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
 804                 pin-cts {
 805                         pins = "gpio6";
 806                         function = "alt4";
 807                         bias-pull-up;
 808                 };
 809                 pin-rts {
 810                         pins = "gpio7";
 811                         function = "alt4";
 812                         bias-disable;
 813                 };
 814         };
 815         uart4_gpio8: uart4_gpio8 {
 816                 pin-tx {
 817                         pins = "gpio8";
 818                         function = "alt4";
 819                         bias-disable;
 820                 };
 821                 pin-rx {
 822                         pins = "gpio9";
 823                         function = "alt4";
 824                         bias-pull-up;
 825                 };
 826         };
 827         uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
 828                 pin-cts {
 829                         pins = "gpio10";
 830                         function = "alt4";
 831                         bias-pull-up;
 832                 };
 833                 pin-rts {
 834                         pins = "gpio11";
 835                         function = "alt4";
 836                         bias-disable;
 837                 };
 838         };
 839         uart5_gpio12: uart5_gpio12 {
 840                 pin-tx {
 841                         pins = "gpio12";
 842                         function = "alt4";
 843                         bias-disable;
 844                 };
 845                 pin-rx {
 846                         pins = "gpio13";
 847                         function = "alt4";
 848                         bias-pull-up;
 849                 };
 850         };
 851         uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
 852                 pin-cts {
 853                         pins = "gpio14";
 854                         function = "alt4";
 855                         bias-pull-up;
 856                 };
 857                 pin-rts {
 858                         pins = "gpio15";
 859                         function = "alt4";
 860                         bias-disable;
 861                 };
 862         };
 863 };
 864
 865 &rmem {
 866         #address-cells = <2>;
 867 };
 868
 869 &cma {
 870         /*
 871          * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
 872          * that's not good enough for the BCM2711 as some devices can
 873          * only address the lower 1G of memory (ZONE_DMA).
 874          */
 875         alloc-ranges = <0x0 0x00000000 0x40000000>;
 876 };
 877
 878 &i2c0 {
 879         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 880         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 881 };
 882
 883 &i2c1 {
 884         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 885         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 886 };
 887
 888 &mailbox {
 889         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 890 };
 891
 892 &sdhci {
 893         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 894 };
 895
 896 &sdhost {
 897         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 898 };
 899
 900 &spi {
 901         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 902 };
 903
 904 &spi1 {
 905         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 906 };
 907
 908 &spi2 {
 909         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 910 };
 911
 912 &system_timer {
 913         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
 914                      <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
 915                      <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 916                      <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 917 };
 918
 919 &txp {
 920         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 921 };
 922
 923 &uart0 {
 924         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 925 };
 926
 927 &uart1 {
 928         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 929 };
 930
 931 &usb {
 932         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 933 };
 934
 935 &vec {
 936         interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
 937 };