Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/allwinner,sun50i-a64-usb-phy.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A64 USB PHY Device Tree Bindings
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 properties:
  14   "#phy-cells":
  15     const: 1
  16
  17   compatible:
  18     const: allwinner,sun50i-a64-usb-phy
  19
  20   reg:
  21     items:
  22       - description: PHY Control registers
  23       - description: PHY PMU0 registers
  24       - description: PHY PMU1 registers
  25
  26   reg-names:
  27     items:
  28       - const: phy_ctrl
  29       - const: pmu0
  30       - const: pmu1
  31
  32   clocks:
  33     items:
  34       - description: USB OTG PHY bus clock
  35       - description: USB Host 0 PHY bus clock
  36
  37   clock-names:
  38     items:
  39       - const: usb0_phy
  40       - const: usb1_phy
  41
  42   resets:
  43     items:
  44       - description: USB OTG reset
  45       - description: USB Host 1 Controller reset
  46
  47   reset-names:
  48     items:
  49       - const: usb0_reset
  50       - const: usb1_reset
  51
  52   usb0_id_det-gpios:
  53     description: GPIO to the USB OTG ID pin
  54
  55   usb0_vbus_det-gpios:
  56     description: GPIO to the USB OTG VBUS detect pin
  57
  58   usb0_vbus_power-supply:
  59     description: Power supply to detect the USB OTG VBUS
  60
  61   usb0_vbus-supply:
  62     description: Regulator controlling USB OTG VBUS
  63
  64   usb1_vbus-supply:
  65     description: Regulator controlling USB1 Host controller
  66
  67 required:
  68   - "#phy-cells"
  69   - compatible
  70   - clocks
  71   - clock-names
  72   - reg
  73   - reg-names
  74   - resets
  75   - reset-names
  76
  77 additionalProperties: false
  78
  79 examples:
  80   - |
  81     #include <dt-bindings/gpio/gpio.h>
  82     #include <dt-bindings/clock/sun50i-a64-ccu.h>
  83     #include <dt-bindings/reset/sun50i-a64-ccu.h>
  84
  85     phy@1c19400 {
  86         #phy-cells = <1>;
  87         compatible = "allwinner,sun50i-a64-usb-phy";
  88         reg = <0x01c19400 0x14>,
  89               <0x01c1a800 0x4>,
  90               <0x01c1b800 0x4>;
  91         reg-names = "phy_ctrl",
  92                     "pmu0",
  93                     "pmu1";
  94         clocks = <&ccu CLK_USB_PHY0>,
  95                  <&ccu CLK_USB_PHY1>;
  96         clock-names = "usb0_phy",
  97                       "usb1_phy";
  98         resets = <&ccu RST_USB_PHY0>,
  99                  <&ccu RST_USB_PHY1>;
 100         reset-names = "usb0_reset",
 101                       "usb1_reset";
 102         usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
 103         usb0_vbus_power-supply = <&usb_power_supply>;
 104         usb0_vbus-supply = <&reg_drivevbus>;
 105         usb1_vbus-supply = <&reg_usb1_vbus>;
 106     };