1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 BayLibre, SAS
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Amlogic Meson Synopsys Designware Integration is composed of
15 - A Synopsys DesignWare HDMI Controller IP
16 - A TOP control block controlling the Clocks and PHY
17 - A custom HDMI PHY in order to convert video to TMDS signal
18 ___________________________________
20 |___________________________________|
22 | Synopsys HDMI | HDMI PHY |=> TMDS
23 | Controller |________________|
24 |___________________________________|<=> DDC
26 The HDMI TOP block only supports HPD sensing.
27 The Synopsys HDMI Controller interrupt is routed through the
29 Communication to the TOP Block and the Synopsys HDMI Controller is done
30 via a pair of dedicated addr+read/write registers.
31 The HDMI PHY is configured by registers in the HHI register block.
33 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
34 selects either the ENCI encoder for the 576i or 480i formats or the ENCP
35 encoder for all the other formats including interlaced HD formats.
37 The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
38 DVI timings for the HDMI controller.
40 Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare
41 HDMI TX IP version 2.01a with HDCP and I2C & S/PDIF
42 audio source interfaces.
49 - amlogic,meson-gxbb-dw-hdmi # GXBB (S905)
50 - amlogic,meson-gxl-dw-hdmi # GXL (S905X, S905D)
51 - amlogic,meson-gxm-dw-hdmi # GXM (S912)
52 - const: amlogic,meson-gx-dw-hdmi
54 - amlogic,meson-g12a-dw-hdmi # G12A (S905X2, S905Y2, S905D2)
81 description: phandle to an external 5V regulator to power the HDMI logic
83 - $ref: /schemas/types.yaml#/definitions/phandle
88 A port node pointing to the VENC Input port node.
93 A port node pointing to the TMDS Output port node.
117 additionalProperties: false
121 hdmi_tx: hdmi-tx@c883a000 {
122 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
123 reg = <0xc883a000 0x1c>;
125 resets = <&reset_apb>, <&reset_hdmitx>, <&reset_hdmitx_phy>;
126 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
127 clocks = <&clk_isfr>, <&clk_iahb>, <&clk_venci>;
128 clock-names = "isfr", "iahb", "venci";
129 #address-cells = <1>;
133 hdmi_tx_venc_port: port@0 {
136 hdmi_tx_in: endpoint {
137 remote-endpoint = <&hdmi_tx_out>;
142 hdmi_tx_tmds_port: port@1 {
145 hdmi_tx_tmds_out: endpoint {
146 remote-endpoint = <&hdmi_connector_in>;