Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A10 Module 1 Clock Device Tree Bindings
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 deprecated: true
  14
  15 properties:
  16   "#clock-cells":
  17     const: 1
  18     description: >
  19       There is three different outputs: the main clock, with the ID 0,
  20       and the output and sample clocks, with the IDs 1 and 2,
  21       respectively.
  22
  23   compatible:
  24     enum:
  25       - allwinner,sun4i-a10-mmc-clk
  26       - allwinner,sun9i-a80-mmc-clk
  27
  28   reg:
  29     maxItems: 1
  30
  31   clocks:
  32     minItems: 2
  33     maxItems: 3
  34     description: >
  35       The parent order must match the hardware programming order.
  36
  37   clock-output-names:
  38     maxItems: 3
  39
  40 required:
  41   - "#clock-cells"
  42   - compatible
  43   - reg
  44   - clocks
  45   - clock-output-names
  46
  47 additionalProperties: false
  48
  49 if:
  50   properties:
  51     compatible:
  52       contains:
  53         const: allwinner,sun4i-a10-mmc-clk
  54
  55 then:
  56   properties:
  57     clocks:
  58       maxItems: 3
  59
  60 else:
  61   properties:
  62     clocks:
  63       maxItems: 2
  64
  65 examples:
  66   - |
  67     clk@1c20088 {
  68         #clock-cells = <1>;
  69         compatible = "allwinner,sun4i-a10-mmc-clk";
  70         reg = <0x01c20088 0x4>;
  71         clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
  72         clock-output-names = "mmc0",
  73                              "mmc0_output",
  74                              "mmc0_sample";
  75     };
  76
  77   - |
  78     clk@6000410 {
  79         #clock-cells = <1>;
  80         compatible = "allwinner,sun9i-a80-mmc-clk";
  81         reg = <0x06000410 0x4>;
  82         clocks = <&osc24M>, <&pll4>;
  83         clock-output-names = "mmc0", "mmc0_output",
  84                              "mmc0_sample";
  85     };
  86
  87 ...