target/linux/ramips/patches-4.4/0520-esw-gmac.patch

   1 --- a/drivers/net/ethernet/mediatek/esw_rt3050.c
   2 +++ b/drivers/net/ethernet/mediatek/esw_rt3050.c
   3 @@ -221,6 +221,8 @@ struct rt305x_esw {
   4
   5         unsigned char           port_map;
   6         unsigned char           port_disable;
   7 +       unsigned int            reg_initval_fct2;
   8 +       unsigned int            reg_initval_fpa2;
   9         unsigned int            reg_led_polarity;
  10
  11         struct switch_dev       swdev;
  12 @@ -452,7 +454,10 @@ static void esw_hw_init(struct rt305x_es
  13                       (RT305X_ESW_PORTS_NOCPU << RT305X_ESW_POC2_UNTAG_EN_S)),
  14                 RT305X_ESW_REG_POC2);
  15
  16 -       esw_w32(esw, 0x0002500c, RT305X_ESW_REG_FCT2);
  17 +       if (esw->reg_initval_fct2)
  18 +               esw_w32(esw, esw->reg_initval_fct2, RT305X_ESW_REG_FCT2);
  19 +       else
  20 +               esw_w32(esw, 0x0002500c, RT305X_ESW_REG_FCT2);
  21
  22         /* 300s aging timer, max packet len 1536, broadcast storm prevention
  23          * disabled, disable collision abort, mac xor48 hash, 10 packet back
  24 @@ -475,7 +480,10 @@ static void esw_hw_init(struct rt305x_es
  25          * port5: disabled
  26          * port6: enabled, gige, full-duplex, rx/tx-flow-control
  27          */
  28 -       esw_w32(esw, 0x3f502b28, RT305X_ESW_REG_FPA2);
  29 +       if (esw->reg_initval_fpa2)
  30 +               esw_w32(esw, esw->reg_initval_fpa2, RT305X_ESW_REG_FPA2);
  31 +       else
  32 +               esw_w32(esw, 0x3f502b28, RT305X_ESW_REG_FPA2);
  33         esw_w32(esw, 0x00000000, RT305X_ESW_REG_FPA);
  34
  35         /* Force Link/Activity on ports */
  36 @@ -1361,6 +1369,14 @@ static int esw_probe(struct platform_dev
  37         if (port_disable)
  38                 esw->port_disable = be32_to_cpu(*port_disable);
  39
  40 +       reg_init = of_get_property(np, "ralink,fct2", NULL);
  41 +       if (reg_init)
  42 +               esw->reg_initval_fct2 = be32_to_cpu(*reg_init);
  43 +
  44 +       reg_init = of_get_property(np, "ralink,fpa2", NULL);
  45 +       if (reg_init)
  46 +               esw->reg_initval_fpa2 = be32_to_cpu(*reg_init);
  47 +
  48         reg_init = of_get_property(np, "mediatek,led_polarity", NULL);
  49         if (reg_init)
  50                 esw->reg_led_polarity = be32_to_cpu(*reg_init);
  51 @@ -1386,6 +1402,18 @@ static int esw_probe(struct platform_dev
  52
  53         esw_hw_init(esw);
  54
  55 +       reg_init = of_get_property(np, "ralink,rgmii", NULL);
  56 +       if (reg_init && be32_to_cpu(*reg_init) == 1) {
  57 +               /*
  58 +                * External switch connected to RGMII interface.
  59 +                * Unregister the switch device after initialization.
  60 +                */
  61 +               dev_err(&pdev->dev, "RGMII mode, not exporting switch device.\n");
  62 +               unregister_switch(&esw->swdev);
  63 +               platform_set_drvdata(pdev, NULL);
  64 +               return -ENODEV;
  65 +       }
  66 +
  67         ret = devm_request_irq(&pdev->dev, esw->irq, esw_interrupt, 0, "esw",
  68                                esw);
  69