Fresh pull from upstream
[librecmc/librecmc.git] / target / linux / ramips / dts / mt7620a.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "ralink,mtk7620a-soc";
5
6         cpus {
7                 cpu@0 {
8                         compatible = "mips,mips24KEc";
9                 };
10         };
11
12         chosen {
13                 bootargs = "console=ttyS0,57600";
14         };
15
16         cpuintc: cpuintc@0 {
17                 #address-cells = <0>;
18                 #interrupt-cells = <1>;
19                 interrupt-controller;
20                 compatible = "mti,cpu-interrupt-controller";
21         };
22
23         aliases {
24                 spi0 = &spi0;
25                 spi1 = &spi1;
26                 serial0 = &uartlite;
27         };
28
29         palmbus: palmbus@10000000 {
30                 compatible = "palmbus";
31                 reg = <0x10000000 0x200000>;
32                 ranges = <0x0 0x10000000 0x1FFFFF>;
33
34                 #address-cells = <1>;
35                 #size-cells = <1>;
36
37                 sysc: sysc@0 {
38                         compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
39                         reg = <0x0 0x100>;
40                 };
41
42                 timer: timer@100 {
43                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
44                         reg = <0x100 0x20>;
45
46                         interrupt-parent = <&intc>;
47                         interrupts = <1>;
48                 };
49
50                 watchdog: watchdog@120 {
51                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
52                         reg = <0x120 0x10>;
53
54                         resets = <&rstctrl 8>;
55                         reset-names = "wdt";
56
57                         interrupt-parent = <&intc>;
58                         interrupts = <1>;
59                 };
60
61                 intc: intc@200 {
62                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
63                         reg = <0x200 0x100>;
64
65                         resets = <&rstctrl 19>;
66                         reset-names = "intc";
67
68                         interrupt-controller;
69                         #interrupt-cells = <1>;
70
71                         interrupt-parent = <&cpuintc>;
72                         interrupts = <2>;
73                 };
74
75                 memc: memc@300 {
76                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
77                         reg = <0x300 0x100>;
78
79                         resets = <&rstctrl 20>;
80                         reset-names = "mc";
81
82                         interrupt-parent = <&intc>;
83                         interrupts = <3>;
84                 };
85
86                 uart: uart@500 {
87                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
88                         reg = <0x500 0x100>;
89
90                         resets = <&rstctrl 12>;
91                         reset-names = "uart";
92
93                         interrupt-parent = <&intc>;
94                         interrupts = <5>;
95
96                         reg-shift = <2>;
97
98                         status = "disabled";
99                 };
100
101                 gpio0: gpio@600 {
102                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
103                         reg = <0x600 0x34>;
104
105                         resets = <&rstctrl 13>;
106                         reset-names = "pio";
107
108                         interrupt-parent = <&intc>;
109                         interrupts = <6>;
110
111                         gpio-controller;
112                         #gpio-cells = <2>;
113
114                         ralink,gpio-base = <0>;
115                         ralink,num-gpios = <24>;
116                         ralink,register-map = [ 00 04 08 0c
117                                                 20 24 28 2c
118                                                 30 34 ];
119                 };
120
121                 gpio1: gpio@638 {
122                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
123                         reg = <0x638 0x24>;
124
125                         interrupt-parent = <&intc>;
126                         interrupts = <6>;
127
128                         gpio-controller;
129                         #gpio-cells = <2>;
130
131                         ralink,gpio-base = <24>;
132                         ralink,num-gpios = <16>;
133                         ralink,register-map = [ 00 04 08 0c
134                                                 10 14 18 1c
135                                                 20 24 ];
136
137                         status = "disabled";
138                 };
139
140                 gpio2: gpio@660 {
141                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
142                         reg = <0x660 0x24>;
143
144                         interrupt-parent = <&intc>;
145                         interrupts = <6>;
146
147                         gpio-controller;
148                         #gpio-cells = <2>;
149
150                         ralink,gpio-base = <40>;
151                         ralink,num-gpios = <32>;
152                         ralink,register-map = [ 00 04 08 0c
153                                                 10 14 18 1c
154                                                 20 24 ];
155
156                         status = "disabled";
157                 };
158
159                 gpio3: gpio@688 {
160                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
161                         reg = <0x688 0x24>;
162
163                         interrupt-parent = <&intc>;
164                         interrupts = <6>;
165
166                         gpio-controller;
167                         #gpio-cells = <2>;
168
169                         ralink,gpio-base = <72>;
170                         ralink,num-gpios = <1>;
171                         ralink,register-map = [ 00 04 08 0c
172                                                 10 14 18 1c
173                                                 20 24 ];
174
175                         status = "disabled";
176                 };
177
178                 i2c: i2c@900 {
179                         compatible = "ralink,rt2880-i2c";
180                         reg = <0x900 0x100>;
181
182                         resets = <&rstctrl 16>;
183                         reset-names = "i2c";
184
185                         #address-cells = <1>;
186                         #size-cells = <0>;
187
188                         status = "disabled";
189
190                         pinctrl-names = "default";
191                         pinctrl-0 = <&i2c_pins>;
192                 };
193
194                 i2s: i2s@a00 {
195                         compatible = "mediatek,mt7620-i2s";
196                         reg = <0xa00 0x100>;
197
198                         resets = <&rstctrl 17>;
199                         reset-names = "i2s";
200
201                         interrupt-parent = <&intc>;
202                         interrupts = <10>;
203
204                         txdma-req = <2>;
205                         rxdma-req = <3>;
206
207                         dmas = <&gdma 4>,
208                                 <&gdma 6>;
209                         dma-names = "tx", "rx";
210
211                         status = "disabled";
212                 };
213
214                 spi0: spi@b00 {
215                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
216                         reg = <0xb00 0x40>;
217
218                         resets = <&rstctrl 18>;
219                         reset-names = "spi";
220
221                         #address-cells = <1>;
222                         #size-cells = <0>;
223
224                         status = "disabled";
225
226                         pinctrl-names = "default";
227                         pinctrl-0 = <&spi_pins>;
228                 };
229
230                 spi1: spi@b40 {
231                         compatible = "ralink,rt2880-spi";
232                         reg = <0xb40 0x60>;
233
234                         resets = <&rstctrl 18>;
235                         reset-names = "spi";
236
237                         #address-cells = <1>;
238                         #size-cells = <0>;
239
240                         status = "disabled";
241
242                         pinctrl-names = "default";
243                         pinctrl-0 = <&spi_cs1>;
244                 };
245
246                 uartlite: uartlite@c00 {
247                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
248                         reg = <0xc00 0x100>;
249
250                         resets = <&rstctrl 19>;
251                         reset-names = "uartl";
252
253                         interrupt-parent = <&intc>;
254                         interrupts = <12>;
255
256                         reg-shift = <2>;
257
258                         pinctrl-names = "default";
259                         pinctrl-0 = <&uartlite_pins>;
260                 };
261
262                 systick: systick@d00 {
263                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
264                         reg = <0xd00 0x10>;
265
266                         resets = <&rstctrl 28>;
267                         reset-names = "intc";
268
269                         interrupt-parent = <&cpuintc>;
270                         interrupts = <7>;
271                 };
272
273                 pcm: pcm@2000 {
274                         compatible = "ralink,mt7620a-pcm";
275                         reg = <0x2000 0x800>;
276
277                         resets = <&rstctrl 11>;
278                         reset-names = "pcm";
279
280                         interrupt-parent = <&intc>;
281                         interrupts = <4>;
282
283                         status = "disabled";
284                 };
285
286                 gdma: gdma@2800 {
287                         compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma";
288                         reg = <0x2800 0x800>;
289
290                         resets = <&rstctrl 14>;
291                         reset-names = "dma";
292
293                         interrupt-parent = <&intc>;
294                         interrupts = <7>;
295
296                         #dma-cells = <1>;
297                         #dma-channels = <16>;
298                         #dma-requests = <16>;
299
300                         status = "disabled";
301                 };
302         };
303
304         pinctrl: pinctrl {
305                 compatible = "ralink,rt2880-pinmux";
306                 pinctrl-names = "default";
307                 pinctrl-0 = <&state_default>;
308
309                 state_default: pinctrl0 {
310                 };
311
312                 pcm_i2s_pins: pcm_i2s {
313                         pcm_i2s {
314                                 ralink,group = "uartf";
315                                 ralink,function = "pcm i2s";
316                         };
317                 };
318
319                 uartf_gpio_pins: uartf_gpio {
320                         uartf_gpio {
321                                 ralink,group = "uartf";
322                                 ralink,function = "gpio uartf";
323                         };
324                 };
325
326                 gpio_i2s_pins: gpio_i2s {
327                         gpio_i2s {
328                                 ralink,group = "uartf";
329                                 ralink,function = "gpio i2s";
330                         };
331                 };
332
333                 spi_pins: spi {
334                         spi {
335                                 ralink,group = "spi";
336                                 ralink,function = "spi";
337                         };
338                 };
339
340                 spi_cs1: spi1 {
341                         spi1 {
342                                 ralink,group = "spi_cs1";
343                                 ralink,function = "spi_cs1";
344                         };
345                 };
346
347                 i2c_pins: i2c {
348                         i2c {
349                                 ralink,group = "i2c";
350                                 ralink,function = "i2c";
351                         };
352                 };
353
354                 uartlite_pins: uartlite {
355                         uart {
356                                 ralink,group = "uartlite";
357                                 ralink,function = "uartlite";
358                         };
359                 };
360
361                 mdio_pins: mdio {
362                         mdio {
363                                 ralink,group = "mdio";
364                                 ralink,function = "mdio";
365                         };
366                 };
367
368                 ephy_pins: ephy {
369                         ephy {
370                                 ralink,group = "ephy";
371                                 ralink,function = "ephy";
372                         };
373                 };
374
375                 wled_pins: wled {
376                         wled {
377                                 ralink,group = "wled";
378                                 ralink,function = "wled";
379                         };
380                 };
381
382                 rgmii1_pins: rgmii1 {
383                         rgmii1 {
384                                 ralink,group = "rgmii1";
385                                 ralink,function = "rgmii1";
386                         };
387                 };
388
389                 rgmii2_pins: rgmii2 {
390                         rgmii2 {
391                                 ralink,group = "rgmii2";
392                                 ralink,function = "rgmii2";
393                         };
394                 };
395
396                 pcie_pins: pcie {
397                         pcie {
398                                 ralink,group = "pcie";
399                                 ralink,function = "pcie rst";
400                         };
401                 };
402         };
403
404         rstctrl: rstctrl {
405                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
406                 #reset-cells = <1>;
407         };
408
409         clkctrl: clkctrl {
410                 compatible = "ralink,rt2880-clock";
411                 #clock-cells = <1>;
412         };
413
414         usbphy: usbphy {
415                 compatible = "mediatek,mt7620-usbphy";
416                 #phy-cells = <1>;
417
418                 resets = <&rstctrl 22 &rstctrl 25>;
419                 reset-names = "host", "device";
420
421                 clocks = <&clkctrl 22 &clkctrl 25>;
422                 clock-names = "host", "device";
423         };
424
425         ethernet: ethernet@10100000 {
426                 compatible = "mediatek,mt7620-eth";
427                 reg = <0x10100000 0x10000>;
428
429                 #address-cells = <1>;
430                 #size-cells = <0>;
431
432                 interrupt-parent = <&cpuintc>;
433                 interrupts = <5>;
434
435                 resets = <&rstctrl 21 &rstctrl 23>;
436                 reset-names = "fe", "esw";
437
438                 mediatek,switch = <&gsw>;
439
440                 port@4 {
441                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
442                         reg = <4>;
443
444                         status = "disabled";
445                 };
446
447                 port@5 {
448                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
449                         reg = <5>;
450
451                         status = "disabled";
452                 };
453
454                 mdio-bus {
455                         #address-cells = <1>;
456                         #size-cells = <0>;
457
458                         status = "disabled";
459                 };
460         };
461
462         gsw: gsw@10110000 {
463                 compatible = "mediatek,mt7620-gsw";
464                 reg = <0x10110000 0x8000>;
465
466                 resets = <&rstctrl 23>;
467                 reset-names = "esw";
468
469                 interrupt-parent = <&intc>;
470                 interrupts = <17>;
471         };
472
473         sdhci: sdhci@10130000 {
474                 compatible = "ralink,mt7620-sdhci";
475                 reg = <0x10130000 0x4000>;
476
477                 interrupt-parent = <&intc>;
478                 interrupts = <14>;
479
480                 status = "disabled";
481         };
482
483         ehci: ehci@101c0000 {
484                 compatible = "generic-ehci";
485                 reg = <0x101c0000 0x1000>;
486
487                 interrupt-parent = <&intc>;
488                 interrupts = <18>;
489
490                 phys = <&usbphy 1>;
491                 phy-names = "usb";
492
493                 status = "disabled";
494         };
495
496         ohci: ohci@101c1000 {
497                 compatible = "generic-ohci";
498                 reg = <0x101c1000 0x1000>;
499
500                 interrupt-parent = <&intc>;
501                 interrupts = <18>;
502
503                 phys = <&usbphy 1>;
504                 phy-names = "usb";
505
506                 status = "disabled";
507         };
508
509         pcie: pcie@10140000 {
510                 compatible = "mediatek,mt7620-pci";
511                 reg = <0x10140000 0x100
512                         0x10142000 0x100>;
513
514                 #address-cells = <3>;
515                 #size-cells = <2>;
516
517                 resets = <&rstctrl 26>;
518                 reset-names = "pcie0";
519
520                 clocks = <&clkctrl 26>;
521                 clock-names = "pcie0";
522
523                 interrupt-parent = <&cpuintc>;
524                 interrupts = <4>;
525
526                 pinctrl-names = "default";
527                 pinctrl-0 = <&pcie_pins>;
528
529                 device_type = "pci";
530
531                 bus-range = <0 255>;
532                 ranges = <
533                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
534                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
535                 >;
536
537                 status = "disabled";
538
539                 pcie-bridge {
540                         reg = <0x0000 0 0 0 0>;
541
542                         #address-cells = <3>;
543                         #size-cells = <2>;
544
545                         device_type = "pci";
546                 };
547         };
548
549         wmac: wmac@10180000 {
550                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
551                 reg = <0x10180000 0x40000>;
552
553                 interrupt-parent = <&cpuintc>;
554                 interrupts = <6>;
555
556                 ralink,eeprom = "soc_wmac.eeprom";
557         };
558 };