target/linux/ramips/dts/MT7620a_MT7530.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 / {
   6         compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
   7         model = "Ralink MT7620a + MT7530 evaluation board";
   8 };
   9
  10 &spi0 {
  11         status = "okay";
  12
  13         m25p80@0 {
  14                 #address-cells = <1>;
  15                 #size-cells = <1>;
  16                 compatible = "jedec,spi-nor";
  17                 reg = <0>;
  18                 linux,modalias = "m25p80", "s25fl064k";
  19                 spi-max-frequency = <10000000>;
  20
  21                 partition@0 {
  22                         label = "u-boot";
  23                         reg = <0x0 0x30000>;
  24                         read-only;
  25                 };
  26
  27                 partition@30000 {
  28                         label = "u-boot-env";
  29                         reg = <0x30000 0x10000>;
  30                         read-only;
  31                 };
  32
  33                 factory: partition@40000 {
  34                         label = "factory";
  35                         reg = <0x40000 0x10000>;
  36                         read-only;
  37                 };
  38
  39                 partition@50000 {
  40                         label = "firmware";
  41                         reg = <0x50000 0x7b0000>;
  42                 };
  43         };
  44 };
  45
  46 &pinctrl {
  47         state_default: pinctrl0 {
  48                 gpio {
  49                         ralink,group = "i2c", "uartf";
  50                         ralink,function = "gpio";
  51                 };
  52         };
  53 };
  54
  55 &ethernet {
  56         status = "okay";
  57         pinctrl-names = "default";
  58         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
  59         mediatek,portmap = "llllw";
  60
  61         port@5 {
  62                 status = "okay";
  63                 mediatek,fixed-link = <1000 1 1 1>;
  64                 phy-mode = "rgmii";
  65         };
  66
  67         mdio-bus {
  68                 status = "okay";
  69
  70                 phy0: ethernet-phy@0 {
  71                         reg = <0>;
  72                         phy-mode = "rgmii";
  73                 };
  74
  75                 phy1: ethernet-phy@1 {
  76                         reg = <1>;
  77                         phy-mode = "rgmii";
  78                 };
  79
  80                 phy2: ethernet-phy@2 {
  81                         reg = <2>;
  82                         phy-mode = "rgmii";
  83                 };
  84
  85                 phy3: ethernet-phy@3 {
  86                         reg = <3>;
  87                         phy-mode = "rgmii";
  88                 };
  89
  90                 phy4: ethernet-phy@4 {
  91                         reg = <4>;
  92                         phy-mode = "rgmii";
  93                 };
  94
  95                 phy1f: ethernet-phy@1f {
  96                         reg = <0x1f>;
  97                         phy-mode = "rgmii";
  98                 };
  99         };
 100 };
 101
 102 &gsw {
 103         mediatek,port4 = "gmac";
 104         mediatek,mt7530 = <1>;
 105 };
 106
 107 &pcie {
 108         status = "okay";
 109 };
 110
 111 &ehci {
 112         status = "okay";
 113 };
 114
 115 &ohci {
 116         status = "okay";
 117 };