mvebu: Add basic support for WRT1900AC (v1) and Turris Omnia (pre 2019)
[librecmc/librecmc.git] / target / linux / mvebu / patches-4.14 / 421-rtc-armada38x-reset-after-rtc-power-loss.patch
1 From 1a990fefb641398fb580a0ea0be99b0ff27cbb9b Mon Sep 17 00:00:00 2001
2 From: Baruch Siach <baruch@tkos.co.il>
3 Date: Thu, 21 Jun 2018 20:40:23 +0300
4 Subject: [PATCH] rtc: armada38x: reset after rtc power loss
5
6 When the RTC block looses power it needs a reset sequence to make it
7 usable again. Otherwise, writes to the time register have no effect.
8
9 This reset sequence combines information from the mvebu_rtc driver in
10 the Marvell provided U-Boot, and the SolidRun provided U-Boot repo.
11
12 Tested on the Armada 388 based SolidRun Clearfog Base.
13
14 Signed-off-by: Baruch Siach <baruch@tkos.co.il>
15 Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
16 Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
17 ---
18  drivers/rtc/rtc-armada38x.c | 23 +++++++++++++++++++++++
19  1 file changed, 23 insertions(+)
20
21 --- a/drivers/rtc/rtc-armada38x.c
22 +++ b/drivers/rtc/rtc-armada38x.c
23 @@ -30,6 +30,8 @@
24  #define RTC_IRQ_FREQ_1HZ           BIT(2)
25  #define RTC_CCR                    0x18
26  #define RTC_CCR_MODE               BIT(15)
27 +#define RTC_CONF_TEST      0x1C
28 +#define RTC_NOMINAL_TIMING         BIT(13)
29  
30  #define RTC_TIME           0xC
31  #define RTC_ALARM1         0x10
32 @@ -75,6 +77,7 @@ struct armada38x_rtc {
33         void __iomem        *regs_soc;
34         spinlock_t          lock;
35         int                 irq;
36 +       bool                initialized;
37         struct value_to_freq *val_to_freq;
38         struct armada38x_rtc_data *data;
39  };
40 @@ -226,6 +229,23 @@ static int armada38x_rtc_read_time(struc
41         return 0;
42  }
43  
44 +static void armada38x_rtc_reset(struct armada38x_rtc *rtc)
45 +{
46 +       u32 reg;
47 +
48 +       reg = rtc->data->read_rtc_reg(rtc, RTC_CONF_TEST);
49 +       /* If bits [7:0] are non-zero, assume RTC was uninitialized */
50 +       if (reg & 0xff) {
51 +               rtc_delayed_write(0, rtc, RTC_CONF_TEST);
52 +               msleep(500); /* Oscillator startup time */
53 +               rtc_delayed_write(0, rtc, RTC_TIME);
54 +               rtc_delayed_write(SOC_RTC_ALARM1 | SOC_RTC_ALARM2, rtc,
55 +                                 RTC_STATUS);
56 +               rtc_delayed_write(RTC_NOMINAL_TIMING, rtc, RTC_CCR);
57 +       }
58 +       rtc->initialized = true;
59 +}
60 +
61  static int armada38x_rtc_set_time(struct device *dev, struct rtc_time *tm)
62  {
63         struct armada38x_rtc *rtc = dev_get_drvdata(dev);
64 @@ -237,6 +257,9 @@ static int armada38x_rtc_set_time(struct
65         if (ret)
66                 goto out;
67  
68 +       if (!rtc->initialized)
69 +               armada38x_rtc_reset(rtc);
70 +
71         spin_lock_irqsave(&rtc->lock, flags);
72         rtc_delayed_write(time, rtc, RTC_TIME);
73         spin_unlock_irqrestore(&rtc->lock, flags);