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ARM: socfpga: Pull PL310 clearing into common code
2019-05-23 Marek VasutARM: socfpga: Pull PL310 clearing into common code
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-05-20 Marek Vasutvideo: Factor out vidconsole_put_string()
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-05-20 Marek Vasutvideo: ipuv3: Set max display bpp to 32
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-05-18 Marek Vasutspl: Set spl_image->fdt_addr pointer for full fitImage...
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-05-14 Marek VasutARM: dts: socfpga: Keep FPGA bridge entries in SPL DT
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-05-14 Marek VasutARM: dts: socfpga: Factor out U-Boot specifics from...
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek VasutARM: socfpga: Remove socfpga_sdram_apply_static_cfg()
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek Vasutmmc: dw_mmc: Round up descriptor end to nearest multiple...
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek Vasutmmc: dw_mmc: Handle return value from bounce_buffer_start()
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek Vasutmmc: dw_mmc: Calculate timeout from transfer length
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek VasutARM: socfpga: Add support for selecting bridges in...
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek VasutARM: socfpga: Fully unmap the FPGA bridges from L3...
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek VasutARM: socfpga: Disable bridges in SPL unless booting...
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-29 Marek VasutARM: socfpga: Factor out handoff register configuration
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-22 Marek Vasutspl: ymodem: Add support for loading full fitImages
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-17 Marek Vasuttimer: dw-apb: Add missing 64bit up-conversion
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-04-12 Marek Vasutmtd: spi: Add Macronix MX66U2G45F device
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-25 Marek Vasutmmc: Align MMC_TRACE with tiny printf
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-22 Marek VasutMakefile: Do not pass -E to mkimage when SPL has full...
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek Vasutddr: socfpga: Clean up ddr_setup()
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek Vasutddr: socfpga: Clean up EMIF reset
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek Vasutddr: socfpga: Fix EMIF clear timeout
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek VasutARM: socfpga: Fix A10 SoCDK Kconfig
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek VasutARM: socfpga: Fix Arria10 SPI and NAND U-Boot offset
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek VasutARM: socfpga: Drop CONFIG_SYS_NAND_BAD_BLOCK_POS
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek VasutARM: socfpga: Disable D cache in SPL
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek Vasutddr: socfpga: Fix newline in debug print on A10
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-03-09 Marek Vasutddr: socfpga: Fix IO in Arria10 DDR driver
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-02-28 Marek VasutARM: cache: Fix incorrect bitwise operation
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-02-25 Marek VasutARM: socfpga: Clear PL310 early in SPL
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-02-25 Marek VasutARM: socfpga: Configure PL310 latencies
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-02-25 Marek VasutARM: cache: Fix incorrect bitwise operation
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-01-15 Marek Vasutblk: Increase cache element size
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-01-15 Marek Vasuti2c: xiic: Add Xilinx AXI I2C driver
Signed-off-by: Marek Vasut <marex@denx.de>
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2019-01-09 Marek Vasutarm: mx5: Enable WDT and bootcounter on M53Menlo
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-11-13 Marek Vasutsunxi: Imply fitImage support
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-11-10 Marek Vasutmmc: dw_mmc: Add RCRC handling
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-10-19 Marek Vasutbootcount: Make bootcount magic configurable
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-10-16 Marek Vasutarm: mx5: Add M53Menlo board
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-10-16 Marek Vasutarm: mx5: Add LDB clock config code
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-10-16 Marek Vasutarm: imx: mx5: Make videoskip available on MX5
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-10-10 Marek Vasutbootm: Add board specific OS preboot hook
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-09-30 Marek Vasutfs: btrfs: Fix cache alignment bugs
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-09-29 Marek Vasutcmd: clk: Add trivial implementation of clock dump...
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-09-26 Marek Vasutspl: Weed out CONFIG_SYS_TEXT_BASE usage
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-24 Marek Vasutenv: ubi: Add missing ENV_NAME
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-24 Marek VasutARM: dts: socfpga: Add missing NAND reset
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-24 Marek VasutARM: dts: socfpga: Drop ad-hoc UART clock frequency...
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-24 Marek VasutARM: socfpga: Convert Arria10 to timer framework
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-24 Marek VasutARM: dts: socfpga: Flag timer clock as pre-reloc
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-24 Marek Vasuttimer: dw-apb: Add Designware APB timer driver
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-24 Marek VasutARM: socfpga: Reorder Arria10 SPL
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: clk: Convert to clock framework
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek Vasutmmc: socfpga: Add clock framework support
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek Vasutclk: socfpga: Add initial Arria10 clock driver
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary...
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: clk: Drop unused variables on Arria10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: clk: Make L4SP and MMC clock calculation...
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: clk: Obtain handoff base clock via DM
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: Enable DM ethernet on A10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: Remove adhoc ethernet reset and configuration
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: Zap unused reset code
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek Vasutnet: designware: socfpga: Add Arria10 extras
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: Zap all the UART handling complexity
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: Enable DM I2C framework on A10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: Enable DM reset framework on A10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: dts: socfpga: Add i2c alias to A10 SoCDK
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: dts: socfpga: Add missing I2C resets
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: dts: socfpga: Fix Arria10 GMAC resets
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: dts: socfpga: Add missing UART resets
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: dts: socfpga: Flag reset manager on A10 as pre...
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-08-13 Marek VasutARM: socfpga: Register the FPGA on A10 in SPL again
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-24 Marek VasutARM: dts: socfpga: Adjust NAND register layout on Arria10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-24 Marek VasutARM: socfpga: Init missing security policies on A10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-24 Marek VasutARM: socfpga: Assure correct CPACR configuration
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-12 Marek VasutARM: socfpga: Assure correct ACTLR configuration
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-12 Marek VasutARM: socfpga: Make DRAM node available in SPL
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-12 Marek VasutARM: socfpga: Pull DRAM size from DT
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-12 Marek Vasutddr: altera: Add ECC DRAM scrubbing support for Arria10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-12 Marek Vasutddr: altera: Drop custom dram_bank_mmu_setup() on Arria10
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-10 Marek Vasutspl: fit: Fix support for loading FPGA bitstream
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-10 Marek Vasutspl: spi: Support full fitImage handling
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-10 Marek Vasutspl: fat: Support full fitImage handling
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-07-10 Marek Vasutfit: Verify all configuration signatures
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-06-28 Marek Vasutsf: Enable FSR polling on N25Q256(A)
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-06-04 Marek Vasutsf: Set current flash bank to 0 in clean_bar()
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-29 Marek Vasutsf: Add Macronix MX25U25635F ID
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-29 Marek Vasutsf: Add Winbond W25Q256 ID
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-24 Marek Vasutspl: Add full fitImage support
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-24 Marek Vasutpylibfdt: Add missing CC and LD to Makefile
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-24 Marek Vasutfit: Add standalone image type handling
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-24 Marek Vasutfit: Add empty fit_print_contents() and fit_image_print()
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-24 Marek Vasutfit: Fix CONFIG_FIT_SPL_PRINT
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-24 Marek Vasutspl: fit: Add support for loading FPGA bitstream
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-18 Marek VasutARM: socfpga: Repair A10 EMAC reset handling
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-18 Marek VasutARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-18 Marek VasutARM: socfpga: Synchronize Arria10 DTs
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-18 Marek VasutARM: socfpga: Sort the DT Makefile
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-18 Marek VasutARM: socfpga: Sync A10 clock manager binding parser
Signed-off-by: Marek Vasut <marex@denx.de>
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2018-05-18 Marek VasutARM: socfpga: Convert to DM serial
Signed-off-by: Marek Vasut <marex@denx.de>
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