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(parent: a294f53) | patch
fix missing barrier instructions in mips atomic asm
authorRich Felker <dalias@aerifal.cx>
Sat, 19 Jul 2014 19:51:12 +0000 (15:51 -0400)
committerRich Felker <dalias@aerifal.cx>
Sat, 19 Jul 2014 19:51:12 +0000 (15:51 -0400)
commitbcad48439494820989f5867c3f8ccfa6aae2909f
tree96b9f234bd245c189e8a7a1cef9545efb8fe6b58tree | snapshot
parenta294f539c78c6ba0a2786ef3c5b2a1210a33864ecommit | diff
fix missing barrier instructions in mips atomic asm

previously I had wrongly assumed the ll/sc instructions also provided
memory synchronization; apparently they do not. this commit adds sync
instructions before and after each atomic operation and changes the
atomic store to simply use sync before and after a plain store, rather
than a useless compare-and-swap.
arch/mips/atomic.h diff | blob | history
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