oweals/u-boot.git
4 years agoboard: stm32mp1: move set_dfu_alt_info in st common directory
Patrick Delaunay [Wed, 18 Mar 2020 08:22:45 +0000 (09:22 +0100)]
board: stm32mp1: move set_dfu_alt_info in st common directory

Move the stm32mp1 common code set_dfu_alt_info() in common directory,
this patch reduce the maintenance effort on this generic part (not board
dependent).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: stm32mp1: move board_get_mtdparts in st common directory
Patrick Delaunay [Wed, 18 Mar 2020 08:22:44 +0000 (09:22 +0100)]
board: stm32mp1: move board_get_mtdparts in st common directory

Move the stm32mp1 common code board_get_mtdparts() in common directory,
this patch reduce the maintenance effort on this generic part (not board
dependent).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoARM: stm32: Implement DDR3 coding on DHCOR SoM
Marek Vasut [Wed, 22 Apr 2020 11:18:14 +0000 (13:18 +0200)]
ARM: stm32: Implement DDR3 coding on DHCOR SoM

The DHCOR board does exist in multiple variants with different DDR3
DRAM sizes. To cater for all of them, implement DDR3 code handling.
There are two GPIOs which code the DRAM size populated on the SoM,
read them out and use the value to pick the correct DDR3 config.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
4 years agoARM: dts: stm32: Rework DDR DT inclusion
Marek Vasut [Wed, 22 Apr 2020 11:18:13 +0000 (13:18 +0200)]
ARM: dts: stm32: Rework DDR DT inclusion

Adjust the DDR configuration dtsi such that they only generate the
DRAM configuration node, the DDR controller node is moved into the
stm32mp157-u-boot.dtsi itself. This permits including multiple DDR
configuration dtsi files in board DT.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
4 years agoram: stm32mp1: Add support for multiple configs
Marek Vasut [Wed, 22 Apr 2020 11:18:12 +0000 (13:18 +0200)]
ram: stm32mp1: Add support for multiple configs

Add support for multiple DRAM configuration subnodes, while retaining
the support for a single flat DRAM configuration node. This is useful
on systems which can be manufactured in multiple configurations and
where the DRAM configuration can be determined at runtime.

The code is augmented by a function which can be overridden on board
level, allowing a match on the configuration node name, very much like
the fitImage configuration node name matching works. The default match
is on the single top-level DRAM configuration, if matching on subnodes
is required, then this board_stm32mp1_ddr_config_name_match() must be
overridden.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
4 years agoARM: stm32: Implement board coding on AV96
Marek Vasut [Wed, 22 Apr 2020 11:18:11 +0000 (13:18 +0200)]
ARM: stm32: Implement board coding on AV96

The AV96 board does exist in multiple variants. To cater for all of
them, implement board code handling. There are two GPIOs which code
the type of the board, read them out and use the value to pick the
correct device tree from an fitImage.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Change-Id: Iddb330b9a66500495885457cbe17edc0eacaaf43

4 years agoARM: stm32: Add board_early_init_f() to SPL
Marek Vasut [Wed, 22 Apr 2020 11:18:10 +0000 (13:18 +0200)]
ARM: stm32: Add board_early_init_f() to SPL

Add weak implementation of board_early_init_f() hook into the
STM32MP1 SPL. This can be used to read out e.g. configuration
straps before initializing the DRAM.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
4 years agoARM: stm32: Add default config for DHCOR
Marek Vasut [Wed, 22 Apr 2020 11:18:09 +0000 (13:18 +0200)]
ARM: stm32: Add default config for DHCOR

Add default U-Boot configuration for the DHCOR SoM on AV96 board.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
Tom Rini [Tue, 12 May 2020 20:20:10 +0000 (16:20 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb

- Two DWC3 fixes

4 years agoMerge tag 'u-boot-amlogic-20200511' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Tue, 12 May 2020 13:23:15 +0000 (09:23 -0400)]
Merge tag 'u-boot-amlogic-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Enable USB Host for Odroid-C2 board
- Add Open-Drain/Open-Source emulation in GPIO uclass

4 years agousb: dwc3: Add versal compatibility string to dwc3 glue ids
Siva Durga Prasad Paladugu [Tue, 12 May 2020 06:36:01 +0000 (08:36 +0200)]
usb: dwc3: Add versal compatibility string to dwc3 glue ids

Xilinx Versal platform uses dwc3 and hence its compatible string
needs to be added to dwc3 glue ids.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agousb: dwc3: add dis_del_phy_power_chg_quirk
Jagan Teki [Wed, 6 May 2020 07:50:25 +0000 (13:20 +0530)]
usb: dwc3: add dis_del_phy_power_chg_quirk

Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.

Reference from below Linux commit,

commit <00fe081dc3a3> ("usb: dwc3: add dis_del_phy_power_chg_quirk")

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoPrepare v2020.07-rc2 v2020.07-rc2
Tom Rini [Mon, 11 May 2020 22:28:19 +0000 (18:28 -0400)]
Prepare v2020.07-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'efi-2020-07-rc2-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 11 May 2020 18:23:23 +0000 (14:23 -0400)]
Merge tag 'efi-2020-07-rc2-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc2-4

This pull request comprises:
* bug fixes
* documentation fixes
* a new function to determine u16 string sizes and its unit test

4 years agoMerge tag 'ti-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Mon, 11 May 2020 16:04:54 +0000 (12:04 -0400)]
Merge tag 'ti-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Fix boot issues on Nokia RX-51
- Configure AM6 CPSW for 10Mbps in rgmii mode.
- Minor changes for J721e

4 years agoMerge tag 'u-boot-imx-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Mon, 11 May 2020 13:46:43 +0000 (09:46 -0400)]
Merge tag 'u-boot-imx-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- i.MX NAND and nandbxb for i.MX8M
- imx8MM : new beacon devkit
- imx8MQ : new pico-imx8MQ
- imx8QXP : extend to enable M4, fixes
- add thermal support
- caches in SPL (missing board)
- Fixes

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011

4 years agotest: dm: update test for open-drain/open-source emulation in gpio-uclass
Neil Armstrong [Tue, 5 May 2020 08:43:18 +0000 (10:43 +0200)]
test: dm: update test for open-drain/open-source emulation in gpio-uclass

Add tests for testing open-drain/open-source emulation in gpio-uclass.
It also adds two test3-gpios configured as GPIO_ACTIVE_LOW.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agogpio: emulate open drain & open source in dm_gpio_set_value()
Neil Armstrong [Tue, 5 May 2020 08:43:17 +0000 (10:43 +0200)]
gpio: emulate open drain & open source in dm_gpio_set_value()

Handle the GPIOD_OPEN_DRAIN & GPIOD_OPEN_SOURCE flags to emulate open drain
and open source by setting the GPIO line as input depending on the
requested value.

The behaviour is taken from the Linux gpiolib.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Mon, 11 May 2020 12:27:55 +0000 (08:27 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

- zap lpc32xx_ssp driver (Jagan)
- rename of phy nodev call (Jagan)
- iopoll with sleep_us (Jagan)
- MX25R6435F flash (Ye Li)

4 years agoodroid-c2: enable USB host controller
Beniamino Galvani [Sun, 18 Aug 2019 13:42:55 +0000 (15:42 +0200)]
odroid-c2: enable USB host controller

Enable the second USB controller, which is connected to a hub with 4
ports. The first controller is for the OTG port and is currently not
supported.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
[narmstrong: removed useless DWC2_UTMI_WIDTH in meson64.h]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoNokia RX-51: Update README.nokia_rx51
Pali Rohár [Tue, 31 Mar 2020 22:35:17 +0000 (00:35 +0200)]
Nokia RX-51: Update README.nokia_rx51

Fix some typos, add information about setup_omap_atag, remove old suff
about ONENAND_SUPPORT and update guide for UBIFS.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Disable some unused features to decrease size of u-boot binary
Pali Rohár [Tue, 31 Mar 2020 22:35:16 +0000 (00:35 +0200)]
Nokia RX-51: Disable some unused features to decrease size of u-boot binary

Maximal allowed size of U-Boot binary for Nokia N900 is just 262144 bytes.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Enable CONFIG_CONSOLE_MUX
Pali Rohár [Tue, 31 Mar 2020 22:35:15 +0000 (00:35 +0200)]
Nokia RX-51: Enable CONFIG_CONSOLE_MUX

After this change both device display and serial console would contain
U-Boto output automatically without any future configuration. This would
allow easier debugging on real device as access to serial console is hard
and also in qemu emulator where it is easier to copy+paste from serial
console as from SDL framebuffer.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoNokia RX-51: Remember setup_console_atag option
Pali Rohár [Tue, 31 Mar 2020 22:35:14 +0000 (00:35 +0200)]
Nokia RX-51: Remember setup_console_atag option

When variable setup_console_atag is unset then read default value from OMAP
atags which passed NOLO bootloader to U-Boot.

This would allow to boot Maemo Linux kernel from U-Boot with serial console
settings configured in NOLO bootloader (which loads U-Boot).

So serial console needs to be enabled only at one place, globally in NOLO.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Remove PART* macros
Pali Rohár [Tue, 31 Mar 2020 22:35:13 +0000 (00:35 +0200)]
Nokia RX-51: Remove PART* macros

Now when code for defining partitions is duplicated at two locations
(option CONFIG_MTDPARTS_DEFAULT in nokia_rx51_defconfig file and macro
OMAP_TAG_PARTITION_CONFIG in rx51.c file) there is no need to have common
macros. Lets inline PART* macros to rx51.c file.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Revert back onenand defitions
Pali Rohár [Tue, 31 Mar 2020 22:35:12 +0000 (00:35 +0200)]
Nokia RX-51: Revert back onenand defitions

In commit commit 43ede0bca7fc ("Kconfig: Migrate MTDIDS_DEFAULT /
MTDPARTS_DEFAULT") were removed definitions for onenand partitions.

Revert them back and enable needed options for onenand support.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Move code from defconfig back to C header file
Pali Rohár [Tue, 31 Mar 2020 22:35:11 +0000 (00:35 +0200)]
Nokia RX-51: Move code from defconfig back to C header file

In commit commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and
CONFIG_PREBOOT to Kconfig") was moved complicated multiline script code
from C header to oneliner in defconfig. After this change multiline to wide
oneliner it is hard to read this code and even harder to debug. Moreover
this script code should be at place where are other scripts, so move it
back to C header file.

Define new env variable preboot which stores this script and in option
CONFIG_PREBOOT calls this preboot variable.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Move comment about CONFIG_SYS_TEXT_BASE to correct place
Pali Rohár [Tue, 31 Mar 2020 22:35:10 +0000 (00:35 +0200)]
Nokia RX-51: Move comment about CONFIG_SYS_TEXT_BASE to correct place

In commit commit 278b90ce786f ("configs: Migrate CONFIG_SYS_TEXT_BASE") was
moved definition for CONFIG_SYS_TEXT_BASE option but author probably forgot
to move also comment for lines which are moving. So do it now!

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Add README.nokia_rx51 file to MAINTAINERS
Pali Rohár [Tue, 31 Mar 2020 22:35:09 +0000 (00:35 +0200)]
Nokia RX-51: Add README.nokia_rx51 file to MAINTAINERS

This entry was missing in MAINTAINERS file.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agoNokia RX-51: Update my email address
Pali Rohár [Tue, 31 Mar 2020 22:35:08 +0000 (00:35 +0200)]
Nokia RX-51: Update my email address

I'm using a new email address, so reflect this state also in U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agovideo: omap: change include order
Dario Binacchi [Sun, 3 May 2020 19:27:48 +0000 (21:27 +0200)]
video: omap: change include order

Apply u-boot coding style on include files order as described by the
wiki https://www.denx.de/wiki/U-Boot/CodingStyle.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agoarm: K3: Increase default SYSFW image size allocation
Andrew F. Davis [Thu, 30 Apr 2020 19:12:19 +0000 (15:12 -0400)]
arm: K3: Increase default SYSFW image size allocation

The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
Some additions to the board configuration data has pushed us slightly
over the current defined size on some HS devices, expand to 278000.

Signed-off-by: Andrew F. Davis <afd@ti.com>
4 years agosf: Add Macronix MX25R6435F SPI NOR flash to flash parameters array
Ye Li [Sun, 3 May 2020 13:02:56 +0000 (21:02 +0800)]
sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters array

On i.mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters
and IDs to flash parameter array. Otherwise, the flash probe will fails.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agospi: fix dev parameter in dev_* calls
Dario Binacchi [Sat, 2 May 2020 15:45:50 +0000 (17:45 +0200)]
spi: fix dev parameter in dev_* calls

Probably the non-use of the device parameter by the print routines did
not generate compilation errors.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agospi: nxp-fspi: Use new readl_poll_sleep_timeout API
Kuldeep Singh [Mon, 27 Apr 2020 07:08:51 +0000 (12:38 +0530)]
spi: nxp-fspi: Use new readl_poll_sleep_timeout API

Board gets reset when performing burst read/write operations. On the
other hand, no such behaviour is observed on small size operations.

In Linux, readl_poll_timeout API already adds delay of 1us which is
further skipped in U-boot. Hence, use new "readl_poll_sleep_timeout" API
which adds delay alongwith timeout functionality.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
4 years agoiopoll: Add readl_poll_sleep_timeout
Jagan Teki [Sat, 2 May 2020 07:15:03 +0000 (12:45 +0530)]
iopoll: Add readl_poll_sleep_timeout

Add readl poll API with sleep and timeout support.

This change is referenced from Linux from below commit:
commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll:
introduce read_poll_timeout macro")

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoiopoll: Add dealy to read poll
Jagan Teki [Sat, 2 May 2020 07:15:02 +0000 (12:45 +0530)]
iopoll: Add dealy to read poll

Some drivers and other bsp code not only poll the
register with timeout but also required to delay
on each transaction.

This patch add that requirement by adding sleep_us
variable so-that read_poll_timeout now support
delay as well.

This change is referenced from Linux from below commit:
commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll:
introduce read_poll_timeout macro")

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoiopoll: Add read_poll_timeout common API
Jagan Teki [Sat, 2 May 2020 07:15:01 +0000 (12:45 +0530)]
iopoll: Add read_poll_timeout common API

Add read_poll_timeout common API similar to Linux iopoll.

readx_poll_timeout will trigger read_poll_timeout with
proper op. This will help to extend the functionalities
like sleep_us to poll timeout in future.

This change is referenced from Linux from below commit:
commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll:
introduce read_poll_timeout macro")

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoclk: Fix clk func names in comments
Jagan Teki [Fri, 1 May 2020 18:15:08 +0000 (23:45 +0530)]
clk: Fix clk func names in comments

clk function names in comments should be prefix with
clk instead of clock.

Fix it.

Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agophy: Use _nodev naming convention if non-device clients
Jagan Teki [Fri, 1 May 2020 18:14:18 +0000 (23:44 +0530)]
phy: Use _nodev naming convention if non-device clients

Clients that are requesting some of uclass API's
without a device (with ofnode) usually have _nodev
naming convention.

- clk_get_by_index_nodev
- clk_get_by_name_nodev
- reset_get_by_index_nodev
- gpio_request_by_name_nodev

So, update the same naming convention PHY framework.

This doesn't change the existing functionality.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agophy: Fix node description of phy_get_by_node
Jagan Teki [Fri, 1 May 2020 18:14:17 +0000 (23:44 +0530)]
phy: Fix node description of phy_get_by_node

node is most of device related API's are termed as device
node and without device related API's are termed as ofnode.

generic_phy_get_by_node API is without device API, so fixed
the node description as ofnode.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: Zap lpc32xx_ssp driver-related code
Jagan Teki [Fri, 1 May 2020 16:34:50 +0000 (22:04 +0530)]
spi: Zap lpc32xx_ssp driver-related code

lpc32xx_ssp driver is deprecated, no active updates
and no board user, hence dropped the same.

Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoimx8: cpu: check resource owned after sid fail
Peng Fan [Tue, 5 May 2020 12:28:46 +0000 (20:28 +0800)]
imx8: cpu: check resource owned after sid fail

When we create software partition, we still need let parent
partition to configure sid, so move the check after sid failed.

Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qxp: update fdt_file according to m4 state
Peng Fan [Tue, 5 May 2020 12:28:45 +0000 (20:28 +0800)]
imx: imx8qxp: update fdt_file according to m4 state

Update fdt_file according to m4 parts state

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qm: update fdt_file according to m4 state
Peng Fan [Tue, 5 May 2020 12:28:44 +0000 (20:28 +0800)]
imx: imx8qm: update fdt_file according to m4 state

Update fdt_file according to m4 parts state

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qm/qxp: check whether m4 partition booted
Peng Fan [Tue, 5 May 2020 12:28:43 +0000 (20:28 +0800)]
imx: imx8qm/qxp: check whether m4 partition booted

Add code to check m4 partition booted or not, we will use this
to runtime set device tree file that passed to Linux Kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: Select boot device dynamically
Ye Li [Tue, 5 May 2020 12:28:42 +0000 (20:28 +0800)]
imx8: Select boot device dynamically

For fspi build, we will enable both SPL NOR support and SPL SPI
support. SPL will dynamically check the resource owner then
select corresponding boot device.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qm/qxp: Recover SPL data section for partition reboot
Peng Fan [Tue, 5 May 2020 12:28:41 +0000 (20:28 +0800)]
imx: imx8qm/qxp: Recover SPL data section for partition reboot

When doing partition reboot, the boot image won't be reloaded by ROM,
it is just CPU reset to boot entry. The SW has to keep the boot image
inside the RAM unchanged. It includes both the TEXT section and DATA
section.

For SPL, the problem is DATA section will be updated at runtime, so in
next partition reboot the data is not same as the initial value from
cold boot. If any code depends on the initial value, then it will have
problem.

This patch introduces a mechanism to recover the data section
for partition reboot. It adds a new section in image for saving
data section. When from cold boot, the data section will be saved
to that new section at SPL early phase. When from partition reboot,
the data section will be restored from the new section.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qm/imx8qxp: Power down the resources before SPL jump to u-boot
Peng Fan [Tue, 5 May 2020 12:28:40 +0000 (20:28 +0800)]
imx: imx8qm/imx8qxp: Power down the resources before SPL jump to u-boot

Make sure that all devices that are powered up by SPL are powered down
before entering into the u-boot. Otherwise the subsystem/device will
never be powered down by SCFW, due to SPL and u-boot are in different
partitions.

Benefiting from power domain driver, this patch implements the function
"imx8_power_off_pd_devices" to power off all active devices.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qm/qxp: add get_board_serial
Peng Fan [Tue, 5 May 2020 12:28:39 +0000 (20:28 +0800)]
imx: imx8qm/qxp: add get_board_serial

Add get_board_serial support, the info could be got from fuse.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qm/qxp: Fix issue in get_effective_memsize
Ye Li [Tue, 5 May 2020 12:28:38 +0000 (20:28 +0800)]
imx: imx8qm/qxp: Fix issue in get_effective_memsize

When Trusty OS allocates the mem region from 0xfe0000000-0xffffffff,
the get_effective_memsize does not return correct memory size.
There is a check in get_effective_memsize to find the memreg where
the u-boot is running, and return the size of that memreg as the result
of get_effective_memsize. When using aligned start, the value is
0x80200000 since it is 2MB aligned. Thus the finding of memreg will
fail and return the PHYS_SDRAM_1_SIZE because u-boot text base is
0x80020000. This cause u-boot is relocated to the high memory where has
been occupied by Trusty OS.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8qm/qxp: reserving DDR memory for M4
Peng Fan [Tue, 5 May 2020 12:28:37 +0000 (20:28 +0800)]
imx: imx8qm/qxp: reserving DDR memory for M4

The DDR memory from 0x88000000 to 0x8FFFFFFF is assigned to M4 on
QM and QXP. The M4 can allocate this memory by two ways,
in SCD or u-boot.

In this patch, u-boot addes the memory reserve node to DTB to pass
the info to kernel, no matter the M4 memory is reserved in SCD
or u-boot. So kernel won't access M4 reserved memory.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomtd: nand: raw: mxs_nand changes for nandbcb
Han Xu [Wed, 6 May 2020 12:59:19 +0000 (20:59 +0800)]
mtd: nand: raw: mxs_nand changes for nandbcb

Add more BCH setting mode and remove the unnecessary platform constrain

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonandbcb: read boot search count from fuse for imx8qxp
Han Xu [Tue, 5 May 2020 14:04:04 +0000 (22:04 +0800)]
nandbcb: read boot search count from fuse for imx8qxp

add support for imx8qxp to read boot search count from fuse in nandbcb

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agocmd: nandbcb: Reconstruct the nandbcb tool for all platforms
Han Xu [Tue, 5 May 2020 14:04:03 +0000 (22:04 +0800)]
cmd: nandbcb: Reconstruct the nandbcb tool for all platforms

The original nandbcb tool was designed for imx6 only, when trying to
leverage it to replace the kobs-ng tool, we found the design is not
friendly for supporting all platforms. To support all iMX6/7/8 platforms
and for easy further maintain, I reconstruct the structure of the tool.

The main changes including:

1. Use platform_data to determine the logic branches rather than simply
   use SOC name.
2. More data structures as parameter for functions.
3. Global variables to define the FCB/DBBT/FW locations.
4. Implement the kobs-ng default 4 FCB/4 DBBT/2 FW layout.
5. Support Hamming coding/ 40bit BCH/ 62bit BCH coding FCB.
6. Dump and compare all written FCB/DBBT to verify data integrity.

The tool has been verified on iMX6Q/DL, 6SX, 7D, 6ULL, iMX8QX, iMX8MM.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonandbcb: add nandbcb dump command for i.MX6
Alice Guo [Tue, 5 May 2020 14:04:02 +0000 (22:04 +0800)]
nandbcb: add nandbcb dump command for i.MX6

Verify/dump boot structures.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonandbcb: add nandbcb dump command for i.MX8MM
Alice Guo [Tue, 5 May 2020 14:04:01 +0000 (22:04 +0800)]
nandbcb: add nandbcb dump command for i.MX8MM

Verify/dump boot structures written to NAND Flash chip.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonandbcb: support i.MX8M
Alice Guo [Tue, 5 May 2020 14:04:00 +0000 (22:04 +0800)]
nandbcb: support i.MX8M

Tested on i.MX8MM EVK, imx8mm evk uses BCH
encoding and randomizer
modify macro and print size_t with %zx
use CONFIG_IMX8M because it should apply to imx8mq/mm/mn

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonandbcb: fix the issue cannot support gf_14 NAND boot
Han Xu [Tue, 5 May 2020 14:03:59 +0000 (22:03 +0800)]
nandbcb: fix the issue cannot support gf_14 NAND boot

bchtype in FCB should be associated to the gf_13/14 settings in BCH, fix
the issue and test on Micron 29F64G08CBABB, it can boot after the
change.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: Replace SC_R_LAST with SC_R_NONE in DTB
Leonard Crestez [Mon, 4 May 2020 13:16:54 +0000 (21:16 +0800)]
imx8: Replace SC_R_LAST with SC_R_NONE in DTB

We are currently using SC_R_LAST as a marker for imx8 power domain tree
nodes without a resource attached. This value is compiled into dtb as
part of the linux build and used by uboot.

The SC_R_LAST constant changes frequently as SCFW resources are added
(by design) and every time we need to update linux and uboot headers
together or boot can fail.

Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE
defined to be 0xFFF0.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agopower: imx8: Check owned resource in power on
Ye Li [Mon, 4 May 2020 13:16:53 +0000 (21:16 +0800)]
power: imx8: Check owned resource in power on

When fspi is assigned to M4, we have to let the fspi probe failed when
its power domain is failed to power up. Because not all devices have power
domain (for example, external devices on the board). Current checking
resource owner in power domain probe is not good, change to check it in
power on.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agopower: imx8: remove the resource owned check before power off
Peng Fan [Mon, 4 May 2020 13:16:52 +0000 (21:16 +0800)]
power: imx8: remove the resource owned check before power off

For all the devices used and set ACTIVE in U-Boot, U-Boot needs
to power off all of them without the check of resource owner.

When we create software partition before booting Linux, the resource
own checkw will return false, and cause the power domain not powered
off. If without the check of resource owner, the power domain in
the other software partition could be powered off with parent
partition could access child partition resources.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agopower: imx8-power-domain: Set DM_FLAG_DEFAULT_PD_CTRL_OFF flag
Ye Li [Mon, 4 May 2020 13:16:51 +0000 (21:16 +0800)]
power: imx8-power-domain: Set DM_FLAG_DEFAULT_PD_CTRL_OFF flag

If without this flag, calling dev_power_domain_ctrl will iteratively remove
the power domain device will causes iteratively power off parent PD. This is
not expected by imx8-power-domain-legacy driver. Power off parent PD is
controlled by the driver internally.

So set DM_FLAG_DEFAULT_PD_CTRL_OFF to avoid such issue

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: power: Add PD device lookup interface to power domain uclass
Peng Fan [Mon, 4 May 2020 13:16:50 +0000 (21:16 +0800)]
imx8: power: Add PD device lookup interface to power domain uclass

Add power_domain_lookup_name interface to power domain uclass to find
a power domain device by its DTB node name, not using its associated
client device.

Through this interface, we can operate the power domain devices directly.
This is needed for non-DM drivers.

Modified from Ye's NXP downstream patch

only for legacy imx8 power domain driver, since we have not migrated
to use new power domain driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agodt-bindings: imx_rsrc: add SC_R_NONE
Peng Fan [Mon, 4 May 2020 13:16:49 +0000 (21:16 +0800)]
dt-bindings: imx_rsrc: add SC_R_NONE

Add SC_R_NONE entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: Add support for i.MX8MM Beacon EmbeddedWorks devkit.
Adam Ford [Sun, 3 May 2020 13:11:33 +0000 (08:11 -0500)]
imx: Add support for i.MX8MM Beacon EmbeddedWorks devkit.

Beacon EmbeddedWorks, formerly known as Logic PD, is releasing
a devkit based on the i.MX8M Mini SoC consisting of baseboard +
SOM.

It supports eMMC on the SOM, microSD on the baseboard, various
GPIO, the PINCTRL, and UART.

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agonand: enable the Randomizer module for i.mx7 and i.mx8
Alice Guo [Mon, 4 May 2020 14:09:03 +0000 (22:09 +0800)]
nand: enable the Randomizer module for i.mx7 and i.mx8

To enable the Randomizer module, set GPMI_ECCCTRL[RANDOMIZER_ENABLE] to
1, then set GPMI_ECCCOUNT[RANDOMIZER_PAGE] to select randomizer page
number needed to be randomized.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomxs_nand: don't check zero count when ECC reading with randomizer
Han Xu [Mon, 4 May 2020 14:09:02 +0000 (22:09 +0800)]
mxs_nand: don't check zero count when ECC reading with randomizer

When enabled randomizer during ECC reading, the controller reported it's
erased page. Checking zero count will cause data get modified to all
0xFF. Stop checking during randomizer to workaround this issue.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoMXS_NAND: Add clock support for iMX8
Ye Li [Mon, 4 May 2020 14:09:01 +0000 (22:09 +0800)]
MXS_NAND: Add clock support for iMX8

Since iMX8 has enabled clock uclass, we can parse the clocks from DTB
and enable them in GPMI driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomtd: nand: support GPMI NAND driver for i.MX8
Peng Fan [Mon, 4 May 2020 14:09:00 +0000 (22:09 +0800)]
mtd: nand: support GPMI NAND driver for i.MX8

enable the GPMI NAND driver for i.MX8, i.MX8 use similar controller as
i.MX8M

- register definition for i.mx8
- DMA structure must be 32bit address

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonand: mxs_nand: make imx8mm can use hardware BCH and randomizer
Alice Guo [Mon, 4 May 2020 14:08:59 +0000 (22:08 +0800)]
nand: mxs_nand: make imx8mm can use hardware BCH and randomizer

imx8mm needs to BCH encode and set NAND page number needed to be
randomized

modify conditional compilation

Use CONFIG_IMX8M, so it apply to imx8mq/mm/mn

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomtd: mxs_nand: fix the gf_13/14 definition issue
Han Xu [Mon, 4 May 2020 14:08:58 +0000 (22:08 +0800)]
mtd: mxs_nand: fix the gf_13/14 definition issue

gf_13/14 mask was not set correctly in register definition.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomtd: nand: mxs_nand: add i.MX6QP compatible string
Han Xu [Mon, 4 May 2020 14:08:57 +0000 (22:08 +0800)]
mtd: nand: mxs_nand: add i.MX6QP compatible string

add the dedicate compatible string for i.MX6QP

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomxs_nand: Update compatible string for i.MX6SX
Ye Li [Mon, 4 May 2020 14:08:56 +0000 (22:08 +0800)]
mxs_nand: Update compatible string for i.MX6SX

The iMX6SX uses compatible string "fsl,imx6sx-gpmi-nand" for gpmi
node in DTS, so update the driver for the string

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonand: Update SPL MXS NAND mini driver
Ye Li [Mon, 4 May 2020 14:08:55 +0000 (22:08 +0800)]
nand: Update SPL MXS NAND mini driver

Update the mini driver to add support for getting ecc info from ONFI and
support read image data from page unaligned NAND address.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomxs_nand: Add support for i.MX8M
Ye Li [Mon, 4 May 2020 14:08:54 +0000 (22:08 +0800)]
mxs_nand: Add support for i.MX8M

Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonand: mxs: correct bitflip for erased NAND page
Peng Fan [Mon, 4 May 2020 14:08:53 +0000 (22:08 +0800)]
nand: mxs: correct bitflip for erased NAND page

This patch is a porting of
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/
commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38
"
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
bitflip number for erased NAND page. So for these two platform, set the
erase threshold to gf/2 and if bitflip detected, GPMI driver will
correct the data to all 0xFF.

Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
with the one for i.MX6QP.
"

In this patch, i.MX6UL is added and threshold changed to use ecc_strength.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonand: mxs: fix the bitflips for erased page when uncorrectable error
Peng Fan [Mon, 4 May 2020 14:08:52 +0000 (22:08 +0800)]
nand: mxs: fix the bitflips for erased page when uncorrectable error

This patch is porting from linux:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/
?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768

"
We may meet the bitflips in reading an erased page(contains all 0xFF),
this may causes the UBIFS corrupt, please see the log from Elie:

-----------------------------------------------------------------
[    3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[    3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[    3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[    3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes
...
[    4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815
[    4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383
[    4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383
-----------------------------------------------------------------

This patch does a check for the uncorrectable failure in the following steps:

   [0] set the threshold.
       The threshold is set based on the truth:
       "A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH
        do the ECC."

        For the sake of safe, we will set the threshold with half the gf_len, and
        do not make it bigger the ECC strength.

   [1] count the bitflips of the current ECC chunk, assume it is N.

   [2] if the (N <= threshold) is true, we continue to read out the page with
       ECC disabled. and we count the bitflips again, assume it is N2.
       (We read out the whole page, not just a chunk, this makes the check
        more strictly, and make the code more simple.)

   [3] if the (N2 <= threshold) is true again, we can regard this is a erased
       page. This is because a real erased page is full of 0xFF(maybe also has
       several bitflips), while a page contains the 0xFF data will definitely
       has many bitflips in the ECC parity areas.

   [4] if the [3] fails, we can regard this is a page filled with the '0xFF'
       data.
"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomtd: gpmi: provide the option to use legacy bch geometry
Ye Li [Mon, 4 May 2020 14:08:51 +0000 (22:08 +0800)]
mtd: gpmi: provide the option to use legacy bch geometry

Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.

NOTICE: The feature must be enabled/disabled in both u-boot and kernel.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomtd: gpmi: change the BCH layout setting for large oob NAND
Ye Li [Mon, 4 May 2020 14:08:50 +0000 (22:08 +0800)]
mtd: gpmi: change the BCH layout setting for large oob NAND

The code change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes) and proposed a new
way to set ECC layout.

Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.

The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is

1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.

2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.

Previous code has two methods for ECC layout setting, the
legacy_calc_ecc_layout and calc_ecc_layout_by_info, the difference
between these two methods is, legacy_calc_ecc_layout set the chunk size
larger chan oob size and then set the maximum ECC strength that oob can
afford. While the calc_ecc_layout_by_info set chunk size and ECC
strength according to NAND spec. It has been proved that the first
method cannot provide safe ECC strength for some modern NAND chips, so
in current code,

1. Driver read NAND parameters first and then chose the proper ECC
layout setting method.

2. If the oob is large or NAND required data chunk larger than oob size,
chose calc_ecc_for_large_oob, otherwise use calc_ecc_layout_by_info

3. legacy_calc_ecc_layout only used for some NAND chips does not contains
necessary information. So this is only a backup plan, it is NOT
recommended to use these NAND chips.

Signed-off-by: Han Xu <b45815@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomisc: scu: Increase the timeout for MU communication
Ye Li [Sun, 3 May 2020 14:31:47 +0000 (22:31 +0800)]
misc: scu: Increase the timeout for MU communication

When power on some sources in Video system, current timeout 10ms is
too short and returns before SCU response. So increase the timeout
to 1s.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agomisc: fuse: Update imx8 fuse driver for 8QM
Ye Li [Sun, 3 May 2020 14:31:46 +0000 (22:31 +0800)]
misc: fuse: Update imx8 fuse driver for 8QM

Add the second ECC fuse area for 8QM which is different with 8QXP

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: cpu: support tmu
Peng Fan [Sun, 3 May 2020 14:19:57 +0000 (22:19 +0800)]
imx: cpu: support tmu

Support tmu when print cpu info

Signed-off-by: peng Fan <peng.fan@nxp.com>
4 years agoimx: regs: add more fuse bank structure
Peng Fan [Sun, 3 May 2020 14:19:56 +0000 (22:19 +0800)]
imx: regs: add more fuse bank structure

Add more fuse bank structure for use.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mp: Set default SNSR25C for TMU probe1
Ye Li [Sun, 3 May 2020 14:19:55 +0000 (22:19 +0800)]
imx8mp: Set default SNSR25C for TMU probe1

So far u-boot only load SNSR25C for TMU main probe (probe 0). However,
kernel enables two probes. So it also needs to set default SNSR25C of
TCALIV1 for blank samples.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: load calibration parameters from fuse for i.MX8MP
Ye Li [Sun, 3 May 2020 14:19:54 +0000 (22:19 +0800)]
imx: load calibration parameters from fuse for i.MX8MP

i.MX8MP thermal which has two probes and supports temperature range
from -40 to 125.  The driver still uses default 1p HW
calibration at 25C and loads calibration parameters from fuse.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: i.MX8MN: Enable loading TASR and TCALIV from fuse
Ye Li [Sun, 3 May 2020 14:19:53 +0000 (22:19 +0800)]
imx: i.MX8MN: Enable loading TASR and TCALIV from fuse

Like iMX8MM, iMX8MN also needs SW to load TMU TASR and TCALIV registers
value from fuse before enabling TMU calibration. Otherwise the calibration
is not exact.

Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mm: Load fuse for TMU TCALIV and TASR
Ye Li [Sun, 3 May 2020 14:19:52 +0000 (22:19 +0800)]
imx8mm: Load fuse for TMU TCALIV and TASR

On iMX8MM, the default value of TMU registers TCALIV and TASR need
be loaded from fuse. HW won't do this, it expect SW loads them before
using TMU.

Reviewed-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agothermal: imx_tmu: support i.MX8MP
Peng Fan [Sun, 3 May 2020 14:19:51 +0000 (22:19 +0800)]
thermal: imx_tmu: support i.MX8MP

Support i.MX8MP thermal which has two probes and supports
temperature range from -40 to 125. Still uses default 1p HW
calibration at 25C and loads calibration parameters from fuse.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agothermal: imx_tmu: Check the TEMP range for iMX8MM
Peng Fan [Sun, 3 May 2020 14:19:50 +0000 (22:19 +0800)]
thermal: imx_tmu: Check the TEMP range for iMX8MM

On iMX8MM, the V flag in TRISTR register only reflect the state of SNSR
value, not the calibrated TEMP value. So checking this flag is not
reliable. Per IC suggestion, change to read the TEMP/AVG_TEMP directly
and check whether it in valid range 10-125C.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agothermal: imx_tmu: Fix for temperature out of range
Peng Fan [Sun, 3 May 2020 14:19:49 +0000 (22:19 +0800)]
thermal: imx_tmu: Fix for temperature out of range

When the temperature is out of sensor's range, the Valid bit won't be
set in TRITSR register. So the polling loop won't go out.

Change the codes to retry 10 times with 100ms interval for the Valid bit.
If the timeout, we give a warning for the invalid data.

Modifed from Ye's NXP patch

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agothermal: imx_tmu: support TMU arch level initialization
Peng Fan [Sun, 3 May 2020 14:19:48 +0000 (22:19 +0800)]
thermal: imx_tmu: support TMU arch level initialization

i.MX8MM TMU needs to load some registers from fuse, this is arch
dependent operation and may vary on different platforms. So add
a interface for arch level initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agothermal: imx_tmu: Add support for thermal sensor on iMX8MM
Peng Fan [Sun, 3 May 2020 14:19:47 +0000 (22:19 +0800)]
thermal: imx_tmu: Add support for thermal sensor on iMX8MM

The analog sensors on iMX8MM are new, used for 14LPP process. So the
Temperature Sensor Monitoring Unit (TMU) has some change accordingly.
We use version 2 in TMU driver to represent the new TMU, so the one
driver can service for both i.MX8MQ/M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agothermal: Add thermal driver for i.MX8M
Peng Fan [Sun, 3 May 2020 14:19:46 +0000 (22:19 +0800)]
thermal: Add thermal driver for i.MX8M

The driver is ported form Linux Kernel and support driver model.
Users need to provide the tmu node and sensors nodes in DTB.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agothermal: imx_scu_thermal: Update driver for i.MX8QM thermal sensor
Ye Li [Sun, 3 May 2020 14:19:45 +0000 (22:19 +0800)]
thermal: imx_scu_thermal: Update driver for i.MX8QM thermal sensor

Add iMX8QM thermal compatible string and its driver data.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoeQos: Implement the read_rom_hwaddr callback
Ye Li [Sun, 3 May 2020 14:41:20 +0000 (22:41 +0800)]
eQos: Implement the read_rom_hwaddr callback

Implement the read_rom_hwaddr callback to load MAC address from fuse
for imx8m platforms.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agofec: Move imx_get_mac_from_fuse declare to imx file
Ye Li [Sun, 3 May 2020 14:41:19 +0000 (22:41 +0800)]
fec: Move imx_get_mac_from_fuse declare to imx file

imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp,
we have two different ENET controllers and both need to call this
function. So decouple its declare from fec driver.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonet: eqos: implement callbaks to get interface and set txclk rate
Fugang Duan [Sun, 3 May 2020 14:41:18 +0000 (22:41 +0800)]
net: eqos: implement callbaks to get interface and set txclk rate

Implement the callbacks to get phy mode interface and txclk
rate configuration.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonet: dwc_eth_qos: add dwc eqos for imx support
Fugang Duan [Sun, 3 May 2020 14:41:17 +0000 (22:41 +0800)]
net: dwc_eth_qos: add dwc eqos for imx support

Add dwc eqos for imx support.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agonet: phy: realtek: add rx delay support for RTL8211F
Fugang Duan [Sun, 3 May 2020 14:41:16 +0000 (22:41 +0800)]
net: phy: realtek: add rx delay support for RTL8211F

Add RX delay enable support for RTL8211F PHY.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>