Mario Six [Mon, 6 Aug 2018 08:23:33 +0000 (10:23 +0200)]
test: Add tests for sysreset_get_status
Add some tests for sysreset_get_status.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 6 Aug 2018 08:23:32 +0000 (10:23 +0200)]
sysreset: Add get_status method
It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).
As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 6 Aug 2018 08:23:31 +0000 (10:23 +0200)]
powerpc: Add read*_*/write*_* macros
Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 6 Aug 2018 08:23:30 +0000 (10:23 +0200)]
ram: Add driver for MPC83xx
Add a RAM driver for the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Bin Meng [Fri, 3 Aug 2018 06:58:03 +0000 (23:58 -0700)]
sandbox: Enable bitrev library build
Imply CONFIG_BITREVERSE for Sandbox.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 06:58:02 +0000 (23:58 -0700)]
lib: bitrev: Sync with Linux kernel v4.17
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Shevchenko [Mon, 3 Sep 2018 09:08:10 +0000 (12:08 +0300)]
sandbox: Build with -fPIC
Sandbox is not a real bootloader and it does require
a position independent code to be supported.
Thus, build it with -fPIC explicitly.
Fixes:
16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sun, 16 Sep 2018 14:32:33 +0000 (10:32 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-coldfire
Tom Rini [Sun, 16 Sep 2018 14:30:16 +0000 (10:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sun, 16 Sep 2018 14:29:47 +0000 (10:29 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sun, 16 Sep 2018 14:29:39 +0000 (10:29 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
Angelo Dureghello [Thu, 25 Jan 2018 21:42:52 +0000 (22:42 +0100)]
m68k: ColdFire mcf5441x, add eSDHC support
This patch adds mcf5441x eSDHC support for the mcf5441x family.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Angelo Dureghello [Sat, 4 Aug 2018 21:02:56 +0000 (23:02 +0200)]
m68k: fix multiple memory accesses on swap operations
On a
u32 val = __sw32(*addr);
multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Angelo Dureghello [Sun, 4 Feb 2018 20:13:12 +0000 (21:13 +0100)]
m68k: fix mcf5441x total interrupt number
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Marek Vasut [Fri, 24 Aug 2018 20:36:18 +0000 (22:36 +0200)]
ARM: rmobile: Repair TMU clock on Gen2
The Gen2 TMU is fed with fixed 32.5 MHz signal from CP .
This is then divided by 4 in TMU. Fix the timer clock
setting in Gen2.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:52:53 +0000 (21:52 +0200)]
sh: tmu: Zap get_tbclk and timer_read_counter
Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:43:17 +0000 (21:43 +0200)]
sh: tmu: Clean up register usage
The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:37:14 +0000 (21:37 +0200)]
sh: tmu: Inline sh_tmu.h
The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:34:07 +0000 (21:34 +0200)]
sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:29:04 +0000 (21:29 +0200)]
sh: tmu: Inline get_tmu0_clk_rate()
This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant
directly instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:23:04 +0000 (21:23 +0200)]
sh: tmu: Inline tmu_timer_{start,stop}()
These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:20:31 +0000 (21:20 +0200)]
sh: tmu: Simplify the tmu_bit math
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0.
Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Fri, 24 Aug 2018 19:19:15 +0000 (21:19 +0200)]
sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIV
This constant is always 4 , for all boards that exist. Define it
once in arch/sh/lib/time.c and remove it from the configs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Tue, 28 Aug 2018 09:44:44 +0000 (11:44 +0200)]
sh: sh7724: Drop EDMR macro
Drop the macro as it is never used and it collides with sh_eth.h macros.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 29 Aug 2018 01:18:30 +0000 (03:18 +0200)]
sh: sh7723: ap325rxa: Drop duplicate HIZCRB macro
Drop the macro as it is defined in sh7723.h already.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Patrice Chotard [Tue, 4 Sep 2018 09:37:25 +0000 (11:37 +0200)]
usb: ehci-generic: Add vbus-supply regulator support
Add vbus-supply regulator support.
On some board vbus is not controlled by the phy but by
an external regulator.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Dalon Westergreen [Wed, 12 Sep 2018 00:25:00 +0000 (17:25 -0700)]
arm: socfpga: stratix10: Add CONFIG_OF_EMBED
The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.
This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now
also includes the dtb.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Dalon Westergreen [Tue, 11 Sep 2018 17:06:14 +0000 (10:06 -0700)]
socfpga: stratix10: fix sdram_calculate_size
Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Dalon Westergreen [Mon, 10 Sep 2018 17:28:48 +0000 (10:28 -0700)]
arm: socfpga: stratix10: add CONFIG_SPL_TARGET
Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory. This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Dalon Westergreen [Mon, 10 Sep 2018 17:28:47 +0000 (10:28 -0700)]
common: add spl/u-boot-spl.hex target
Some devices, namely Intel's stratix10 SoC, require u-boot-spl in
a hex format. This patch adds spl/u-boot-spl.hex as a possible
target.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Ley Foon Tan [Wed, 15 Aug 2018 18:05:54 +0000 (02:05 +0800)]
gpio: dwapb_gpio: Change to use dev_read_addr()
This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Tue, 4 Sep 2018 06:04:58 +0000 (14:04 +0800)]
gpio: dwapb_gpio: Add reset ctrl to driver
Add code to reset all reset signals as in gpio DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Thu, 16 Aug 2018 05:46:30 +0000 (13:46 +0800)]
gpio: dwapb_gpio: Enable get_function support
Enabled get_function support for dwapb where the function will
return the state of GPIO port.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tom Rini [Fri, 14 Sep 2018 17:54:37 +0000 (13:54 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Fri, 14 Sep 2018 17:52:08 +0000 (13:52 -0400)]
Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"
This commit is breaking several variants of da850, so:
This reverts commit
5f389201dece76b484443773dce2525dc205f5a1.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 14 Sep 2018 17:41:31 +0000 (13:41 -0400)]
am3517_evm: Drop inadvertently added line
I added in the CONFIG_MISC_INIT_R line by mistake when applying the
previous patch, fix.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 14 Sep 2018 13:33:01 +0000 (09:33 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
Stefan Roese [Thu, 9 Aug 2018 07:09:20 +0000 (09:09 +0200)]
fs: ubifs: Add missing newlines in super.c
I just stumbled over some cluttered UBIFS messages. It seems some
newline chars are missing in the current U-Boot UBI source.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Tuomas Tynkkynen [Wed, 15 Aug 2018 23:08:11 +0000 (02:08 +0300)]
i2c: Drop CONFIG_SYS_I2C_MXS
Last user of this driver went away in May 2017, in
commit
eb5ba3aefdf0f6 ("i2c: Drop use of CONFIG_I2C_HARD")
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Adam Ford [Mon, 3 Sep 2018 08:47:52 +0000 (03:47 -0500)]
MMC: davinici_mmc: Enable CD and WP with DM and OF_CONTROL
When used with a device tree, this will extract the card detect
and write protect pins from the device tree and configure them
accordingly. This assumes the GPIO_ACTIVE_LOW/HIGH is supported
by da8xx_gpio.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 19 Aug 2018 16:11:03 +0000 (11:11 -0500)]
ARM: am3517_evm: Disable DM_I2C_COMPAT
DM_I2C_COMPAT is somehow being enabled outside of Kconfig, so
this explicitly undefines it in the header file, and brackets
the I2C initialization around an #ifdef to not manually
initialize the I2C controller when the DM_I2C is enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Adam Ford [Sun, 19 Aug 2018 16:11:02 +0000 (11:11 -0500)]
Configs: am3517_evm: Remove TWL4030 reference
This SOM and kit do not nor have they ever had a twl4030 PMIC.
This patch removes the references to it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 3 Sep 2018 19:05:41 +0000 (14:05 -0500)]
ARM: omap3_logic: Enable DM_PMIC and DM_REGULATOR
Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO
gives us the ability to better monitor voltages and enable
hardware through the device tree. The TL4030 (TPS65950) is
not yet migrated to DM, so this patch only enables the fixed
and GPIO controlled regulators.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Tue, 14 Aug 2018 02:09:17 +0000 (21:09 -0500)]
ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Thu, 9 Aug 2018 11:15:14 +0000 (06:15 -0500)]
ARM: davinci: omapl138_lcdk: Enable DM_MMC
With DM_MMC now available, this patch enables DM_MMC for the
omapl138_lcdk in U-Boot and keeps the older style for SPL.
Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Thu, 9 Aug 2018 11:15:13 +0000 (06:15 -0500)]
ARM: davinci: da850evm: Support DM_MMC
With the updated driver available to support DM_MMC, this patch
enables DM_MMC for da850evm.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Thu, 9 Aug 2018 11:15:12 +0000 (06:15 -0500)]
MMC: Enable DM_MMC for Davinci
With CONFIG_BLK becoming a requirement, the Davinci MMC driver
needs to be updated with DM_MMC support. Since SPL is tiny and
many boards do not support DM in SPL, this retains the backwards
compatibility for those boards who need to initialize MMC manually
in SPL.
Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 3 Sep 2018 18:56:47 +0000 (13:56 -0500)]
ARM: omap3_logic: Enable Pinctrl
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Tue, 21 Aug 2018 15:43:30 +0000 (10:43 -0500)]
ARM: omap3_logic_defconfig: Convert to DM_SPL
The OF_CONTROL and OF_PLATDATA are not really useful without DM.
This patch supports DM_SPL, but it requires manual references
both Serial and MMC.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Tue, 21 Aug 2018 12:16:56 +0000 (07:16 -0500)]
mmc: omap_hsmmc: Make DM_GPIO calls dependent on DM_GPIO
The getcd and getwp functions when DM_MMC is enabled are
assumming the DM_GPIO is enabled. In cases (like SPL) where
DM_GPIO may not be enabled, wrap these calls in an #ifdef
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Tue, 21 Aug 2018 01:43:00 +0000 (20:43 -0500)]
DM: serial: ti_omap3_common: Don't define serial unless !DM_SERIAL
The serial port was being manually configured during SPL build,
however in preparation to allow DM in SPL, this needs to change
to be based on whether or not DM_SERIAL is enabled because, soon
the assumption that SPL means no DM may not be accurate.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Tue, 21 Aug 2018 01:34:00 +0000 (20:34 -0500)]
ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabled
boot-common.c checks to see if I2C is enabled in SPL, but
it doens't check for DM_I2C before initializing it. This
will now only initialize the I2C is the DM_I2C is not enabled
to avoid initializing it more than once.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Tue, 21 Aug 2018 01:27:48 +0000 (20:27 -0500)]
DM: omap_gpio: Reduce overhead when used with OF_PLATDATA
Platforms with limited resources in SPL may enable OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree. This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Tue, 21 Aug 2018 01:24:35 +0000 (20:24 -0500)]
DM: OMAP24XX_I2C: Reduce overhead when used with OF_PLATDATA
Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree. This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Tue, 21 Aug 2018 01:24:34 +0000 (20:24 -0500)]
DM: I2C: Reduce overhead when used with OF_PLATDATA
Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree. This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 20 Aug 2018 01:54:00 +0000 (20:54 -0500)]
regulator: pbias: Add additional compatible flags
The driver was developed with references for more than just
dra7, but never included. At least for omap3, this appears
to be functional.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Fri, 17 Aug 2018 19:37:58 +0000 (14:37 -0500)]
GPIO: omap_gpio: Fix gpio name names with device tree
The GPIO bank numbers do not appear in the device tree, so this
patch makes the gpio name based on the address
(ie gpio@49054000_31 vs gpio4_31)
adam
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Adam Ford [Fri, 17 Aug 2018 14:32:39 +0000 (09:32 -0500)]
ARM: dts: da850-evm-u-boot: Remove redundant entries
With the re-sync from Linux 4.18, several entries in
da850-evm-u-boot.dtsi are no longer necessary, so this patch
removes them.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Fri, 17 Aug 2018 13:56:15 +0000 (08:56 -0500)]
arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Fri, 17 Aug 2018 04:21:57 +0000 (23:21 -0500)]
dm: gpio: da8xx_gpio: Add support for GPIO_ACTIVE_LOW/HIGH
With DM and device tree support, let's use the GPIO_ACTIVE_HIGH
and GPIO_ACTIVE_LOW from the device tree as they are intended.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Fri, 17 Aug 2018 04:13:34 +0000 (23:13 -0500)]
DM: GPIO: Fix da8xx GPIO indexing over GPIO 32
The GPIO banks are broken up into two 16-bit registers for each
bank set. Unfortunately, the math that determines how to shift
blindly shifted by the number of the gpio. This worked for gpio
numbers under 32, but higher gpio's are broken. This fixes the
gpio index, so the bank is passed and the shift amount within
the register is passed now instead of the gpio number.
Fixes:
8e51c0f25406("dm: gpio: Add DM compatibility to
GPIO driver for Davinci")
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Wed, 15 Aug 2018 18:22:03 +0000 (13:22 -0500)]
ARM: configs: Add da850evm_nand to boot from NAND
The DA850-EVM supports booting from NAND when used with the
UI expander board. da850evm_nand will create an ais file
that can be burned to NAND and booted while storing the env in
NAND along with some partitions tables for storing kernel,
dtb and rootfs in NAND.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Tue, 14 Aug 2018 01:44:08 +0000 (20:44 -0500)]
ARM: da850evm_direct_nor: Enable CONFIG_BLK
At least for now, CONFIG_BLK is working, but this variant of
the da850evm doesn't need/support SPL so it's OK to enable it
here.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tom Rini [Tue, 11 Sep 2018 12:50:10 +0000 (08:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Tue, 11 Sep 2018 12:49:21 +0000 (08:49 -0400)]
Merge tag 'fpga-for-v2018.11' of git://git.denx.de/u-boot-microblaze
FPGA changes for v2018.11
- add fpga tests to cover fpga commands
- fpga Kconfig cleanup
- fix cmd/fpga.c
- add support for missing fpga loadmk commands
- add fpga fragment to MAINTAINERS
Lokesh Vutla [Mon, 27 Aug 2018 10:29:10 +0000 (15:59 +0530)]
configs: am65x_evm_a53: Add initial support
Add initial defconfig support for AM65x that runs on A53.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:29:09 +0000 (15:59 +0530)]
arm64: dts: k3: Add u-boot specific nodes
Add the minimum dt nodes required to boot. These nodes
will get deleted as kernel gets these nodes added in the
main dts files.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:29:08 +0000 (15:59 +0530)]
arm64: dts: k3: Add Support for AM654 SoC
Add initial DT support for AM654 EVM that runs on A53.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:29:07 +0000 (15:59 +0530)]
include: am654_evm: Establish initial environment for SD card boot
Create a basic U-Boot environment that allows the automatic loading
of a Linux Kernel located at /boot/Image and an associated device tree
blob located at /boot/k3-am654-base-board.dtb from the secondary
partition of an ext4-formatted SD card on the AM654x EVM. Furthermore
the boot.scr and uEnv.txt detection and loading schemes are supported
in a manner already known from other TI platforms.
Note that this is intended to be a starting point to enable initial
board use and will most certainly get extended and refactored as
different boot media become available.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:29:06 +0000 (15:59 +0530)]
board: ti: am654: a53: Add initial support for am654
Add initial support for AM654 based EVM running on A53. Enable
4GB of DDR available on the EVM so that kernel DTB file
can be updated accordingly.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Andreas: Added 4GB ddr support]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:55 +0000 (15:57 +0530)]
gpio: do not include <asm/arch/gpio.h> for ARCH_K3
As no gpio.h is defined in arch/arm/mach-k3/include/,
to avoid compilation failure, do not include asm/arch/gpio.h.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:54 +0000 (15:57 +0530)]
mmc: k3_arasan: Add sdhci driver support for K3 family SoCs
AM654 has an arasan sdhci controller and a mmc phy attached to it.
Add basic support for K3 specific arasan sdhci controller.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:53 +0000 (15:57 +0530)]
spl: Allow remoteproc drivers to be used within SPL
Add an option for building remoteproc drivers within SPL.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:52 +0000 (15:57 +0530)]
remoteproc: Introduce K3 remoteproc driver
Add support for K3 based remoteproc driver that
communicates with TISCI to start start a remote processor.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:51 +0000 (15:57 +0530)]
remoteproc: Introduce K3 system controller
K3 specific SoCs have a dedicated microcontroller for doing
resource management. Any HLOS/firmware on compute clusters should
load a firmware to this microcontroller before accessing any resource.
Adding support for loading this firmware.
After the K3 system controller got loaded with firmware and started
up it sends out a boot notification message through the secure proxy
facility using the TI SCI protocol. Intercept and receive this message
through the rproc start operation which will need to get invoked
explicitly after the firmware got loaded.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:50 +0000 (15:57 +0530)]
remoteproc: Allow for individual remoteproc initialization
Existing rproc_init() api tries to initialize all available
remoteproc devices. This will fail when there is dependency
among available remoteprocs. So introduce a separate api
that allows to initialize remoteprocs individually based
on id.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:49 +0000 (15:57 +0530)]
spl: Allow mailbox drivers to be used within SPL
Add an option for building mailbox drivers within SPL.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:48 +0000 (15:57 +0530)]
mailbox: Introduce K3 Secure Proxy Driver
Secure Proxy module manages hardware threads that are meant
for communication between the processor entities. Adding
support for this driver.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:47 +0000 (15:57 +0530)]
mailbox: Allow attaching private data for mbox_chan
Sometimes mbox controllers wants to store private data in
mbox_chan so that it can be used at a later point of time.
Adding support for hooking private data.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:46 +0000 (15:57 +0530)]
sysreset: Add TI System Control Interface (TI SCI) sysreset driver
Devices from the TI K3 family of SoCs like the AM654x contain a Device
Management and Security Controller (SYSFW) that manages the low-level
device control (like clocks, resets etc) for the various hardware
modules present on the SoC. These device control operations are provided
to the host processor OS through a communication protocol called the TI
System Control Interface (TI SCI) protocol.
This patch adds a system reset driver that communicates to the system
controller over the TI SCI protocol for allowing to perform a system-
wide SoC reset.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:45 +0000 (15:57 +0530)]
power domain: Introduce TI System Control Interface (TI SCI) power domain driver
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.
This patch adds a power domain driver that communicates to the system
controller over the TI SCI protocol for performing power management of
various devices present on the SoC. Various power domain functionalities
are achieved by the means of different TI SCI device operations provided
by the TI SCI framework.
This code is loosely based on the drivers/soc/ti/ti_sci_pm_domains.c
driver of the Linux kernel.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:44 +0000 (15:57 +0530)]
power domain: Add support for multiple powerdomains per device
There are cases where there are more than one power domain
attached to the device inorder to get the device functional.
So add support for enabling power domain based on the index.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:43 +0000 (15:57 +0530)]
clk: Introduce TI System Control Interface (TI SCI) clock driver
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.
This patch adds a clock driver that communicates to the system
controller over the TI SCI protocol for performing clock management of
various devices present on the SoC. Various clock functionality is
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.
This code is loosely based on the drivers/clk/keystone/sci-clk.c driver
of the Linux kernel.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:42 +0000 (15:57 +0530)]
clk: Extend clock control with an optional data field
Some systems require more than a single ID to identify and configure any
clock provider. For those scenarios add an optional data field to the
clock control structure.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:41 +0000 (15:57 +0530)]
reset: Introduce TI System Control Interface (TI SCI) reset driver
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.
This patch adds a reset driver that communicates to the system
controller over the TI SCI protocol for performing reset management of
various devices present on the SoC. Various reset functionalities are
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.
This code is loosely based on the drivers/reset/reset-ti-sci.c driver of
the Linux kernel.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:40 +0000 (15:57 +0530)]
reset: Extend reset control with an optional data field
Some systems require more than a single ID to identify and configure any
reset provider. For those scenarios add an optional data field to the
reset control structure.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:39 +0000 (15:57 +0530)]
dm: reset: Update uclass to allow querying reset status
Add a reset operations function pointer to support querying the current
status of a reset control.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:38 +0000 (15:57 +0530)]
dm: firmware: Automatically bind child devices
To support scenarios where a firmware device node has subnodes that
have their own drivers automatically scan the DT and bind those when
the firmware device gets bound.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:37 +0000 (15:57 +0530)]
firmware: ti_sci: Add support for processor control services
TI-SCI message protocol provides support for controlling of various
physical cores available in SoC. In order to control which host is
capable of controlling a physical processor core, there is a processor
access control list that needs to be populated as part of the board
configuration data.
Introduce support for the set of TI-SCI message protocol apis that
provide us with this capability of controlling physical cores.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:36 +0000 (15:57 +0530)]
firmware: ti_sci: Add support for reboot core service
Since system controller now has control over SoC power management, it
needs to be explicitly requested to reboot the SoC. Add support for
it.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:35 +0000 (15:57 +0530)]
firmware: ti_sci: Add support for clock control
In general, we expect to function at a device level of abstraction,
however, for proper operation of hardware blocks, many clocks directly
supplying the hardware block needs to be queried or configured.
Introduce support for the set of SCI message protocol support that
provide us with this capability.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:34 +0000 (15:57 +0530)]
firmware: ti_sci: Add support for device control
TI-SCI message protocol provides support for management of various
hardware entitites within the SoC. Introduce the fundamental
device management capability support to the driver protocol
as part of this change.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:33 +0000 (15:57 +0530)]
firmware: ti_sci: Add support for board configuration
TI-SCI message protocol provides support for board configuration
to assign resources and other board related operations.
Introduce the board configuration capability support to the driver protocol
as part of this change.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:32 +0000 (15:57 +0530)]
firmware: Add basic support for TI System Control Interface (TI SCI) protocol
Texas Instrument's System Control Interface (TI SCI) message protocol is
used in Texas Instrument's System on Chip (SoC) such as those in the K3
family AM654 SoC to communicate between various compute processors with
a central system controller entity.
The TI SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC using the
mailbox client.
This is mostly derived from the TI SCI driver in Linux located at
drivers/firmware/ti_sci.c.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:15 +0000 (15:57 +0530)]
armv8: K3: am654: Add support for generating build targets
Update Makefile to generate
- tispl.bin: First stage bootloader on ARMv8 core
- u-boot.img: Second stage bootloader on ARMv8 core.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:14 +0000 (15:57 +0530)]
armv8: K3: am654: Introduce FIT generator script
Add a script that is capable of generating a FIT image
source file that combines ATF, SPL(64 bit) and DT.
This combined image is used by R5 SPL and start ATF
on ARMv8 core.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:13 +0000 (15:57 +0530)]
armv8: K3: am654: Add custom MMU support
Add MMU mappings for AM654 SoC.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Mon, 27 Aug 2018 10:27:12 +0000 (15:57 +0530)]
arm: K3: am654: Unlock control module registers during init
By default the device control module registers are locked,
preventing any writes to its registers.
Unlock those registers as part of the init flow.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:11 +0000 (15:57 +0530)]
arm: K3: am654: Add support for boot device detection
AM654 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 27 Aug 2018 10:27:10 +0000 (15:57 +0530)]
arm: K3: Update _start instruction
On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and
expects to start executing from 0x0. In order to handle this ROM
updates the boot vector of R5 such that first 64 bytes of image load
address are mapped to 0x0.
In this case, it is SPL's responsibility to jump to the proper image
location. So, update the PC with address of reset vector(like how
other exception vectors are handled), instead of branching to reset.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>