oweals/u-boot.git
6 years agoarm: socfpga: stratix10: Fix mailbox urgent command with urgent register
Ley Foon Tan [Fri, 17 Aug 2018 08:22:03 +0000 (16:22 +0800)]
arm: socfpga: stratix10: Fix mailbox urgent command with urgent register

According to mailbox spec, software should send urgent command with
urgent register instead of COUT location. This patch write urgent
command index to urgent register.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoff
Ley Foon Tan [Fri, 17 Aug 2018 08:22:02 +0000 (16:22 +0800)]
arm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoff

Code checking and setting EMAC use fpga is in
populate_sysmgr_fpgaintf_module(). So, call to sysmgr_pinmux_init()
instead of populate_sysmgr_pinmux().
In sysmgr_pinmux_init(), it will call to both populate_sysmgr_pinmux()
and populate_sysmgr_fpgaintf_module().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Thu, 23 Aug 2018 02:36:08 +0000 (22:36 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

6 years agoMerge tag 'signed-efi-2018.09' of git://github.com/agraf/u-boot
Tom Rini [Tue, 21 Aug 2018 17:15:21 +0000 (13:15 -0400)]
Merge tag 'signed-efi-2018.09' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-08-21

A few fixes for 2018.09. Most noticable are:

  - unbreak x86 target (-fdata-section fallout)
  - fix undefined behavior in a few corner cases
  - make Jetson TX1 boot again
  - RTS fixes
  - implement reset for simple output

6 years agoARM: tegra: avoid more operations in non-secure world
Stephen Warren [Tue, 31 Jul 2018 18:39:07 +0000 (12:39 -0600)]
ARM: tegra: avoid more operations in non-secure world

A secure monitor that runs before U-Boot, and hence causes U-Boot to run
in non-secure world, must implement a few operations that U-Boot
otherwise implements when running in secure world. Fix U-Boot to skip
these operations when running in non-secure world. In particular:

- The secure monitor must provide the LP0 resume code and own LP0
  configuration in order to maintain security, so must initialize all
  the PMC scratch registers used by the boot ROM during LP0 resume.
  Consequently, U-Boot should not attempt to clear those registers,
  since the register accesses will fail or cause an error.

- The secure monitor owns system security, and so is responsible for
  configuring security-related items such as the VPR.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoarm: tegra: Restore host1x/dc dm-pre-reloc properties
Nicolas Chauvet [Wed, 11 Jul 2018 18:42:57 +0000 (20:42 +0200)]
arm: tegra: Restore host1x/dc dm-pre-reloc properties

Since commit f2faffecb016, tegra: Convert to use binman
the dm-pre-reloc properties are removed.

This leads U-Boot not to enable the display on paz00

This patch restore the dm-pre-reloc properties allowing
the bootloader to output to the display panel

v4: - Spell project name as appropriate
v3: - Fix few typos
v2: - Add more characters to commit hash

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agocmd: efi: Clarify calculation precedence for '&' and '?'
Eugeniu Rosca [Sat, 14 Jul 2018 20:53:32 +0000 (22:53 +0200)]
cmd: efi: Clarify calculation precedence for '&' and '?'

Fix cppcheck complaint:
[cmd/efi.c:173]: (style) Clarify calculation precedence for '&' and '?'.

Fixes: f1a0bafb5802 ("efi: Add a command to display the memory map")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi: Add EFI_MEMORY_{NV, MORE_RELIABLE, RO} attributes
Eugeniu Rosca [Sat, 14 Jul 2018 20:53:31 +0000 (22:53 +0200)]
efi: Add EFI_MEMORY_{NV, MORE_RELIABLE, RO} attributes

With this update, the memory attributes are in sync with Linux
kernel v4.18-rc4. They also match page 190 of UEFI 2.7 spec [1].

[1] http://www.uefi.org/sites/default/files/resources/UEFI_Spec_2_7.pdf

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi: Fix truncation of constant value
Eugeniu Rosca [Sat, 14 Jul 2018 20:53:30 +0000 (22:53 +0200)]
efi: Fix truncation of constant value

Starting with commit 867a6ac86dd8 ("efi: Add start-up library code"),
sparse constantly complains about truncated constant value in efi.h:

include/efi.h:176:35: warning: cast truncates bits from constant value (8000000000000000 becomes 0)

This can get quite noisy, preventing real issues to be noticed:

$ make defconfig
*** Default configuration is based on 'sandbox_defconfig'
$ make C=2 -j12 2>&1 | grep truncates | wc -l
441

After the patch is applied:
$ make C=2 -j12 2>&1 | grep truncates | wc -l
0
$ sparse --version
v0.5.2

Following the suggestion of Heinrich Schuchardt, instead of only
fixing the root-cause, I replaced the whole enum of _SHIFT values
by ULL defines. This matches both the UEFI 2.7 spec and the Linux
kernel implementation.

Some ELF size comparison before and after the patch (gcc 7.3.0):

efi-x86_payload64_defconfig:
text    data    bss     dec       hex   filename
407174  29432   278676  715282    aea12 u-boot.old
407152  29464   278676  715292    aea1c u-boot.new
-22     +32     0       +10

efi-x86_payload32_defconfig:
text    data    bss     dec       hex   filename
447075  30308   280076  757459    b8ed3 u-boot.old
447053  30340   280076  757469    b8edd u-boot.new
-22     +32     0       +10

Fixes: 867a6ac86dd8 ("efi: Add start-up library code")
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.Reset()
Heinrich Schuchardt [Thu, 5 Jul 2018 17:58:07 +0000 (19:58 +0200)]
efi_loader: EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.Reset()

Implement the reset service of the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.

This should resolve the error reported by the SCT in
Protocol/SimpleTextOut/BlackBoxTest/SimpleTextOutBBTestFunction_uefi.c:639

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 20 Aug 2018 17:41:56 +0000 (13:41 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 20 Aug 2018 17:41:37 +0000 (13:41 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agodisplay5: Introduce fitImg_fw_sz variable
Lukasz Majewski [Sat, 18 Aug 2018 20:22:07 +0000 (22:22 +0200)]
display5: Introduce fitImg_fw_sz variable

This cosmetic change allow easy adjustment of the to-load kernel size if
needed.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agoefi_selftest: correct block device unit test
Heinrich Schuchardt [Sun, 22 Jul 2018 06:06:57 +0000 (08:06 +0200)]
efi_selftest: correct block device unit test

The UEFI specification mandates that the create flag is only used in
conjunction with both the read and the write flag.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: document runtime functions
Heinrich Schuchardt [Sun, 29 Jul 2018 13:10:11 +0000 (15:10 +0200)]
efi_loader: document runtime functions

Add comments for runtime service functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: update runtime services table crc32
Heinrich Schuchardt [Sun, 29 Jul 2018 07:49:04 +0000 (09:49 +0200)]
efi_loader: update runtime services table crc32

The crc32 of the runtime services table must be updated after detaching.

efi_update_table_header_crc32() must be __efi_runtime. So move it to
efi_runtime.c

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agolib: crc32: mark function crc32() as __efi_runtime
Heinrich Schuchardt [Sun, 29 Jul 2018 07:49:03 +0000 (09:49 +0200)]
lib: crc32: mark function crc32() as __efi_runtime

The function crc32() is needed by the EFI subsystem at runtime. So it has
to be linked into the runtime section together with all dependencies.

Eliminate empty defines local and ZEXPORT.

Mark variables as static which are not exported.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: avoid NULL dereference in efi_get_memory_map()
Heinrich Schuchardt [Mon, 6 Aug 2018 20:28:18 +0000 (22:28 +0200)]
efi_loader: avoid NULL dereference in efi_get_memory_map()

We should only dereference parameter memory_map_size after checking that
it is valid.

Fixes: 8e835554b36b ("efi_loader: check parameters of GetMemoryMap")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoboard: sunxi: Remove unused local variables
Jagan Teki [Mon, 20 Aug 2018 11:43:15 +0000 (17:13 +0530)]
board: sunxi: Remove unused local variables

variables buf from board_mmc_init, and ret from misc_init_r
were unused on the functions, so remove it.

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoefi_loader: fix a parameter check at CreateEvent()
AKASHI Takahiro [Fri, 10 Aug 2018 06:36:32 +0000 (15:36 +0900)]
efi_loader: fix a parameter check at CreateEvent()

The commit 21b3edfc9644 ("efi_loader: check parameters of CreateEvent")
enforces a strict parameter check at CreateEvent(). On the other hand,
UEFI specification version 2.7, section 7.1, says:

    The EVT_NOTIFY_WAIT and EVT_NOTIFY_SIGNAL flags are exclusive. If
    neither flag is specified, the caller does not require any notification
    concerning the event and the NotifyTpl, NotifyFunction, and
    NotifyContext parameters are ignored.

So the check should be mitigated so as to comply with the specification.
Without this patch, EDK2's Shell.efi won't be started.

Fixes: 21b3edfc9644 ("efi_loader: check parameters of CreateEvent")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoriscv: Include bss subsections in linker script
Alexander Graf [Mon, 20 Aug 2018 12:25:49 +0000 (14:25 +0200)]
riscv: Include bss subsections in linker script

When we build with -fdata-sections we may end up with bss subsections. Our
linker script explicitly lists only a single consecutive bss section though.

Adapt the statement to also include subsections.

Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agox86: Enable -fdata-sections always
Alexander Graf [Mon, 20 Aug 2018 12:20:51 +0000 (14:20 +0200)]
x86: Enable -fdata-sections always

We left -fdata-sections disabled for x86_64 before because we encountered
random bugs that were at that time inexplicable.

Turns out this really was just side effects of missing .bss* statements
in the linker scripts. With those fixed, we can enable data sections for all
targets.

Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agox86: Include bss subsections in linker script
Alexander Graf [Mon, 20 Aug 2018 12:17:41 +0000 (14:17 +0200)]
x86: Include bss subsections in linker script

When we build with -fdata-sections we may end up with bss subsections. Our
linker script explicitly lists only a single consecutive bss section though.

Adapt the statement to also include subsections.

This fixes booting efi-x86_app_defconfig.

Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agosunxi: fix sid base address macro name for H6
Icenowy Zheng [Sat, 18 Aug 2018 05:36:44 +0000 (13:36 +0800)]
sunxi: fix sid base address macro name for H6

In the current H6 CPU memory space code, the SUNXI in the macro name of
the SID address base is wrongly spelled as SNUXI, which leads to SID
readout not working.

Fix this macro name.

Fixes: 55f6b1c351c9 ("sunxi: add basic memory map definitions of H6 SoC")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoconfigs: sun7i: Fix to use emmc dts for OLinuXino_MICRO-eMMC
Jagan Teki [Mon, 13 Aug 2018 17:29:40 +0000 (22:59 +0530)]
configs: sun7i: Fix to use emmc dts for OLinuXino_MICRO-eMMC

A20 OLinuXino Micro eMMC board has emmc with mmc2 slot
so use proper dts, sun7i-a20-olinuxino-micro-emmc.dts

Cc: Stefan Mavrodiev <stefan@olimex.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agodoc: FIT image: fix typo
Pierre-Jean Texier [Sat, 18 Aug 2018 13:51:25 +0000 (15:51 +0200)]
doc: FIT image: fix typo

Fix typo in beaglebone verified boot documentation.

Signed-off-by: Pierre-Jean Texier <texier.pj2@gmail.com>
6 years agocmd: Add dtimg command
Sam Protsenko [Thu, 16 Aug 2018 20:34:13 +0000 (23:34 +0300)]
cmd: Add dtimg command

dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.

This command is needed to provide Android boot with new Android DT image
format further.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agocommon: Add support for Android DT image
Sam Protsenko [Thu, 16 Aug 2018 20:34:12 +0000 (23:34 +0300)]
common: Add support for Android DT image

Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, this patch adds helper functions for
Android DTB/DTBO format. In image-android-dt.* files you can find helper
functions to work with Android DT image format, such us routines for:
    - printing the dump of image structure
    - getting the address and size of desired dtb/dtbo file

This patch uses dt_table.h file, that was added in commit 643cefa4d848
("Import Android's dt_table.h for DT image format") by Alex Deymo.

[1] https://source.android.com/devices/architecture/dto/partitions

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agofs/fat: debug-print file read position during file_fat_read_at()
Andreas Dannenberg [Tue, 14 Aug 2018 02:35:15 +0000 (21:35 -0500)]
fs/fat: debug-print file read position during file_fat_read_at()

In order to make the debug print in file_fat_read_at() a tad more useful,
show the offset the file is being read at alongside the filename.

Suggested-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agospl: fix debug print in spl_common_init()
Simon Goldschmidt [Mon, 13 Aug 2018 09:24:05 +0000 (11:24 +0200)]
spl: fix debug print in spl_common_init()

spl_common_init() debug-prints "spl_early_init()\n" but it is
called both from spl_early_init() and spl_init().

Fix this by moving the debug() statement to the calling functions
which now print their name.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agoARM: da8xxevm: README: Add NOR booting instructions
Adam Ford [Sat, 11 Aug 2018 12:34:55 +0000 (07:34 -0500)]
ARM: da8xxevm: README: Add NOR booting instructions

The da850evm with its UI expander board can boot XIP boot from
NOR flash.  This adds the instructions to the readme. file.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: da850evm: Enable SPL_SYS_MALLOC_SIMPLE
Adam Ford [Fri, 10 Aug 2018 21:07:47 +0000 (16:07 -0500)]
ARM: da850evm: Enable SPL_SYS_MALLOC_SIMPLE

The SPL space is limited.  In order to try to enable DM in SPL,
we need more space. When combined wtih TINY_PRINTF, this reduces
the size of SPL by 6.5k

Original:

   text    data     bss     dec     hex filename
  20760    1216      80   22056    5628 spl/u-boot-spl

Tiny Printf
   text    data     bss     dec     hex filename
  17947    1216      80   19243    4b2b spl/u-boot-spl

Malloc Simple + Tiny Printf
   text    data     bss     dec     hex filename
  15187     176      28   15391    3c1f spl/u-boot-spl

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: da850evm: Enable USE_TINY_PRINTF
Adam Ford [Fri, 10 Aug 2018 20:53:41 +0000 (15:53 -0500)]
ARM: da850evm: Enable USE_TINY_PRINTF

The SPL space is limited.  In order to try to enable DM in SPL,
we need more space. This reduces the size of SPL by ~2.7K

before:
   text    data     bss     dec     hex filename
  20760    1216      80   22056    5628 spl/u-boot-spl
after:
   text    data     bss     dec     hex filename
  17947    1216      80   19243    4b2b spl/u-boot-spl

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoconfigs: da850evm: Remove DM_I2C_COMPAT
Adam Ford [Fri, 10 Aug 2018 10:24:12 +0000 (05:24 -0500)]
configs: da850evm: Remove DM_I2C_COMPAT

Since using DM_I2C_COMPAT throws a warning during compilation,
and it isn't really needed any longer, so this patch removes
this feature and shrinks the code a bit.

from:
   text    data     bss     dec     hex filename
 343326   13388  123448  480162   753a2 u-boot

to:
   text    data     bss     dec     hex filename
 342924   13380  123440  479744   75200 u-boot

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoefi_loader: relocate pointer to tables
Heinrich Schuchardt [Sat, 4 Aug 2018 21:16:06 +0000 (23:16 +0200)]
efi_loader: relocate pointer to tables

When applying a virtual memory map we have to update the pointer to the
list of configuration tables.

Fixes: 4182a129ef73 ("efi_loader: allocate configuration table array")
Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoRevert "efi_loader: efi_allocate_pages is too restrictive"
Stephen Warren [Thu, 2 Aug 2018 17:45:57 +0000 (11:45 -0600)]
Revert "efi_loader: efi_allocate_pages is too restrictive"

This reverts commit aa909462d01866354f4cd4534db5f571c2cf1fbb. This change
caused "dhcp filename" to crash the system on p2371-2180 (Jetson TX1), for
example when running test/py.

Reverting this change isn't optimal, but at least restores TX1 to a working
state. In the future, we should:

a) Fix whatever problem causes the crash with this patch applied. This
needs further discussion, so isn't something we can immediately do.

b) Undo the revert; re-apply the original patch to efi_allocate_pages.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agosandbox: Move BSS after EFI sections
Alexander Graf [Mon, 6 Aug 2018 22:29:01 +0000 (00:29 +0200)]
sandbox: Move BSS after EFI sections

Something went wrong when writing the sandbox linker scripts and so we
ended up with a .bss section marker right before the efi runtime sections.

That obviously is a terrible idea, as it may result in overwriting efi
runtime code and data. So let's move the .bss identifier behind the efi
sections.

Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agox86: efi: payload: Add default TSC frequency in the device tree
Bin Meng [Fri, 10 Aug 2018 09:39:38 +0000 (02:39 -0700)]
x86: efi: payload: Add default TSC frequency in the device tree

It was observed sometimes U-Boot as the EFI payload fails to boot on
QEMU. This is because TSC calibration fails with no valid frequency.
This adds default TSC frequency in the device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: coreboot: Add default TSC frequency in the device tree
Bin Meng [Fri, 10 Aug 2018 09:39:37 +0000 (02:39 -0700)]
x86: coreboot: Add default TSC frequency in the device tree

It was observed sometimes U-Boot as the coreboot payload fails to
boot on QEMU. This is because TSC calibration fails with no valid
frequency. This adds default TSC frequency in the device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
6 years agox86: tsc: Try hardware calibration first
Bin Meng [Fri, 10 Aug 2018 09:39:36 +0000 (02:39 -0700)]
x86: tsc: Try hardware calibration first

At present if TSC frequency is provided in the device tree, it takes
precedence over hardware calibration result. This swaps the order to
try hardware calibration first and uses device tree as last resort.

This can be helpful when a generic dts (eg: coreboot/efi payload) is
supposed to work on as many hardware as possible, including emulators
like QEMU where TSC hardware calibration sometimes fails.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
6 years agox86: dts: Remove coreboot_fb.dtsi
Bin Meng [Fri, 10 Aug 2018 09:39:35 +0000 (02:39 -0700)]
x86: dts: Remove coreboot_fb.dtsi

There is no need to keep a separate coreboot_fb.dtsi since now we
have a generic coreboot payload dts.

While we are here, this also remove the out-of-date description in
the documentation regarding to coreboot framebuffer driver with
U-Boot loaded as a payload from coreboot. As the testing result with
QEMU 2.5.0 shows, the driver just works like a charm.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: Remove support for Advantech SOM-6896
Bin Meng [Fri, 10 Aug 2018 09:39:34 +0000 (02:39 -0700)]
x86: Remove support for Advantech SOM-6896

Now that we have generic coreboot payload support, remove the
dedicated support for Advantech SOM-6896.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: coreboot: Add generic coreboot payload support
Bin Meng [Fri, 10 Aug 2018 09:39:33 +0000 (02:39 -0700)]
x86: coreboot: Add generic coreboot payload support

Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.

But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
6 years agoMakefile: Don't generate position independent code
Andy Shevchenko [Mon, 6 Aug 2018 16:00:22 +0000 (19:00 +0300)]
Makefile: Don't generate position independent code

Since gcc-8 the --enable-default-pie starts producing code which assembler
can't translate in case of U-Boot. The build fails with

  {standard input}: Assembler messages:
  {standard input}:21100: Error: junk at end of line, first unrecognized character is `@'
  {standard input}:21120: Error: junk at end of line, first unrecognized character is `@'

and so on.

This is usually the case for x86 platform because in many cases it uses host
compiler from the Linux distributions, where PIE is enabled by default.
Previously (gcc-7 and earlier) that was a potential issue due to absence of
constructions like

  .long   end.5561@gotoff-start.5558@gotoff

which are a cause of above error messages in gcc-8.

Fix all these by disabling PIE on Makefile level.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
6 years agodrivers: regulator: fixed: add u-boot, off-on-delay-us
Peng Fan [Thu, 26 Jul 2018 11:47:24 +0000 (19:47 +0800)]
drivers: regulator: fixed: add u-boot, off-on-delay-us

Add u-boot,off-on-delay-us for fixed regulator.

Depends on board design, the gpio regulator sometimes
connects with a big capacitance. When need to off, then
on the regulator, if there is no enough delay,
the voltage does not drop to 0, so introduce this
property to handle such case.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoenv: Merge Rockchip, Sunxi, Zynq and ZynqMP
Michal Simek [Thu, 19 Jul 2018 06:45:45 +0000 (08:45 +0200)]
env: Merge Rockchip, Sunxi, Zynq and ZynqMP

There is no reason to have the same Kconfig options for different SoCs
separately. The patch is merging them together.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
[trini: Fix ENV_SIZE around ENV_IS_NOWHERE]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoConvert CONFIG_SYS_I2C_DAVINCI to Kconfig
Adam Ford [Fri, 10 Aug 2018 10:05:22 +0000 (05:05 -0500)]
Convert CONFIG_SYS_I2C_DAVINCI to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_I2C_DAVINCI

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoRemoved unused references to CONFIG_SERIALx
Adam Ford [Tue, 7 Aug 2018 12:08:32 +0000 (07:08 -0500)]
Removed unused references to CONFIG_SERIALx

After creating CONS_INDEX and migrating a bunch of boards to it,
there are a bunch of defined references to CONFIG_SERIALx which
are not referenced in any C code or #ifdef, so they can now be
removed

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoConvert CONFIG_TWL4030_LED et al to Kconfig
Adam Ford [Mon, 6 Aug 2018 19:26:50 +0000 (14:26 -0500)]
Convert CONFIG_TWL4030_LED et al to Kconfig

This converts the following to Kconfig:
   CONFIG_TWL4030_LED
   CONFIG_TWL4030_INPUT

This also removes dead references to:
   CONFIG_TWL4030_KEYPAD

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoConvert CONFIG_VIDEO_OMAP3 to Kconfig
Adam Ford [Thu, 2 Aug 2018 13:50:20 +0000 (08:50 -0500)]
Convert CONFIG_VIDEO_OMAP3 to Kconfig

This converts the following to Kconfig:
   CONFIG_VIDEO_OMAP3

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoConvert CONFIG_MISC_INIT_R to Kconfig
Adam Ford [Sun, 29 Jul 2018 18:13:29 +0000 (13:13 -0500)]
Convert CONFIG_MISC_INIT_R to Kconfig

This converts the following to Kconfig:
   CONFIG_MISC_INIT_R

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update the defaults logic slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMigrate bootlimit to Kconfig
Alex Kiernan [Sat, 21 Jul 2018 20:25:33 +0000 (20:25 +0000)]
Migrate bootlimit to Kconfig

Migrate boards which set bootlimit in the environment to Kconfig.

We exclude gurnard_defconfig which includes a bootlimit=, but doesn't set
CONFIG_BOOTCOUNT_LIMIT, so we'd fail to include a bootlimit setting
if we migrated it.

display5_defconfig and display5_factory_defconfig share a SYS_CONFIG_NAME,
but only display5_defconfig enables CONFIG_BOOTCOUNT_LIMIT, so we fail to
set bootlimit= in display5_factory_defconfig. This is okay because the
display5_factory_defconfig doesn't need to have it set, as it is only
meant to prepare the board in the factory.

Environment changes for all modified configs as seen from buildman:

  boards.cfg is up to date. Nothing to do.
  Summary of 3 commits for 32 boards (8 threads, 1 job per thread)
  01: Merge git://git.denx.de/u-boot-x86
         arm:  +   draco etamin rastaban pxm2 display5 thuban rut
  02: Add BOOTCOUNT_BOOTLIMIT to set reboot limit
  03: Migrate bootlimit to Kconfig
     - display5_factory: bootlimit=3

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
6 years agoAdd BOOTCOUNT_BOOTLIMIT to set reboot limit
Alex Kiernan [Sat, 21 Jul 2018 20:25:32 +0000 (20:25 +0000)]
Add BOOTCOUNT_BOOTLIMIT to set reboot limit

Add ability to set environment bootlimit from Kconfig

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
6 years agoConvert CONFIG_MII et al to Kconfig
Adam Ford [Sat, 21 Jul 2018 04:03:57 +0000 (23:03 -0500)]
Convert CONFIG_MII et al to Kconfig

This converts the following to Kconfig:
   CONFIG_MII
   CONFIG_DRIVER_TI_EMAC

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodts: Fix typo in OF_LIVE Kconfig help
Michal Simek [Fri, 17 Aug 2018 08:16:36 +0000 (10:16 +0200)]
dts: Fix typo in OF_LIVE Kconfig help

Fix typo in Kconfig description.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agokconfig: fix typo 'parition'
Simon Goldschmidt [Thu, 16 Aug 2018 07:44:55 +0000 (09:44 +0200)]
kconfig: fix typo 'parition'

Replaced misspelled words "parition"/"paritioning" (missing 't') in two
Kconfig files by correct words "partition"/"partitioning"

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Fri, 17 Aug 2018 11:25:04 +0000 (07:25 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Fri, 17 Aug 2018 11:24:34 +0000 (07:24 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

6 years agoconfigs: Migrate CONFIG_NR_DRAM_BANKS
Tom Rini [Thu, 16 Aug 2018 12:16:24 +0000 (08:16 -0400)]
configs: Migrate CONFIG_NR_DRAM_BANKS

We have the following cases:
- CONFIG_NR_DRAM_BANKS was defined, migrate normally
- CONFIG_NR_DRAM_BANKS_MAX was defined and then used for
  CONFIG_NR_DRAM_BANKS after a check, just migrate it over now.
- CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 +
  2), set this to 8.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoKconfig: Migrate CONFIG_NR_DRAM_BANKS
Ramon Fried [Mon, 13 Aug 2018 22:00:04 +0000 (01:00 +0300)]
Kconfig: Migrate CONFIG_NR_DRAM_BANKS

Move CONFIG_NR_DRAM_BANKS from headers to Kconfig.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
6 years agofdt_support: Use CONFIG_NR_DRAM_BANKS if necessary
Ramon Fried [Mon, 13 Aug 2018 21:35:42 +0000 (00:35 +0300)]
fdt_support: Use CONFIG_NR_DRAM_BANKS if necessary

If CONFIG_NR_DRAM_BANKS is bigger than the default
value (4) define MEMORY_BANKS_MAX as CONFIG_NR_DRAM_BANKS.

Fixes: 2a1f4f1758b5 ("Revert "fdt_support: Use CONFIG_NR_DRAM_BANKS if defined"")
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
6 years agoCONFIG_SYS_GENERIC_BOARD: Finish migration
Tom Rini [Thu, 16 Aug 2018 20:44:19 +0000 (16:44 -0400)]
CONFIG_SYS_GENERIC_BOARD: Finish migration

While we have long since migrated to CONFIG_SYS_GENERIC_BOARD being
enabled, we had just a few places left that still referenced or defined
it.  Update.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoarm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask
Ley Foon Tan [Wed, 15 Aug 2018 18:20:17 +0000 (02:20 +0800)]
arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask

Bitmask for EMAC should be bit-0, EMAC1 bit-8 and EMAC2 bit-16.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: rmobile: Enable USB PHY on Gen2
Marek Vasut [Wed, 8 Aug 2018 13:06:03 +0000 (15:06 +0200)]
ARM: rmobile: Enable USB PHY on Gen2

Enable support for USB PHY on the R-Car Gen2. This allows for both
of the USB host ports to be used on such boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agophy: rcar: Add R-Car Gen2 PHY driver
Marek Vasut [Sun, 5 Aug 2018 13:22:19 +0000 (15:22 +0200)]
phy: rcar: Add R-Car Gen2 PHY driver

Add a PHY driver for the R-Car Gen2 which allows configuring the mux
connected to the EHCI controllers and USBHS controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agophy: Fix off-by-one error when parsing DT PHY bindings
Marek Vasut [Tue, 7 Aug 2018 10:24:35 +0000 (12:24 +0200)]
phy: Fix off-by-one error when parsing DT PHY bindings

The code fails to copy the last PHY phandle argument, so it is
missing from the adjusted phandle args and the consumer cannot
use it to determine what the PHY should do.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
6 years agoPrepare v2018.09-rc2 v2018.09-rc2
Tom Rini [Tue, 14 Aug 2018 01:20:57 +0000 (21:20 -0400)]
Prepare v2018.09-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoconfigs: Resync with savedefconfig
Tom Rini [Tue, 14 Aug 2018 00:05:58 +0000 (20:05 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoARM: socfpga: clk: Convert to clock framework
Marek Vasut [Mon, 6 Aug 2018 19:42:05 +0000 (21:42 +0200)]
ARM: socfpga: clk: Convert to clock framework

Use clock framework functions to fetch clock information now that there
is a clock driver for Arria10, instead of custom coded register parsing.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agommc: socfpga: Add clock framework support
Marek Vasut [Wed, 1 Aug 2018 16:28:35 +0000 (18:28 +0200)]
mmc: socfpga: Add clock framework support

Add support for fetching the clock frequency both using the legacy
method in case clock framework is disabled as well as via the clock
framework if it is enabled. This allows for migration to the clock
framework on platforms which supports it while not breaking legacy
platforms. That said, the legacy method must be removed eventually.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoclk: socfpga: Add initial Arria10 clock driver
Marek Vasut [Tue, 31 Jul 2018 15:58:07 +0000 (17:58 +0200)]
clk: socfpga: Add initial Arria10 clock driver

Add clock driver for the Arria10, which allows reading the clock
frequency from all the clock described in the DT. The driver also
allows enabling and disabling the clock. Reconfiguring frequency
is not supported thus far.

Since the DT bindings for the SoCFPGA clock are massively misdesigned
and the handoff DT adds additional incorrectly described entries to
the DT, the driver contains workarounds which attempt to rectify all
of those problems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
Marek Vasut [Mon, 6 Aug 2018 20:07:40 +0000 (22:07 +0200)]
ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes

Add the pre-reloc DT markers to clock nodes needed in SPL and early
U-Boot stages. This is required to let the Arria10 clock driver start
early and provide clock information for UART and SDMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: clk: Drop unused variables on Arria10
Marek Vasut [Tue, 31 Jul 2018 15:33:42 +0000 (17:33 +0200)]
ARM: socfpga: clk: Drop unused variables on Arria10

The variables removed in this patch are never used, they are only ever
assigned and then waste precious memory. Drop both the assignment and
the variables.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
Marek Vasut [Mon, 6 Aug 2018 19:47:50 +0000 (21:47 +0200)]
ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only

The L4SP and MMC clock precalculation is specific to Gen5, it is not
needed on Arria10/Stratix10. Isolate it to Gen5 until there is a proper
clock driver for Gen5, at which point this will go away completely.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: clk: Obtain handoff base clock via DM
Marek Vasut [Mon, 30 Jul 2018 13:56:19 +0000 (15:56 +0200)]
ARM: socfpga: clk: Obtain handoff base clock via DM

Bind fixed clock driver to the base clock instantiated in the handoff
DT and use DM clock framework to get their clock rate. This replaces
the ad-hoc DT parsing present thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Enable DM ethernet on A10
Marek Vasut [Mon, 13 Aug 2018 19:02:54 +0000 (21:02 +0200)]
ARM: socfpga: Enable DM ethernet on A10

Enable DM ethernet framework on Arria10, so that the designware GMAC
can be probed from DT as it should be.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Remove adhoc ethernet reset and configuration
Marek Vasut [Mon, 13 Aug 2018 18:06:46 +0000 (20:06 +0200)]
ARM: socfpga: Remove adhoc ethernet reset and configuration

Remove ad-hoc ethernet syscon registers configuration and reset support.
Reset is now handled by the reset framework and the syscon registers are
set in the dwmac_socfpga.c driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Zap unused reset code
Marek Vasut [Mon, 13 Aug 2018 16:57:08 +0000 (18:57 +0200)]
ARM: socfpga: Zap unused reset code

Remove code from the reset manager that is never called.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agonet: designware: socfpga: Add Arria10 extras
Marek Vasut [Mon, 13 Aug 2018 17:32:14 +0000 (19:32 +0200)]
net: designware: socfpga: Add Arria10 extras

Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
syscon phy_intf.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
6 years agoARM: socfpga: Zap all the UART handling complexity
Marek Vasut [Sun, 15 Apr 2018 14:29:12 +0000 (16:29 +0200)]
ARM: socfpga: Zap all the UART handling complexity

The UART reset handling is now done via reset framework using the
SoCFPGA reset driver. The UART console assignment is done using the
DM and console framework. Nuke all this comlexity, since it is just
duplicating the same functionality, badly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Enable DM I2C framework on A10
Marek Vasut [Mon, 13 Aug 2018 16:32:38 +0000 (18:32 +0200)]
ARM: socfpga: Enable DM I2C framework on A10

Enable the DM I2C framework on Arria10, so that the DM capable
Designware I2C driver can handle the reset via DM reset framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Enable DM reset framework on A10
Marek Vasut [Mon, 13 Aug 2018 16:32:38 +0000 (18:32 +0200)]
ARM: socfpga: Enable DM reset framework on A10

Enable the DM reset framework and DM reset driver on Arria10 both
in U-Boot and in SPL. This lets U-Boot parse reset control from DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Add i2c alias to A10 SoCDK
Marek Vasut [Mon, 13 Aug 2018 18:40:54 +0000 (20:40 +0200)]
ARM: dts: socfpga: Add i2c alias to A10 SoCDK

The A10 SoCDK is missing the I2C bus alias, so DM I2C cannot assign
the I2C bus a bus number. Add the missing alias.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Add missing I2C resets
Marek Vasut [Mon, 13 Aug 2018 18:40:44 +0000 (20:40 +0200)]
ARM: dts: socfpga: Add missing I2C resets

The I2Cx resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Fix Arria10 GMAC resets
Marek Vasut [Mon, 13 Aug 2018 18:24:20 +0000 (20:24 +0200)]
ARM: dts: socfpga: Fix Arria10 GMAC resets

Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs
to work and add GMAC2 reset and OCP resets which were missing altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Add missing UART resets
Marek Vasut [Mon, 13 Aug 2018 16:42:39 +0000 (18:42 +0200)]
ARM: dts: socfpga: Add missing UART resets

The UART0 and UART1 resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Flag reset manager on A10 as pre-reloc
Marek Vasut [Mon, 13 Aug 2018 16:42:32 +0000 (18:42 +0200)]
ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc

The Altera reset manager block must be available very early on, since
it controls ie. UART resets. Flag it as pre-reloc.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Register the FPGA on A10 in SPL again
Marek Vasut [Mon, 30 Jul 2018 11:58:54 +0000 (13:58 +0200)]
ARM: socfpga: Register the FPGA on A10 in SPL again

The restructuring of the SPL dropped registration of the FPGA in SPL,
readd it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Fixes: c859f2a77d98 ("arm: socfpga: Restructure the SPL file")

6 years agoarm: socfpga: gen5: combine some init code for SPL and U-Boot
Simon Goldschmidt [Mon, 13 Aug 2018 19:34:35 +0000 (21:34 +0200)]
arm: socfpga: gen5: combine some init code for SPL and U-Boot

Some of the code for low level system initialization in SPL's
board_init_f() and U-Boot's arch_early_init_r() is the same,
so let's combine it into a single function called from both.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoarm: socfpga: fix device trees to work with DM serial
Simon Goldschmidt [Mon, 13 Aug 2018 19:34:33 +0000 (21:34 +0200)]
arm: socfpga: fix device trees to work with DM serial

Device trees need to have the serial console device available
before relocation and require a stdout-path in chosen at least
for SPL to have a console.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoMAINTAINERS: Update STM32MP fragments
Patrice Chotard [Mon, 6 Aug 2018 09:52:23 +0000 (11:52 +0200)]
MAINTAINERS: Update STM32MP fragments

Add new drivers
Add Christophe Kerello and myself as maintainers

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoARM: dts: stm32f4: Fix DT dtc warnings
Patrick Delaunay [Mon, 6 Aug 2018 09:25:42 +0000 (11:25 +0200)]
ARM: dts: stm32f4: Fix DT dtc warnings

This patch fix the following warnings for for stm32f429
evaluation and discovery boards:

unnecessary #address-cells/#size-cells without "ranges" or
child "reg" property

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoARM: dts: stm32mp157: Add ADC DT node
Patrice Chotard [Mon, 6 Aug 2018 07:54:04 +0000 (09:54 +0200)]
ARM: dts: stm32mp157: Add ADC DT node

Add ADC device tree node. This allows to get analog conversions on
stm32mp157.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoARM: dts: stm32: remove cd-inverted for stm32f746-disco
Patrice Chotard [Mon, 6 Aug 2018 07:38:18 +0000 (09:38 +0200)]
ARM: dts: stm32: remove cd-inverted for stm32f746-disco

As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoARM: dts: stm32: remove cd-inverted for stm32f769-disco
Patrice Chotard [Mon, 6 Aug 2018 07:38:17 +0000 (09:38 +0200)]
ARM: dts: stm32: remove cd-inverted for stm32f769-disco

As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoARM: omap3: evm: Enable CONFIG_BLK and misc. cleanup
Derald D. Woods [Mon, 6 Aug 2018 04:51:31 +0000 (23:51 -0500)]
ARM: omap3: evm: Enable CONFIG_BLK and misc. cleanup

This commit enables CONFIG_BLK and removes USB_STORAGE which is awaiting
proper implementation for current U-Boot interfaces. Additionally the
console selection is now handled by Kconfig and no longer needs to be in
the config header. CONFIG_SYS_MALLOC_F_LEN=0x2000 was added to sync with
other boards. CONFIG_SPL_BLK and CONFIG_SPL_DM_MMC are disabled because
they currently do not allow the OMAP3-EVM (OMAP34XX) to actually boot.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
6 years agotpm: sandbox: fix wrong assignment with a simplification
Miquel Raynal [Sun, 5 Aug 2018 16:53:07 +0000 (18:53 +0200)]
tpm: sandbox: fix wrong assignment with a simplification

The recv variable in sandbox_tpm2_fill_buf() is a pointer on a pointer
of a char array. It means accessing *recv is the char array pointer
itself while **recv is the first character of that array. There is no
need for such indirection here, so simplify the code.

Simplifying things will make the last assignment right: "*recv = NULL"
is now correct. The issue has been found by the following Coverity
Scan report:

    CID 183371:  Incorrect expression  (UNUSED_VALUE)
    Assigning value "4UL" to "*recv" here, but that stored value is overwritten before it can be used.
    232             *recv += sizeof(rc);
    233
    234             /* Add trailing \0 */
    235             *recv = NULL;

While at simplifying things, use '\0' instead of NULL when adding an
empty char at the end of the buffer.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotpm: sandbox: fix wrong check on pcr_map
Miquel Raynal [Sun, 5 Aug 2018 16:53:06 +0000 (18:53 +0200)]
tpm: sandbox: fix wrong check on pcr_map

The second check on pcr_map in sandbox_tpm2_xfer() is wrong. It should
check for pcr_map not being empty. Instead, it is a pure copy/paste of
the first check which is redundant.

This has been found thanks to a Coverity Scan report:

    CID 183370:  Memory - illegal accesses  (UNINIT)
    Using uninitialized value "pcr_index".
        put_unaligned_be32(tpm->pcr_extensions[pcr_index], recv);

This is because pcr_index is initialized only if the user input is
correct, ie. at least one valid bit is set in pcr_map.

Fix the second check and also initialize pcr_index to 0 (which is
harmless in case of error) to make Coverity Scan happy.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoMAINTAINERS: Add more sources to Arch Snapdragon
Ramon Fried [Fri, 3 Aug 2018 17:56:27 +0000 (20:56 +0300)]
MAINTAINERS: Add more sources to Arch Snapdragon

Add scattered driver files around the source tree
that belongs to Snapdragon arch. Not sure why they
were not included in the first place.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
6 years agodb410c: add FIT support
Ramon Fried [Fri, 3 Aug 2018 13:31:02 +0000 (16:31 +0300)]
db410c: add FIT support

1. Add FIT support for DB410c defconfig.
2. Don't overwrite bootargs (they're already
   defined in Linux device tree for DB410c.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>