oweals/u-boot.git
5 years agoboard: Arcturus: ucp1020: Removing obsoleted stuff
Oleksandr Zhadan [Thu, 11 Jul 2019 15:52:49 +0000 (11:52 -0400)]
board: Arcturus: ucp1020: Removing obsoleted stuff

Removed one of the defconfig(obsoleted) file
and unused CONFIG_MMC_SPI definition to avoid confusion
about if this board using non-DM stuff or not.
uCP1020 is completely DM free board, tested and runs well.

Signed-off-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoblk: Invalidate block cache when switching hwpart
Weijie Gao [Thu, 11 Jul 2019 07:10:23 +0000 (15:10 +0800)]
blk: Invalidate block cache when switching hwpart

Some storage devices have multiple hw partitions and both address from
zero, for example eMMC.
However currently block cache invalidation only applies to block
write/erase.
This can cause a problem that data of current hw partition is cached
before switching to another hw partition. And the following read
operation of the latter hw partition will get wrong data when reading
from the addresses that have been cached previously.

To solve this problem, invalidate block cache after a successful
select_hwpart operation.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
5 years agoarm: dts: MediaTek: remove tick-timer from mt7629.dtsi
Weijie Gao [Thu, 11 Jul 2019 06:26:26 +0000 (14:26 +0800)]
arm: dts: MediaTek: remove tick-timer from mt7629.dtsi

This patch removes tick-timer as all mt7629 boards should use arch timer.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
5 years agoconfigs: mt7629_rfb: use arm arch timer instead of mtk timer
Weijie Gao [Thu, 11 Jul 2019 06:26:25 +0000 (14:26 +0800)]
configs: mt7629_rfb: use arm arch timer instead of mtk timer

This patch changes mt7629_rfb to use ARM's generic arch timer instead of
MediaTek's soc timer.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
5 years agoarm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsi
Weijie Gao [Thu, 11 Jul 2019 06:26:24 +0000 (14:26 +0800)]
arm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsi

The timer0 node has its two clocks written in reversed order. The timer0
is used as the tick timer which causes a problem that the time a delay
function used is 4 times longer.

This patch reverses these two clocks to solve this issue.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
5 years agochromium: Update docs to clone vboot_reference directly
Simon Glass [Wed, 10 Jul 2019 17:04:13 +0000 (11:04 -0600)]
chromium: Update docs to clone vboot_reference directly

We don't need a full checkout of Chrome OS to build U-Boot with
Chromium OS verified boot. Update the instructions accordingly and fix a
typo which joins the output directory and defconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agoarm: mediatek: add missing arch timer configuration for MT7629
Weijie Gao [Wed, 10 Jul 2019 09:35:42 +0000 (17:35 +0800)]
arm: mediatek: add missing arch timer configuration for MT7629

This patch sets CNTVOFF of ARM CP15 timer to zero to make sure the virtual
counter is fully usable for linux kernel.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
5 years agopower-domain.h: Fix typo
Anatolij Gustschin [Wed, 10 Jul 2019 08:03:13 +0000 (10:03 +0200)]
power-domain.h: Fix typo

%s/ot/to/

Signed-off-by: Anatolij Gustschin <agust@denx.de>
5 years agoCVE-2019-13106: ext4: fix out-of-bounds memset
Paul Emge [Mon, 8 Jul 2019 23:37:07 +0000 (16:37 -0700)]
CVE-2019-13106: ext4: fix out-of-bounds memset

In ext4fs_read_file in ext4fs.c, a memset can overwrite the bounds of
the destination memory region. This patch adds a check to disallow
this.

Signed-off-by: Paul Emge <paulemge@forallsecure.com>
5 years agoext4: gracefully fail on divide-by-0
Paul Emge [Mon, 8 Jul 2019 23:37:06 +0000 (16:37 -0700)]
ext4: gracefully fail on divide-by-0

This patch checks for 0 in several ext4 headers and gracefully
fails instead of raising a divide-by-0 exception.

Signed-off-by: Paul Emge <paulemge@forallsecure.com>
5 years agoCVE-2019-13104: ext4: check for underflow in ext4fs_read_file
Paul Emge [Mon, 8 Jul 2019 23:37:05 +0000 (16:37 -0700)]
CVE-2019-13104: ext4: check for underflow in ext4fs_read_file

in ext4fs_read_file, it is possible for a broken/malicious file
system to cause a memcpy of a negative number of bytes, which
overflows all memory. This patch fixes the issue by checking for
a negative length.

Signed-off-by: Paul Emge <paulemge@forallsecure.com>
5 years agoCVE-2019-13105: ext4: fix double-free in ext4_cache_read
Paul Emge [Mon, 8 Jul 2019 23:37:04 +0000 (16:37 -0700)]
CVE-2019-13105: ext4: fix double-free in ext4_cache_read

ext_cache_read doesn't null cache->buf, after freeing, which results
in a later function double-freeing it. This patch fixes
ext_cache_read to call ext_cache_fini instead of free.

Signed-off-by: Paul Emge <paulemge@forallsecure.com>
5 years agoCVE-2019-13103: disk: stop infinite recursion in DOS Partitions
Paul Emge [Mon, 8 Jul 2019 23:37:03 +0000 (16:37 -0700)]
CVE-2019-13103: disk: stop infinite recursion in DOS Partitions

part_get_info_extended and print_partition_extended can recurse infinitely
while parsing a self-referential filesystem or one with a silly number of
extended partitions. This patch adds a limit to the number of recursive
partitions.

Signed-off-by: Paul Emge <paulemge@forallsecure.com>
5 years agoqemu-riscv: enable VIRTIO_PCI
David Abdurachmanov [Wed, 3 Jul 2019 12:50:44 +0000 (15:50 +0300)]
qemu-riscv: enable VIRTIO_PCI

libvirt v.5.3.0 with QEMU 4.0.0 or above uses PCI automatically and
thus devices (network, storage, etc) are connected via PCI.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoarm: qemu: fix failure in flash initialization if booting from TF-A
AKASHI Takahiro [Wed, 3 Jul 2019 01:44:40 +0000 (10:44 +0900)]
arm: qemu: fix failure in flash initialization if booting from TF-A

If U-Boot is loaded and started from TF-A (you need to change
SYS_TEXT_BASE to 0x60000000), it will hang up at flash initialization.

If secure mode is off (default, or -machine virt,secure=off) at qemu,
it will provide dtb with two flash memory banks:
flash@0 {
bank-width = <0x4>;
reg = <0x0 0x0 0x0 0x4000000 0x0 0x4000000 0x0 0x4000000>;
compatible = "cfi-flash";
};
If secure mode is on, on the other hand, qemu provides dtb with 1 bank:
flash@0 {
bank-width = <0x4>;
reg = <0x0 0x4000000 0x0 0x4000000>;
compatible = "cfi-flash";
};

As a result, flash_init()/flash_get_size() will eventually fail.
With this patch applied, relevant CONFIG values are modified.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agoarm: move CONFIG_TFABOOT to generic Kconfig
AKASHI Takahiro [Wed, 3 Jul 2019 01:44:39 +0000 (10:44 +0900)]
arm: move CONFIG_TFABOOT to generic Kconfig

Currently, CONFIG_TFABOOT is located in armv8/fsl-layerscape Kconfig,
but it will be also useful for other targets if some additional
configuration are necessary.
So move it to arch/arm/Kconfig.

Please note that CONFIG_TFABOOT still depends on
CONFIG_ARCH_SUPPORT_TFABOOT and so the menu won't come up
if any target doesn't need its own customization for TF-A boot.
This will maintain the compatibility.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Sriram Dash <sriram.dash@nxp.com>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Peng Ma <peng.ma@nxp.com>
Cc: Yuantian Tang <andy.tang@nxp.com>
Cc: Pankit Garg <pankit.garg@nxp.com>
5 years agodoc: Move fastboot protocol doc to android dir
Sam Protsenko [Tue, 2 Jul 2019 18:14:57 +0000 (21:14 +0300)]
doc: Move fastboot protocol doc to android dir

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
5 years agocmd: mem: Add a command to fill the memory with random data
Jean-Jacques Hiblot [Tue, 2 Jul 2019 12:23:26 +0000 (14:23 +0200)]
cmd: mem: Add a command to fill the memory with random data

This command fills the memory with data produced by rand().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agotools: mkenvimage: Always consider non-regular files
Andre Przywara [Sun, 30 Jun 2019 01:45:01 +0000 (02:45 +0100)]
tools: mkenvimage: Always consider non-regular files

At the moment mkenvimage has two separate read paths: One to read from
a potential pipe, while dynamically increasing the buffer size, and a
second one using mmap(2), using the input file's size. This is
problematic for two reasons:
- The "pipe" path will be chosen if the input filename is missing or
  "-".  Any named, but non-regular file will use the other path, which
  typically will cause mmap() to fail:
  $ mkenvimage -s 256 -o out <(echo "foo=bar")
- There is no reason to have *two* ways of reading a file, since the
  "pipe way" will always work, even for regular files.

Fix this (and simplify the code on the way) by always using the method
of dynamically resizing the buffer. The existing distinction between
the two cases will merely be used to use the open() syscall or not.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
5 years agotools: mkenvimage: Fix reading from slow pipe
Andre Przywara [Sun, 30 Jun 2019 01:45:00 +0000 (02:45 +0100)]
tools: mkenvimage: Fix reading from slow pipe

It is perfectly fine for the read(2) syscall to return with less than
the requested number of bytes read (short read, see the "RETURN VALUE"
section of the man page). This typically happens with slow input
(keyboard, network) or with complex pipes.

So far mkenvimage expects the exact number of requested bytes to be
read, assuming an end-of-file condition otherwise. This wrong behaviour
can be easily shown with:
$ (echo "foo=bar"; sleep 1; echo "bar=baz") | mkenvimage -s 256 -o out -
The second line will be missing from the output.

Correct this by checking for any positive, non-zero return value.

This fixes a problem with a complex pipe in one of my scripts, where
the environment consist of two parts.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
5 years agotest/py: gpt: Use long options for sgdisk
Sam Protsenko [Tue, 2 Jul 2019 18:20:32 +0000 (21:20 +0300)]
test/py: gpt: Use long options for sgdisk

sgdisk 0.8.10.2 from AOSP doesn't support short options, failing with
errors like this:

    sgdisk: invalid option -- 'U'

Test fails due to that error. Let's use long options to make the test
work with any sgdisk version.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
5 years agoenv: mmc: add erase-function
Frank Wunderlich [Sat, 29 Jun 2019 09:36:20 +0000 (11:36 +0200)]
env: mmc: add erase-function

this adds erase environment for mmc storage

squashed fixes:
 - add CONFIG_CMD_ERASEENV
 - env: erase redundant offset if defined
 - changes mentioned by Simon
 - fix whitespaces around errmsg

Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
5 years agoenv: register erase command
Frank Wunderlich [Sat, 29 Jun 2019 09:36:19 +0000 (11:36 +0200)]
env: register erase command

this patch adds basic changes for adding a erase-subcommand to env

with this command the environment stored on non-volatile storage written
by saveenv can be cleared.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
squashed fixes
 - start message with "Erasing"
 - mark erase-function as optional
 - env: separate eraseenv from saveenv

Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
5 years agocommon: Fix autocompletion with CONFIG_CMDLINE_PS_SUPPORT
Marek Vasut [Wed, 26 Jun 2019 22:17:27 +0000 (00:17 +0200)]
common: Fix autocompletion with CONFIG_CMDLINE_PS_SUPPORT

The autocompletion did not work if CONFIG_CMDLINE_PS_SUPPORT was enabled
because U-Boot was comparing the prompt string with CONFIG_SYS_PROMPT .
While this works if CONFIG_CMDLINE_PS_SUPPORT is disabled, this no longer
works if it's enabled because user can override the PS1 . Fix this by
checking prompt string against the current PS1 value.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
5 years agoregulator: Allow enabling GPIO regulator
Sven Schwermer [Mon, 24 Jun 2019 11:03:34 +0000 (13:03 +0200)]
regulator: Allow enabling GPIO regulator

Drivers need to be able to enable regulators that may be implemented as
GPIO regulators. Example: fsl_esdhc enables the vqmmc supply which is
commonly implemented as a GPIO regulator in order to switch between I/O
voltage levels.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agoregulator: Factor out common enable code
Sven Schwermer [Mon, 24 Jun 2019 11:03:33 +0000 (13:03 +0200)]
regulator: Factor out common enable code

In preparation of being able to enable/disable GPIO regulators, the
code that will be shared among the two kinds to regulators is factored
out into its own source files.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agoARM: correct detection of thumb mode
Heinrich Schuchardt [Sun, 23 Jun 2019 10:59:31 +0000 (12:59 +0200)]
ARM: correct detection of thumb mode

When a crash occurs in thumb mode the crash dump is incorrect. This is due
to the usage of a non-existing configuration variable CONFIG_ARM_THUMB in
the definition of macro thumb_mode(regs).

Use CONFIG_IS_ENABLED(SYS_THUMB_BUILD) to detect that the code has been
compiled for thumb mode. Remove ARM_THUMB from config_whitelist.txt.

With the patch crash dumps indicate thumb mode correctly.

On a system with thumb mode:

=> exception unaligned
data abort
pc : [<8f7a2b52>]          lr : [<8f7ab1ef>]
reloc pc : [<1780cb52>]    lr : [<178151ef>]
sp : 8ed8c3f8  ip : 8f7a2b4d     fp : 00000002
r10: 8f7f8228  r9 : 8ed95ea8     r8 : 8ed99488
r7 : 8f7ab141  r6 : 00000000     r5 : 8ed8c3f9  r4 : 8f7f6390
r3 : 8ed9948c  r2 : 00000001     r1 : 00000000  r0 : 8f7f6390
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32 (T)
Code: 8f7e 466d f105 0501 (e9d5) 6700

The Flags line has '(T)' and in the Code line the output is in u16 groups.

On a system without thumb mode:

=> exception breakpoint
prefetch abort
pc : [<7ff5a5c8>]          lr : [<7ff675ec>]
reloc pc : [<0000e5c8>]    lr : [<0001b5ec>]
sp : 7ee0ad80  ip : 7ff5a5cc     fp : 7ff674cc
r10: 00000002  r9 : 7ef0bed8     r8 : 7ffd6214
r7 : 7ef0e080  r6 : 00000000     r5 : 7ffd4090  r4 : 00000000
r3 : 7ef0e084  r2 : 00000001     r1 : 00000000  r0 : 7ffd4090
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
Code: e1a0500d e2855001 e1c560d0 e3a00001 (e12fff1e)

The Flags line does not show '(T)' and in the Code line the output is in
u32 groups.

Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
5 years agoext4: add support for filesystems without JOURNAL
Marek Szyprowski [Fri, 21 Jun 2019 13:35:35 +0000 (15:35 +0200)]
ext4: add support for filesystems without JOURNAL

JOURNAL is optional for EXT4 (and EXT3) filesystems, so add support for
skipping it. This fixes corrupting EXT4 volumes without JOURNAL after
using uboot's 'ext4write' command.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agoext4: fix calculating inode blkcount for non-512 blocksize filesystems
Marek Szyprowski [Fri, 21 Jun 2019 13:32:51 +0000 (15:32 +0200)]
ext4: fix calculating inode blkcount for non-512 blocksize filesystems

The block count entry in the EXT4 filesystem disk structures uses
standard 512-bytes units for most of the typical files. The only
exception are HUGE files, which use the filesystem block size, but those
are not supported by uboot's EXT4 implementation anyway. This patch fixes
the EXT4 code to use proper unit count for inode block count. This fixes
errors reported by fsck.ext4 on disks with non-standard (i.e. 4KiB, in
case of new flash drives) PHYSICAL block size after using 'ext4write'
uboot's command.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agortc: Add DM support to ds3231
Chuanhua Han [Fri, 21 Jun 2019 08:21:53 +0000 (16:21 +0800)]
rtc: Add DM support to ds3231

Add an implementation of the ds3231 driver that uses the driver
model i2c APIs.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agolib: rsa: add support to other openssl engine types than pkcs11
Vesa Jääskeläinen [Sun, 16 Jun 2019 17:53:38 +0000 (20:53 +0300)]
lib: rsa: add support to other openssl engine types than pkcs11

There are multiple other openssl engines used by HSMs that can be used to
sign FIT images instead of forcing users to use pkcs11 type of service.

Relax engine selection so that other openssl engines can be specified and
use generic key id definition formula.

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Cc: Tom Rini <trini@konsulko.com>
5 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Tue, 16 Jul 2019 15:19:31 +0000 (11:19 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi

- Beelink-x2 STB support (Marcus)
- H6 DDR3, LPDDR3 changes (Andre, Jernej)
- H6 pin controller, USB PHY (Andre)

5 years agosunxi: H6: Enable USB for existing boards
Andre Przywara [Sun, 23 Jun 2019 14:09:50 +0000 (15:09 +0100)]
sunxi: H6: Enable USB for existing boards

So far USB was not enabled for the Allwinner H6 boards, as the PHY
driver was not ready and the clock gates were missing. Since this is now
fixed, let's add the PHY and the OHCI/EHCI drivers to the build, for
all existing H6 boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: phy: Add USB PHY support for Allwinner H6
Andre Przywara [Sun, 23 Jun 2019 14:09:49 +0000 (15:09 +0100)]
sunxi: phy: Add USB PHY support for Allwinner H6

The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),
which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: clocks: Add H6 USB clock gates and resets
Andre Przywara [Sun, 23 Jun 2019 14:09:48 +0000 (15:09 +0100)]
sunxi: clocks: Add H6 USB clock gates and resets

To enable USB support in U-Boot, add the required clock and reset gates
to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will
pick them up from there automatically.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: gpio: Enable support for H6 pin controller
Andre Przywara [Sun, 23 Jun 2019 14:09:47 +0000 (15:09 +0100)]
sunxi: gpio: Enable support for H6 pin controller

The Allwinner H6 pin controller is not really special, at least not when
it comes to normal GPIO operation.

Add the H6 compatible strings to the list of recognised strings, to make
GPIOs work for H6 boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: move SUNXI_GPIO to Kconfig
Andre Przywara [Sun, 23 Jun 2019 14:09:46 +0000 (15:09 +0100)]
sunxi: move SUNXI_GPIO to Kconfig

Probably for no particular reason SUNXI_GPIO was still defined the "old
way", in header files only.

Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove
another line from our dreadful config_whitelist.txt.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: H6: Add DDR3 DRAM delay values
Jernej Skrabec [Mon, 15 Jul 2019 01:27:09 +0000 (02:27 +0100)]
sunxi: H6: Add DDR3 DRAM delay values

Add some basic line delay values to be used with DDR3 DRAM chips on
some H6 TV boxes.
Taken from a register dump after boot0 initialised the DRAM.
Put them as the default delay values for DDR3 DRAM until we know better.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: H6: Add DDR3-1333 timings
Andre Przywara [Mon, 15 Jul 2019 01:27:08 +0000 (02:27 +0100)]
sunxi: H6: Add DDR3-1333 timings

Add a routine to program the timing parameters for DDR3-1333 DRAM chips
connected to the H6 DRAM controller.

The values were gathered from doing back-calculations from a register
dump, trying to match them up with the official JEDEC DDDR3 spec.
If in doubt, the register dump values were taken for now, but the JEDEC
recommendation were added as a comment.

Many thanks to Jernej for contributing fixes!

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: H6: Add DDR3 support to DRAM controller driver
Andre Przywara [Mon, 15 Jul 2019 01:27:07 +0000 (02:27 +0100)]
sunxi: H6: Add DDR3 support to DRAM controller driver

At the moment the H6 DRAM driver only supports LPDDR3 DRAM.

Extend the driver to cover DDR3 DRAM as well.

The changes are partly motivated by looking at the ZynqMP register
documentation, partly by looking at register dumps after boot0/libdram
has initialised the controller.

Many thanks to Jernej for contributing some fixes!

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: H6: move LPDDR3 timing definition into separate file
Andre Przywara [Mon, 15 Jul 2019 01:27:06 +0000 (02:27 +0100)]
sunxi: H6: move LPDDR3 timing definition into separate file

Currently the H6 DRAM driver only supports one kind of LPDDR3 DRAM.
Split the timing parameters for this LPDDR3 configuration  into a
separate file, to allow selecting an alternative later at compile time
(as the sunxi-dw driver does).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: H6: DRAM: follow recommended PHY init algorithm
Andre Przywara [Mon, 15 Jul 2019 01:27:05 +0000 (02:27 +0100)]
sunxi: H6: DRAM: follow recommended PHY init algorithm

The DRAM controller manual suggests to first program the PHY
initialisation parameters to the PHY_PIR register, and then set bit 0 to
trigger the initialisation. This is also used in boot0.

Follow this recommendation by setting bit 0 in a separate step.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: H6: DRAM: avoid memcpy() on MMIO registers
Andre Przywara [Mon, 15 Jul 2019 01:27:04 +0000 (02:27 +0100)]
sunxi: H6: DRAM: avoid memcpy() on MMIO registers

Using memcpy() is, however tempting, not a good idea: It depends on the
specific implementation of memcpy, also lacks barriers. In this
particular case the first registers were written using 64-bit writes,
and the last register using four separate single-byte writes.

Replace the memcpy with a proper loop using the writel() accessor.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Mon, 15 Jul 2019 22:56:24 +0000 (18:56 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net

5 years agonet: macb: Add support for 1000-baseX
Radu Pirea [Fri, 7 Jun 2019 11:18:36 +0000 (14:18 +0300)]
net: macb: Add support for 1000-baseX

Macb can be used with Xilinx PCS/PMA PHY in fpga which is a 1000-baseX
phy(lpa 0x41e0). This patch adds checks for LPA_1000XFULL and
LPA_1000XHALF bits.

Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: Fixed reading MII_LPA register
Radu Pirea [Fri, 7 Jun 2019 11:18:35 +0000 (14:18 +0300)]
net: macb: Fixed reading MII_LPA register

If macb is gem and is gigabit capable, lpa value is not read from
the right register(MII_LPA) and is read from MII_STAT1000. This patch
fixes reading of the lpa value.

Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoconfigs: am65x_evm_a53: enable networking
Grygorii Strashko [Tue, 9 Jul 2019 05:00:37 +0000 (10:30 +0530)]
configs: am65x_evm_a53: enable networking

Enable TI K3 AM65x CPSW NUSS driver.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defs
Grygorii Strashko [Tue, 9 Jul 2019 05:00:36 +0000 (10:30 +0530)]
arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defs

Add mcu cpsw nuss pinmux and phy defs required by cpsw.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoarm64: dts: ti: k3-am65: add mcu cpsw node
Grygorii Strashko [Tue, 9 Jul 2019 05:00:35 +0000 (10:30 +0530)]
arm64: dts: ti: k3-am65: add mcu cpsw node

Add mcu cpsw and its components along with scm_conf node
to have ethernet functional.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
Keerthy [Tue, 9 Jul 2019 05:00:34 +0000 (10:30 +0530)]
net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver

Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports and provides Ethernet packet communication for the
device and can be configured as an Ethernet switch. CPSW NUSS features: the
Reduced Gigabit Media Independent Interface (RGMII), Reduced Media
Independent Interface (RMII), and the Management Data Input/Output (MDIO)
interface for physical layer device (PHY) management. The TI AM65x SoC has
integrated two-port Gigabit Ethernet Switch subsystem into device MCU
domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII
and RMII interfaces and an internal Communications Port Programming
Interface (CPPI) port (Host port 0).

Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX
channels and on RX channels operating by TI am654 NAVSS Unified DMA
Peripheral Root Complex (UDMA-P) controller.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agodriver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr
Keerthy [Tue, 9 Jul 2019 05:00:33 +0000 (10:30 +0530)]
driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr

Use phys_addr_t for mdio_base address to avoid build
warnings on arm64 and dra7. Cast it to uintprt_t before
assigning to regs.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: phy: cortina: Use block layer to read from mmc
Yinbo Zhu [Tue, 11 Jun 2019 06:29:03 +0000 (14:29 +0800)]
net: phy: cortina: Use block layer to read from mmc

This patch is to use block layer to read from mmc in cortina

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: mscc: refactor mscc_miim
Horatiu Vultur [Sun, 9 Jun 2019 13:27:29 +0000 (15:27 +0200)]
net: mscc: refactor mscc_miim

Because all MSCC SoC use the same MDIO bus, put the implementation in
one common file(mscc_miim) and make all the other MSCC network drivers to
use these functions.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agotest: dm: add MDIO test
Alex Marginean [Mon, 3 Jun 2019 16:12:28 +0000 (19:12 +0300)]
test: dm: add MDIO test

A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: introduce MDIO DM class for MDIO devices
Alex Marginean [Mon, 3 Jun 2019 16:10:30 +0000 (19:10 +0300)]
net: introduce MDIO DM class for MDIO devices

Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
stand-alone devices.  Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: mscc: serval: Remove delay when serdes is configured
Horatiu Vultur [Thu, 23 May 2019 19:45:33 +0000 (21:45 +0200)]
net: mscc: serval: Remove delay when serdes is configured

When serdes configuration was written in hardware there was a delay
of 100ms to be sure that configuration was written. But the delay is not
needed because already the function serdes_write it is checking that the
operation finished.

Therefore remove the mdelay. This improves the speed of configuring the
network driver.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: phy: ti: Fix clock output DT property
Trent Piepho [Fri, 10 May 2019 17:49:08 +0000 (17:49 +0000)]
net: phy: ti: Fix clock output DT property

The code block reading the DT property for the clock output control was
before the phy's DT node pointer was set, so it could never work.  Move
it after the node pointer is set.

Also store the unsigned 32-bit property into an unsigned value, not a
signed value, as the former will cause a problem if value overflows.
For instance, if one were to add 0xffffffff as a code to mean the clock
output should be turned off.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Janine Hagemann <j.hagemann@phytec.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: phy: ti: Use default values for tx/rx delay and fifo size
Trent Piepho [Thu, 9 May 2019 19:41:51 +0000 (19:41 +0000)]
net: phy: ti: Use default values for tx/rx delay and fifo size

When not using DM_ETH, these PHY settings are programmed with default
values hardcoded into the driver.  When using DM_ETH, they should come
from the device tree.  However, if the device tree does not have the
properties, the driver will silent use -1.  Which is entirely out of
range, programs nonsense into the PHY's registers, and does not work.

Change this to use the same defaults as non-DM_ETH if the device tree is
lacking the properties.

As an alternative, the kernel driver for the phy will display an error
message and fail if the device tree is lacking.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Janine Hagemann <j.hagemann@phytec.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agocmd: mii: Add the standard 1000BASE-T registers
Trent Piepho [Thu, 9 May 2019 19:23:47 +0000 (19:23 +0000)]
cmd: mii: Add the standard 1000BASE-T registers

These are standard across gigabit phys.  These mostly extend the
auto-negotiation information with gigabit fields.

Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agocmd: mii: Refactor some of the MII reg dump code
Trent Piepho [Thu, 9 May 2019 19:23:39 +0000 (19:23 +0000)]
cmd: mii: Refactor some of the MII reg dump code

Share the code that prints out a register field with the function that
prints out the "special" fields.

There were two arrays the register dump list, one with reg number and
name, another with a pointer to the field table and the table size.
These two arrays had have each entry match what register is referred to.
Combine them into just one table.  Now they can't not match and there is
just one table.

Add some missing consts to pointers to string literals.

The dump code was ignoring the regno field in the description table and
assuming register 0 was at index 0, etc.  Have it use the field.

Change reg > max+1 into reg >= max, which doesn't fail if max+1 could
overflow, besides just making more sense.

Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoMerge tag 'mmc-2019-7-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Mon, 15 Jul 2019 13:42:41 +0000 (09:42 -0400)]
Merge tag 'mmc-2019-7-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc

- mmc spi driver model support
- drop mmc_spi command
- enhanced Strobe mmc HS400 support
- minor mmc bug/fixes and optimization
- omap hsmmc and mvbeu update
- sdhci card detect support

5 years agosun8i: h3: Add support for the Beelink-x2 STB
Marcus Cooper [Sun, 2 Jun 2019 06:38:40 +0000 (08:38 +0200)]
sun8i: h3: Add support for the Beelink-x2 STB

The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a
dual colour LED and an optical S/PDIF connector.

Linux commit details about the sun8i-h3-beelink-x2.dts sync:
"ARM: dts: sun8i: h3: Add ethernet0 alias to Beelink X2"
(sha1: cc4bddade114b696ab27c1a77cfc7040151306da)

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: move CONFIG_SPL_TEXT_BASE from *_defconfig to Kconfig
Andre Przywara [Mon, 27 May 2019 00:45:11 +0000 (01:45 +0100)]
sunxi: move CONFIG_SPL_TEXT_BASE from *_defconfig to Kconfig

The choice of the SPL_TEXT_BASE is not really a decision that should be
specified by each board's defconfig, as this setting is actually
dictated by the SoC's memory map and the BootROM behaviour.

To make this obvious and reduce the clutter in the defconfig files,
let's specify the SoC constraints in the Kconfig stanza.
This allows us to remove these lines from the defconfig files again.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agommc: fsl_esdhc_imx: enlarge mmc timeout
Peng Fan [Wed, 10 Jul 2019 09:35:30 +0000 (09:35 +0000)]
mmc: fsl_esdhc_imx: enlarge mmc timeout

Flash system partition with fastboot will earse the partition firstly
The 600ms timeout will fail on some SD Card. Enlarge it to 5s to make
it works for most of sdcard

Cc: guoyin.chen <guoyin.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 years agommc: fsl_esdhc_imx: add i.MX8QM compatible
Peng Fan [Wed, 10 Jul 2019 09:35:28 +0000 (09:35 +0000)]
mmc: fsl_esdhc_imx: add i.MX8QM compatible

Add i.MX8QM compatible and soc data, the soc data is following Linux
i.MX SDHC driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 years agommc: fsl_esdhc_imx: add HS400 Enhanced strobe support
Peng Fan [Wed, 10 Jul 2019 09:35:26 +0000 (09:35 +0000)]
mmc: fsl_esdhc_imx: add HS400 Enhanced strobe support

Implement set_enhanced_strobe hook for fsl_esdhc_imx,
,in esdhc_set_timing and esdhc_change_pinstate, also handle HS400_ES.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 years agommc: fsl_esdhc_imx: use mmc_of_parse to set host_caps
Peng Fan [Wed, 10 Jul 2019 09:35:24 +0000 (09:35 +0000)]
mmc: fsl_esdhc_imx: use mmc_of_parse to set host_caps

Use mmc_of_parse to set host_caps.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 years agommc: Parse no-1-8-v DT property
Peng Fan [Wed, 10 Jul 2019 09:35:20 +0000 (09:35 +0000)]
mmc: Parse no-1-8-v DT property

Parse no-1-8-v DT

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
5 years agommc: Parse HS400 Enhanced strobe DT properties
Peng Fan [Wed, 10 Jul 2019 09:35:18 +0000 (09:35 +0000)]
mmc: Parse HS400 Enhanced strobe DT properties

Add HS400 Enhanced strobe properties parsing support to mmc_of_parse().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
5 years agommc: support hs400 enhanced strobe mode
Peng Fan [Wed, 10 Jul 2019 06:43:07 +0000 (14:43 +0800)]
mmc: support hs400 enhanced strobe mode

eMMC 5.1+ supports HS400 Enhances Strobe mode without the need for
tuning procedure.
The flow is as following:
 - set HS_TIMIMG (Highspeed)
 - Host change freq to <= 52Mhz
 - set the bus width to Enhanced strobe and DDR8Bit(CMD6),
   EXT_CSD[183] = 0x86 instead of 0x80
 - set HS_TIMING to 0x3 (HS400)
 - Host change freq to <= 200Mhz
 - Host select HS400 enhanced strobe complete

Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 years agommc: fsl_esdhc_imx: fix config check issue when building in SPL
Ye Li [Thu, 11 Jul 2019 03:29:02 +0000 (03:29 +0000)]
mmc: fsl_esdhc_imx: fix config check issue when building in SPL

Should use CONFIG_IS_ENABLED not IS_ENABLED for clock and regulator drivers,
CONFIG_IS_ENABLED will check the CONFIG_SPL_CLK and CONFIG_SPL_DM_REGULATOR
when building SPL.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agocmd: Remove mmc_spi command
Anup Patel [Mon, 8 Jul 2019 04:10:55 +0000 (04:10 +0000)]
cmd: Remove mmc_spi command

The mmc_spi command was added to manually setup MMC over SPI bus
using command. This was required by the legacy non-DM MMC_SPI driver.

With DM based MMC_SPI driver in-place, we can now use all general
storge commands and mmc command for MMC over SPI bus hence we remove
the mmc_spi command all it's references.

Suggested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agommc: mmc_spi: Re-write driver using DM framework
Bhargav Shah [Mon, 8 Jul 2019 04:10:48 +0000 (04:10 +0000)]
mmc: mmc_spi: Re-write driver using DM framework

This patch rewrites MMC SPI driver using U-Boot DM
framework and get it's working on SiFive Unleashed
board.

Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
5 years agommc: skip select_mode_and_width for MMC SPI host
Anup Patel [Mon, 8 Jul 2019 04:10:43 +0000 (04:10 +0000)]
mmc: skip select_mode_and_width for MMC SPI host

The MMC mode and width are fixed for MMC SPI host hence we skip
sd_select_mode_and_width() and mmc_select_mode_and_width() for
MMC SPI host.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
5 years agommc: retry a few times if a partition switch failed
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:58 +0000 (10:53 +0200)]
mmc: retry a few times if a partition switch failed

This operation may fail. Retry it a few times before giving up and report
a failure.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: do not change mode when accessing a boot partition
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:57 +0000 (10:53 +0200)]
mmc: do not change mode when accessing a boot partition

Accessing the boot partition had been error prone with HS200 and HS400 and
was disabled. The driver first switched to a lesser mode and then switched
the partition access. It was mostly due to a bad handling of the switch and
has been fixed, so let's remove this 'feature'

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: During a switch, poll on dat0 if available and check the final status
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:56 +0000 (10:53 +0200)]
mmc: During a switch, poll on dat0 if available and check the final status

The switch operation can sometimes make the bus unreliable, in that case
the send_status parameter should be false to indicate not to poll using
CMD13. If polling on dat0 is possible, we should use it to detect the end
of the operation.
At the end of the operation it is safe to use CMD13 to get the status of
the card. It is important to do so because the operation may have failed.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: When switching partition, use the timeout specified in the ext_csd
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:55 +0000 (10:53 +0200)]
mmc: When switching partition, use the timeout specified in the ext_csd

The e-MMC spec allows the e-MMC to specify a timeout for the partition
switch command. It can take up to 2550 ms. There is no lower limit to this
value in the spec, but do as the the linux driver does and force it to be
at least 300ms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: use the generic timeout for cmd6 (SWITCH) provided in the ext_csd
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:54 +0000 (10:53 +0200)]
mmc: use the generic timeout for cmd6 (SWITCH) provided in the ext_csd

Starting with rev 4.5, the eMMC can define a generic timeout for the
SWITCH command.

Following Linux Kernel code, the timeout also changed from 1000 -> 500

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: if possible, poll the busy state using DAT0
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:53 +0000 (10:53 +0200)]
mmc: if possible, poll the busy state using DAT0

Using the DAT0 line as a rdy/busy line is an alternative to reading the
status register of the card. It especially useful in situation where the
bus is not in a good shape, like when modes are switched.
This is also how the linux driver behaves.

Note of warning: As per the specification, while polling on DAT0 the CLK
must not turned off: "[...] Without a clock edge the Device (unless
previously disconnected by a deselect command (CMD7)) will force the DAT0
line down, forever. [...]"

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: add mmc_poll_for_busy() and change the purpose of mmc_send_status()
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:52 +0000 (10:53 +0200)]
mmc: add mmc_poll_for_busy() and change the purpose of mmc_send_status()

mmc_send_status() is currently used to poll the card until it is ready, not
actually returning the status of the card.
Make it return the status and add another function to poll the card.

Also remove the 'extern' declaration in the mmc-private.h header to comply
with the coding standard.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: omap_hsmmc: provide wait_dat0 even if UHS modes are not supported
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:51 +0000 (10:53 +0200)]
mmc: omap_hsmmc: provide wait_dat0 even if UHS modes are not supported

This function can also be used for eMMC devices.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agoRevert "mmc: Add a new callback function to perform the 74 clocks cycle sequence"
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:50 +0000 (10:53 +0200)]
Revert "mmc: Add a new callback function to perform the 74 clocks cycle sequence"

This reverts commit 318a7a576bc49aa8b4207e694d3fbd48c663d6ac.

The last and only user of this callback had been the omap_hsmmc driver.
It is not used anymore. Removing the callback.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: omap_hsmmc: don't fill the send_init_stream callback
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:49 +0000 (10:53 +0200)]
mmc: omap_hsmmc: don't fill the send_init_stream callback

This is not required. The MMC core sends CMD0 right after the
initialization and it serves the same purpose.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: omap_hsmmc: reset FSM for DAT and CMD lines if needed before a new command
Jean-Jacques Hiblot [Tue, 2 Jul 2019 08:53:48 +0000 (10:53 +0200)]
mmc: omap_hsmmc: reset FSM for DAT and CMD lines if needed before a new command

It sometimes happen that the PSTATE register does not indicate that the
bus is ready when it really is. This usually happens after a mode switch.
In that case it makes sense to reset the FSM handling the CMD and DATA

Also reset the FSMs if the STATE register cannot be cleared. This also
sometimes happens after a mode switch.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agommc: rpmb: fix response type of CMD25
Akio Hirayama [Fri, 28 Jun 2019 12:16:25 +0000 (21:16 +0900)]
mmc: rpmb: fix response type of CMD25

The response type of CMD25 is R1 instead of R1b.

Signed-off-by: Akio Hirayama <hirayama.akio@socionext.com>
[masahiro: add log ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: sdhci: Implement SDHCI card detect
T Karthik Reddy [Tue, 25 Jun 2019 11:39:04 +0000 (13:39 +0200)]
mmc: sdhci: Implement SDHCI card detect

Card detect function implemented for SDHCI framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
5 years agommc: sdhci: Read cd-gpio from devicetree
T Karthik Reddy [Tue, 25 Jun 2019 11:39:03 +0000 (13:39 +0200)]
mmc: sdhci: Read cd-gpio from devicetree

This patch reads cd-gpio property from devicetree

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
5 years agommc: Read sd card detect properties from DT
T Karthik Reddy [Tue, 25 Jun 2019 11:39:02 +0000 (13:39 +0200)]
mmc: Read sd card detect properties from DT

This patch reads card detect properties from device tree &
added mmc capability macros in mmc.h.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
5 years agommc: mvebu: Remove unused MMC_CAP.. macros
T Karthik Reddy [Tue, 25 Jun 2019 11:39:01 +0000 (13:39 +0200)]
mmc: mvebu: Remove unused MMC_CAP.. macros

Removed MMC_CAP_NONREMOVABLE, MMC_CAP_NEEDS_POLL macros from
mvebu_mmc.h to avoid redefining of these macros when compiled with
mvebu based configs.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
5 years agoMerge tag 'u-boot-stm32-20190712' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Sun, 14 Jul 2019 13:09:49 +0000 (09:09 -0400)]
Merge tag 'u-boot-stm32-20190712' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- syscon: add support for power off
- stm32mp1: add op-tee config
- stm32mp1: add specific commands: stboard and stm32key
- add stm32 mailbox driver
- solve many stm32 warnings when building with W=1
- update stm32 gpio driver

5 years agoMerge branch '2019-07-12-master-imports'
Tom Rini [Sun, 14 Jul 2019 13:05:20 +0000 (09:05 -0400)]
Merge branch '2019-07-12-master-imports'

- First round of TI Davinci updates
- Some OMAP3 DM updates
- Other misc updates

5 years agotest: Disable pci_ep test for now
Tom Rini [Sun, 14 Jul 2019 01:18:37 +0000 (21:18 -0400)]
test: Disable pci_ep test for now

This test is currently broken so disable it for now.

Cc: Ramon Fried <ramon.fried@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoARM: dts: logicpd som-lvs and torpedos: Shrink SPL DTB
Adam Ford [Wed, 12 Jun 2019 20:26:26 +0000 (15:26 -0500)]
ARM: dts: logicpd som-lvs and torpedos: Shrink SPL DTB

Since we have limited resources in SPL, it is the best interest
to keep the SPL as small as possible and that includes the DTB.
There are a few items in the device tree that can be removed,
because these boards don't use them.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoregulator: Allow autosetting fixed regulators
Sven Schwermer [Wed, 12 Jun 2019 06:32:38 +0000 (08:32 +0200)]
regulator: Allow autosetting fixed regulators

Fixed regulators don't have a set_value method. Therefore, trying to
set their value will always return -ENOSYS.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agogpio: add gpio-hog support
Heiko Schocher [Wed, 12 Jun 2019 04:11:46 +0000 (06:11 +0200)]
gpio: add gpio-hog support

add gpio-hog support. GPIO hogging is a mechanism
providing automatic GPIO request and configuration
as part of the gpio-controller's driver probe function.

for more infos see:
doc/device-tree-bindings/gpio/gpio.txt

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Michal Simek <michal.simek@xilinx.com> (zcu102)
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agoARM: dts: logicpd-som-lv: Resync with Kernel 5.1.9
Adam Ford [Wed, 12 Jun 2019 01:40:42 +0000 (20:40 -0500)]
ARM: dts: logicpd-som-lv: Resync with Kernel 5.1.9

The MMC card-detect pin was incorrectly defined which was fixed.
This patch resync's the dts and removes the u-boot specific fix.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: dts: da850: Resync with Linux 5.1.9
Adam Ford [Wed, 12 Jun 2019 01:28:44 +0000 (20:28 -0500)]
ARM: dts: da850: Resync with Linux 5.1.9

The da850.dtsi file had some changes.  This patch pulls in the
changes from Kernel 5.1.9

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: davinci: da850: Manual pinmux only when PINCTRL not available
Adam Ford [Mon, 10 Jun 2019 18:25:08 +0000 (13:25 -0500)]
ARM: davinci: da850: Manual pinmux only when PINCTRL not available

With a recent update to the pinctrl-single driver and the fact
that the da850evm has both DM and OF_CONTROL working in both SPL
and U-Boot, some of the manual pinmuxing can be setup to only
be activated when either the driver doesn't have DM for it, or
when CONFIG_PINMUX isn't available (only during SPL).  If the
code ever shrinks enough to support PINCTRL in SPL, a lot of this
can go away.  This also remove some manual pinmuxing not needed
by SPL to give SPL a little more breathing room.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agopinctrl: pinctrl-single: Add 'pinctrl-single, bits' support
Adam Ford [Mon, 10 Jun 2019 18:15:55 +0000 (13:15 -0500)]
pinctrl: pinctrl-single: Add 'pinctrl-single, bits' support

The TI Davinci (da850/l138/am1808) use pinctrl-single,bits for
pinmuxing peripherals.  This patch allosw the pinctrl-single
driver to parse the pinctrl-single,bits options and correctly
setup devices.

Signed-off-by: Adam Ford <aford173@gmail.com>