oweals/u-boot.git
4 years agobuildman: Allow ignoring warnings in the return code
Simon Glass [Wed, 18 Mar 2020 15:42:44 +0000 (09:42 -0600)]
buildman: Allow ignoring warnings in the return code

Sometimes we don't want buildman to return failure if it seems warnings.
Add a -W option to support this. If buildman detects warnings (and no
errors) it will return an exit code of 0 (success).

Note that the definition of 'warnings' includes the migration warnings
produced by U-Boot, such as:

    ===================== WARNING ======================
    This board does not use CONFIG_DM_MMC. Please update
    ...
    ====================================================

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agobuildman: Update help for -d
Simon Glass [Wed, 18 Mar 2020 15:42:43 +0000 (09:42 -0600)]
buildman: Update help for -d

This help is a bit ambiguous. It only does anything if asked to show size
changes with -S. Update the help and the function comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobulidman: Add support for a simple build
Simon Glass [Wed, 18 Mar 2020 15:42:42 +0000 (09:42 -0600)]
bulidman: Add support for a simple build

It is useful to run a simple build and put all the output in a single
directory. Add a -w option to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobuildman: Document the members of BuilderJob
Simon Glass [Wed, 18 Mar 2020 15:42:41 +0000 (09:42 -0600)]
buildman: Document the members of BuilderJob

This class has a few more members now. Add documentation for them and fix
a nit in the 'commits' comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agomain: Drop show_boot_progress() prototype
Simon Glass [Wed, 18 Mar 2020 15:42:40 +0000 (09:42 -0600)]
main: Drop show_boot_progress() prototype

This is defined in bootstage.h and is not called in this file anyway. Drop
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agosandbox: Add documentation about required/useful packages
Simon Glass [Wed, 18 Mar 2020 15:42:39 +0000 (09:42 -0600)]
sandbox: Add documentation about required/useful packages

Quite a few packages are used by sandbox or tools. Add a list of these to
help people setting up for the first time.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoMerge branch '2020-04-10-gitlab-travis-gcc9' into next
Tom Rini [Fri, 10 Apr 2020 22:28:20 +0000 (18:28 -0400)]
Merge branch '2020-04-10-gitlab-travis-gcc9' into next

- Switch over to using GCC-9.2.0 in our Azure, GitLab and Travis-CI
  instances

4 years agotravis: Switch to gcc 9.2.0
Bin Meng [Mon, 6 Apr 2020 13:07:00 +0000 (06:07 -0700)]
travis: Switch to gcc 9.2.0

Use gcc 9.2.0 to do the build testing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agobuildman: Support fetching gcc 9.2.0
Bin Meng [Mon, 6 Apr 2020 13:06:59 +0000 (06:06 -0700)]
buildman: Support fetching gcc 9.2.0

This adds support to fetch gcc 9.2.0 toolchains.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agovideo: sunxi: Change sunxi_get_mon_desc() to not return NULL for the default case
Bin Meng [Mon, 6 Apr 2020 13:06:58 +0000 (06:06 -0700)]
video: sunxi: Change sunxi_get_mon_desc() to not return NULL for the default case

When building with gcc 9.2.0, the following build warning was seen:

  drivers/video/sunxi/sunxi_display.c: In function 'video_hw_init':
  drivers/video/sunxi/sunxi_display.c:1217:2:
    error: '%s' directive argument is null [-Werror=format-overflow=]

Change sunxi_get_mon_desc() to not return NULL for the default case,
to fix the compiler warning.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agoazure/gitlab/travis: Add RISC-V SPL testing
Bin Meng [Sat, 28 Mar 2020 14:25:29 +0000 (07:25 -0700)]
azure/gitlab/travis: Add RISC-V SPL testing

This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64,
we test SPL running in M-mode and U-Boot proper running in S-mode,
with a 4-core SMP configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agotest/py: Update u_boot_utils.find_ram_base to bypass the low 2MiB memory
Bin Meng [Sat, 28 Mar 2020 14:25:28 +0000 (07:25 -0700)]
test/py: Update u_boot_utils.find_ram_base to bypass the low 2MiB memory

On some RISC-V targets the low memory is protected that prevents
S-mode U-Boot from access.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoazure/gitlab/travis: Add qemu-riscv32 testing
Bin Meng [Sat, 28 Mar 2020 14:25:27 +0000 (07:25 -0700)]
azure/gitlab/travis: Add qemu-riscv32 testing

This adds the qemu-riscv32_defconfig test configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agotravis: Build GRUB image for RISC-V 32-bit and 64-bit
Bin Meng [Sat, 28 Mar 2020 14:25:26 +0000 (07:25 -0700)]
travis: Build GRUB image for RISC-V 32-bit and 64-bit

This adds the GRUB image build for RISC-V 32-bit and 64-bit.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agotravis: Replace pre-built ARM/ARM64 GRUB images with the one built from source
Bin Meng [Sat, 28 Mar 2020 14:25:25 +0000 (07:25 -0700)]
travis: Replace pre-built ARM/ARM64 GRUB images with the one built from source

As of today travis uses the pre-built GRUB ARM/ARM64 images from
opensuse. But azure/gitlab are using images built from GRUB 2.04
source. This updates travis to build GRUB ARM/ARM64 UEFI targets
from source, to keep in sync with azure/gitlab.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoAzure/GitLab: Move to latest Docker images
Tom Rini [Fri, 10 Apr 2020 19:53:01 +0000 (15:53 -0400)]
Azure/GitLab: Move to latest Docker images

- Based on newer 'bionic' snapshot
- GCC 9.0
- RISCV GRUB binaries

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agokconfig / kbuild: Re-sync with Linux 4.19
Tom Rini [Fri, 27 Mar 2020 15:46:27 +0000 (11:46 -0400)]
kconfig / kbuild: Re-sync with Linux 4.19

Align Kconfig and Kbuild logic to Linux 4.19 release with minimal impact
on files outside of this scope.

Our previous Kconfig sync was done by commit 5972ff077e0f ("kconfig /
kbuild: re-sync with Linux 4.18").

In this particular re-sync in order to keep clang support working a
number of related changes needed to be pulled in that had been missed
previously.  Not all of these changes we easily traceable and so have
been omitted from the list below.

The imported Linux commits are:
[From prior to v4.18]
9f3f1fd29976 kbuild: Add __cc-option macro
d7f14c66c273 kbuild: Enable Large File Support for hostprogs
6d79a7b424a5 kbuild: suppress warnings from 'getconf LFS_*'
24403874316a Shared library support
86a9df597cdd kbuild: fix linker feature test macros when cross compiling with Clang
0294e6f4a000 kbuild: simplify ld-option implementation

[From v4.18 to v4.19]
96f14fe738b6 kbuild: Rename HOSTCFLAGS to KBUILD_HOSTCFLAGS
10844aebf448 kbuild: Rename HOSTCXXFLAGS to KBUILD_HOSTCXXFLAGS
b90a368000ab kbuild: Rename HOSTLDFLAGS to KBUILD_HOSTLDFLAGS
8377bd2b9ee1 kbuild: Rename HOST_LOADLIBES to KBUILD_HOSTLDLIBS
f92d19e0ef9b kbuild: Use HOST*FLAGS options from the command line
4ab3b80159d4 kconfig: check for pkg-config on make {menu,n,g,x}config
693359f7ac90 kconfig: rename SYMBOL_AUTO to SYMBOL_NO_WRITE
f60b992e30ff kbuild: replace $(LDFLAGS) $(ldflags-y) with $(ld_flags)
2fb9279f2c3e kbuild: change ld_flags to contain LDFLAGS_$(@F)
c931d34ea085 arm64: build with baremetal linker target instead of Linux when available
5accd7f3360e kconfig: handle format string before calling conf_message_callback()
a2ff4040151a kconfig: rename file_write_dep and move it to confdata.c
0608182ad542 kconfig: split out useful helpers in confdata.c
adc18acf42a1 kconfig: remove unneeded directory generation from local*config
79123b1389cc kconfig: create directories needed for syncconfig by itself
16952b77d8b5 kconfig: make syncconfig update .config regardless of sym_change_count
d6c6ab93e17f kbuild: remove deprecated host-progs variable
56869d45e364 kconfig: fix the rule of mainmenu_stmt symbol
c151272d1687 kconfig: remove unused sym_get_env_prop() function
1880861226c1 kconfig: remove P_ENV property type
e3fd9b5384f3 scripts/dtc: consolidate include path options in Makefile
4bf6a9af0e91 kconfig: add build-only configurator targets
f1575595d156 kconfig: error out when seeing recursive dependency
5e8c5299d315 kconfig: report recursive dependency involving 'imply'
f498926c47aa kconfig: improve the recursive dependency report
98a4afbfafd2 kconfig: fix "Can't open ..." in parallel build
9a9ddcf47831 kconfig: suppress "configuration written to .config" for syncconfig
87a32e624037 kbuild: pass LDFLAGS to recordmcount.pl
d503ac531a52 kbuild: rename LDFLAGS to KBUILD_LDFLAGS
217c3e019675 disable stringop truncation warnings for now
bc8d2e20a3eb kconfig: remove a spurious self-assignment
fd65465b7016 kconfig: do not require pkg-config on make {menu,n}config
5a4630aadb9a ftrace: Build with CPPFLAGS to get -Qunused-arguments

Note that this adds new cleanup work to do in that we should adapt the
shared library support we have to what is now upstream.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
4 years agoMerge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 8 Apr 2020 12:48:31 +0000 (08:48 -0400)]
Merge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next

- clk: meson-g12a: missing break
- sync all Amlogic DT from Linux v5.6-rc2
- MMC clock fixups
- add support for Libre Computer AML-S905D-PC and AML-S912-PC

4 years agoMerge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot...
Tom Rini [Tue, 7 Apr 2020 15:58:44 +0000 (11:58 -0400)]
Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2020.07

common:
- Align ENV_FAT_INTERFACE
- Fix MAC address source print log
- Improve based autodetection code

xilinx:
- Enable netconsole

Microblaze:
- Setup default ENV_OFFSET/ENV_SECT_SIZE

Zynq:
- Multiple DT updates/fixes
- Use DEVICE_TREE environment variable for DTB selection
- Switch to single zynq configuration
- Enable NOR flash via DM
- Minor SPL print removal
- Enable i2c mux driver

ZynqMP:
- Print multiboot register
- Enable cache commands in mini mtest
- Multiple DT updates/fixes
- Fix firmware probing when driver is not enabled
- Specify 3rd backup RAM boot mode in SPL
- Add SPL support for zcu102 v1.1 and zcu111 revA
- Redesign debug uart enabling and psu_init delay
- Enable full u-boot run from EL3
- Enable u-boot.itb generation without ATF with U-Boot in EL3

Versal:
- Enable distro default
- Enable others SPI flashes
- Enable systems without DDR

Drivers:
- Gem:
  - Flush memory after freeing
  - Handle mdio bus separately
- Watchdog:
  - Get rid of unused global data pointer
  - Enable window watchdog timer
- Serial:
  - Change reinitialization logic in zynq serial driver

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoserial: zynq: Change uart initialization logic
Michal Simek [Tue, 24 Mar 2020 10:31:42 +0000 (11:31 +0100)]
serial: zynq: Change uart initialization logic

The commit a673025535ae ("serial: zynq: Initialize uart only before
relocation") introduced code which detects relocation which is working for
single uart instance. With multiple instances in place there is a need to
enable and setup every instance. That's why detect if TX is enabled. If it
is then don't initialize uart again.
In post probe setbrg is called to setup baudrate but values should be the
same.

As a side effect of this change is that DECLARE_GLOBAL_DATA_PTR can be
removed completely.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agowatchdog: versal: Add support for Xilinx window watchdog
Ashok Reddy Soma [Wed, 11 Mar 2020 09:06:04 +0000 (03:06 -0600)]
watchdog: versal: Add support for Xilinx window watchdog

Add support for Xilinx window watchdog, which can be found on
Versal platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agoarm64: xilinx: Never touch DDR if system has no DDR
Michal Simek [Thu, 19 Mar 2020 09:23:56 +0000 (10:23 +0100)]
arm64: xilinx: Never touch DDR if system has no DDR

If DDR is not mapped do not touch it. Default
XILINX_OF_BOARD_DTB_ADDR is pointing to DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: versal: Disable DDR cache mapping if DDR is not enabled
Michal Simek [Wed, 18 Mar 2020 12:45:21 +0000 (13:45 +0100)]
arm64: versal: Disable DDR cache mapping if DDR is not enabled

Similar change was done in past by commit 3b644a3c2f69
("arm64: zynqmp: Provide a config to not map DDR region in MMU table").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add support for u-boot.itb generation without ATF
Michal Simek [Mon, 23 Mar 2020 13:40:52 +0000 (14:40 +0100)]
arm64: zynqmp: Add support for u-boot.itb generation without ATF

If ATF doesn't exist generate u-boot.itb without it and let U-Boot run in
EL3. Still keep warning to let user know that ATF/BL31 is missing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Reorder parameters for zynqmp_mmio_write()
Michal Simek [Mon, 23 Mar 2020 13:02:01 +0000 (14:02 +0100)]
arm64: zynqmp: Reorder parameters for zynqmp_mmio_write()

Parameter order is not correct based on zynqmp_mmio_write() declaration.

Fixes: be52372ff1bb ("arm64: zynqmp: Use zynqmp_mmio_read/write functions")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agofirmware: zynqmp: Enable IPI code calling also in EL3
Michal Simek [Mon, 23 Mar 2020 13:42:34 +0000 (14:42 +0100)]
firmware: zynqmp: Enable IPI code calling also in EL3

U-Boot proper can still run in EL3 without using firmware interface wired
via ATF. For supporting this use case there is a need to check EL level
where U-Boot runs and based on that choose the way how to talk to firmware.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Move timeout for clock propagation below psu_init
Michal Simek [Fri, 20 Mar 2020 07:59:02 +0000 (08:59 +0100)]
arm64: zynqmp: Move timeout for clock propagation below psu_init

Delay required for clock propagation is tighly coupled with initialization
done in psu_init(). That's why call it also for u-boot proper with
CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add support for debug uart also for U-Boot proper
Michal Simek [Tue, 7 Jan 2020 08:02:52 +0000 (09:02 +0100)]
arm64: zynqmp: Add support for debug uart also for U-Boot proper

board_early_init_f() is the right location where debug uart can be
configurated (after MIO initialization).
The patch is taking this call from SPL to also make it available for U-Boot
proper.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agolib: Improve _parse_integer_fixup_radix base 16 detection
Michal Simek [Fri, 7 Feb 2020 12:04:10 +0000 (13:04 +0100)]
lib: Improve _parse_integer_fixup_radix base 16 detection

Base autodetection is failing for this case:
if test 257 -gt 3ae; then echo first; else echo second; fi

It is because base for 3ae is recognized by _parse_integer_fixup_radix() as
10. The code detects the first char which is not between 'a'/'A' or 'f'/'F'
to change base from dec to hex.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Shiril Tichkule <shirilt@xlinx.com>
4 years agoarm64: zynqmp: Enable netconsole for ZynqMP
Michal Simek [Wed, 18 Mar 2020 08:19:02 +0000 (09:19 +0100)]
arm64: zynqmp: Enable netconsole for ZynqMP

It is nice feature

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp Add support for zcu111 revA
Michal Simek [Mon, 16 Mar 2020 11:40:16 +0000 (12:40 +0100)]
arm64: zynqmp Add support for zcu111 revA

Add low level configuration for zcu111 for easier SPL run.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agonet: eth-uclass: Fix message if mac is coming from DT or ROM
Michal Simek [Mon, 16 Mar 2020 10:36:17 +0000 (11:36 +0100)]
net: eth-uclass: Fix message if mac is coming from DT or ROM

When local-mac-address DT property is specified it is reported the same way
as address read from eeprom/ROM. Show properly if mac address is coming
from DT or ROM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Enable i2c mux support for all boards
Michal Simek [Thu, 5 Mar 2020 07:17:49 +0000 (08:17 +0100)]
ARM: zynq: Enable i2c mux support for all boards

zc702/zc706 have pca9548 i2c muxes that's why enable the driver by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp Add support for zcu102 rev1.1
Michal Simek [Thu, 12 Mar 2020 08:03:13 +0000 (09:03 +0100)]
arm64: zynqmp Add support for zcu102 rev1.1

rev1.1 has different DDR sodimm module that's why it requires different DDR
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add third backup bootmode
Michal Simek [Wed, 11 Mar 2020 14:00:51 +0000 (15:00 +0100)]
arm64: zynqmp: Add third backup bootmode

I found this issue when was running py/test.py on zcu102 which is for me by
default setup to SD boot mode without any way to change boot mode.
Alternative software bootmode selection to JTAG is not working because JTAG
mode is 0 which also reset value for it. That's why saying SPL to take
u-boot.itb from RAM instead of SD in SD boot mode is not possible via
alternative bootmode selection.
That's why setup third boot mode to JTAG(BOOT_DEVICE_RAM) as final
fallback.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agowatchdog: cadence: Remove DECLARE_GLOBAL_DATA_PTR from driver
Michal Simek [Mon, 9 Mar 2020 07:44:43 +0000 (08:44 +0100)]
watchdog: cadence: Remove DECLARE_GLOBAL_DATA_PTR from driver

gd is not used in the driver that's why declaration is not needed at all.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agonet: zynq-gem: Setup and use mdio base separately
Michal Simek [Mon, 30 May 2016 08:43:11 +0000 (10:43 +0200)]
net: zynq-gem: Setup and use mdio base separately

Not all IPs have private MDIO bus and MDIO bus should be shared between
several IPs. In past one patch tried to implement it
(https://lists.denx.de/pipermail/u-boot/2018-February/319285.html)
in pretty raw way but it is not the cleanest solution.
This patch is just taking the part of that solution to be able to handle it
over releases without conflicts.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Do not print message about boot device
Michal Simek [Thu, 5 Mar 2020 10:01:50 +0000 (11:01 +0100)]
ARM: zynq: Do not print message about boot device

This information is shown already that's why there is no reason to print it
again via custom prints.

U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 09:59:05 +0100)
mmc boot
Trying to boot from MMC1

or

U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 10:49:46 +0100)
qspi boot
Trying to boot from SPI

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Check firmware node when driver is enabled
Michal Simek [Wed, 4 Mar 2020 07:48:16 +0000 (08:48 +0100)]
arm64: zynqmp: Check firmware node when driver is enabled

ZynqMP mini configurations works without PMU firmware that's why there is
no reason to enable the driver and check if it was probed properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: versal: Enable support for Gigadevice/ISSI flashes
T Karthik Reddy [Mon, 17 Feb 2020 11:49:40 +0000 (04:49 -0700)]
arm64: versal: Enable support for Gigadevice/ISSI flashes

Enable support for Gigadevice/ISSI flash parts for Versal platform.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoenv: Make mmc as default option for CONFIG_ENV_FAT_INTERFACE
Michal Simek [Tue, 25 Feb 2020 14:50:33 +0000 (15:50 +0100)]
env: Make mmc as default option for CONFIG_ENV_FAT_INTERFACE

All configs are using mmc as default fat interface. That's why make it
default for everybody.
The reason for this patch is to make it default for Xilinx Zynq platform
which is not listed there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Enable DM for CFI NOR flash
Michal Simek [Tue, 25 Feb 2020 14:29:40 +0000 (15:29 +0100)]
ARM: zynq: Enable DM for CFI NOR flash

With multi defconfig NOR flash information about NOR should be taken from
DT that's why there is no reason to specify address and sizes via fixed
config.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Do not report NOR flash detection failure
Michal Simek [Tue, 25 Feb 2020 13:55:58 +0000 (14:55 +0100)]
ARM: zynq: Do not report NOR flash detection failure

With multi defconfig targeting several board configurations bug report like
below is so verbose.
Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
0 Bytes

Do not report that message and simply say "Flash: 0 Bytes" because most of
Zynq boards are using different type of flashes than NOR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agonand: raw: zynq: Do not try to probe driver if nand flash is disabled
Michal Simek [Tue, 25 Feb 2020 13:40:42 +0000 (14:40 +0100)]
nand: raw: zynq: Do not try to probe driver if nand flash is disabled

There is no reason to continue when DT status property indicates that NAND
flash is disabled. But that means that NOR flash should be present that's
why try it find it out.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agonand: raw: Do not free xnand structure
Michal Simek [Tue, 25 Feb 2020 13:51:48 +0000 (14:51 +0100)]
nand: raw: Do not free xnand structure

xnand structure is private data structure and it is handled by core and
probe shouldn't touch it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration
Michal Simek [Wed, 26 Feb 2020 10:11:38 +0000 (11:11 +0100)]
ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration

There is no real need to include full DT when only some nodes are enough to
use. It will save some space.

Retested with FSBL for initial SoC setup. SPL didn't work.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agonet: zynq_gem: Add cache flush to zynq_gem_free_pkt
Ashok Reddy Soma [Sun, 23 Feb 2020 15:01:29 +0000 (08:01 -0700)]
net: zynq_gem: Add cache flush to zynq_gem_free_pkt

Add cache flush to zynq_gem_free_pkt. This is necessary
because some net routines would modify this buffer in place.
The cache_invalidate in the zynq_gem_recv function would cause
the modifications to the buffer to overwrite the DMA from the GEM,
if cache coherency is not enabled in the GEM, the next time the
buffer is in use.

Flushing the cache when the buffer is no longer in use by the
net functions ensures that the GEM DMA is going to take place
into a clean buffer.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Switch to single zynq configurations
Michal Simek [Thu, 13 Feb 2020 14:03:29 +0000 (15:03 +0100)]
ARM: zynq: Switch to single zynq configurations

There are a lot of zynq configurations which can be merged together and use
only one for all. The similar change has been done for ZynqMP by commit
be1b6c32d940 ("arm64: zynqmp: Use zynqmp_virt platform")

Build SPL with u-boot.img for zc706 like this.
export DEVICE_TREE=zynq-zc706 && make xilinx_zynq_virt_defconfig && make -j8
u-boot.img is generic for all boards.

Tested on Zybo, zc702, zc706, zc770-xm011-x16, cc108 and microzed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoMakefile: Add environment variable DEVICE_TREE to header
Michal Simek [Tue, 18 Feb 2020 14:03:13 +0000 (15:03 +0100)]
Makefile: Add environment variable DEVICE_TREE to header

Users have option to overwrite default device tree
(CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE.

Feature has been added long time ago by commit 74de8c9a1672
("dts/Makefile: Build the user specified dts") for a little bit different
reason.

But this variable can be also used for different purpose like choosing
proper configuration from FIT image in SPL.
And this is the functionality I would like to use on Xilinx Zynq devices
that current u-boot.img can be composed in the same way based on OF_LIST
and different configuration is taken based on platform specific SPL.
SPL requires low level ps7_init_gpl configuration that's why different
boards require different SPL with fixed board_fit_config_name_match().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoARM: zynq: Change zc770 xm011 Nand x16 configurations
Michal Simek [Tue, 18 Feb 2020 14:58:33 +0000 (15:58 +0100)]
ARM: zynq: Change zc770 xm011 Nand x16 configurations

Instead of symlink include origin file and just change model description.
Difference is not in DT but in ps7_init configurations which is taken based
on device tree name that's why the same DT can't be used.

Also update model and update comments to match configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoenv: Kconfig: Adding default values for Microblaze
Varalaxmi Bingi [Wed, 5 Feb 2020 10:58:20 +0000 (03:58 -0700)]
env: Kconfig: Adding default values for Microblaze

This patch will add default values for ENV_OFFSET
and ENV_SECT_SIZE for Microblaze.

Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Move pinctrl node under firmware node
Michal Simek [Tue, 18 Feb 2020 12:04:06 +0000 (13:04 +0100)]
arm64: zynqmp: Move pinctrl node under firmware node

Pinctrl is handled via firmare interface that's why move it there without
reg property and new compatible string.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Fix GIC compatible property
Michal Simek [Tue, 18 Feb 2020 09:01:26 +0000 (10:01 +0100)]
arm64: zynqmp: Fix GIC compatible property

dtbs_check is showing warning around GIC compatible property as
interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic']
is not valid under any of the given schemas

Similar change has been done also by Linux kernel commit 5400cdc1410b
("ARM: dts: sunxi: Fix GIC compatible")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Fix addresses in partition definitions
Michal Simek [Wed, 19 Feb 2020 09:57:34 +0000 (10:57 +0100)]
ARM: zynq: Fix addresses in partition definitions

Node name should be <name>@<address> which is not how partitions are
described.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Fix addresses in partition definitions
Michal Simek [Fri, 14 Feb 2020 13:19:56 +0000 (14:19 +0100)]
arm64: zynqmp: Fix addresses in partition definitions

Node name should be <name>@<address> which is not how partitions are
described.

Issue was found by running dtbs_check as:
flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot',
'partition@qspi-linux', 'partition@qspi-rootfs'
do not match any of the regexes: ...

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Sync DP subsystem
Michal Simek [Tue, 18 Feb 2020 08:24:08 +0000 (09:24 +0100)]
arm64: zynqmp: Sync DP subsystem

Sync DP subsystem with the latest state in Xilinx U-Boot repository.
This binding hasn't been approved in mainline Linux but it is much better
than ancient version which this patch removes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Do not duplicate flash partition label property
Amit Kumar Mahapatra [Mon, 17 Feb 2020 14:50:05 +0000 (07:50 -0700)]
arm64: zynqmp: Do not duplicate flash partition label property

In kernel 5.4, support has been added for reading MTD devices via
the nvmem API.
For this the mtd devices are registered as read-only NVMEM providers
under sysfs with the same name as the flash partition label property.

So if flash partition label property of multiple flash devices are identical
then the second mtd device fails to get registered as a NVMEM provider.

This patch fixes the issue by having different label property for different
flashes.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: dts: zynqmp: Add clk cells for sdhci
Ashok Reddy Soma [Tue, 18 Feb 2020 06:32:57 +0000 (23:32 -0700)]
arm64: dts: zynqmp: Add clk cells for sdhci

Add clock-cells and clock-output-names for sdhci0 and sdhci1.
These are needed for linux sdhci driver from 5.4 version onwards.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Remove second copy of reset-controller
Michal Simek [Tue, 18 Feb 2020 08:20:21 +0000 (09:20 +0100)]
arm64: zynqmp: Remove second copy of reset-controller

Reset controller is handled via firmware that's why it should be the part
of firmware node. Origin solution hasn't been removed when above change was
applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in
zynqmp.dtsi").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards
Manish Narani [Fri, 14 Feb 2020 06:37:30 +0000 (23:37 -0700)]
arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards

Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards.
User can remove this property to enable the UHS mode. This is to keep
the same speed (HS) modes across all the stages of the Linux Boot. Due
to power cycling limitation of some of the ZynqMP boards, some SD cards
don't get power cycled and are failing in Linux.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
4 years agoarm64: zynqmp: Sync zynqmp fpga manager with mainline
Nava kishore Manne [Fri, 18 Oct 2019 16:07:32 +0000 (18:07 +0200)]
arm64: zynqmp: Sync zynqmp fpga manager with mainline

Sync zynqmp fpga manager with mainline.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Remove unused zynqmp-clk.dtsi
Michal Simek [Tue, 18 Feb 2020 08:10:18 +0000 (09:10 +0100)]
arm64: zynqmp: Remove unused zynqmp-clk.dtsi

All boards have been converted to firmware based driver that's why we can
remove this file now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Fix spi name node
Michal Simek [Thu, 26 Sep 2019 10:53:09 +0000 (12:53 +0200)]
ARM: zynq: Fix spi name node

None name address should be aligned with address. DTC 1.5.1 is reporting
issues related to that.

arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning
 (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format
 error, expected "1"
arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning
(spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format
 error, expected "2"

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Update Copyright years to 2020
Michal Simek [Tue, 18 Feb 2020 07:38:06 +0000 (08:38 +0100)]
arm64: zynqmp: Update Copyright years to 2020

Trivial change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Replace gpio-key,wakeup with wakeup source
Michal Simek [Tue, 18 Feb 2020 11:06:14 +0000 (12:06 +0100)]
arm64: zynqmp: Replace gpio-key,wakeup with wakeup source

The same change has been done for Zynq by commit 1241c72b6db1
("ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property")
in mainline Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property
Sudeep Holla [Fri, 21 Dec 2018 18:12:13 +0000 (18:12 +0000)]
ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property

Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.

Replace the legacy properties with the unified "wakeup-source"
property introduced in the Linux kernel commit 700a38b27eef
("Input: gpio_keys - switch to using generic device properties")

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: dts: zc702: Fix I2C bus warnings
Quanyang Wang [Mon, 23 Sep 2019 09:47:08 +0000 (17:47 +0800)]
ARM: dts: zc702: Fix I2C bus warnings

The dtc has new checks for I2C and SPI buses.
Fix the warnings in node names and unit-addresses.

Warning from Linux kernel:
arch/arm/boot/dts/zynq-zc702.dts:187.13-190.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@52: I2C bus unit address format error, expected "34"
arch/arm/boot/dts/zynq-zc702.dts:191.13-194.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@53: I2C bus unit address format error, expected "35"
arch/arm/boot/dts/zynq-zc702.dts:195.13-198.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@54: I2C bus unit address format error, expected "36"

Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Enable cache command for mini mtest configuration
Michal Simek [Mon, 17 Feb 2020 11:14:32 +0000 (12:14 +0100)]
arm64: zynqmp: Enable cache command for mini mtest configuration

Enable cache commands by default for mtest configuration. It is good to be
able to enable/disable caches when you test memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoconfigs: versal: Add CONFIG_DISTRO_DEFAULTS to versal defconfig
T Karthik Reddy [Fri, 14 Feb 2020 05:26:56 +0000 (22:26 -0700)]
configs: versal: Add CONFIG_DISTRO_DEFAULTS to versal defconfig

Add DISTRO_DEFAULTS config to versal virt defconfig file which is
suitable for booting general purpose Linux distributions. Remove
other configs which are selected by default by DISTRO_DEFAULTS
configuration.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Print multiboot register value in EL3
Michal Simek [Tue, 11 Feb 2020 11:43:14 +0000 (12:43 +0100)]
arm64: zynqmp: Print multiboot register value in EL3

Multi boot register can be used for using different boot images and design
better boot strategy. Let EL3 SPL or U-Boot to read it and print it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: dts: meson: add libretech-pc support
Jerome Brunet [Thu, 5 Mar 2020 11:12:40 +0000 (12:12 +0100)]
arm64: dts: meson: add libretech-pc support

Add support for the Amlogic based libretech-pc platform.
This platform comes with 2 variant, based on the s905d or s912 SoC.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: update board/amlogic/q200/MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoarm64: dts: meson: import libretech-pc from linux v5.6-rc2
Jerome Brunet [Thu, 5 Mar 2020 11:12:39 +0000 (12:12 +0100)]
arm64: dts: meson: import libretech-pc from linux v5.6-rc2

Sync the libretech-pc device tree from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoarm64: dts: meson: sync dt and bindings from v5.6-rc2
Jerome Brunet [Thu, 5 Mar 2020 11:12:38 +0000 (12:12 +0100)]
arm64: dts: meson: sync dt and bindings from v5.6-rc2

Sync the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")

The only exception to this is the mmc pinctrl pin bias of gxl SoC family.
This is a fix which found its way to u-boot but not Linux yet.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoclk: meson: reset mmc clock on probe
Jerome Brunet [Thu, 5 Mar 2020 11:12:37 +0000 (12:12 +0100)]
clk: meson: reset mmc clock on probe

On some SoCs, depending on the boot device, the MMC clock block may be
left in a weird state by the ROM code, in which no decent clock may be
provided. Reset the related register to make sure a sane MMC clock is
ready for the controller.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agommc: meson-gx: enable input clocks
Jerome Brunet [Thu, 5 Mar 2020 11:12:36 +0000 (12:12 +0100)]
mmc: meson-gx: enable input clocks

Until now, the mmc clock was left in a good enough state by the ROM
code to be used by the controller. However on some SoC, if the ROM
code finds a bootloader on USB or SPI, it might leave the MMC clock
in state the controller cannot work with.

Enable the input clocks provided to the mmc controller. While the
u-boot mmc controller driver is not doing fancy settings like the Linux,
it at least needs to make these clocks are running.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agodt-bindings: leds: import common led bindings from linux v5.5
Jerome Brunet [Thu, 5 Mar 2020 11:12:35 +0000 (12:12 +0100)]
dt-bindings: leds: import common led bindings from linux v5.5

Import the common leds bindings definition from linux
d5226fa6dbae ("Linux 5.5")

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoclk: meson-g12a: missing break
Heinrich Schuchardt [Sat, 15 Feb 2020 20:10:54 +0000 (21:10 +0100)]
clk: meson-g12a: missing break

Add missing break for CLKID_PCIE_PLL in switch statement.

Reported by CppCheck.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Fixes: 08e09c263fdf ("clk: meson-g12a: Add PCIE PLL support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sat, 4 Apr 2020 23:20:45 +0000 (19:20 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

- net: sh_eth: Init the hardware before PHY access

4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Sat, 4 Apr 2020 23:20:26 +0000 (19:20 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- verdin-imx8mm board reST documentation update
- Intel Edison board ACPI table I2C/USB minor updates
- Fix a regression of ns16550 serial driver that breaks Intel Edison

4 years agoserial: ns16550: Fix ordering of getting base address
Bin Meng [Sat, 4 Apr 2020 01:35:32 +0000 (18:35 -0700)]
serial: ns16550: Fix ordering of getting base address

Currently the driver gets ns16550 base address in the driver
probe() routine, which may potentially break any ns16550 wrapper
driver that does additional initialization before calling
ns16550_serial_probe().

Things are complicated that we need consider ns16550 devices on
both simple-bus and PCI bus. To fix the issue we move the base
address assignment for simple-bus ns16550 device back to the
ofdata_to_platdata(), and assign base address for PCI ns16550
device in ns16550_serial_probe().

This is still not perfect. If any PCI bus based ns16550 wrapper
driver tries to access plat->base before calling probe(), it is
still subject to break.

Fixes: 720f9e1fdb0c9 ("serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()")
Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: acpi: Describe USB 3 host controller found on Intel Tangier
Andy Shevchenko [Thu, 26 Mar 2020 10:33:36 +0000 (12:33 +0200)]
x86: acpi: Describe USB 3 host controller found on Intel Tangier

USB 3 host controller may be described in ACPI to allow users alter
the properties or other features. Describe it for Intel Tangier SoC.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Add I²C timings to Intel Merrifield platform
Andy Shevchenko [Fri, 20 Mar 2020 17:59:21 +0000 (19:59 +0200)]
x86: acpi: Add I²C timings to Intel Merrifield platform

There is established way to provide I²C timings, or actually counters,
to the OS via ACPI. Fill them for Intel Merrifield platform.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc: board: verdin-imx8mm: use mainline TF-A
Igor Opaniuk [Thu, 5 Mar 2020 20:56:26 +0000 (22:56 +0200)]
doc: board: verdin-imx8mm: use mainline TF-A

1. Update build steps where mainline Trusted Firmware A is used.
2. Fix BL31_BASE to the proper one according to the SoC reference
manual.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Refactor XSDT handling in acpi_add_table()
Andy Shevchenko [Thu, 27 Feb 2020 14:00:51 +0000 (16:00 +0200)]
x86: acpi: Refactor XSDT handling in acpi_add_table()

There is no need to have an assignment to NULL for XSDT pointer.
Therefore, no need to assign it when rsdt_address is not set.
Because of above changes we may decrease indentation level as well.

While here, drop unnecessary parentheses.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agonet: sh_eth: Init the hardware before PHY access
Marek Vasut [Sat, 4 Apr 2020 13:01:22 +0000 (15:01 +0200)]
net: sh_eth: Init the hardware before PHY access

To access the PHY, the MAC registers must be initialized. Call the init
function in probe() to make it so, otherwise the PHY ID readout returns
all zeroes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
4 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-tegra
Tom Rini [Fri, 3 Apr 2020 20:05:46 +0000 (16:05 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-tegra

- Add support for Jetson Nano, plus miscellaneous other fixes found
  during Nano bringup.
- Add Igor's update_uboot wrapper patches.

4 years agoarch: Add explicit linker script for u-boot-elf
Michal Simek [Mon, 30 Mar 2020 11:58:59 +0000 (13:58 +0200)]
arch: Add explicit linker script for u-boot-elf

Commit f4dc714aaa2d ("arm64: Turn u-boot.bin back into an ELF file after
relocate-rela")
introduce REMAKE_ELF option to recreate u-boot.elf from u-boot ->
u-boot.bin + DT -> u-boot.elf.

The best is to ilustrate it from make V=1 output
  cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
  cp u-boot-dtb.bin u-boot.bin
aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64  u-boot.bin u-boot-elf.o
  aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf --defsym="_start"=0x8000000 -Ttext=0x8000000

Last command has no explicit linker script passed that's why toolchain
internal linker script is used.
In Binutils 2.32 case it contains SIZEOF_HEADERS symbol which has changed
behavior by commit
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=64029e93683a266c38d19789e780f3748bd6a188
which result in situation that program headers has changed from
(xilinx_zynqmp_mini_defconfig)

Program Headers:
  Type           Offset             VirtAddr           PhysAddr
                 FileSiz            MemSiz              Flags  Align
  LOAD           0x0000000000010000 0x00000000fffc0000 0x00000000fffc0000
                 0x0000000000018918 0x0000000000018918  RW     0x10000

to

Program Headers:
  Type           Offset             VirtAddr           PhysAddr
                 FileSiz            MemSiz              Flags  Align
  LOAD           0x0000000000000000 0x00000000fffb0000 0x00000000fffb0000
                 0x0000000000028918 0x0000000000028918  RW     0x10000

Xilinx tools like XSDB or Bootgen are using program headers for loading ELF
to the right location and by above binutils change ELF is loaded to
incorrect location.

The patch is explicitly use u-boot-elf.lds (just cat now) for u-boot.elf
recreation which is called when REMAKE_ELF is setup.
By purpose u-boot-elf.lds doesn't contain OUTPUT_FORMAT/OUTPUT_ARCH to be
able to use by all archs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-By: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agomach-snapdragon: Fix overwriting last digit of serial number
Jan-Christoph Tebbe [Mon, 16 Mar 2020 16:51:51 +0000 (17:51 +0100)]
mach-snapdragon: Fix overwriting last digit of serial number

When generating the MAC address based on the boards serial number
the last digit was overwritten with the null termination. That way
boards with serial numbers close to each other would use the same
MAC address.

Signed-off-by: Jan-Christoph Tebbe <Jan-Christoph.Tebbe@ithinx.io>
4 years agoRevert "common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"
Ye Li [Wed, 1 Apr 2020 14:42:04 +0000 (07:42 -0700)]
Revert "common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"

Commit cf8dcc5d02c3 ("common: spl_fit: Default to IH_OS_U_BOOT if
FIT_IMAGE_TINY enabled") is not correct, it will append fdt to each loadable
image. Actually when using TINY FIT, the first loadable image is thought as
u-boot and already have fdt appended.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
4 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Fri, 3 Apr 2020 15:26:13 +0000 (11:26 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

- fix for MMIO window size (Tudor Ambarus)

4 years agoARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
Tom Warren [Fri, 28 Feb 2020 23:17:07 +0000 (16:17 -0700)]
ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support

The Jetson Nano Developer Kit is a Tegra X1-based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4GB
of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot
used for storage.

HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
Ethernet controller provides onboard network connectivity. NVMe support
has also been added. Env save is at the end of QSPI (4MB-8K).

A 40-pin header on the board can be used to extend the capabilities and
exposed interfaces of the Jetson Nano.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
4 years agomtd: spi: Add Macronix MX25U3235F device
Tom Warren [Fri, 20 Mar 2020 21:20:09 +0000 (14:20 -0700)]
mtd: spi: Add Macronix MX25U3235F device

Add Macronix MX25U3235F flash device description.
This is a 4MiB part.

Signed-off-by: Tom Warren <twarren@nvidia.com>
4 years agot210: Adjust ramdisk_addr_r/fdt_addr_r to allow for large kernels
Tom Warren [Tue, 17 Mar 2020 00:01:43 +0000 (17:01 -0700)]
t210: Adjust ramdisk_addr_r/fdt_addr_r to allow for large kernels

The L4T kernel is 32MB+, and can overwrite the ramdisk/fdt loaded
from extlinux.conf. Adjust the load addresses to fix this for now.
Using the calculated_env addresses table from T186 U-Boot is a
better fix, but it isn't working correctly on T210 U-Boot right now,
so this will do until I can fix it.

Signed-off-by: Tom Warren <twarren@nvidia.com>
4 years agoqspi: t210: Use dev_read calls to get FDT data like base, freq
Tom Warren [Fri, 20 Mar 2020 21:33:00 +0000 (14:33 -0700)]
qspi: t210: Use dev_read calls to get FDT data like base, freq

This Tegra QSPI driver hadn't been brought up to date with how
DM drivers are fetching data from the FDT now, and was pulling
in bogus data for base, max freq, etc. Fixed ofdata_to_platdata
to work the same way it does in the tegra114 SPI driver, using
dev_read_ functions.

Signed-off-by: Tom Warren <twarren@nvidia.com>
4 years agoqspi: t210: Fix QSPI clock and tap delays
Tom Warren [Mon, 25 Nov 2019 21:43:50 +0000 (14:43 -0700)]
qspi: t210: Fix QSPI clock and tap delays

When claim_bus was setting the clock, it reset the QSPI controller,
which wipes out any tap delays set by previous bootloaders (nvtboot,
CBoot for example on Nano). Instead of doing that in claim_bus, which
gets called a lot, moved clock setting to probe(), and set tap delays
there, too. Also updated clock to 80MHz to match CBoot. Now QSPI env
save works reliably again.

Signed-off-by: Tom Warren <twarren@nvidia.com>
4 years agoqspi: t210: Fix claim_bus's use of the wrong bus/device
Tom Warren [Tue, 12 Nov 2019 20:17:37 +0000 (13:17 -0700)]
qspi: t210: Fix claim_bus's use of the wrong bus/device

claim_bus() is passed a udevice *dev, which is the bus device's parent.
In this driver, claim_bus assumed it was the bus, which caused the
'priv' info pointer to be wrong, and periph_id was incorrect. This in
turn caused the periph clock call to assign the wrong clock (PLLM
instead of PLLP0), which caused a kernel warning. I only saw the 'bad'
periph_id when enabling DEBUG due to an assert. Not sure how QSPI was
working w/this errant clock, but it was moot as QSPI wasn't active
unless you probed it, and that wasn't happening until I posted a patch
to enable env save to QSPI for Nano (coming soon).

Signed-off-by: Tom Warren <twarren@nvidia.com>
4 years agommc: t210: Fix 'bad' SD-card clock when doing 400KHz card detect
Tom Warren [Mon, 3 Jun 2019 23:06:34 +0000 (16:06 -0700)]
mmc: t210: Fix 'bad' SD-card clock when doing 400KHz card detect

According to the HW team, for some reason the normal clock select code
picks what appears to be a perfectly valid 375KHz SD card clock, based
on the CAR clock source and SDMMC1 controller register settings (CAR =
408MHz PLLP0 divided by 68 for 6MHz, then a SD Clock Control register
divisor of 16 = 375KHz). But the resulting SD card clock, as measured by
the HW team, is 700KHz, which is out-of-spec. So the WAR is to use the
values given in the TRM PLLP table to generate a 400KHz SD-clock (CAR
clock of 24.7MHz, SD Clock Control divisor of 62) only for SDMMC1 on
T210 when the requested clock is <= 400KHz. Note that as far as I can
tell, the other requests for clocks in the Tegra MMC driver result in
valid SD clocks.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
4 years agommc: t210: Add autocal and tap/trim updates for SDMMC1/3
Tom Warren [Wed, 29 May 2019 16:30:01 +0000 (09:30 -0700)]
mmc: t210: Add autocal and tap/trim updates for SDMMC1/3

As per the T210 TRM, when running at 3.3v, the SDMMC1 tap/trim and
autocal values need to be set to condition the signals correctly before
talking to the SD-card. This is the same as what's being done in CBoot,
but it gets reset when the SDMMC1 HW is soft-reset during SD driver
init, so needs to be repeated here. Also set autocal and tap/trim for
SDMMC3, although no T210 boards use it for SD-card at this time.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
4 years agotegra: Enable CONFIG_BOOTP_PREFER_SERVERIP for all Jetson boards
Tom Warren [Thu, 26 Mar 2020 22:59:14 +0000 (15:59 -0700)]
tegra: Enable CONFIG_BOOTP_PREFER_SERVERIP for all Jetson boards

This allows the user to set $serverip in the environment before
executing a DHCP request. If they do, U-Boot will use that IP rather
than using the IP in the DHCP response.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
4 years agoARM: tegra: p2771-0000: enable PIE relocation
Vishruth [Thu, 26 Mar 2020 22:20:43 +0000 (15:20 -0700)]
ARM: tegra: p2771-0000: enable PIE relocation

U-Boot is configured to build as position independent executable. Enable
relocation of RELA section required to work with different load
addresses.

Signed-off-by: Vishruth <vishruthj@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Peter Robinson <probinson@gmail.com>