Simon Glass [Wed, 18 Mar 2020 17:44:01 +0000 (11:44 -0600)]
image: Check hash-nodes when checking configurations
It is currently possible to use a different configuration's signature and
thus bypass the configuration check. Make sure that the configuration node
that was hashed matches the one being checked, to catch this problem.
Also add a proper function comment to fit_config_check_sig() and make it
static.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 18 Mar 2020 17:44:00 +0000 (11:44 -0600)]
test: vboot: Parameterise the test
This test is actually made up of five separate tests. Split them out so
that they appear as separate tests.
Unfortunately this restarts U-Boot multiple times which adds about a
second to the already-long vboot test, about 8 seconds total on my
machine. We could add a special 'teardown' test afterwards but if the
tests are executed out of order that would not work.
Changing test_vboot into a class causes it not to be discovered and makes
it different from all other tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 18 Mar 2020 17:43:59 +0000 (11:43 -0600)]
test: vboot: Add a test for a forged configuration
Add a check to make sure that it is not possible to add a new
configuration and use the hashed nodes and hash of another configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 18 Mar 2020 17:43:58 +0000 (11:43 -0600)]
test: vboot: Drop unnecessary parameter for fit_check_sign
This tool only uses the last -k parameter provided. Drop the earlier one
since it has no effect.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 18 Mar 2020 17:43:57 +0000 (11:43 -0600)]
image: Return an error message from fit_config_verify_sig()
This function only returns an error message sometimes. Update it to always
return an error message if one is available. This makes it easier to see
what went wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 18 Mar 2020 17:43:56 +0000 (11:43 -0600)]
image: Be a little more verbose when checking signatures
It is useful to be a little more specific about what is being checked.
Update a few messages to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 18 Mar 2020 17:43:55 +0000 (11:43 -0600)]
image: Correct comment for fit_conf_get_node()
This should mention that conf_uname can be NULL and should be in the
header file. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 31 Mar 2020 19:10:54 +0000 (15:10 -0400)]
Merge tag 'arc-last-minute-fixes-for-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
This last minute pull-request is intended to fix some drivers
when used on ARC boards. The problem was introduced by
https://gitlab.denx.de/u-boot/u-boot/-/commit/
07906b3dad157bd58411664bcc6a2a7976d5e0a9
What happened while doing one pretty simple improvement to make
U-Boot port more flexible and portable (by switching accessors from
assembly-written to plain C version) we implicitly added 2 problems:
1. Downgraded accessors from being volatile which signalled to
the compiler that it's now possible to do all kinds of optimizations
which may easily include merge of subsequent byte reads/writes into
word operations. Which is OK for accessing mormal memory but
breaks operation of peripherals if we access its memory-mapped regs
in such a "creative" manner.
2. As a part of assembly-written implementation we had compiler barriers
in form of the following construction 'asm volatile("" : : : "memory")',
and we dropped it in C implemntation. This in its turn enabled compiler
to mess with instruction ordering. Guess what it gives us in the end :)
So with all that we had in some corner-cases veeery funny instruction flows
generated. And in particular it broke DW SPI functionality when we were
writing large amount of data. Funny enough our tests which were writing
small amount of data still worked and only by the chance we caught that
breakage and unrolled that quite interesting loop of unexpected
problems.
The road to hell is paved with good intentions. Amen :)
Eugeniy Paltsev [Mon, 30 Mar 2020 19:44:45 +0000 (22:44 +0300)]
ARC: IO: add MB for __raw_* memory accessors
We add memory barriers for __raw_readX / __raw_writeX accessors same
way as it is done for readX and writeX accessors as lots of U-boot
driver uses __raw_readX / __raw_writeX instead of proper accessor
with barrier.
It will save us from lot's of debugging in the future and it is OK
as U-Boot is not that performance oriented as real run-time
software like OS or user bare-metal app so we may afford being not
super fast as we only being executed once.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Mon, 30 Mar 2020 19:44:44 +0000 (22:44 +0300)]
ARC: IO: add compiler barriers to IO accessors
We must use compiler barriers in C-version read/write IO accessors
before and after operation (read or write) so it won't be reordered
by compiler.
Fixes commit
07906b3dad15 ("ARC: Switch to generic accessors")
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Mon, 30 Mar 2020 19:44:43 +0000 (22:44 +0300)]
ARC: IO: add volatile to accessors
We must use 'volatile' in C-version read/write IO accessors
implementation to avoid merging several reads (writes) into
one read (write), or optimizing them out by compiler.
Fixes commit
07906b3dad15 ("ARC: Switch to generic accessors")
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Tom Rini [Tue, 31 Mar 2020 14:07:01 +0000 (10:07 -0400)]
Merge branch '2020-03-31-master-imports'
- mpc8xxx GPIO, SPI bugfixes
- Add VxWorks to FIT images
- macb ethernet driver bugfix
Michal Simek [Thu, 26 Mar 2020 14:01:29 +0000 (15:01 +0100)]
net: macb: Fix incorrect write function name when MACB_ZYNQ is enabled.
When MACB_ZYNQ is enabled there is compilation warnings
drivers/net/macb.c: In function ‘_macb_init’:
drivers/net/macb.h:675:33: error: ‘MACB_DMACFG’ undeclared (first use in this function);
did you mean ‘MACB_MCF’?
writel((value), (port)->regs + MACB_##reg)
^~~~~
It has been caused by changing macros name by commit below.
Fixes:
6c636514d499 ("net: macb: sync header definitions as taken from Linux")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Rasmus Villemoes [Tue, 11 Feb 2020 15:20:25 +0000 (15:20 +0000)]
mpc8xxx_spi: implement real ->set_speed
Not all boards have the same CSB frequency, nor do every SPI slave
necessarily support running at 16.7 MHz. So implement ->set_speed;
that also allows using a smaller PM (i.e., 0) for slaves that do
support a higher speed.
Based on work by Klaus H. Sørensen.
Cc: Klaus H. Sorensen <khso@prevas.dk>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 11 Feb 2020 15:20:25 +0000 (15:20 +0000)]
mpc8xxx_spi: always use 8-bit characters, don't read or write garbage
There are a few problems with the current driver.
First, it unconditionally reads from dout/writes to din whether or not
those pointers are NULL. So for example a simple "sf probe" ends up
writing four bytes at address 0:
=> md.l 0x0 8
00000000:
45454545 45454545 05050505 05050505 EEEEEEEE........
00000010:
00000000 00000000 07070707 07070707 ................
=> sf probe 0
mpc8xxx_spi_xfer: slave spi@7000:0 dout
0FB53618 din
00000000 bitlen 8
mpc8xxx_spi_xfer: slave spi@7000:0 dout
00000000 din
0FB536B8 bitlen 48
SF: Detected s25sl032p with page size 256 Bytes, erase size 64 KiB, total 4 MiB
=> md.l 0x0 8
00000000:
ff000000 45454545 05050505 05050505 ....EEEE........
00000010:
00000000 00000000 07070707 07070707 ................
(here I've change the first debug statement to a printf, and made it
print the din/dout pointers rather than the uints they point at).
Second, as we can also see above, it always writes a full 32 bits,
even if a smaller amount was requested. So for example
=> mw.l $loadaddr 0xaabbccdd 8
=> md.l $loadaddr 8
02000000:
aabbccdd aabbccdd aabbccdd aabbccdd ................
02000010:
aabbccdd aabbccdd aabbccdd aabbccdd ................
=> sf read $loadaddr 0x400 6
device 0 offset 0x400, size 0x6
mpc8xxx_spi_xfer: slave spi@7000:0 dout
0FB536E8 din
00000000 bitlen 40
mpc8xxx_spi_xfer: slave spi@7000:0 dout
00000000 din
02000000 bitlen 48
SF: 6 bytes @ 0x400 Read: OK
=> sf read 0x02000010 0x400 8
device 0 offset 0x400, size 0x8
mpc8xxx_spi_xfer: slave spi@7000:0 dout
0FB53848 din
00000000 bitlen 40
mpc8xxx_spi_xfer: slave spi@7000:0 dout
00000000 din
02000010 bitlen 64
SF: 8 bytes @ 0x400 Read: OK
=> md.l $loadaddr 8
02000000:
45454545 45450000 aabbccdd aabbccdd EEEEEE..........
02000010:
45454545 45454545 aabbccdd aabbccdd EEEEEEEE........
Finally, when the bitlen is 24 mod 32 (e.g. requesting to read 3 or 7
bytes), the last three bytes and up being the wrong ones, since the
driver does a full 32 bit read and then shifts the wrong byte out:
=> mw.l $loadaddr 0xaabbccdd 4
=> md.l $loadaddr 4
02000000:
aabbccdd aabbccdd aabbccdd aabbccdd ................
=> sf read $loadaddr 0x444 10
device 0 offset 0x444, size 0x10
mpc8xxx_spi_xfer: slave spi@7000:0 dout
0FB536E8 din
00000000 bitlen 40
mpc8xxx_spi_xfer: slave spi@7000:0 dout
00000000 din
02000000 bitlen 128
SF: 16 bytes @ 0x444 Read: OK
=> md.l $loadaddr 4
02000000:
552d426f 6f742032 3031392e 30342d30 U-Boot 2019.04-0
=> mw.l $loadaddr 0xaabbccdd 4
=> sf read $loadaddr 0x444 0xb
device 0 offset 0x444, size 0xb
mpc8xxx_spi_xfer: slave spi@7000:0 dout
0FB536E8 din
00000000 bitlen 40
mpc8xxx_spi_xfer: slave spi@7000:0 dout
00000000 din
02000000 bitlen 88
SF: 11 bytes @ 0x444 Read: OK
=> md.l $loadaddr 4
02000000:
552d426f 6f742032 31392e00 aabbccdd U-Boot 219......
Fix all of that by always using a character size of 8, and reject
transfers that are not a whole number of bytes. While it ends being
more work for the CPU, we're mostly bounded by the speed of the SPI
bus, and we avoid writing to the mode register in every loop.
Based on work by Klaus H. Sørensen.
Cc: Klaus H. Sorensen <khso@prevas.dk>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 11 Feb 2020 15:20:24 +0000 (15:20 +0000)]
mpc8xxx_spi: put max_cs to use
Currently, max_cs is write-only; it's just set in
mpc8xxx_spi_ofdata_to_platdata and not otherwise used.
My mpc8309 was always resetting during an "sf probe 0". It turns out
dm_gpio_set_dir_flags() was being called with garbage, since nothing
had initialized priv->gpios[0] - our device tree used "cs-gpios"
rather than "gpios", so gpio_request_list_by_name() had returned 0.
That would have been a lot easier to figure out if the chip select
index was sanity checked, so rename max_cs to cs_count, and reject a
xfer with a too large cs index.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 11 Feb 2020 15:20:23 +0000 (15:20 +0000)]
gazerbeam: add clocks property to SPI node
Prepare for supporting setting different speeds in mpc8xxx_spi.c.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Klaus H. Sorensen [Tue, 11 Feb 2020 15:20:22 +0000 (15:20 +0000)]
gpio/mpc83xx_spisel_boot.c: gpio driver for SPISEL_BOOT signal
Some SoCs in the mpc83xx family, e.g. mpc8309, have a dedicated spi
chip select, SPISEL_BOOT, that is used by the boot code to boot from
flash.
This chip select will typically be used to select a SPI boot
flash. The SPISEL_BOOT signal is controlled by a single bit in the
SPI_CS register.
Implement a gpio driver for the spi chip select register. This allows a
spi driver capable of using gpios as chip select, to bind a chip select
to SPISEL_BOOT.
It may be a little odd to do this as a GPIO driver, since the signal
is neither GP or I, but it is quite convenient to present it to the
spi driver that way. The alternative it to teach mpc8xxx_spi to handle
the SPISEL_BOOT signal itself (that is how it's done in the linux
kernel, see commit
69b921acae8a)
Signed-off-by: Klaus H. Sorensen <khso@prevas.dk>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 28 Jan 2020 12:04:34 +0000 (12:04 +0000)]
gpio: mpc8xxx: don't do RMW on gpdat register when setting value
The driver correctly handles reading back the value of an output gpio
by reading from the shadow register for output, and from gpdat for
inputs.
Unfortunately, when setting the value of some gpio, we do a RMW cycle
on the gpdat register without taking the shadow register into account,
thus accidentally setting other output gpios (at least those whose
value cannot be read back) to 0 at the same time.
When changing a gpio from input to output, we still need to make sure
it initially has the requested value. So, the procedure is
- update the shadow register
- compute the new gpdir register
- write the bitwise and of the shadow and new gpdir register to gpdat
- write the new gpdir register
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 28 Jan 2020 12:04:33 +0000 (12:04 +0000)]
gpio: mpc8xxx: don't modify gpdat when setting gpio as input
Since some chips don't support reading back the value of output gpios
from the gpdat register, we should not do a RMW cycle (i.e., the
clrbits_be32) on the gpdat register when setting a gpio as input, as
that might accidentally change the value of some other (still
configured as output) gpio.
The extra indirection through mpc8xxx_gpio_set_in() does not help
readability, so just fold the gpdir update into
mpc8xxx_gpio_direction_input().
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Heinrich Schuchardt [Sun, 29 Mar 2020 19:26:57 +0000 (19:26 +0000)]
cmd: mmc: fix typo 'a EMMC'
%s/a EMMC/an eMMC/g
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Lihua Zhao [Wed, 18 Mar 2020 14:32:07 +0000 (07:32 -0700)]
image-fit: Allow loading FIT image for VxWorks
This adds the check against IH_OS_VXWORKS during FIT image load,
to allow loading FIT image for VxWorks.
Signed-off-by: Lihua Zhao <lihua.zhao@windriver.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Tue, 31 Mar 2020 14:05:57 +0000 (10:05 -0400)]
Merge tag 'efi-2020-04-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc5
This series fixes:
* UEFI Python tests CONFIG_OF_CONTROL=y.
* int to pointer cast warning for cmd/efidebug.c
* memory reservation even if fdt node is disabled
Now that the Python test is fixed reintroduce the reverted patch for
vexpress_ca9x4 to enable EFI_LOADER and define the dtb file name.
Tom Rini [Tue, 31 Mar 2020 14:05:25 +0000 (10:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Tue, 31 Mar 2020 14:04:39 +0000 (10:04 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
- Fixes for Gen 2 V2H Blanche
Ley Foon Tan [Tue, 31 Mar 2020 00:45:25 +0000 (08:45 +0800)]
arm: dts: agilex: Enable QSPI
Enable QSPI for Agilex SoC devkit.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 6 Mar 2020 08:55:20 +0000 (16:55 +0800)]
arm: socfpga: arria10: Add save_boot_params()
Add save_boot_params() to save reset status value from bootrom.
Bootrom will clear the status register in reset manager and stores the
reset status value in shared memory. Bootrom stores shared data at last
2KB of onchip RAM.
This function save reset status provided by bootrom to rst_mgr_status.
More information about reset status register value can be found in reset
manager register description.
When running in debugger without bootrom, r0 to r3 are random values.
So, skip save the value when r0 is not bootrom shared data address.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 6 Mar 2020 08:55:19 +0000 (16:55 +0800)]
configs: socfpga: Change to use SOCFPGA_PHYS_OCRAM_SIZE macro
Change to use SOCFPGA_PHYS_OCRAM_SIZE macro for onchip RAM size.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 6 Mar 2020 08:55:18 +0000 (16:55 +0800)]
arm: socfpga: Add onchip RAM size macro
Add OCRAM size macro for Gen5 and Arria 10.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tom Rini [Mon, 30 Mar 2020 23:29:27 +0000 (19:29 -0400)]
Prepare v2020.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Mon, 30 Mar 2020 18:27:42 +0000 (20:27 +0200)]
test/py: test_efi_grub_net() requires OF_CONTROL
With CONFIG_OF_CONTROL environment variable $fdtcontroladdr is not defined
and test_efi_grub_net() fails.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Mon, 30 Mar 2020 11:46:05 +0000 (07:46 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Fixes env variable for layerscape platforms, disable hs200.
- Fixes board fixup, mux setting, enable gic, fspi on lx2160a, Fixes I2C
DM Warning on ls1043a, ls1046a
- Fixes RGMII port on ls1046ardb, ls1046ardb and DM_USB Warning on
ls1012afrdm, ls1021aiot
Tom Rini [Mon, 30 Mar 2020 11:45:25 +0000 (07:45 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- SPL SPI support R40, H6 (Andre)
- eMMC boot part on a64-olinuxino (Petr)
Marek Vasut [Sat, 21 Mar 2020 16:38:57 +0000 (17:38 +0100)]
ARM: rmobile: Only register ethernet on V2H Blanche if not DM_ETH
If the DM_ETH is enabled, the board-specific ethernet registeration
should be disabled, make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 21 Mar 2020 15:57:58 +0000 (16:57 +0100)]
ARM: rmobile: Implement PMIC reset on V2H Blanche
Add code to reset the board through PMIC, by writing the required
PMIC registers in the CPU reset handler.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Kuldeep Singh [Sat, 14 Mar 2020 12:53:55 +0000 (18:23 +0530)]
arm: dts: ls1028a: Use flexspi in octal I/O mode
Configure RX and TX bus-width values to use flexspi in octal I/O mode.
If bus-widths are not specified, then single I/O mode is set by default.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Sat, 14 Mar 2020 12:53:56 +0000 (18:23 +0530)]
arm: dts: lx2160a: Use flexspi in octal I/O mode
Configure RX and TX bus-width values to use flexspi in octal I/O mode.
If bus-widths are not specified, then single I/O mode is set by default.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Thu, 12 Mar 2020 09:43:00 +0000 (15:13 +0530)]
configs: lx2160a: Access flash memory as per spi-mem
MC_INIT and BOOT command currently access spi-nor flash memory directly.
As per spi-mem framework, flash memory access via absolute addresses is
no more possible. Use flash APIs to access memory instead of directly
using it.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Tue, 4 Feb 2020 06:32:36 +0000 (12:02 +0530)]
configs: lx2160a: Define ENV_ADDR value
CONFIG_ENV_ADDR helps in picking environment from flash before DDR init.
Define the value as 0x20500000 for lx2160ardb and lx2160aqds.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Sat, 14 Mar 2020 13:13:41 +0000 (18:43 +0530)]
configs: lx2160a: Enable FSPI support
Enable FSPI controller support. So, flash environment can now be used.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Mon, 2 Mar 2020 11:09:19 +0000 (16:39 +0530)]
arm: dts: lx2160aqds: Add FSPI node properties
lx2160a-qds has 2 micron "mt35xu512aba" flashes of size 64M each
connected on A0 and B1 i.e on CS0 and CS3. Since flashes are connected
on different buses, only one flash can be probed at a time.
Add fspi node properties aligned with LX2160A-RDB fspi properties.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 20 Mar 2020 10:26:14 +0000 (18:26 +0800)]
configs: ls1012afrwy: adjust env kernel_addr_r
Adjust environment kernel_addr_r from 0x96000000 to 0x92000000
to fix a bug that failed to boot kernel for ls1012afrwy with 512MiB RAM,
=> tftpboot $kernel_addr_r Image (Image size is 36 MiB)
TFTP error: trying to overwrite reserved memory...
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Alison Wang [Mon, 16 Mar 2020 07:59:06 +0000 (15:59 +0800)]
configs: ls1021a: Append othbootargs to bootargs
This patch appends othbootargs to bootargs for LS1021ATWR board.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yangbo Lu [Tue, 3 Mar 2020 02:32:51 +0000 (10:32 +0800)]
configs: disable eMMC HS200 support on layerscape platforms
The eMMC HS200 speed mode on Layerscape platforms has not been
supported properly. The eSDHC clock tuning has not been implemented
by now. So disable it until it is supported properly in case of
any potential issues.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Fri, 21 Feb 2020 00:27:04 +0000 (05:57 +0530)]
configs: ls1012ardb: secure boot: Add PFE config
Add config to enable the PFE and ETH support.
Also change the pfe secure boot header address.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Ran Wang [Fri, 7 Feb 2020 04:42:08 +0000 (12:42 +0800)]
configs: arm: ls1021aiot: enable CONFIG_DM_USB support
Enable CONFIG_DM_USB to remove below compile warning:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Ran Wang [Fri, 7 Feb 2020 04:42:07 +0000 (12:42 +0800)]
configs: arm64: ls1012afrdm Enable CONFIG_BLK
With DM_USB enabled, enable CONFIG_BLK to remove this
compile warning for ls1012afrdm based targets:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Wed, 5 Feb 2020 14:02:17 +0000 (22:02 +0800)]
dm: arm64: ls1046a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1046A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Wed, 5 Feb 2020 14:02:16 +0000 (22:02 +0800)]
dm: arm64: ls1043a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1043A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 20 Mar 2020 09:05:51 +0000 (17:05 +0800)]
configs: ls1012afrwy: fix wrong env of board
Fix wrong environment variable of board for ls1012afrwy
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Fri, 20 Mar 2020 06:37:07 +0000 (14:37 +0800)]
armv8: ls1028a: clean up the environment variables
Move the environment variables from command head file to
ls1028ardb specific head file so that they will not mess
up with ls1028aqds board.
Also updated some variable slightly.
There is no function change by this patch.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Fri, 20 Mar 2020 06:37:06 +0000 (14:37 +0800)]
armv8: ls1028aqds: add some environments
Add sd and emmc bootcmd environments to facilitate
the boot process.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Thu, 19 Mar 2020 12:01:07 +0000 (20:01 +0800)]
configs: ls2080aqds: support distro boot
Add support of distro boot for ls2080aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Thu, 19 Mar 2020 11:38:42 +0000 (19:38 +0800)]
configs: ls1088aqds: support distro boot
Add support of distro boot for ls1088aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yangbo Lu [Thu, 19 Mar 2020 07:18:54 +0000 (15:18 +0800)]
board: fsl: lx2160a: fix SDHC1_DAT4 signal routing
The SDHC1_DAT4 signal could be routes to SDHC1_VS or SDHC1
adapter slot for SDHC1 usage. When SDHC1 is selected in RCW,
do not force to route it to SDHC1 adapter slot if find it
has already been configued for SDHC1_VS.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Vladimir Oltean [Fri, 13 Mar 2020 14:53:06 +0000 (16:53 +0200)]
pci-host-ecam-generic: access config space independent of system-wide bus id
The pci-host-ecam-generic code assumes that the ECAM is the first PCI
bus in the system to be probed. Therefore, the system-wide bus number
allocated by U-Boot in sequence for it is going to be zero, which
corresponds to the memory-mapped config spaces found within it.
Reuse the logic from other PCI bus drivers, and assume that U-Boot will
allocate bus numbers in sequence for all buses within the current ECAM.
So the base number of the bus needs to be subtracted when indexing the
correct config space.
Fixes:
3675cb044e68 ("PCI: Add driver for a 'pci-host-ecam-generic' host controller")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 13 Mar 2020 02:26:29 +0000 (10:26 +0800)]
include/configs: ls1012afrwy: fix load address of itb with bootm command
The old load address of itb will overwrite uboots reserved memory
on ls1012afrwy with 512 MiB ram
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 12 Mar 2020 12:53:46 +0000 (14:53 +0200)]
armv8/ls1046ardb: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1046ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns
on Rx internal delay by default and the u-boot does not
override that (yet) so in u-boot the interface is functional.
In Linux the PHY driver is clearing the Rx delay for the
"rgmii-txid" mode and the reception does not work.
Changing the RGMII mode to internal delay here ensures that
device tree fix-ups for the PHY connection type turn on both
Tx and Rx internal delay in Linux.
Fixes:
cc1aa218f510 ("armv8/ls1046a: RGMII PHY requires internal
delay on Tx")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 12 Mar 2020 12:53:45 +0000 (14:53 +0200)]
armv8/ls1043ardb: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1043ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns
on Rx internal delay by default and the u-boot does not
override that (yet) so in u-boot the interface is functional.
In Linux the PHY driver is clearing the Rx delay for the
"rgmii-txid" mode and the reception does not work.
Changing the RGMII mode to internal delay here ensures that
device tree fix-ups for the PHY connection type turn on both
Tx and Rx internal delay in Linux.
Fixes:
5a78a472f666 ("armv8/ls1043a: RGMII PHY requires internal
delay on Tx")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 12 Mar 2020 12:53:44 +0000 (14:53 +0200)]
net: fman: add support for all RGMII delay modes
The RGMII modes that include internal delay were not all
properly treated in the memac code. Add support for all
RGMII delay modes.
Fixes:
111fd19e3b9e ("fm/mEMAC: add mEMAC frame work")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Meenakshi Aggarwal [Wed, 11 Mar 2020 15:21:47 +0000 (20:51 +0530)]
lx2160a: Add dhcp in boot_targets
Add dhcp in supported boot_targets for lx2160.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Tue, 10 Mar 2020 03:31:05 +0000 (11:31 +0800)]
armv8: ls1028a: add dhcp boot target device
Add DHCP boot target device to enable command bootcmd_dhcp.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Mon, 9 Mar 2020 06:10:07 +0000 (14:10 +0800)]
board: ls1028ardb: add BOARD_LATE_INIT config
Select BOARD_LATE_INIT config so that many board works can be done
in late init stage.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Meenakshi Aggarwal [Wed, 26 Feb 2020 11:16:48 +0000 (16:46 +0530)]
lx2160a : Remove default VID setting
Set VID to 800 mV for Rev1 and set VID as per switch settings
for Rev2.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Fri, 21 Feb 2020 00:27:03 +0000 (05:57 +0530)]
armv8: ls1028a: Update secure boot headers offset
Update the secure boot headers offsets of Kernel and other
firmware images for SD and XSPI boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Meenakshi Aggarwal [Wed, 19 Feb 2020 18:00:45 +0000 (23:30 +0530)]
lx2160a : Add emmc in boot_targets environment variable
Add emmc in supported boot_targets and
Add bootcmd environment variable for emmc boot.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Wed, 19 Feb 2020 09:02:22 +0000 (17:02 +0800)]
arm64: ls1046a: remove fdt_high environment variable
Setting fdt_high and initrd_high to 0xffffffffffffffff leads to
various difficulty to resolve bugs.
Remove them and use bootm_size instead to safely contain a kernel,
device tree and initrd for relocation.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Wed, 19 Feb 2020 09:02:21 +0000 (17:02 +0800)]
arm64: ls1028a: remove fdt_high environment variable
Setting fdt_high and initrd_high to 0xffffffffffffffff leads to
various difficulty to resolve bugs.
Remove them and use bootm_size instead to safely contain a kernel,
device tree and initrd for relocation.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Fri, 14 Feb 2020 05:34:36 +0000 (11:04 +0530)]
board: fsl: lx2160a: Add GIC LPI memory reserve fixup
Reserve DDR memory region used for GIC LPI configuration table.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Fri, 14 Feb 2020 05:34:35 +0000 (11:04 +0530)]
configs: lx2160a: Enable GIC_V3_ITS config
Enable GIC_V3_ITS config to program GIC LPI
configuration table.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Fri, 14 Feb 2020 05:34:34 +0000 (11:04 +0530)]
board: fsl: lx2160a: Program GIC LPI configuration table
Program GIC LPI configuration table:
1. Redistributor PROCBASER configuration table (which
is common for all redistributors)
2. Redistributor pending table (PENDBASER), for all the
available redistributors.
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Vikas Singh [Wed, 12 Feb 2020 08:17:09 +0000 (13:47 +0530)]
board: lx2160a: Correct board fixup for PCIe nodes
Update "board_fix_fdt" with correct counter value "i".
This will fix the issue while fetching the "reg_names"
resource from fdt after fixup.
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Alison Wang [Mon, 3 Feb 2020 07:25:19 +0000 (15:25 +0800)]
ls1021a: Set CONFIG_SYS_BOOTMAPSZ to the memory for relocation
This patch sets CONFIG_SYS_BOOTMAPSZ to the amount of memory available
to safely contain a kernel, device tree and initrd for relocation. The
way to set fdt_high as 0xffffffff to disable device tree relocation is
removed.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Marek Vasut [Sat, 21 Mar 2020 15:57:50 +0000 (16:57 +0100)]
ARM: dts: rmobile: Enable IIC3 on V2H Blanche
Enable IIC3 to permit access to the PMIC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 21 Mar 2020 15:57:38 +0000 (16:57 +0100)]
ARM: dts: rmobile: Add IIC3 node on Gen2 R8A7792 V2H
Add IIC3 node from mainline Linux DT. This will be further updated in
subsequent DT sync, however adding this node for now is sufficient and
minimal change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 21 Mar 2020 15:45:29 +0000 (16:45 +0100)]
clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2
The fdtdec_get_addr() does not take into account values set in #address-cells
and #size-cells , but assumes them to be 1 for 32bit systems and 2 for 64bit
systems. This is true for most DTs, however there are exceptions. Switch to
fdtdec_get_addr_size_auto_noparent(), which takes the #address/size-cells
values into consideration, otherwise the reset controller node register
offset is incorrectly parsed.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 1 Dec 2019 01:33:40 +0000 (02:33 +0100)]
ARM: rmobile: Convert Gen2 Blanche to DM_SPI{,_FLASH}
Enable DM_SPI and DM_SPI_FLASH in U-Boot on V2H Blanche.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Petr Štetiar [Sat, 28 Mar 2020 14:38:33 +0000 (20:08 +0530)]
configs: a64-olinuxino-emmc: add eMMC boot part config commands
mmc bootbus and partconf commands are needed in order to be able to
configure booting from separate boot0/boot1 eMMC partitions.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
[jagan: rebase on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Kristian Amlie [Tue, 25 Feb 2020 17:22:16 +0000 (18:22 +0100)]
vexpress_ca9x4: Enable use of correct DTB file and restore EFI loader.
EFI was disabled in
f95b8a4b5f64f because of the missing DTB file,
and indeed, the DTB file is required to load recent versions of GRUB
(2.04) correctly.
Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
Heinrich Schuchardt [Tue, 24 Mar 2020 06:37:52 +0000 (07:37 +0100)]
efi_loader: only reserve memory if fdt node enabled
Sub-nodes of /reserved-memory may be disabled. In this case we should not
reserve memory in the memory map.
Reported-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Fixes:
fef907b2e440 ("efi_loader: create reservations after
ft_board_setup")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Heinrich Schuchardt [Fri, 27 Mar 2020 04:33:17 +0000 (04:33 +0000)]
cmd: efidebug: fix int to pointer cast
On 32 bit systems fix
warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]
Fixes:
a415d61eac26 ("cmd: map addresses to sysmem in efidebug memmap")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 28 Mar 2020 09:41:20 +0000 (10:41 +0100)]
test/py: UEFI helloworld requires OF_CONTROL
With CONFIG_OF_CONTROL environment variable $fdtcontroladdr is not defined
and test_efi_helloworld_net() fails.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 27 Mar 2020 21:54:38 +0000 (17:54 -0400)]
Merge branch '2020-03-27-master-imports'
- Update a few MAINTAINERS entries
- cache alignment fix in ext4 code
- Two small test fixes
Heinrich Schuchardt [Mon, 23 Mar 2020 17:47:47 +0000 (18:47 +0100)]
test: typo decompression
%s/decopmression/decompression/
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Wed, 25 Mar 2020 11:04:46 +0000 (12:04 +0100)]
MAINTAINERS: add myself as maintainer of fs/btrfs
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Jan Kiszka [Wed, 25 Mar 2020 20:27:51 +0000 (21:27 +0100)]
fs: ext4: Fix alignment of cache buffers
We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid
access errors like
CACHE: Misaligned operation at range [
be0231e0,
be0235e0]
seen on the MCIMX7SABRE.
Fixes:
d5aee659f217 ("fs: ext4: cache extent data")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Marek Vasut [Wed, 25 Mar 2020 20:35:53 +0000 (21:35 +0100)]
MAINTAINERS: Add usb.h entry to usb
Add usb.h file into the USB list.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Harald Seiler [Thu, 26 Mar 2020 17:07:27 +0000 (18:07 +0100)]
test/py: mmc: Fix 'mmc info' testcase
Commit
41e30dcf8796 ("cmd: mmc: Make Mode: printout consistent") fixed
the layout of `mmc info` output. Reflect this change in the respective
testcase.
Also fix a typo in the documentation.
Fixes:
41e30dcf8796 ("cmd: mmc: Make Mode: printout consistent")
Signed-off-by: Harald Seiler <hws@denx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 27 Mar 2020 15:47:04 +0000 (11:47 -0400)]
Revert "vexpress_ca9x4: Enable use of correct DTB file and restore EFI loader."
Currently this causes failures of the platform when running the EFI
loader tests, so disable it for now.
This reverts commit
af827140e5965e5bb2bcad1c53ca8419b428ff6d.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 27 Mar 2020 01:39:59 +0000 (21:39 -0400)]
Merge tag 'u-boot-rockchip-
20200327' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fixed for rv1108 and elgin-rv1108 board
- Fix the keyboard from USB instead of CrOS EC
Miquel Raynal [Wed, 18 Mar 2020 16:22:55 +0000 (17:22 +0100)]
rockchip: mkimage: Use an existing macro instead of a decimal value
Depending on the SoC, a header of four characters is prepended to the
image. There is already a macro defining the number of characters:
RK_SPL_HDR_SIZE, so use it instead of hardcoding "4".
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Otavio Salvador [Fri, 13 Mar 2020 17:42:48 +0000 (14:42 -0300)]
rv1108: Fix boot regression
Since commit
79030a486128 ("rockchip: Add Single boot image
(with binman, pad_cat)") the following boot regression is seen:
U-Boot
2020.04-rc3-00050-gd16e18ca6c-dirty (Mar 09 2020 - 11:40:07 -0300)
Model: Elgin RV1108 R1 board
DRAM: 128 MiB
initcall sequence
67fd12a0 failed at call
6000b927 (err=-22)
This happens because the above commit missed to include the
"rockchip-u-boot.dtsi" for rv1108, so include this file
like it done for other Rockchip SoC dtsi's.
Fixes:
79030a486128 ("rockchip: Add Single boot image (with binman, pad_cat)")
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Otavio Salvador [Fri, 13 Mar 2020 17:42:47 +0000 (14:42 -0300)]
elgin-rv1108: Avoid adc_channel_single_shot error
Currently the following error message is seen during boot:
U-Boot
2020.01-08751-g55759ae141 (Mar 09 2020 - 14:44:52 -0300)
Model: Elgin RV1108 R1 board
DRAM: 128 MiB
APLL:
600000000 DPLL:
1200000000 GPLL:
1188000000
ACLK_BUS:
148500000 ACLK_PERI:
148500000 HCLK_PERI:
148500000 PCLK_PERI:
74250000
MMC: dwmmc@
30110000: 0
Loading Environment from MMC... OK
In: serial@
10210000
Out: serial@
10210000
Err: serial@
10210000
Model: Elgin RV1108 R1 board
rockchip_dnl_key_pressed: adc_channel_single_shot fail!
....
Since the elgin-rv1108 does not use ADC to read the download
key status, select CONFIG_ROCKCHIP_BOOT_MODE_REG=0 to avoid
such error.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Otavio Salvador [Fri, 13 Mar 2020 17:42:46 +0000 (14:42 -0300)]
elgin-rv1108: Use rk_board_late_init() for GPIO settings
Since commit
8e9a8d0d0c8c ("rockchip: elgin-rv1108: use board_early_init_f
for per-boar init") the function that configure the board GPIOs is no
longer called since CONFIG_BOARD_EARLY_INIT_F=y is not selected.
These GPIOs do not need to be configured in such early stagem, so change it
to rk_board_late_init() and also select CONFIG_BOARD_LATE_INIT=y
to fix the regression.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Otavio Salvador [Fri, 13 Mar 2020 17:42:45 +0000 (14:42 -0300)]
ARM: dts: Activate pullups in the console pins on rv1108-elgin-r1
In order to make the console pins more robust to noise, activate
the pullups and increase its drive strength.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Mon, 2 Mar 2020 07:57:55 +0000 (07:57 +0000)]
rockchip: Change keyboard input from CrOS EC keyboard to a USB keyboard
These boards aren't ChromeOS devices so won't have a cros-ec-keyb
input as it's the keyboard available via the ChromeOS Embedded
Controller. Update them to use a USB keyboard which would actually
be available. Also enable the usb keyboard option for those devices
that don't have it enabled already.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Wed, 19 Feb 2020 01:46:06 +0000 (09:46 +0800)]
rockchip: evb-rv1108: Use syscon API to get grf base
Use syscon API to get grf base instead of get from dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 19 Feb 2020 01:46:05 +0000 (09:46 +0800)]
rockchip: elgin-rv1108: Use syscon API to get grf base
Use syscon API to get grf base instead of get from dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Kristian Amlie [Tue, 25 Feb 2020 17:22:16 +0000 (18:22 +0100)]
vexpress_ca9x4: Enable use of correct DTB file and restore EFI loader.
EFI was disabled in
f95b8a4b5f64f because of the missing DTB file,
and indeed, the DTB file is required to load recent versions of GRUB
(2.04) correctly.
Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
Tom Rini [Mon, 23 Mar 2020 14:14:31 +0000 (10:14 -0400)]
Merge tag 'efi-2020-04-rc4-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc4 (5)
This series contains bug fixes for the UEFI sub-system:
* report correct variable length in GetNextVariable()
* correct copying direction if freestanding memmove()
* remove const for parameter of GetNextVariableName()
* correct function descriptions
Unit tests are added and adjusted.