oweals/u-boot.git
11 years agopowerpc/mpc85xx: Add property 'fsl, sec-era' in device tree node 'crypto'
Vakul Garg [Wed, 23 Jan 2013 22:52:31 +0000 (22:52 +0000)]
powerpc/mpc85xx: Add property 'fsl, sec-era' in device tree node 'crypto'

If property 'fsl,sec-era' is already present, it is updated.
This property is required so that applications can ascertain which
descriptor commands are supported on a particular CAAM version.

Signed-off-by: Vakul Garg <vakul@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agompc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUE
Anatolij Gustschin [Mon, 21 Jan 2013 23:50:27 +0000 (23:50 +0000)]
mpc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUE

Configuring custom memory init value using CONFIG_MEM_INIT_VALUE in
the board config file doesn't work and memory is always initialized
to the value 0xdeadbeef. Only use this default value if a board doesn't
define CONFIG_MEM_INIT_VALUE.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: add support for MMUv2 page sizes
Scott Wood [Fri, 18 Jan 2013 15:45:58 +0000 (15:45 +0000)]
powerpc/mpc85xx: add support for MMUv2 page sizes

e6500 implements MMUv2 and supports power-of-2 page sizes rather than
power-of-4.  Add support for such pages.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/85xx: Add BSC9132QDS support
Prabhakar Kushwaha [Mon, 14 Jan 2013 18:26:57 +0000 (18:26 +0000)]
powerpc/85xx: Add BSC9132QDS support

BSC9132QDS is a Freescale reference design board for BSC9132 SoC.
BSC9132 SOC is an integrated device that targets the evolving Microcell,
Picocell, and Enterprise-Femto base station market subsegments.
It combines Power Architecture e500v2 and DSP StarCore SC3850 core
technologies with MAPLE-B2F baseband acceleration processing elements.

BSC9132QDS Overview
 --------------------
  2Gbyte DDR3 (on board DDR), Dual Ranki
  32Mbyte 16bit NOR flash
  128Mbyte 2K page size NAND Flash
  256 Kbit M24256 I2C EEPROM
  128 Mbit SPI Flash memory
  SD slot
  USB-ULPI
  eTSEC1: Connected to SGMII PHY
  eTSEC2: Connected to SGMII PHY
  PCIe
  CPRI
  SerDes
  I2C RTC
  DUART interface: supports one UARTs up to 115200 bps for console display

Apart from the above it also consists various peripherals to support DSP
functionalities.

This patch adds support for mainly Power side functionalities and peripherals

Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Add BSC9132/BSC9232 processor support
Prabhakar Kushwaha [Wed, 23 Jan 2013 17:59:57 +0000 (17:59 +0000)]
powerpc/mpc85xx: Add BSC9132/BSC9232 processor support

The BSC9132 is a highly integrated device that targets the evolving
 Microcell, Picocell, and Enterprise-Femto base station market subsegments.

 The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850
 core technologies with MAPLE-B2P baseband acceleration processing elements
 to address the need for a high performance, low cost, integrated solution
 that handles all required processing layers without the need for an
 external device except for an RF transceiver or, in a Micro base station
 configuration, a host device that handles the L3/L4 and handover between
 sectors.

 The BSC9132 SoC includes the following function and features:
    - Power Architecture subsystem including two e500 processors with
512-Kbyte shared L2 cache
    - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
cache
    - 32 Kbyte of shared M3 memory
    - The Multi Accelerator Platform Engine for Pico BaseStation Baseband
      Processing (MAPLE-B2P)
    - Two DDR3/3L memory interfaces with 32-bit data width (40 bits including
      ECC), up to 1333 MHz data rate
    - Dedicated security engine featuring trusted boot
    - Two DMA controllers
         - OCNDMA with four bidirectional channels
         - SysDMA with sixteen bidirectional channels
    - Interfaces
        - Four-lane SerDes PHY
    - PCI Express controller complies with the PEX Specification-Rev 2.0
        - Two Common Public Radio Interface (CPRI) controller lanes
    - High-speed USB 2.0 host and device controller with ULPI interface
        - Enhanced secure digital (SD/MMC) host controller (eSDHC)
    - Antenna interface controller (AIC), supporting four industry
standard JESD207/four custom ADI RF interfaces
       - ADI lanes support both full duplex FDD support & half duplex TDD
       - Universal Subscriber Identity Module (USIM) interface that
   facilitates communication to SIM cards or Eurochip pre-paid phone
   cards
       - Two DUART, two eSPI, and two I2C controllers
       - Integrated Flash memory controller (IFC)
       - GPIO
     - Sixteen 32-bit timers

Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands
James Yang [Mon, 7 Jan 2013 14:01:03 +0000 (14:01 +0000)]
powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands

This patch adds the ability for the FSL DDR interactive debugger to
automatically run the sequence of commands stored in the ddr_interactive
environment variable.  Commands are separated using ';'.

ddr_interactive=compute; edit c0 d0 dimmparms caslat_X 0x3FC0; go

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoREADME.fsl-ddr typos and update to reflect hotkey
James Yang [Fri, 4 Jan 2013 08:14:03 +0000 (08:14 +0000)]
README.fsl-ddr typos and update to reflect hotkey

Documentation fix to README.fsl-ddr to fix typos and
to reflect use of 'd' hotkey to enter the FSL DDR debugger.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoAdd copy command to FSL DDR interactive
James Yang [Fri, 4 Jan 2013 08:14:02 +0000 (08:14 +0000)]
Add copy command to FSL DDR interactive

Add copy command which allows copying of DIMM/controller settings.
This saves tedious retyping of parameters for each identical DIMM
or controller.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoFix data stage name matching issue
James Yang [Fri, 4 Jan 2013 08:14:01 +0000 (08:14 +0000)]
Fix data stage name matching issue

This fix allows the name of the stage to be specifed after the
controler and DIMM is specified.  Prior to this fix, if the
data stage name is not the first entry on the command line,
the operation is applied to all controller and DIMMs.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoMove DDR command parsing to separate function
James Yang [Fri, 4 Jan 2013 08:14:00 +0000 (08:14 +0000)]
Move DDR command parsing to separate function

Move the FSL DDR prompt command parsing to a separate function
so that it can be reused.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc8xxx: Enable entering DDR debugging by key press
York Sun [Fri, 4 Jan 2013 08:13:59 +0000 (08:13 +0000)]
powerpc/mpc8xxx: Enable entering DDR debugging by key press

Using environmental variable "ddr_interactive" to activate interactive DDR
debugging seomtiems is not enough. For example, after updating SPD with a
valid but wrong image, u-boot won't come up due to wrong DDR configuration.
By enabling key press method, we can enter debug mode to have a chance to
boot without using other tools to recover the board.

CONFIG_FSL_DDR_INTERACTIVE needs to be defined in header file. To enter the
debug mode by key press, press key 'd' shortly after reset, like one would
do to abort auto booting. It is fixed to lower case 'd' at this moment.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/p2041: set RCW and PBI files for .pbl build or P2041RDB
Valentin Longchamp [Fri, 4 Jan 2013 04:06:17 +0000 (04:06 +0000)]
powerpc/p2041: set RCW and PBI files for .pbl build or P2041RDB

In order to be able to build a u-boot.pbl image, both the
CONFIG_PBLPBI_CONFIG and CONFIG_PBLRCW_CONFIG variables have to be
defined.

This patch sets these two files for the P2041RDB board.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/p2041: add RCW file for P2041RDB
Valentin Longchamp [Fri, 4 Jan 2013 04:06:16 +0000 (04:06 +0000)]
powerpc/p2041: add RCW file for P2041RDB

All the dev boards of Freescale's QorIQ family have a RCW that is
supported by the u-boot.pbl build target. This patch adds one for the
P2041 dev board.

This RCW is suitable for the RAMBOOT_PBL scenarios and was tested on the
P2041RDB booting from the eSPI NOR Flash (P2041RDB_SPIFLASH config).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/t4240qds: Print FPGA detail version
Prabhakar Kushwaha [Sun, 23 Dec 2012 19:26:03 +0000 (19:26 +0000)]
powerpc/t4240qds: Print FPGA detail version

Qixis FPGA has tag data contains image name and build date.
It is helpful to identify the FPGA image precisely.

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/t4240qds: Add support to dump switch settings on t4240qds board
Shaveta Leekha [Sun, 23 Dec 2012 19:25:50 +0000 (19:25 +0000)]
powerpc/t4240qds: Add support to dump switch settings on t4240qds board

This function is called by "qixis_reset switch" command and
switch settings are calculated from qixis FPGA registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/b4860qds: Add support to dump switch settings on b4860qds board
Shaveta Leekha [Sun, 23 Dec 2012 19:25:42 +0000 (19:25 +0000)]
powerpc/b4860qds: Add support to dump switch settings on b4860qds board

This function is called by "qixis_reset switch" command
and switch settings are calculated from FPGA/qixis registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/qixis: enable qixis dump command and add switch dumping command
Shaveta Leekha [Sun, 23 Dec 2012 19:25:35 +0000 (19:25 +0000)]
powerpc/qixis: enable qixis dump command and add switch dumping command

Remove #ifdef so that "qixis dump" command is always available

Add "qixis_reset switch" command to dump switch settings
Qixis doesn't have 1:1 switch mapping. We need to reverse engineer from
registers to figure out switch settings. Not all bits are available.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/b4860qds: Added Support for B4860QDS
York Sun [Sun, 23 Dec 2012 19:25:27 +0000 (19:25 +0000)]
powerpc/b4860qds: Added Support for B4860QDS

B4860QDS is a high-performance computing evaluation, development and
test platform supporting the B4860 QorIQ Power Architecture processor.

B4860QDS Overview
------------------
- DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
  ECC, 4 GB of memory in two ranks of 2 GB.
- DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,  ECC, 2 GB of memory. Single rank.
- SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point
  16x16 switch VSC3316
- SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point
  8x8 switch VSC3308
- USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode.
- B4860 UART port is available over USB-to-UART translator USB2SER or over
  RS232 flat cable.
- A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper
  connectors for Stand-alone mode and to the 1000Base-X over AMC MicroTCA
  connector ports 0 and 2 for AMC mode.
- The B4860 configuration may be loaded from nine bits coded reset
  configuration reset source. The RCW source is set by appropriate
  DIP-switches:
- 16-bit NOR Flash / PROMJet
- QIXIS 8-bit NOR Flash Emulator
- 8-bit NAND Flash
- 24-bit SPI Flash
- Long address I2C EEPROM
- Available debug interfaces are:
- On-board eCWTAP controller with ETH and USB I/F
- JTAG/COP 16-pin header for any external TAP controller
- External JTAG source over AMC to support B2B configuration
- 70-pin Aurora debug connector
- QIXIS (FPGA) logic:
- 2 KB internal memory space including
- IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK,
  DDRCLK1, 2 and RTCCLK.
- Two 8T49N222A SerDes ref clock devices support two SerDes port clocks
  - total four refclk, including CPRI clock scheme

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx:Fix Core cluster configuration loop
Prabhakar Kushwaha [Sun, 23 Dec 2012 19:25:18 +0000 (19:25 +0000)]
powerpc/mpc85xx:Fix Core cluster configuration loop

Different personalities/derivatives of SoC may have reduced cluster. But it is
not necessary for last valid DCFG_CCSR_TP_CLUSTER register to have
DCFG_CCSR_TP_CLUSTER[EOC] bit set to represent "End of Clusters".

EOC bit can still be set in last DCFG_CCSR_TP_CLUSTER register of orignal SoC
which may not be valid for the personality.
So add initiator type check to find valid cluster.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoboard/freescale/common:Add support of QTAG register
Prabhakar Kushwaha [Sun, 23 Dec 2012 19:24:47 +0000 (19:24 +0000)]
board/freescale/common:Add support of QTAG register

QIXIS FPGA's QIXIS Tag Access register (QTAG) defines TAG, VER, DATE, IMAGE
fields. These fields have FPGA build version, image name and build date
information.

Add support to parse these fields to have complete FPGA image information.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx:Add support of B4420 SoC
Poonam Aggrwal [Sun, 23 Dec 2012 19:24:16 +0000 (19:24 +0000)]
powerpc/mpc85xx:Add support of B4420 SoC

B4420 is a reduced personality of B4860 with fewer core/clusters(both SC3900
and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and
reduced target frequencies.

Key differences between B4860 and B4420
----------------------------------------
B4420 has:
1. Fewer e6500 cores: 1 cluster with 2 e6500 cores
2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster.
3. Single DDRC
4. 2X 4 lane serdes
5. 3 SGMII interfaces
6. no sRIO
7. no 10G

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Few updates for B4860 cpu changes
Poonam Aggrwal [Sun, 23 Dec 2012 19:22:33 +0000 (19:22 +0000)]
powerpc/mpc85xx: Few updates for B4860 cpu changes

- Added some more serdes1 and serdes2 combinations
  serdes1= 0x2c, 0x2d, 0x2e
  serdes2= 0x7a, 0x8d, 0x98
- Updated Number of DDR controllers to 2.
- Added FMAN file for B4860, drivers/net/fm/b4860.c

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc8544ds: Add USB controller support for MPC8544DS
Hongtao Jia [Thu, 20 Dec 2012 19:39:53 +0000 (19:39 +0000)]
powerpc/mpc8544ds: Add USB controller support for MPC8544DS

USB controller in uboot is a required feature for MPC8544DS. Without this
support there is no 'usb' command in uboot.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs
Hongtao Jia [Thu, 20 Dec 2012 19:36:12 +0000 (19:36 +0000)]
powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs

The controller interleaving only takes the usable memory mapped to cs0. In
the case of bank interleaving not enabled, only half of dual-rank DIMM will
be used.

For single-rank DIMM bank interleaving will be auto disabled.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/t4240qds: Update IFC timing for NOR flash
York Sun [Wed, 19 Dec 2012 17:23:05 +0000 (17:23 +0000)]
powerpc/t4240qds: Update IFC timing for NOR flash

Relax parameters to give address latching more time to setup.
Tighten parameters to make it overall faster.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoboards/T4240qds:Fix IFC AMASK init as per FPGA register space
Prabhakar Kushwaha [Tue, 18 Dec 2012 17:23:19 +0000 (17:23 +0000)]
boards/T4240qds:Fix IFC AMASK init as per FPGA register space

T4240QDS's QIXIS FPGA has 4k register space size and IFC controller's
Address Mask Registers is initialised 64K size.

So Fix the Address Mask Register initilisation as 4K

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoboard/T4240qds:Fix TLB and LAW size of NAND flash
Prabhakar Kushwaha [Tue, 18 Dec 2012 00:15:45 +0000 (00:15 +0000)]
board/T4240qds:Fix TLB and LAW size of NAND flash

The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's
Address Mask Registers is initialised with the same.

So Update TLB and LAW size of NAND flash accordingly.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Reserve default boot page
York Sun [Fri, 14 Dec 2012 06:21:58 +0000 (06:21 +0000)]
powerpc/mpc85xx: Reserve default boot page

The boot page in memory is already reserved so OS won't overwrite.
As long as the boot page translation is active, the default boot page
also needs to be reserved in case the memory is 4GB or more.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/t4qds: move VSC3316 config data from t4qds.h to t4qds.c
Timur Tabi [Wed, 12 Dec 2012 11:07:12 +0000 (11:07 +0000)]
powerpc/t4qds: move VSC3316 config data from t4qds.h to t4qds.c

Static variables should be defined in C files, not header files, because
otherwise every C file that #includes the header file will generate a
duplicate of the variables.  Since the vsc3316_xxx[] arrays are only
used by t4qds.c anyway, just put the variables there.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/p2041: move Lanes mux to board early init
Shaohui Xie [Mon, 3 Dec 2012 21:36:32 +0000 (21:36 +0000)]
powerpc/p2041: move Lanes mux to board early init

Lanes mux currently is configured in eth.c when initializing FMAN ethernet
ports, but SRIO and PCIe also need lanes mux, so we move the lanes mux to
p2041rdb.c which implements a board-specific initialization and will be
called at early stage.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Tue, 29 Jan 2013 20:36:27 +0000 (15:36 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

11 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Tom Rini [Tue, 29 Jan 2013 20:36:23 +0000 (15:36 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

11 years agoRemove unused CONFIG_SYS_I2C_BUS[_SELECT]
Michael Jones [Wed, 16 Jan 2013 00:44:29 +0000 (00:44 +0000)]
Remove unused CONFIG_SYS_I2C_BUS[_SELECT]

"CONFIG_SYS_I2C_BUS" and "CONFIG_SYS_I2C_BUS_SELECT" don't appear anywhere
outside of config files.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
11 years agoi2c: mxs: Staticize the functions in the driver
Marek Vasut [Sun, 16 Dec 2012 02:48:16 +0000 (02:48 +0000)]
i2c: mxs: Staticize the functions in the driver

The local functions in the mxs i2c driver are not marked static, make it so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
11 years agoMerge remote-tracking branch 'mpc83xx/next'
Kim Phillips [Thu, 17 Jan 2013 00:34:09 +0000 (18:34 -0600)]
Merge remote-tracking branch 'mpc83xx/next'

11 years agoREADME.mips: update known issues and TODOs
Daniel Schwierzeck [Sat, 12 Jan 2013 18:09:11 +0000 (19:09 +0100)]
README.mips: update known issues and TODOs

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoREADME.qemu-mips: move README file from board to doc directory
Daniel Schwierzeck [Sat, 12 Jan 2013 17:58:54 +0000 (18:58 +0100)]
README.qemu-mips: move README file from board to doc directory

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: qemu-mips: update and fix example usage in README
Daniel Schwierzeck [Tue, 8 Jan 2013 16:51:11 +0000 (17:51 +0100)]
MIPS: qemu-mips: update and fix example usage in README

By now U-Boot supports Qemu MIPS for little and big endian
as well as 32 bit and 64 bit. Update and fix the example usage
in the README to reflect this.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: qemu-mips: add '-M mips' switch to the example usage command
Gabor Juhos [Tue, 8 Jan 2013 02:22:51 +0000 (02:22 +0000)]
MIPS: qemu-mips: add '-M mips' switch to the example usage command

Using the example command from the README file does
not work as expected. qemu shows a text similar to
the one below and it hangs.

    $ qemu-system-mips -L . -nographic
    Could not open option rom 'pxe-pcnet.rom': No such file or directory
    qemu-system-mips: pci_add_option_rom: failed to find romfile "vgabios-cirrus.bin"
    qemu: terminating on signal 15 from pid 19726

This happens because qemu emulates a Malta board by
default if the machine type is not defined explicitely
on the command line.

For a working test, the '-M mips' switch is required:

    $ qemu-system-mips -M mips -L . -nographic
    Could not open option rom 'vgabios.bin': No such file or directory

    U-Boot 2013.01-rc2-00132-g1e8e648-dirty (Jan 08 2013 - 09:06:42)

    Board: Qemu -M mips CPU: 24Kf proc_id=0x19300
    DRAM:  128 MiB
    ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
    Flash: 0 Bytes
    *** Warning - bad CRC, using default environment

    In:    serial
    Out:   serial
    Err:   serial
    Net:   NE2000
    Hit any key to stop autoboot:  0
    qemu-mips #

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
11 years agoMIPS: qemu-mips: fix a typo in README
Gabor Juhos [Tue, 8 Jan 2013 02:22:50 +0000 (02:22 +0000)]
MIPS: qemu-mips: fix a typo in README

The 'Limitations & comments' section refers to the
'-m mips' switch which is not valid. The '-m' switch
can be used for setting the virtual RAM size:

    $qemu-system-mips --help | grep '^-m '
    -m megs         set virtual RAM size to megs MB [default=128]
    $

The correct switch for specifying the machine type is '-M'.
Fix the text to refer to that.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
11 years agoMIPS: bootm.c: add support for 'prep' and 'go' subcommands
Gabor Juhos [Mon, 7 Jan 2013 02:53:42 +0000 (02:53 +0000)]
MIPS: bootm.c: add support for 'prep' and 'go' subcommands

The bootm command supports subcommands since long time
however those subcommands are not yet usable on MIPS.

The patch is based on the ARM implementation, and it adds
support for the 'prep' and 'go' subcommands only.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: bootm.c: separate environment initialization
Gabor Juhos [Mon, 7 Jan 2013 02:53:41 +0000 (02:53 +0000)]
MIPS: bootm.c: separate environment initialization

Move the environment initialization code into a
separate function. This make the code reusable
for bootm subcommands.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: bootm.c: separate linux jump code
Gabor Juhos [Mon, 7 Jan 2013 02:53:40 +0000 (02:53 +0000)]
MIPS: bootm.c: separate linux jump code

Move the actual jump code into a separate function.
This make the code reusable for bootm subcommands.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: bootm.c: use debug macro to print debug message
Gabor Juhos [Sun, 6 Jan 2013 00:54:20 +0000 (00:54 +0000)]
MIPS: bootm.c: use debug macro to print debug message

The '## Transferring control ...' message is printed
only if DEBUG is enabled. Get rid of the 'ifdef DEBUG'
statement and use the debug macro instead.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 years agoPrepare v2013.01 v2013.01
Tom Rini [Tue, 15 Jan 2013 21:47:42 +0000 (14:47 -0700)]
Prepare v2013.01

Signed-off-by: Tom Rini <trini@ti.com>
11 years agopxa: Save lr register in relocate_code function
Łukasz Dałek [Sat, 12 Jan 2013 11:39:27 +0000 (11:39 +0000)]
pxa: Save lr register in relocate_code function

When u-boot is compiled for PXA25x processor, pxa/start.S is calling
cpu_init_crit by BL instruction. BL is overwriting lr register so
relocate_code is going into infinite loop. This patch preservs lr
register in r12 before calling cpu_init_crit and after function returns
restores it.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Mon, 14 Jan 2013 22:41:38 +0000 (15:41 -0700)]
Merge branch 'master' of git://git.denx.de/u-boot-video

11 years agoMerge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
Tom Rini [Mon, 14 Jan 2013 22:30:31 +0000 (15:30 -0700)]
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

11 years agotwl4030: fix 'could could' in error messages
Peter Meerwald [Mon, 19 Nov 2012 23:13:04 +0000 (23:13 +0000)]
twl4030: fix 'could could' in error messages

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
11 years agowatchdog.h: Move hw_watchdog_init prototype to end, guard
Tom Rini [Mon, 14 Jan 2013 20:10:07 +0000 (13:10 -0700)]
watchdog.h: Move hw_watchdog_init prototype to end, guard

In commit abbab70 we added a prototype for hw_watchdog_init, in a
Freescale i.MX watchdog driver.  We did not however guard it with an
__ASSEMBLY__ check and broke some platforms.  Move this to the end of
the file with other prototypes and guard it.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoVIDEO: better document the correct use of CONFIG_FB_ADDR
Wolfgang Denk [Thu, 3 Jan 2013 00:43:59 +0000 (00:43 +0000)]
VIDEO: better document the correct use of CONFIG_FB_ADDR

Signed-off-by: Wolfgang Denk <wd@denx.de>
cc: Anatolij Gustschin <agust@denx.de>

11 years agolcd: restore ability to display 8 bpp BMPs on 16 bpp LCDs
Nikita Kiryanov [Thu, 20 Dec 2012 00:52:34 +0000 (00:52 +0000)]
lcd: restore ability to display 8 bpp BMPs on 16 bpp LCDs

Commit fb6a9aab7ae78c (LCD: display 32bpp decompressed bitmap image)
broke the check that allowed U-Boot to display 8 bpp BMPs on a 16
bpp LCD screen, effectively turning this feature off.

Restore this feature by changing the check back to the same meaning
it originally had.
To avoid future confusion, the check has also been rephrased to make
its meaning clear.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
11 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 14 Jan 2013 16:00:02 +0000 (17:00 +0100)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

11 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 14 Jan 2013 14:21:00 +0000 (15:21 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

11 years agovideo: exynos_fb: Make a call to draw_logo only when CONFIG_CMD_BMP is selected
Ajay Kumar [Sun, 13 Jan 2013 23:32:16 +0000 (23:32 +0000)]
video: exynos_fb: Make a call to draw_logo only when CONFIG_CMD_BMP is selected

Previously, the call to draw_logo() was happening irrespective
of whether we have selected logo or LCD console.
With this patch we call draw_logo() only when CONFIG_CMD_BMP is selected.

This would even fix the following compilation warning:
exynos_fb.c: In function 'draw_logo':
exynos_fb.c:74:8: warning: variable 'addr' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:9: warning: variable 'y' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:6: warning: variable 'x' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agovideo: exynos_dp: Remove unused variable disp_info
Ajay Kumar [Sun, 13 Jan 2013 23:32:15 +0000 (23:32 +0000)]
video: exynos_dp: Remove unused variable disp_info

Remove unused variable disp_info to fix the following compilation warning:
exynos_dp.c: In function 'exynos_init_dp':
exynos_dp.c:860:23: warning: variable 'disp_info' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoI2C: S3C24X0: Resolve build error for VCMA9
Rajeshwari Shinde [Sun, 13 Jan 2013 19:49:36 +0000 (19:49 +0000)]
I2C: S3C24X0: Resolve build error for VCMA9

This patch resolves the following build errors for I2C driver in
VCMA9:

In file included from s3c24x0_i2c.c:40:0:
s3c24x0_i2c.h:38:17: error: field 'id' has incomplete type
s3c24x0_i2c.c:70:39: error: 'CONFIG_MAX_I2C_NUM' undeclared here (not
in a function) s3c24x0_i2c.c:70:31: warning: 'i2c_bus' defined but
not used [-Wunused-variable] s3c24x0_i2c.c:72:12: warning:
'i2c_busses' defined but not used [-Wunused-variable]

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agomx51evk: Add DVI output support
Fabio Estevam [Wed, 9 Jan 2013 04:55:09 +0000 (04:55 +0000)]
mx51evk: Add DVI output support

Add DVI output support and make it the default video output.

Currently the CLAA WVGA panel is supported, but this panel has to be purchased
separately, so using the DVI output as the default would allow more people to
try the splash screen feature on a mx51evk.

If someone still wants to use the CLAA WVGA, just set the panel variable as:
set panel claa

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agomx6qsabresd: Fix booting the kernel from SDHC3
Fabio Estevam [Thu, 10 Jan 2013 09:00:53 +0000 (09:00 +0000)]
mx6qsabresd: Fix booting the kernel from SDHC3

Since commit de7d02aeb (mx6qsabresd: add usdhc2 and usdhc4 support)
SDHC3 device node is no longer 0, which breaks loading a uImage from SDHC3.

Fix it by adapting the default environment to use CONFIG_SYS_MMC_ENV_DEV as the
correct mmc node for loading the kernel from.

While at it, go back to using SDHC3 as the default mmc, since we have Yocto
images that generate an SD card containing U-boot,kernel and rootfs, so it is
more convenient to keep using SDHC3 as it was originally.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agomx6qsabre{auto, sd}: Add support to dynamically choose between fdt use or not
Otavio Salvador [Thu, 10 Jan 2013 09:45:09 +0000 (09:45 +0000)]
mx6qsabre{auto, sd}: Add support to dynamically choose between fdt use or not

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agomx6qsabrelite: Add support to dynamically choose between fdt use or not
Otavio Salvador [Thu, 10 Jan 2013 09:45:08 +0000 (09:45 +0000)]
mx6qsabrelite: Add support to dynamically choose between fdt use or not

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agomx53loco: Add support to dynamically choose between fdt use or not
Otavio Salvador [Thu, 10 Jan 2013 09:45:07 +0000 (09:45 +0000)]
mx53loco: Add support to dynamically choose between fdt use or not

The CONFIG_SYS_CBSIZE has been change to 512 to avoid runtime errors as:

,---[ Runtime error ]
| Hit any key to stop autoboot:  0
| MX53LOCO U-Boot > pri netboot
| netboot=echo Booting from net ...; run netargs; if test ...
| prefetch abort
| pc : [<20747368>]          lr : [<20747365>]
| sp : af566e20  ip : 00000000     fp : 00000000
| r10: 00000002  r9 : af6dfc28     r8 : af566f58
| r7 : af6dfc10  r6 : 00000001     r5 : 00000002  r4 : 74206669
| r3 : 00000000  r2 : 00000060     r1 : 00000020  r0 : 0000018e
| Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
| Resetting CPU ...
|
| resetting ...
`---

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agomx28evk: Add support to dynamically choose between fdt use or not
Otavio Salvador [Thu, 10 Jan 2013 09:45:06 +0000 (09:45 +0000)]
mx28evk: Add support to dynamically choose between fdt use or not

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agomx28evk: We shouldn't hardcode a rootfs filesystem type
Otavio Salvador [Thu, 10 Jan 2013 09:45:05 +0000 (09:45 +0000)]
mx28evk: We shouldn't hardcode a rootfs filesystem type

For a generic environment, we shouldn't have a fixed rootfs filesystem
so we drop it from env.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agomx6qsabrelite: Use tabs to environment setting
Otavio Salvador [Thu, 10 Jan 2013 09:45:04 +0000 (09:45 +0000)]
mx6qsabrelite: Use tabs to environment setting

This rework the environment to use tabs for environment setting as
done in other boards.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agomx31/mx35/mx51/mx53/mx6: add watchdog
Troy Kisky [Mon, 22 Oct 2012 15:19:01 +0000 (15:19 +0000)]
mx31/mx35/mx51/mx53/mx6: add watchdog

Use a common watchdog driver for all these cpus.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
11 years agoarm: at91sam9x5: add dataflash boot support
Bo Shen [Thu, 6 Dec 2012 21:37:04 +0000 (21:37 +0000)]
arm: at91sam9x5: add dataflash boot support

Add dataflash boot support on at91sam9x5ek board

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agom68k/lib: fix serial driver relocation
angelo [Fri, 23 Nov 2012 12:23:39 +0000 (12:23 +0000)]
m68k/lib: fix serial driver relocation

Fix coldfire serial driver bindings no more relocated to ram after last
changes to drivers/serial/serial.c (regression).
Serial initialization in ram has to be called after that gd->reloc_off is
calculated.

Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Fri, 11 Jan 2013 21:38:24 +0000 (14:38 -0700)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

11 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 11 Jan 2013 17:17:33 +0000 (18:17 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

11 years agoEXYNOS5: Enable console multiplexing in u-boot
Ajay Kumar [Thu, 10 Jan 2013 21:06:11 +0000 (21:06 +0000)]
EXYNOS5: Enable console multiplexing in u-boot

We enable console multiplexing and use both serial and LCD for stdout/stderr.
Initially, u-boot output console is observed via serial port.
If you also have a DP panel connected onto your SMDK5250 board,
you can switch to LCD console by typing "setenv stdout lcd".
You can always switch back to serial using "setenv stdout serial".
You can switch error console(stderr) as well, using similar commands.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS5: Make all display related code dependent on CONFIG_LCD
Ajay Kumar [Thu, 10 Jan 2013 21:06:10 +0000 (21:06 +0000)]
EXYNOS5: Make all display related code dependent on CONFIG_LCD

u-boot compilation fails for smdk5250 when we deselect CONFIG_LCD
from the main config file.

Following error was observed:
drivers/video/libvideo.o: In function `exynos_lcd_init':
/home/ajay/u-boot-samsung/drivers/video/exynos_fb.c:68: undefined reference to `lcd_set_flush_dcache'

This is because exynos video drivers have dependency on CONFIG_LCD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk
Jaehoon Chung [Thu, 27 Dec 2012 22:30:33 +0000 (22:30 +0000)]
Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk

Mobile storage is used the CLK_DIV_FSYS3 value.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: clock: support get_mmc_clk for exynos
Jaehoon Chung [Thu, 27 Dec 2012 22:30:32 +0000 (22:30 +0000)]
Exynos: clock: support get_mmc_clk for exynos

To get exactly clock value for mmc, support the get_mmc_clk() like
set_mmc_clk().

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoOMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT
Javier Martinez Canillas [Mon, 7 Jan 2013 01:35:21 +0000 (01:35 +0000)]
OMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT

IGEP board PC16550D (ns16550) UART doesn't set the
Transmitter Empty (TEMT) Bit in SPL. This makes
U-Boot to hang while waiting for TEMT. Add the
CONFIG_SYS_NS16550_BROKEN_TEMT config option to
avoid this issue.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
11 years agoserial/ns16550: add an option to avoid hanging on broken platforms
Javier Martinez Canillas [Mon, 7 Jan 2013 01:35:20 +0000 (01:35 +0000)]
serial/ns16550: add an option to avoid hanging on broken platforms

Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
does not set the TEMT bit when the transmitter is empty in SPL.
This makes U-Boot to hang while waiting for TEMT to be set.

Add a new option to avoid this:

CONFIG_SYS_NS16550_BROKEN_TEMT

16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
11 years agoMakefile: remove MLO.byteswap on clobber
Nishanth Menon [Wed, 2 Jan 2013 07:59:24 +0000 (07:59 +0000)]
Makefile: remove MLO.byteswap on clobber

On clobber, do a cleanup even for SPL build else, we'd have
MLO.byteswap remaining for certain platforms like am33xx SPL builds

Signed-off-by: Nishanth Menon <nm@ti.com>
11 years agoOMAP3: igep00x0: add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_NAND_SUPPORT
Javier Martinez Canillas [Fri, 28 Dec 2012 02:51:53 +0000 (02:51 +0000)]
OMAP3: igep00x0: add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_NAND_SUPPORT

When booting an IGEPv2 board from NAND with SPL, U-Boot hangs
trying to read the OMAP General Purpose Memory Controller (GPMC).

The reason is that the GPMC initialization function is called
inside spl_board_init() and this function is only executed when
CONFIG_SPL_BOARD_INIT is defined.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
11 years agoPrepare v2013.01-rc3 v2013.01-rc3
Tom Rini [Thu, 10 Jan 2013 21:44:40 +0000 (14:44 -0700)]
Prepare v2013.01-rc3

Signed-off-by: Tom Rini <trini@ti.com>
11 years agobootm: relocate names of sub-command table for archs with CONFIG_NEEDS_MANUAL_RELOC
Daniel Schwierzeck [Mon, 7 Jan 2013 06:54:52 +0000 (06:54 +0000)]
bootm: relocate names of sub-command table for archs with CONFIG_NEEDS_MANUAL_RELOC

To make bootm sub-command feature working on archs with CONFIG_NEEDS_MANUAL_RELOC,
the name pointers in the sub-command table need to be relocated.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoarm: Tabify code for MMC initialization
Taylor Hutt [Fri, 30 Nov 2012 13:01:23 +0000 (13:01 +0000)]
arm: Tabify code for MMC initialization

The two modified lines were indented with spaces.
They are now indented with tabs.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Move bootstage record for board_init_f() to after arch_cpu_init()
Simon Glass [Fri, 30 Nov 2012 13:01:22 +0000 (13:01 +0000)]
arm: Move bootstage record for board_init_f() to after arch_cpu_init()

The timer may be inited in arch_cpu_init() so it is not safe to make a
bootstage mark before this is called. Arrange the code to fix this.

Note: The question was raised as to why we don't keep all archs in sync.
PowerPC doesn't have specific bootstage markers at present (although it
does use boot progress). I hope that the generic board series will solve
this problem in general, but in the meantime this is a real problem, and
only in ARM.

We now get a correct time for board_init_f:

Timer summary in microseconds:
       Mark    Elapsed  Stage
          0          0  reset
    100,000    100,000  spl_start
    848,530    748,530  board_init_f
    907,301     58,771  board_init_r
    910,478      3,177  board_init

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Make interrupts.o and reset.o in libarm also appear in SPL
Tom Wai-Hong Tam [Fri, 30 Nov 2012 13:01:21 +0000 (13:01 +0000)]
arm: Make interrupts.o and reset.o in libarm also appear in SPL

SPL u-boot may call do_reset() which depends on interrupts.o and reset.o.
So make them also appear in SPL.

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoAdd option to display customised memory information
Simon Glass [Fri, 30 Nov 2012 13:01:20 +0000 (13:01 +0000)]
Add option to display customised memory information

Some boards want to report more than just memory size. For example, it
might be useful to display the memory type (DDR2, DDR3) or manufacturer.

Add a weak function to support this requirement, accessed through a new
'meminfo' command.

Any example of the DRAM: output is below, just for illustration:

SMDK5250 # meminfo
DRAM:  2 GiB Elpida DDR3 @ 800MHz

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Add CONFIG_DISPLAY_BOARDINFO_LATE to display board info on LCD
Simon Glass [Fri, 30 Nov 2012 13:01:19 +0000 (13:01 +0000)]
arm: Add CONFIG_DISPLAY_BOARDINFO_LATE to display board info on LCD

This option displays board info after stdio is running, so that it will
appear on the LCD. If it is displayed earlier, the board info will appear
on the serial console but not on the LCD.

Here follows a blow-by-blow description.

1a. Without CONFIG_DISPLAY_BOARDINFO_LATE, on serial:

U-Boot 2011.12-02550-g037e1c5-dirty (Nov 15 2012 - 14:29:42) for SMDK5250

CPU:   S5PC520 @ 1700MHz

Board: Google Snow, rev 0
I2C:   ready
DRAM:  2 GiB Elpida DDR3 @ 800MHz
MMC:   S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment

In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

1b. Without CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info
is missing):

In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

2a. With CONFIG_DISPLAY_BOARDINFO_LATE, on serial:

U-Boot 2011.12-02550-g037e1c5 (Nov 15 2012 - 14:27:40) for SMDK5250

CPU:   S5PC520 @ 1700MHz
I2C:   ready
DRAM:  2 GiB Elpida DDR3 @ 800MHz
MMC:   S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment

Model: Google Snow
In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

2b. With CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info is present):

Model: Google Snow
In:    mkbp-keyb
Out:   lcd
Err:   lcd
Net:   No ethernet found.
Hit any key to stop autoboot:  0
SMDK5250 #

Since the LCD is all that a typical user sees, it is useful to display
the model there.

We may be able to rearrange things some other way one day, but at
present this seems like a convenient way of getting the required
behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoDocument the CONFIG_DISPLAY_BOARDINFO option
Simon Glass [Fri, 30 Nov 2012 13:01:18 +0000 (13:01 +0000)]
Document the CONFIG_DISPLAY_BOARDINFO option

Add a short note about this in the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Add CONFIG_DELAY_ENVIRONMENT to delay environment loading
Simon Glass [Fri, 30 Nov 2012 13:01:17 +0000 (13:01 +0000)]
arm: Add CONFIG_DELAY_ENVIRONMENT to delay environment loading

This option delays loading of the environment until later, so that only the
default environment will be available to U-Boot.

This can address the security risk of untrusted data being used during boot.

Any time you load untrusted data you expose yourself to a bug in the
code. The attacker gets to choose the data so can sometimes carefully
craft it to exploit a bug. We try to avoid touching user-controlled
data during a verified boot unless strictly necessary. Since the
default environment is good enough in this case (or you would just
change it), this gets around the problem by just not loading the
environment.

When CONFIG_DELAY_ENVIRONMENT is defined, it is convenient to have a
run-time way of enabling loading of the environment. Add this to the
fdt as /config/delay-environment.

Note: This patch depends on http://patchwork.ozlabs.org/patch/194342/

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
11 years agoarm: Move fdt check earlier so that board_early_init_f() can use it
Simon Glass [Fri, 30 Nov 2012 13:01:16 +0000 (13:01 +0000)]
arm: Move fdt check earlier so that board_early_init_f() can use it

We want to use the fdt inside board_early_init_f(), so check for its
presence earlier in the pre-reloc init sequence.

So far ARM and microblaze are the only only ones that use
CONFIG_OF_CONTROL. Microblaze does not have the same init loop, and in
particular does not have the board_early_init_f() call. So a patch for
microblaze would have no meaning.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Keep track of the tlb size as well as its location
Gabe Black [Fri, 30 Nov 2012 13:01:15 +0000 (13:01 +0000)]
arm: Keep track of the tlb size as well as its location

It may be necessary to know where the TLB area ends as well as where it
starts. This allows board code to complete a secure memory erase without
destroying the page tables.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: move flush_dcache_all() to just before disable cache
Arun Mankuzhi [Fri, 30 Nov 2012 13:01:14 +0000 (13:01 +0000)]
arm: move flush_dcache_all() to just before disable cache

In Cortex-A15 architecture, when we run cache invalidate
the cache clean operation executes automatically.
So if there are any dirty cache lines before disabling the L2 cache
these will be synchronized with the main memory when
invalidate_dcache_all() runs in the last part of U-boot

The two functions after flush_dcache_all is using the stack. So this
data will be on the cache. After disable when invalidate is called the
data will be flushed from cache to memory. This corrupts the stack in
invalida_dcache_all. So this change is required to avoid the u-boot
hang.

So flush has to be done just before clearing CR_C bit

Signed-off-by: Arun Mankuzhi <arun.m@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agocfi_flash: Report Advanced Sector Protection (PPB) with flinfo cmd
Stefan Roese [Thu, 6 Dec 2012 14:44:12 +0000 (15:44 +0100)]
cfi_flash: Report Advanced Sector Protection (PPB) with flinfo cmd

Report the usage of the Advanced Sector Protection (PPB) to the user
upon 'flinfo' command. E.g:

Bank # 1: CFI conformant flash (16 x 16)  Size: 64 MB in 512 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
  Advanced Sector Protection (PPB) enabled
  Erase timeout: 16384 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 32 bytes

  Sector Start Addresses:
  FC000000 E      FC020000 E RO   FC040000 E      FC060000 E      FC080000 E
  ...

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
11 years agocfi_flash: Enable PPB protection for all AMD cmdset flash chips
Stefan Roese [Thu, 6 Dec 2012 14:44:11 +0000 (15:44 +0100)]
cfi_flash: Enable PPB protection for all AMD cmdset flash chips

Not only Spansion supports the Persistent Protection Bits (PPB) locking.
Other devices like the Micron JS28F512M29EWx also support this type
of locking/unlocking. Detection of support is done in the same way as
done for the Spansion chips - via the 0x49 CFI word.

This patch enables this PPB protection mechanism for all AMD type
(AMD commandset) chips.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
11 years agocfi_flash: Read PPB sector protection from device for AMD/Spansion chips
Stefan Roese [Thu, 6 Dec 2012 14:44:10 +0000 (15:44 +0100)]
cfi_flash: Read PPB sector protection from device for AMD/Spansion chips

Patch 66863b05 [cfi_flash: add support for Spansion flash PPB sector
protection] introduced the PPB (Persistent Protection Bit) locking for
Spansion chips. But right now the sector protection status (locked vs
unlocked) is set to unlocked for all sectors upon bootup. The real
sector protection status is ignored.

This patch now reads the current sector protection status and uses
it for these AMD/Spansion flash chips.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
11 years agocfi_flash: Add manufact_match helper function
Stefan Roese [Thu, 6 Dec 2012 14:44:09 +0000 (15:44 +0100)]
cfi_flash: Add manufact_match helper function

Consolidate manufacturer matching into the function manufact_match()
and use it.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
11 years agomtd/cfi: add support for SST 4KB sector granularity
Angelo Dureghello [Sat, 1 Dec 2012 00:14:18 +0000 (01:14 +0100)]
mtd/cfi: add support for SST 4KB sector granularity

Add support for SST 4KB sector granularity.

Many recent SST flashes, i.e. SST39VF3201B and similar of this family
are declared CFI-conformant from SST. They support CFI query, but implement
2 different sector sizes in the same memory: a 64KB sector (they call it
"block", std AMD erase cmd=0x30), and a 4KB sector (they call it "sector",
erase cmd=0x50). Also, CFI query on these chips, reading from address 0x2dh
of cfi query struct, detects a number of secotrs for the 4KB granularity
(flinfo shows it).

For all other aspects, they are CFI compliant, so, as Linux do, i think
it's a good idea to handle these chips in the CFI driver, with a fixup
to allow 4KB granularity, as should be expected, instead of 64KB.

Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Signed-off-by: Stefan Rose <sr@denx.de>
11 years agovideo: Modify exynos_fimd driver to support LCD console
Ajay Kumar [Tue, 8 Jan 2013 20:42:25 +0000 (20:42 +0000)]
video: Modify exynos_fimd driver to support LCD console

Currently, exynos FIMD driver is being used to support only TIZEN LOGOs.
In order to get LCD console, we need to enable half word swap feature
of FIMD and use 16 BPP.
LCD console and proprietary Logo cannot be used simultaneously.
We use "logo_on" field inside vidinfo_t structure to decide whether
user wants Logo or Console.
Define CONFIG_CMD_BMP and make logo_on = 1 to get Logo on screen.
Use logo_on = 0 to get output console on LCD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS: Add dummy definition to fix compilation dependency on CONFIG_EXYNOS_MIPI_DSIM
Ajay Kumar [Tue, 8 Jan 2013 20:42:24 +0000 (20:42 +0000)]
EXYNOS: Add dummy definition to fix compilation dependency on CONFIG_EXYNOS_MIPI_DSIM

When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM.
But if we do not select CONFIG_EXYNOS_MIPI_DSIM, exynos_fb.c throws
error saying exynos_mipi_dsi_init() not defined. So, we add
dummy definition for exynos_mipi_dsi_init when CONFIG_EXYNOS_MIPI_DSIM
is not defined.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS5: Change parent clock of FIMD to MPLL
Ajay Kumar [Tue, 8 Jan 2013 20:42:23 +0000 (20:42 +0000)]
EXYNOS5: Change parent clock of FIMD to MPLL

With VPLL as source clock to FIMD,
Exynos DP Initializaton was failing sometimes with unstable clock.
Changing FIMD source to MPLL resolves this issue.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS5: Add support for FIMD and DP
Ajay Kumar [Tue, 8 Jan 2013 20:42:26 +0000 (20:42 +0000)]
EXYNOS5: Add support for FIMD and DP

Add panel_info structure required by LCD driver
and DP panel platdata for SMDK5250.
Add GPIO configuration for LCD.
Enable FIMD and DP support on SMDK5250.
DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chomium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoPMIC: MAX77686: Add FDT Support
Rajeshwari Shinde [Tue, 8 Jan 2013 21:03:40 +0000 (21:03 +0000)]
PMIC: MAX77686: Add FDT Support

This patch adds fdt support to MAX77686.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>