Hou Zhiqiang [Tue, 27 Aug 2019 11:05:29 +0000 (11:05 +0000)]
configs: MPC8548CDS: Enable PCIe driver
Enable the DM PCIe driver in MPC8548CDS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:26 +0000 (11:05 +0000)]
powerpc: MPC8548CDS: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:23 +0000 (11:05 +0000)]
MPC8548: dts: Added PCIe DT node
MPC8548 integrated a PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for the PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:19 +0000 (11:05 +0000)]
dm: pcie_fsl: Add MPC8548 PCIe support
Add compatible string for MPC8548 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:16 +0000 (11:05 +0000)]
powerpc: MPC85xxCDS: Disable legacy PCI fixup when DM_PCI is selected
Disable legacy PCI and PCIe fixup when CONFIG_DM_PCI is selected.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:12 +0000 (11:05 +0000)]
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:09 +0000 (11:05 +0000)]
configs: P5040DS: Enable PCIe driver
Enable the DM PCIe driver in P5040DS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
eviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:06 +0000 (11:05 +0000)]
P5040: dts: Added PCIe DT nodes
P5040 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:02 +0000 (11:05 +0000)]
dm: pcie_fsl: Add P5040 PCIe support
Add compatible string for P5040 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:59 +0000 (11:04 +0000)]
configs: P4080DS: Enable PCIe driver
Enable the DM PCIe driver in P4080DS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:56 +0000 (11:04 +0000)]
P4080: dts: Added PCIe DT nodes
P4080 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:52 +0000 (11:04 +0000)]
dm: pcie_fsl: Add P4080 PCIe support
Add compatible string for P4080 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:49 +0000 (11:04 +0000)]
configs: P3041DS: Enable PCIe driver
Enable the DM PCIe driver in P3041DS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:45 +0000 (11:04 +0000)]
powerpc: corenet_ds: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:42 +0000 (11:04 +0000)]
P3041: dts: Added PCIe DT nodes
P3041 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:39 +0000 (11:04 +0000)]
dm: pcie_fsl: Add P3041 PCIe support
Add compatible string for P3041 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:35 +0000 (11:04 +0000)]
configs: P2041RDB: Enable PCIe driver
Enable the DM PCIe driver in P2041RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:32 +0000 (11:04 +0000)]
powerpc: P2041RDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:29 +0000 (11:04 +0000)]
P2041: dts: Added PCIe DT nodes
P2041 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:25 +0000 (11:04 +0000)]
dm: pcie_fsl: Add P2041 PCIe support
Add compatible string for P2041 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:22 +0000 (11:04 +0000)]
powerpc: p_corenet: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines for P2041RDB,
P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is
not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:18 +0000 (11:04 +0000)]
configs: P2020RDB: Enable PCIe driver
Enable the DM PCIe driver in P2020RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:15 +0000 (11:04 +0000)]
P2020: dts: Added PCIe DT nodes
P2020 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:11 +0000 (11:04 +0000)]
configs: P1020RDB: Enable PCIe driver
Enable the DM PCIe driver in P1020RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:08 +0000 (11:04 +0000)]
powerpc: p1_p2_rdb: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled
for P1020, P1021, P1024, P1025 and P2020 RDB boards.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:04 +0000 (11:04 +0000)]
P1020: dts: Added PCIe DT nodes
P1020 integrated 2 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:01 +0000 (11:04 +0000)]
dm: pcie_fsl: Add PCIe support for P1 and P2 series SoCs
Add compatible string for PCIe of P1020, P1021, P1024, P1025
and P2020 SoCs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:58 +0000 (11:03 +0000)]
powerpc: p1_p2_rdb: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines for P1020,
P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI
is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:54 +0000 (11:03 +0000)]
configs: T1042D4RDB: Enable PCIe driver
Enable the DM PCIe driver in T1042D4RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:51 +0000 (11:03 +0000)]
powerpc: T104xRDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:47 +0000 (11:03 +0000)]
t104x: dts: Added PCIe DT nodes
T104x integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:44 +0000 (11:03 +0000)]
dm: pcie_fsl: Add T104x PCIe support
Add compatible string for T104x PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:41 +0000 (11:03 +0000)]
powerpc: T104xRDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:37 +0000 (11:03 +0000)]
configs: T1024RDB: Enable PCIe driver
Enable the DM PCIe driver in T1024RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:34 +0000 (11:03 +0000)]
powerpc: T102xRDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:30 +0000 (11:03 +0000)]
powerpc: T102xRDB: Remove the useless macro CONFIG_ARCH_T1040
Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and
the PCIE4 related macros, as there are only 3 PCIe controllers
on T102x SoCs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:27 +0000 (11:03 +0000)]
t102x: dts: Added PCIe DT nodes
T102x integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:24 +0000 (11:03 +0000)]
dm: pcie_fsl: Add T102x PCIe support
Add compatible string for T102x PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:20 +0000 (11:03 +0000)]
powerpc: T102xRDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:16 +0000 (11:03 +0000)]
configs: T4240RDB: Enable PCIe driver
Enable the DM PCIe driver in T4240RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:13 +0000 (11:03 +0000)]
powerpc: T4240RDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:10 +0000 (11:03 +0000)]
t4240: dts: Added PCIe DT nodes
T4240 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 3.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:06 +0000 (11:03 +0000)]
dm: pcie_fsl: Add T4240 PCIe support
Add compatible string for T4240 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:03 +0000 (11:03 +0000)]
powerpc: T4RDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:02:59 +0000 (11:02 +0000)]
configs: T2080RDB: Enable PCIe driver
Enable the DM PCIe driver in T2080RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:02:56 +0000 (11:02 +0000)]
powerpc: T208xRDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:02:52 +0000 (11:02 +0000)]
powerpc: T208xRDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 10:13:54 +0000 (10:13 +0000)]
dm: pcie_fsl: Fix the calculation of controller index
The PCIe controller register address in CCSR is different
on various platforms, the current code erroneously use
the hardcoded address (0xffe240000) and stride (0x10000)
to calculate the controller's index.
Fix it by adding the related info to the driver data
structure.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 10:13:51 +0000 (10:13 +0000)]
dm: pcie_fsl: Fix the Class Code fixup function
The Class Code fixup method was changed from PCIe block
revision 3.0, the current fixup is only valid for the
revision 3.0 and the later ones.
So add the Class Code fixup for the block revision < 3.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 10:13:48 +0000 (10:13 +0000)]
dm: pcie_fsl: Convert IS_ENABLED() run-time checking to #ifdef
This can avoid build error:
The macro in brackets of the IS_ENABLED(CONFIG_FOO) is only
defined on the platforms that select the CONFIG_FOO, while
it's not defined on platforms that do not select the
CONFIG_FOO.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Tom Rini [Tue, 27 Aug 2019 11:11:37 +0000 (07:11 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
Support of device tree model for T2080RDB, T4240RDB, T1024RDB,
T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, P5040DS and
MPC8548CDS. Also support of i2c dm model.
Tom Rini [Tue, 27 Aug 2019 11:09:10 +0000 (07:09 -0400)]
Merge tag 'for-v2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for 2019.10
- misc: i2c_eeprom: verify that the chip is functional at probe()
- i2c: mxc_i2c: Remove i2c_idle_bus from probe
- i2c-mux-gpio: Fix GPIO request flag issue
Baruch Siach [Mon, 5 Aug 2019 06:03:30 +0000 (09:03 +0300)]
misc: i2c_eeprom: verify that the chip is functional at probe()
Read a single byte from EEPROM to verify that it is actually there.
This is equivalent to Linux kernel commit
00f0ea70d2b8 ("eeprom: at24:
check if the chip is functional in probe()").
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
hs: fixed style check prefer kernel type 'u8' over 'uint8_t'
Ye Li [Wed, 10 Jul 2019 10:24:15 +0000 (10:24 +0000)]
i2c: mxc_i2c: Remove i2c_idle_bus from probe
i2c_idle_bus is already used in i2c_init_transfer. So before each transfer
if the bus is not ready, the i2c_idle_bus will be used to force idle.
It is unnecessary to call it again in probe.
We found a issue when enabling i2c mux with the mxc_i2c. The mxc_i2c is probed
after mux probing. However, at this moment the mux is still in idle state not
select any port. So if we call i2c_idle_bus in probe, it will fail and cause
mxc_i2c probe failed.
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye Li [Wed, 10 Jul 2019 10:23:09 +0000 (10:23 +0000)]
i2c-mux-gpio: Fix GPIO request flag issue
When requesting GPIO, the GPIOD_IS_OUT is missed in flag, so the GPIO
is set the input mode not output and cause mux not work.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tom Rini [Tue, 27 Aug 2019 00:16:42 +0000 (20:16 -0400)]
Prepare v2019.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 26 Aug 2019 21:45:20 +0000 (17:45 -0400)]
Merge branch '2019-08-26-master-imports'
- Assorted minor bugfixes
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:36 +0000 (09:35 +0000)]
powerpc: Enable device tree support for MPC8548CDS
Add device tree for MPC8548CDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:35 +0000 (09:35 +0000)]
powerpc: mpc8548cds: extend the reserved length for monitor
Extend the reserved length for monitor to fix the following
build error:
BINMAN u-boot-with-dtb.bin
Wrote map file './image.map' to show errors
binman: Section '/binman': contents size 0x80000 (524288)
exceeds section size 0x40000 (262144)
Makefile:1373: recipe for target 'u-boot-with-dtb.bin' failed
make: *** [u-boot-with-dtb.bin] Error 1
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:34 +0000 (09:35 +0000)]
powerpc: dts: add default definition of CONFIG_RESET_VECTOR_ADDRESS
Add CONFIG_RESET_VECTOR_ADDRESS definition with the default value
in u-boot.dtsi to fix the build error below. In the configuration
header file of some MPC85xx boards, there is not the definition
of CONFIG_RESET_VECTOR_ADDRESS, while CONFIG_SYS_MPC85XX_NO_RESETVEC
is also not defined. In this case, it will lack of definition of
CONFIG_RESET_VECTOR_ADDRESS in u-boot.dtsi, and the address
0xfffffffc will be used as the boot page by default.
Error log:
DTC arch/powerpc/dts/mpc8548cds.dtb
DTC arch/powerpc/dts/mpc8548cds_36b.dtb
Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error
FATAL ERROR: Unable to parse input tree
Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error
FATAL ERROR: Unable to parse input tree
scripts/Makefile.lib:308: recipe for target
'arch/powerpc/dts/mpc8548cds.dtb' failed
make[2]: *** [arch/powerpc/dts/mpc8548cds.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
scripts/Makefile.lib:308: recipe for target
'arch/powerpc/dts/mpc8548cds_36b.dtb' failed
make[2]: *** [arch/powerpc/dts/mpc8548cds_36b.dtb] Error 1
dts/Makefile:38: recipe for target 'arch-dtbs' failed
make[1]: *** [arch-dtbs] Error 2
Makefile:1038: recipe for target 'dts/dt.dtb' failed
make: *** [dts/dt.dtb] Error 2
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:33 +0000 (09:35 +0000)]
powerpc: Enable device tree support for P5040DS
Add device tree for P5040DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:32 +0000 (09:35 +0000)]
powerpc: Enable device tree support for P4080DS
Add device tree for P4080DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:31 +0000 (09:35 +0000)]
powerpc: Enable device tree support for P3041DS
Add device tree for P3041DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:30 +0000 (09:35 +0000)]
powerpc: Enable device tree support for P2041RDB
Add device tree for P1041RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:29 +0000 (09:35 +0000)]
powerpc: Enable device tree support for P2020RDB
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:28 +0000 (09:35 +0000)]
powerpc: Enable device tree support for P1020RDB
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:27 +0000 (09:35 +0000)]
powerpc: Enable device tree support for T1042D4RDB
Add device tree for T1042D4RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:26 +0000 (09:35 +0000)]
powerpc: Enable device tree support for T1024RDB
Add device tree for T1024RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:25 +0000 (09:35 +0000)]
powerpc: Enable device tree support for T4240RDB
Add device tree for T4240RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:24 +0000 (09:35 +0000)]
powerpc: Enable device tree support for T2080RDB
Add device tree for T2080RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Heinrich Schuchardt [Thu, 22 Aug 2019 10:32:42 +0000 (12:32 +0200)]
tools: remove easylogo and include/video_logo.h
include/video_logo.h once was created via the tool easylogo and than used
in cpu/mpc8xx/video.c to display Tux. video_logo.h has been replaced by
include/linux_logo.h and is not needed anymore.
Delete the include and the tool,
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adam Ford [Thu, 22 Aug 2019 21:44:03 +0000 (16:44 -0500)]
ARM: am3517-evm: Disable CONFIG_USB_EHCI_OMAP in SPL
Found accidentally in omap3_logic, CONFIG_USB_EHCI_OMAP adds some
code size to SPL, so this patch disables it on the am3517-evm to
reduce the code a bit since it's tight for space.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 25 Aug 2019 15:01:14 +0000 (10:01 -0500)]
ARM: da850evm_direct_nor: Enable DM_GPIO
The SPI and NAND variants enable DM_GPIO, so this patch enables
DM_GPIO for the NOR / XIP version of the da850-evm.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 25 Aug 2019 14:34:49 +0000 (09:34 -0500)]
ARM: da850evm_nand: Enable Ethernet
The NAND configuration has had the ethernet missing, so this patch
enables the on-board ethernet interface.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 24 Aug 2019 18:50:34 +0000 (13:50 -0500)]
Kconfig: Varios: Fix more SPL, TPL dependencies
Several options are presenting themselves on a various boards
where the options are clearly not used. (ie, SPL/TPL options
when SPL or TPL are not defined)
This patch is not attempting to be a complete list of items, but
more like low hanging fruit. In some instances, I wasn't sure
of DM was required, so I simply made them SPL or TPL.
This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Signed-off-by: Adam Ford <aford173@gmail.com>
Samuel Egli [Fri, 23 Aug 2019 14:11:45 +0000 (16:11 +0200)]
MAINTAINERS,board/siemens: update maintainer
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Acked-by: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Hou Zhiqiang [Tue, 20 Aug 2019 09:35:23 +0000 (09:35 +0000)]
powerpc: mpc85xx: Add device tree support option for PBL boot image
The current Makefile always use u-boot.bin to generate
PBL boot image (u-boot.pbl), this patch changes it to
use u-boot-with-dtb.bin to support device tree when
CONFIG_OF_SEPARATE is enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Ricardo Ribalda Delgado [Fri, 23 Aug 2019 13:59:55 +0000 (15:59 +0200)]
mailmap: Update mail address
Update my email address from gmail to my domain.
Signed-off-by: Ricardo Ribalda Delgado <ricardo@ribalda.com>
Suniel Mahesh [Fri, 23 Aug 2019 08:36:34 +0000 (14:06 +0530)]
board: ti: am43xx_evm_usbboot: Enable DM for USB, fix SPL build errors
To address the following warning message:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
CONFIG_DM_USB is enabled, this resulted in SPL build errors:
drivers/built-in.o: In function 'xhci_dwc3_probe':
u-boot/drivers/usb/host/xhci-dwc3.c:155: undefined reference to 'usb_get_dr_mode'
scripts/Makefile.spl:404: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1721: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
Enabling usb common library and usb ethernet drivers in SPL
does the job. Target was compile tested, build was clean.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Aaron Williams [Fri, 23 Aug 2019 03:37:26 +0000 (20:37 -0700)]
nvme: Fix PRP Offset Invalid
When large writes take place I saw a Samsung EVO 970+ return a status
value of 0x13, PRP Offset Invalid. I tracked this down to the
improper handling of PRP entries. The blocks the PRP entries are
placed in cannot cross a page boundary and thus should be allocated
on page boundaries. This is how the Linux kernel driver works.
With this patch, the PRP pool is allocated on a page boundary and
other than the very first allocation, the pool size is a multiple of
the page size. Each page can hold (4096 / 8) - 1 entries since the
last entry must point to the next page in the pool.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Kunihiko Hayashi [Fri, 23 Aug 2019 01:56:55 +0000 (10:56 +0900)]
cmd: pci: Adjust display of digits for 64bit address and size
The command "pci bar" and "pci region" display the address and size in
16 characters including "0x", so the command can only display
14 hexadecimal digits if the number of digits in the address and size is
less than 14.
ID Base Size Width Type
----------------------------------------------------------
0 0x00000020000000 0x00000000100000 64 MEM Prefetchable
1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable
The 64-bit address and size should be displayed in 18(= 16+2) digits,
so this patch adjusts them.
Cc: Yehuda Yitschak <yehuday@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adam Ford [Thu, 22 Aug 2019 20:32:42 +0000 (15:32 -0500)]
ARM: omap3_logic: Fix SPL boot failure when EHCI enabled
Some of the USB code is still being built into SPL even when the
SPL menu options have it explicitly disabled for SPL. Unit there is
a better solution, This patch undefines CONFIG_USB_EHCI_OMAP when
building SPL which reduces the code and lets the board boot again.
Fixes:
25e4ff45b17d ("ARM: omap3_logic: Enable OMAP EHCI support
for SOM-LV Boards")
Signed-off-by: Adam Ford <aford173@gmail.com>
Heinrich Schuchardt [Thu, 22 Aug 2019 20:19:41 +0000 (22:19 +0200)]
cmd: gpio: remove redundant assignment
The assigned value NULL is overwritten before being used. Remove the
assignment.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sudeep Holla [Wed, 21 Aug 2019 17:29:10 +0000 (18:29 +0100)]
vexpress/aemv8a: drop CONFIG_ARMV8_SWITCH_TO_EL1
To support KVM, we need to drop at EL2 and not EL1 before we boot Linux
kernel. This causes issues on platform with VHE and secondaries booting
at EL2 via TF-A PSCI CPU_ON call.
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Sudeep Holla [Wed, 21 Aug 2019 17:29:09 +0000 (18:29 +0100)]
ARM: vexpress_*_defconfig: replace earlyprintk with earlycon
earlyprintk no longer works on arm64 platforms. Replace it with earlycon
which works fine.
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Heiko Schocher [Mon, 26 Aug 2019 15:28:34 +0000 (17:28 +0200)]
ddr, fsl: add DM_I2C support
add DM_I2C support for this driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Martin Vystrčil [Tue, 20 Aug 2019 20:18:30 +0000 (22:18 +0200)]
fat: FAT filesystem premature release of info struct.
File was found on specified location. Info about file was read,
but then immediately destroyed using 'free' call. As a result
file size was set to 0, hence fat process didn't read any data.
Premature 'free' call removed. Resources are freed right before
function return. File is read correctly.
Signed-off-by: Martin Vystrcil <martin.vystrcil@m-linux.cz>
Park, Aiden [Tue, 20 Aug 2019 16:47:42 +0000 (16:47 +0000)]
dm: scsi: Scan the actual number of ports
The scsi_scan_dev() is looping over the number of uc_plat->max_id.
The number of actual ports a AHCI controller has can be greater than
max_id. Update uc_plat->max_id to make SCSI scan all detected ports.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adam Ford [Tue, 20 Aug 2019 12:20:58 +0000 (07:20 -0500)]
ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux
When the pinmux configuration was added, it was accidentally placed into
the omap3_pmx_wkup node when it should have been placed into the
omap3_pmx_core. This error was accidentally propagated to U-Boot by
me when I blindly copied the device tree from Linux.
This patch moves the i2c2_pins and i2c3_pins to the correct node
which should eliminate i2c bus errors and timeouts due to the fact
the bootloader uses the save device tree that no longer properly
assigns these pins.
Signed-off-by: Adam Ford <aford173@gmail.com>
Vikas Manocha [Fri, 16 Aug 2019 16:57:44 +0000 (09:57 -0700)]
board_f: reserve noncached space below malloc area
Noncached area at present is being initialized to random space after malloc
area. It works in most the cases as it goes to stack area & stack is not
overwriting it being far from it.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Nuno Gonçalves [Wed, 10 Jul 2019 11:46:57 +0000 (13:46 +0200)]
arm: ti: Fix regression in distro boot for mmc
When devnum was changed to a local variable in distro_bootcmd we ran
into a problem on TI platforms (confirmed on Beaglebone) as we had been
using 'setenv devnum' there as well and it needs to match the other
usage.
Fixes:
13dd6665ed18 ("distro: not taint environment variables if possible")
[trini: Review other platforms, re-word commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 26 Aug 2019 13:50:46 +0000 (09:50 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Support SPL and OpenSBI (FW_DYNAMIC firmware) boot.
- Fix qemu kconfig build warning.
Tom Rini [Mon, 26 Aug 2019 13:37:37 +0000 (09:37 -0400)]
Merge branch '2019-08-24-master-imports'
- Migrate SYS_SPI_U_BOOT_OFFS, SYS_NAND_USE_FLASH_BBT and ARCH_CPU_INIT
to Kconfig
Bin Meng [Thu, 8 Aug 2019 06:04:41 +0000 (23:04 -0700)]
riscv: qemu: Fix kconfig build warning
When 'make qemu-riscv64_defconfig', there is a build warning:
board/emulation/qemu-riscv/Kconfig:24:
warning: config symbol defined without type
Fix it by specifying the config symbol type to 'hex'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Lukas Auer [Wed, 21 Aug 2019 19:14:50 +0000 (21:14 +0200)]
doc: update QEMU RISC-V documentation
The available defconfigs for RISC-V QEMU have changed. We now have
configurations to compile U-Boot to run in supervisor mode and for
U-Boot SPL. Update the QEMU RISC-V documentation to reflect these
changes.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:49 +0000 (21:14 +0200)]
riscv: qemu: add SPL configuration
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:48 +0000 (21:14 +0200)]
riscv: set default FIT generator script and build target for SPL builds
Now that we have a generic FIT generator script for RISC-V, set it as
the default. To also build the FIT image by default, set the default
build target to "u-boot.itb" if CONFIG_SPL_LOAD_FIT is enabled.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:47 +0000 (21:14 +0200)]
riscv: add a generic FIT generator script
Add a generic FIT generator script for RISC-V to generate images
containing U-Boot, OpenSBI FW_DYNAMIC firmware, and optionally one or
more device trees. The location of the OpenSBI firmware binary can be
specified with the OPENSBI environment variable. By default, it is
assumed to be "fw_dynamic.bin", located in the U-Boot top-level. Device
trees are passed as arguments to the generator script. A separate
configuration entry is created for each device tree.
The load addresses of U-Boot and OpenSBI are parsed from the U-Boot
configuration. They can be overwritten with the UBOOT_LOAD_ADDR and
OPENSBI_LOAD_ADDR environment variables.
The script is based on the i.MX (arch/arm/mach-imx/mkimage_fit_atf.sh)
and Allwinner sunxi (board/sunxi/mksunxi_fit_atf.sh) FIT generator
scripts.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:46 +0000 (21:14 +0200)]
riscv: support SPL stack and global data relocation
To support relocation of the stack and global data on RISC-V, the
secondary harts must be notified of the change using IPIs. We can reuse
the hart relocation code for this purpose. It uses global data to store
the new stack pointer and global data pointer for the secondary harts.
This means that we cannot update the global data pointer of the main
hart in spl_relocate_stack_gd(), because the secondary harts have not
yet been relocated at this point. It is updated after the secondary
harts have been notified.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:45 +0000 (21:14 +0200)]
riscv: add SPL support
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.
To be able to use SPL, boards have to provide a supported SPL boot
device.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>