ARM: tegra: Remove disp1 clock initialization on Tegra210
authorThierry Reding <treding@nvidia.com>
Mon, 15 Apr 2019 09:32:16 +0000 (11:32 +0200)
committerTom Warren <twarren@nvidia.com>
Wed, 5 Jun 2019 16:16:33 +0000 (09:16 -0700)
pll_c is not a valid parent for the disp1 clock, so trying to set it
will fail. Given that display is not used in U-Boot, remove the init
table entry so that disp1 will keep its default parent (clk_m).

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/mach-tegra/tegra210/clock.c

index 0d7cafea2017b4545b2e965905bf8e73878fad7a..b240860f08cf30e8c74dbdcf0f16dd701dc1978b 100644 (file)
@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = {
        { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
        { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
        { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
-       { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
        { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
        { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
        { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },