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arm: use a_ll/a_sc atomics when building for ARMv6T2
author
Andre McCurdy
<armccurdy@gmail.com>
Thu, 19 Apr 2018 01:51:44 +0000
(18:51 -0700)
committer
Rich Felker
<dalias@aerifal.cx>
Thu, 19 Apr 2018 16:36:37 +0000
(12:36 -0400)
ARMv6 cores with support for Thumb2 can take advantage of the "ldrex"
and "strex" based implementations of a_ll and a_sc.
arch/arm/atomic_arch.h
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diff --git
a/arch/arm/atomic_arch.h
b/arch/arm/atomic_arch.h
index 5ff1be1b3dc7b0ed1f75f0a176c3275012283996..62458b45237ab46d59e436065a38dda77b4d918e 100644
(file)
--- a/
arch/arm/atomic_arch.h
+++ b/
arch/arm/atomic_arch.h
@@
-8,7
+8,7
@@
extern uintptr_t __attribute__((__visibility__("hidden")))
__a_cas_ptr, __a_barrier_ptr;
#if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
- || __ARM_ARCH_
7A__ || __ARM_ARCH_7R__ ||
__ARM_ARCH >= 7
+ || __ARM_ARCH_
6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ ||
__ARM_ARCH >= 7
#define a_ll a_ll
static inline int a_ll(volatile int *p)